aboutsummaryrefslogtreecommitdiffstats
path: root/host/lib/usrp/x300/x300_impl.hpp
diff options
context:
space:
mode:
authorAshish Chaudhari <ashish@ettus.com>2015-07-22 17:54:17 -0700
committerAshish Chaudhari <ashish@ettus.com>2015-07-22 17:54:17 -0700
commitf76f599be281d773736940d53aafc6d7e9d536ca (patch)
tree51bbbfb2d7995c6de7a50671b929a054760c2765 /host/lib/usrp/x300/x300_impl.hpp
parentdfedaf1726cd6ed1dbfc1c9d8c40716a557b05ed (diff)
downloaduhd-f76f599be281d773736940d53aafc6d7e9d536ca.tar.gz
uhd-f76f599be281d773736940d53aafc6d7e9d536ca.tar.bz2
uhd-f76f599be281d773736940d53aafc6d7e9d536ca.zip
x300: Added a comprehensive radio reset sequence
- Everytime the LMK is configured, we do the following: - Reset all LMK regs - Wait for LMK lock - Reset radio_clk PLL in FPGA - Wait for FPGA PLL to lock - Assert radio_rst which resets downstream radio logic - This address the intermittent self-cal failures due to uncalibrated IDELAY taps - Bumped FPGA compat to 12
Diffstat (limited to 'host/lib/usrp/x300/x300_impl.hpp')
-rw-r--r--host/lib/usrp/x300/x300_impl.hpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp
index ad1c802ee..20cd4d754 100644
--- a/host/lib/usrp/x300/x300_impl.hpp
+++ b/host/lib/usrp/x300/x300_impl.hpp
@@ -390,10 +390,9 @@ private:
void set_time_source_out(mboard_members_t&, const bool);
void update_clock_source(mboard_members_t&, const std::string &);
void update_time_source(mboard_members_t&, const std::string &);
- void reset_radios(mboard_members_t&);
uhd::sensor_value_t get_ref_locked(uhd::wb_iface::sptr);
- bool wait_for_ref_locked(uhd::wb_iface::sptr, double timeout = 0.0);
+ bool wait_for_clk_locked(uhd::wb_iface::sptr, boost::uint32_t which, double timeout);
bool is_pps_present(uhd::wb_iface::sptr);
void set_db_eeprom(uhd::i2c_iface::sptr i2c, const size_t, const uhd::usrp::dboard_eeprom_t &);