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| author | Ashish Chaudhari <ashish@ettus.com> | 2016-02-19 17:38:08 -0800 |
|---|---|---|
| committer | Ashish Chaudhari <ashish@ettus.com> | 2016-02-26 14:23:34 -0800 |
| commit | c03506fedd75a7fbad242d2be06123a187e66277 (patch) | |
| tree | 0c24b9d015fd07ec0fa873c8d95c29716411941c /host/lib/usrp/dboard/db_ubx.cpp | |
| parent | 1c2f56bbc1ccd0bffaac8fa4da174d1ad130a3ba (diff) | |
| download | uhd-c03506fedd75a7fbad242d2be06123a187e66277.tar.gz uhd-c03506fedd75a7fbad242d2be06123a187e66277.tar.bz2 uhd-c03506fedd75a7fbad242d2be06123a187e66277.zip | |
dboard: Made dboard class dtors virtual
- Interface and all base classes have virtual destructors
- Wrapped UBX dtor in UHD_SAFE_CALL
Diffstat (limited to 'host/lib/usrp/dboard/db_ubx.cpp')
| -rw-r--r-- | host/lib/usrp/dboard/db_ubx.cpp | 48 |
1 files changed, 26 insertions, 22 deletions
diff --git a/host/lib/usrp/dboard/db_ubx.cpp b/host/lib/usrp/dboard/db_ubx.cpp index 91f1f51eb..88c8d93c9 100644 --- a/host/lib/usrp/dboard/db_ubx.cpp +++ b/host/lib/usrp/dboard/db_ubx.cpp @@ -29,6 +29,7 @@ #include <uhd/utils/log.hpp> #include <uhd/utils/msg.hpp> #include <uhd/utils/static.hpp> +#include <uhd/utils/safe_call.hpp> #include <boost/assign/list_of.hpp> #include <boost/shared_ptr.hpp> #include <boost/math/special_functions/round.hpp> @@ -477,31 +478,34 @@ public: .set(-8); } - ~ubx_xcvr(void) + virtual ~ubx_xcvr(void) { - // Shutdown synthesizers - _txlo1->shutdown(); - _txlo2->shutdown(); - _rxlo1->shutdown(); - _rxlo2->shutdown(); + UHD_SAFE_CALL + ( + // Shutdown synthesizers + _txlo1->shutdown(); + _txlo2->shutdown(); + _rxlo1->shutdown(); + _rxlo2->shutdown(); - // Reset CPLD values - _cpld_reg.value = 0; - write_cpld_reg(); + // Reset CPLD values + _cpld_reg.value = 0; + write_cpld_reg(); - // Reset GPIO values - set_gpio_field(TX_GAIN, 0); - set_gpio_field(CPLD_RST_N, 0); - set_gpio_field(RX_ANT, 1); - set_gpio_field(TX_EN_N, 1); - set_gpio_field(RX_EN_N, 1); - set_gpio_field(SPI_ADDR, 0x7); - set_gpio_field(RX_GAIN, 0); - set_gpio_field(TXLO1_SYNC, 0); - set_gpio_field(TXLO2_SYNC, 0); - set_gpio_field(RXLO1_SYNC, 0); - set_gpio_field(RXLO1_SYNC, 0); - write_gpio(); + // Reset GPIO values + set_gpio_field(TX_GAIN, 0); + set_gpio_field(CPLD_RST_N, 0); + set_gpio_field(RX_ANT, 1); + set_gpio_field(TX_EN_N, 1); + set_gpio_field(RX_EN_N, 1); + set_gpio_field(SPI_ADDR, 0x7); + set_gpio_field(RX_GAIN, 0); + set_gpio_field(TXLO1_SYNC, 0); + set_gpio_field(TXLO2_SYNC, 0); + set_gpio_field(RXLO1_SYNC, 0); + set_gpio_field(RXLO1_SYNC, 0); + write_gpio(); + ) } private: |