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| author | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
| commit | fd3e84941de463fa1a7ebab0a69515b4bf2614cd (patch) | |
| tree | 3fa721a13d41d2c0451d663a59a220a38fd5e614 /fpga/usrp3/lib/axi/axi_chdr_header_trigger.v | |
| parent | 3b66804e41891e358c790b453a7a59ec7462dba4 (diff) | |
| download | uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.gz uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.bz2 uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.zip | |
Removed copy of FPGA source files.
Diffstat (limited to 'fpga/usrp3/lib/axi/axi_chdr_header_trigger.v')
| -rw-r--r-- | fpga/usrp3/lib/axi/axi_chdr_header_trigger.v | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/fpga/usrp3/lib/axi/axi_chdr_header_trigger.v b/fpga/usrp3/lib/axi/axi_chdr_header_trigger.v deleted file mode 100644 index e8dee3675..000000000 --- a/fpga/usrp3/lib/axi/axi_chdr_header_trigger.v +++ /dev/null @@ -1,40 +0,0 @@ - -// Copyright 2014 Ettus Research LLC - - -module axi_chdr_header_trigger - #( - parameter WIDTH=64, - parameter SID=0 - ) - (input clk, input reset, input clear, - input [WIDTH-1:0] i_tdata, input i_tlast, input i_tvalid, input i_tready, - output trigger - ); - - - reg state; - localparam IDLE = 0; - localparam RUN = 1; - - - always @(posedge clk) - if(reset | clear) - state <= IDLE; - else - case (state) - IDLE : - if(i_tvalid && i_tready) - state <= RUN; - - RUN : - if(i_tready && i_tvalid && i_tlast) - state <= IDLE; - - default : - state <= IDLE; - endcase // case (state) - - assign trigger = i_tvalid && i_tready && (state == IDLE) && (i_tdata[15:0] != SID); - -endmodule // axi_chdr_header_trigger |