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| author | Josh Blum <josh@joshknows.com> | 2012-02-17 18:18:26 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-02-17 18:18:26 -0800 |
| commit | 3ddbcb6078593c39cb0e4bc8f9769f818a61466f (patch) | |
| tree | 408e3f6a64e31b7d830b9f884ecebdaf100a5d2d /fpga/usrp2/sdr_lib/cordic_z24.v | |
| parent | 1fab7e9d477aa98e489400c25a08358952c69c90 (diff) | |
| parent | ace4489066d1621a09e70650a00d736f0b03ed8c (diff) | |
| download | uhd-3ddbcb6078593c39cb0e4bc8f9769f818a61466f.tar.gz uhd-3ddbcb6078593c39cb0e4bc8f9769f818a61466f.tar.bz2 uhd-3ddbcb6078593c39cb0e4bc8f9769f818a61466f.zip | |
Merge branch 'next'
Diffstat (limited to 'fpga/usrp2/sdr_lib/cordic_z24.v')
| -rw-r--r-- | fpga/usrp2/sdr_lib/cordic_z24.v | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/fpga/usrp2/sdr_lib/cordic_z24.v b/fpga/usrp2/sdr_lib/cordic_z24.v index 97b7beaf7..51b074a33 100644 --- a/fpga/usrp2/sdr_lib/cordic_z24.v +++ b/fpga/usrp2/sdr_lib/cordic_z24.v @@ -119,8 +119,6 @@ module cordic_z24(clock, reset, enable, xi, yi, zi, xo, yo, zo ); assign xo = x20[bitwidth:1]; assign yo = y20[bitwidth:1]; assign zo = z20; - //assign xo = x20[bitwidth+1:2]; // CORDIC gain is ~1.6, plus gain from rotating vectors - //assign yo = y20[bitwidth+1:2]; endmodule // cordic |