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| author | Josh Blum <josh@joshknows.com> | 2012-02-17 16:55:59 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-02-17 16:55:59 -0800 |
| commit | ace4489066d1621a09e70650a00d736f0b03ed8c (patch) | |
| tree | f02b34b70da9e9beb0f34dc5e64d48daa5aa4bf6 /fpga/usrp2/sdr_lib/cordic_z24.v | |
| parent | 8f8ac3397aaa85b64aaa8722efdc1c0c40e93052 (diff) | |
| parent | 2e37dd87234e5beddd6f76fcda714916f761f812 (diff) | |
| download | uhd-ace4489066d1621a09e70650a00d736f0b03ed8c.tar.gz uhd-ace4489066d1621a09e70650a00d736f0b03ed8c.tar.bz2 uhd-ace4489066d1621a09e70650a00d736f0b03ed8c.zip | |
Merge branch 'fpga_next' into next
Diffstat (limited to 'fpga/usrp2/sdr_lib/cordic_z24.v')
| -rw-r--r-- | fpga/usrp2/sdr_lib/cordic_z24.v | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/fpga/usrp2/sdr_lib/cordic_z24.v b/fpga/usrp2/sdr_lib/cordic_z24.v index 97b7beaf7..51b074a33 100644 --- a/fpga/usrp2/sdr_lib/cordic_z24.v +++ b/fpga/usrp2/sdr_lib/cordic_z24.v @@ -119,8 +119,6 @@ module cordic_z24(clock, reset, enable, xi, yi, zi, xo, yo, zo ); assign xo = x20[bitwidth:1]; assign yo = y20[bitwidth:1]; assign zo = z20; - //assign xo = x20[bitwidth+1:2]; // CORDIC gain is ~1.6, plus gain from rotating vectors - //assign yo = y20[bitwidth+1:2]; endmodule // cordic |