diff options
Diffstat (limited to 'host/lib/usrp/common/ad9361_ctrl.cpp')
| -rw-r--r-- | host/lib/usrp/common/ad9361_ctrl.cpp | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/host/lib/usrp/common/ad9361_ctrl.cpp b/host/lib/usrp/common/ad9361_ctrl.cpp index 0754d2c86..bf0bb75d2 100644 --- a/host/lib/usrp/common/ad9361_ctrl.cpp +++ b/host/lib/usrp/common/ad9361_ctrl.cpp @@ -24,35 +24,35 @@ using namespace uhd::usrp; class ad9361_io_spi : public ad9361_io { public: - ad9361_io_spi(uhd::spi_iface::sptr spi_iface, uint32_t slave_num) : + ad9361_io_spi(uhd::spi_iface::sptr spi_iface, boost::uint32_t slave_num) : _spi_iface(spi_iface), _slave_num(slave_num) { } virtual ~ad9361_io_spi() { } - virtual uint8_t peek8(uint32_t reg) + virtual boost::uint8_t peek8(boost::uint32_t reg) { uhd::spi_config_t config; config.mosi_edge = uhd::spi_config_t::EDGE_FALL; config.miso_edge = uhd::spi_config_t::EDGE_FALL; //TODO (Ashish): FPGA SPI workaround. This should be EDGE_RISE - uint32_t rd_word = AD9361_SPI_READ_CMD | - ((uint32_t(reg) << AD9361_SPI_ADDR_SHIFT) & AD9361_SPI_ADDR_MASK); + boost::uint32_t rd_word = AD9361_SPI_READ_CMD | + ((boost::uint32_t(reg) << AD9361_SPI_ADDR_SHIFT) & AD9361_SPI_ADDR_MASK); - uint32_t val = (_spi_iface->read_spi(_slave_num, config, rd_word, AD9361_SPI_NUM_BITS)); + boost::uint32_t val = (_spi_iface->read_spi(_slave_num, config, rd_word, AD9361_SPI_NUM_BITS)); val &= 0xFF; - return static_cast<uint8_t>(val); + return static_cast<boost::uint8_t>(val); } - virtual void poke8(uint32_t reg, uint8_t val) + virtual void poke8(boost::uint32_t reg, boost::uint8_t val) { uhd::spi_config_t config; config.mosi_edge = uhd::spi_config_t::EDGE_FALL; config.miso_edge = uhd::spi_config_t::EDGE_FALL; //TODO (Ashish): FPGA SPI workaround. This should be EDGE_RISE - uint32_t wr_word = AD9361_SPI_WRITE_CMD | - ((uint32_t(reg) << AD9361_SPI_ADDR_SHIFT) & AD9361_SPI_ADDR_MASK) | - ((uint32_t(val) << AD9361_SPI_DATA_SHIFT) & AD9361_SPI_DATA_MASK); + boost::uint32_t wr_word = AD9361_SPI_WRITE_CMD | + ((boost::uint32_t(reg) << AD9361_SPI_ADDR_SHIFT) & AD9361_SPI_ADDR_MASK) | + ((boost::uint32_t(val) << AD9361_SPI_DATA_SHIFT) & AD9361_SPI_DATA_MASK); _spi_iface->write_spi(_slave_num, config, wr_word, AD9361_SPI_NUM_BITS); //TODO (Ashish): Is this necessary? The FX3 firmware does it right now but for @@ -62,15 +62,15 @@ public: private: uhd::spi_iface::sptr _spi_iface; - uint32_t _slave_num; - - static const uint32_t AD9361_SPI_WRITE_CMD = 0x00800000; - static const uint32_t AD9361_SPI_READ_CMD = 0x00000000; - static const uint32_t AD9361_SPI_ADDR_MASK = 0x003FFF00; - static const uint32_t AD9361_SPI_ADDR_SHIFT = 8; - static const uint32_t AD9361_SPI_DATA_MASK = 0x000000FF; - static const uint32_t AD9361_SPI_DATA_SHIFT = 0; - static const uint32_t AD9361_SPI_NUM_BITS = 24; + boost::uint32_t _slave_num; + + static const boost::uint32_t AD9361_SPI_WRITE_CMD = 0x00800000; + static const boost::uint32_t AD9361_SPI_READ_CMD = 0x00000000; + static const boost::uint32_t AD9361_SPI_ADDR_MASK = 0x003FFF00; + static const boost::uint32_t AD9361_SPI_ADDR_SHIFT = 8; + static const boost::uint32_t AD9361_SPI_DATA_MASK = 0x000000FF; + static const boost::uint32_t AD9361_SPI_DATA_SHIFT = 0; + static const boost::uint32_t AD9361_SPI_NUM_BITS = 24; }; /*********************************************************************** @@ -177,7 +177,7 @@ private: // Make an instance of the AD9361 Control interface //---------------------------------------------------------------------- ad9361_ctrl::sptr ad9361_ctrl::make_spi( - ad9361_params::sptr client_settings, uhd::spi_iface::sptr spi_iface, uint32_t slave_num) + ad9361_params::sptr client_settings, uhd::spi_iface::sptr spi_iface, boost::uint32_t slave_num) { boost::shared_ptr<ad9361_io_spi> spi_io_iface = boost::make_shared<ad9361_io_spi>(spi_iface, slave_num); return sptr(new ad9361_ctrl_impl(client_settings, spi_io_iface)); |