diff options
Diffstat (limited to 'fpga/usrp3/top/e320/dts/usrp_e320_fpga_XG.dts')
| -rw-r--r-- | fpga/usrp3/top/e320/dts/usrp_e320_fpga_XG.dts | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/fpga/usrp3/top/e320/dts/usrp_e320_fpga_XG.dts b/fpga/usrp3/top/e320/dts/usrp_e320_fpga_XG.dts new file mode 100644 index 000000000..3c64cfbf7 --- /dev/null +++ b/fpga/usrp3/top/e320/dts/usrp_e320_fpga_XG.dts @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright (c) 2018 National Instruments Corp + */ + +/dts-v1/; +/plugin/; + +#include "e320-fpga.dtsi" + +&fpga_full { + nixge0: ethernet@40000000 { + compatible = "ni,xge-enet-2.00"; + reg = <0x40000000 0x6000>; //FIXME + + clocks = <&clkc 15>; + clock-names = "bus_clk"; + + nvmem-cells = <ð1_addr>; + nvmem-cell-names = "address"; + + interrupts = <0 29 4>, <0 30 4>; + interrupt-names = "rx", "tx"; + interrupt-parent = <&intc>; + status = "okay"; + + phy-mode = "xgmii"; + phy-handle = <ðernet_phy1>; + + mdio { + ethernet_phy1: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <4>; + }; + }; + }; + + uio@40006000 { + compatible = "usrp-uio"; + reg = <0x40006000 0x2000>; //FIXME + reg-names = "misc-enet-regs"; + status = "okay"; + }; +}; + +#include "e320-common.dtsi" +#include "dma-common.dtsi" |