diff options
Diffstat (limited to 'fpga/usrp3/top/b2xxmini')
244 files changed, 93535 insertions, 0 deletions
diff --git a/fpga/usrp3/top/b2xxmini/.gitignore b/fpga/usrp3/top/b2xxmini/.gitignore new file mode 100644 index 000000000..f61be8ab7 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/.gitignore @@ -0,0 +1,7 @@ +build* +catcap_tb +catgen_tb +fuse* +isim* +_impact* +coregen.log diff --git a/fpga/usrp3/top/b2xxmini/Makefile b/fpga/usrp3/top/b2xxmini/Makefile new file mode 100644 index 000000000..9031b17db --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/Makefile @@ -0,0 +1,91 @@ +# +# Copyright 2015 Ettus Research LLC +# + +# NOTE: All comments prefixed with a "##" will be displayed as a part of the "make help" target +##------------------- +##USRP B2XXXmini FPGA Help +##------------------- +##Usage: +## make <Targets> <Options> +## +##Output: +## build/usrp_<product>_fpga.bit: Configuration bitstream with header +## build/usrp_<product>_fpga.bin: Configuration bitstream without header +## build/usrp_<product>_fpga.syr: Xilinx system report +## build/usrp_<product>_fpga.twr: Xilinx timing report + +print_report = \ + echo "========================================================================"; \ + cat $(1)/b205.syr | grep "Device utilization summary:" -A 30; \ + echo "========================================================================"; \ + echo "Timing Summary:\n"; \ + cat $(1)/b205.twr | grep constraint | grep met | grep -v "*"; \ + echo "========================================================================"; + +# pre_build($1=Device) +ifeq ($(EXPORT_ONLY),1) + pre_build = @test -s build-$(1)/b205.bit || { echo "EXPORT_ONLY requires the project in build-$(1) to be fully built."; false; } +else + pre_build = @echo "ISE Version: $(shell xtclsh -h | head -n1)" +endif + +# ise_build($1=Device, $2=Definitions) +ifeq ($(PROJECT_ONLY),1) + ise_build = make -f Makefile.b205.inc proj NAME=$@ DEVICE=$1 +else ifeq ($(EXPORT_ONLY),1) + ise_build = @echo "Skipping ISE build and exporting pre-built files."; +else + ise_build = make -f Makefile.b205.inc bin NAME=$@ DEVICE=$1 +endif + +# post_build($1=Device) +ifeq ($(PROJECT_ONLY),1) + post_build = \ + @echo "Generated $(shell pwd)/build-$(1)/b205.xise"; \ + echo "\nProject Generation DONE ... $(1)\n"; +else + post_build = \ + @$(call print_report,build-$(1)) \ + mkdir -p build; \ + echo "Exporting bitstream files..."; \ + cp build-$(1)/b205.bin build/usrp_`echo $(1) | tr A-Z a-z`_fpga.bin; \ + cp build-$(1)/b205.bit build/usrp_`echo $(1) | tr A-Z a-z`_fpga.bit; \ + echo "Exporting logs..."; \ + cp build-$(1)/b205.syr build/usrp_`echo $(1) | tr A-Z a-z`_fpga.syr; \ + cp build-$(1)/b205.twr build/usrp_`echo $(1) | tr A-Z a-z`_fpga.twr; \ + echo "\nBuild DONE ... $(1)\n"; +endif + +## +##Supported Targets +##----------------- + +all: B200mini B205mini ##(Default target) + +B200mini: ##Build USRP B200mini design. + $(call pre_build,B200mini) + $(call ise_build,XC6SLX75) + $(call post_build,B200mini) + +B205mini: ##Build USRP B205mini design. + $(call pre_build,B205mini) + $(call ise_build,XC6SLX150) + $(call post_build,B205mini) + +clean: ##Clean up all build output. + rm -rf build-* + rm -rf build + +help: ## Show this help message. + @grep -h "##" Makefile | grep -v "\"##\"" | sed -e 's/\\$$//' | sed -e 's/##//' + +## +##Supported Options +##----------------- +##PROJECT_ONLY=1 Only create a Xilinx project for the specified target(s). +## Useful for use with the ISE GUI. +##EXPORT_ONLY=1 Export build targets from a GUI build to the build directory. +## Requires the project in build-*_* to be built. + +.PHONY: all clean help B200mini B205mini diff --git a/fpga/usrp3/top/b2xxmini/Makefile.b205.inc b/fpga/usrp3/top/b2xxmini/Makefile.b205.inc new file mode 100644 index 000000000..a1da7f22f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/Makefile.b205.inc @@ -0,0 +1,129 @@ +# +# Copyright 2012-2013 Ettus Research LLC +# + +################################################## +# Project Setup +################################################## +TOP_MODULE := b205 +BUILD_DIR := build-$(NAME)/ +export PROJ_FILE := $(BUILD_DIR)$(TOP_MODULE).ise + +# set me in a custom makefile +CUSTOM_SRCS = +CUSTOM_DEFS = + +include ../Makefile.common +include ../../lib/gpif2/Makefile.srcs +include ../../lib/fifo/Makefile.srcs +include ../../lib/fifo_200/Makefile.srcs +include ../../lib/dsp/Makefile.srcs +include ../../lib/control/Makefile.srcs +include ../../lib/control_200/Makefile.srcs +include ../../lib/packet_proc/Makefile.srcs +include ../../lib/packet_proc_200/Makefile.srcs +include ../../lib/timing/Makefile.srcs +include ../../lib/vita_200/Makefile.srcs +include ../../lib/wishbone/Makefile.srcs +include ../../lib/axi/Makefile.srcs +include ../../lib/radio_200/Makefile.srcs +include coregen_dsp/Makefile.srcs + + +B205_COREGEN_SRCS = \ +coregen/b205_clk_gen.v \ +coregen/fifo_4k_2clk.xco \ +coregen/fifo_short_2clk.xco \ +coregen/chipscope_icon.xco \ +coregen/chipscope_ila.xco + +################################################## +# Project Properties +################################################## +export PROJECT_PROPERTIES := \ +family "Spartan6" \ +device $(DEVICE) \ +package csg484 \ +speed -3 \ +top_level_module_type "HDL" \ +synthesis_tool "XST (VHDL/Verilog)" \ +simulator "ISE Simulator (VHDL/Verilog)" \ +"Preferred Language" "Verilog" \ +"Enable Message Filtering" FALSE \ +"Display Incremental Messages" FALSE + +################################################## +# Sources +################################################## +TOP_SRCS = \ +b205.v \ +b205_ref_pll.v \ +b205_core.v \ +b205_io.v \ +b205.ucf \ +timing.ucf \ +../b200/S6CLK2PIN.v \ +$(B205_COREGEN_SRCS) + +SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) $(FIFO_200_SRCS) \ +$(CONTROL_LIB_SRCS) $(CONTROL_LIB_200_SRCS) $(SDR_LIB_SRCS) \ +$(TIMING_SRCS) $(OPENCORES_SRCS) \ +$(VRT_SRCS) \ +$(GPIF2_SRCS) $(PACKET_PROC_SRCS) $(PACKET_PROC_200_SRCS) \ +$(WISHBONE_SRCS) \ +$(TIMING_SRCS) \ +$(DSP_SRCS) \ +$(VITA_200_SRCS) \ +$(AXI_SRCS) \ +$(RADIO_200_SRCS) \ +$(CAT_CAP_GEN_SRCS) \ +$(COREGEN_DSP_SRCS) + +################################################## +# Process Properties +################################################## +SYNTHESIZE_PROPERTIES = \ +"Pack I/O Registers into IOBs" Yes \ +"Optimization Effort" High \ +"Optimize Instantiated Primitives" TRUE \ +"Register Balancing" Yes \ +"Use Clock Enable" Auto \ +"Use Synchronous Reset" Auto \ +"Use Synchronous Set" Auto \ +"Verilog Macros" "SPARTAN6=1 $(EXTRA_DEFS) $(CUSTOM_DEFS)" \ +"Other XST Command Line Options" "-loop_iteration_limit 16385" + +#"Number of Clock Buffers" 8 \ + +TRANSLATE_PROPERTIES = \ +"Macro Search Path" "$(shell pwd)/../../coregen/" + +MAP_PROPERTIES = \ +"Generate Detailed MAP Report" TRUE \ +"Allow Logic Optimization Across Hierarchy" TRUE \ +"Map to Input Functions" 4 \ +"Optimization Strategy (Cover Mode)" Speed \ +"Pack I/O Registers/Latches into IOBs" "For Inputs and Outputs" \ +"Perform Timing-Driven Packing and Placement" TRUE \ +"Map Effort Level" High \ +"Extra Effort" Normal \ +"Combinatorial Logic Optimization" TRUE \ +"Register Duplication" TRUE + +PLACE_ROUTE_PROPERTIES = \ +"Place & Route Effort Level (Overall)" High + +STATIC_TIMING_PROPERTIES = \ +"Number of Paths in Error/Verbose Report" 10 \ +"Report Type" "Error Report" + +GEN_PROG_FILE_PROPERTIES = \ +"Create Binary Configuration File" TRUE \ +"Done (Output Events)" 5 \ +"Enable Bitstream Compression" TRUE \ +"Unused IOB Pins" "Pull Up" + +#"Configuration Rate" 6 \ +#"Enable Outputs (Output Events)" 6 \ + +SIM_MODEL_PROPERTIES = "" diff --git a/fpga/usrp3/top/b2xxmini/b205.ucf b/fpga/usrp3/top/b2xxmini/b205.ucf new file mode 100644 index 000000000..9d1b89fd8 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/b205.ucf @@ -0,0 +1,157 @@ + +#### FX3 Lines ############################################################## +# GPIF Data lines +NET "FX3_DQ<0>" LOC = "T22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<1>" LOC = "T21" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<2>" LOC = "M19" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<3>" LOC = "R22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<4>" LOC = "R20" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<5>" LOC = "R19" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<6>" LOC = "P20" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<7>" LOC = "N19" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<8>" LOC = "P22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<9>" LOC = "N20" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<10>" LOC = "P21" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<11>" LOC = "M21" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<12>" LOC = "N22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<13>" LOC = "L22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<14>" LOC = "M22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<15>" LOC = "P19" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<16>" LOC = "D21" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<17>" LOC = "F22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<18>" LOC = "C22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<19>" LOC = "D22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<20>" LOC = "E22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<21>" LOC = "B22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<22>" LOC = "B21" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<23>" LOC = "F20" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<24>" LOC = "G19" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<25>" LOC = "D20" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<26>" LOC = "E20" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<27>" LOC = "D19" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<28>" LOC = "J19" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<29>" LOC = "C20" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<30>" LOC = "F19" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data +NET "FX3_DQ<31>" LOC = "C18" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # FX3 Parallel Data + +NET "FX3_PCLK" LOC = "H20" | IOSTANDARD = LVCMOS18 | DRIVE = 6 | SLEW = SLOW; # FX3 Data Synchronization Clock, called IFCLK in B200 + +# GPIF Control Lines +NET "FX3_CTL0" LOC = "M20" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # SLCSn +NET "FX3_CTL1" LOC = "J22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # SLWRn +NET "FX3_CTL2" LOC = "J21" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # SLOEn +NET "FX3_CTL3" LOC = "K22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # SLRDn +NET "FX3_CTL4" LOC = "M18" | IOSTANDARD = LVCMOS18 ; # FLAG_A +NET "FX3_CTL5" LOC = "L19" | IOSTANDARD = LVCMOS18 ; # FLAG_B +NET "FX3_CTL6" LOC = "H22" | IOSTANDARD = LVCMOS18 ; # +NET "FX3_CTL7" LOC = "L20" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # PKTENDn +NET "FX3_CTL8" LOC = "K19" | IOSTANDARD = LVCMOS18 ; # +NET "FX3_CTL9" LOC = "K20" | IOSTANDARD = LVCMOS18 ; # +##FX3_CTL10 is not for general signaling +NET "FX3_CTL11" LOC = "H21" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # A1 +NET "FX3_CTL12" LOC = "G22" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # A0 + + +#### AD9364 ################################################################# +NET "CAT_RESETn" LOC = "T3" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Global Reset +NET "CAT_EN_AGC" LOC = "AA4" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver AGC Enable +NET "CAT_EN" LOC = "V3" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Globe Enable +NET "CAT_TXnRX" LOC = "Y4" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Globe TX and RX control + +# SPI +NET "CAT_SPI_EN" LOC = "T4" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Controller SPI Latch +NET "CAT_SPI_CLK" LOC = "Y3" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Controller SPI Serial Clock +NET "CAT_SPI_DI" LOC = "AA2" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Controller SPI Data In +NET "CAT_SPI_DO" LOC = "U4" | IOSTANDARD = LVCMOS18 | PULLUP; # Transceiver Controller SPI Data Out + +# Control Lines +NET "CAT_CTL_OUT<0>" LOC = "D2" | IOSTANDARD = LVCMOS18 ; # +NET "CAT_CTL_OUT<1>" LOC = "AB4" | IOSTANDARD = LVCMOS18 ; # +NET "CAT_CTL_OUT<2>" LOC = "AB3" | IOSTANDARD = LVCMOS18 ; # +NET "CAT_CTL_OUT<3>" LOC = "K3" | IOSTANDARD = LVCMOS18 ; # +NET "CAT_CTL_OUT<4>" LOC = "AB2" | IOSTANDARD = LVCMOS18 ; # +NET "CAT_CTL_OUT<5>" LOC = "T7" | IOSTANDARD = LVCMOS18 ; # +NET "CAT_CTL_OUT<6>" LOC = "U8" | IOSTANDARD = LVCMOS18 ; # +NET "CAT_CTL_OUT<7>" LOC = "W4" | IOSTANDARD = LVCMOS18 ; # +NET "CAT_CTL_IN<0>" LOC = "H5" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # +NET "CAT_CTL_IN<1>" LOC = "H3" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # +NET "CAT_CTL_IN<2>" LOC = "J4" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # +NET "CAT_CTL_IN<3>" LOC = "D1" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # + +# Rx Bus +NET "CAT_P0_D<0>" LOC = "H1" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P0_D<1>" LOC = "H2" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P0_D<2>" LOC = "G1" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LT. +NET "CAT_P0_D<3>" LOC = "G3" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LT. +NET "CAT_P0_D<4>" LOC = "F1" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LT. +NET "CAT_P0_D<5>" LOC = "F2" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LT. +NET "CAT_P0_D<6>" LOC = "E1" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LT. +NET "CAT_P0_D<7>" LOC = "E3" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LT. +NET "CAT_P0_D<8>" LOC = "L1" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P0_D<9>" LOC = "L3" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P0_D<10>" LOC = "M1" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P0_D<11>" LOC = "M2" | IOSTANDARD = LVCMOS18; # Transceiver Parallel Data. Bank3 LB. + +# Tx Bus +NET "CAT_P1_D<0>" LOC = "T1" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<1>" LOC = "T2" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<2>" LOC = "U1" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<3>" LOC = "U3" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<4>" LOC = "V1" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<5>" LOC = "V2" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<6>" LOC = "W1" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<7>" LOC = "W3" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<8>" LOC = "Y1" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<9>" LOC = "Y2" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<10>" LOC = "R1" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. +NET "CAT_P1_D<11>" LOC = "R3" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Transceiver Parallel Data. Bank3 LB. + +# Frame syncs +NET "CAT_TX_FR_N" LOC = "K1" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Bank3 LB. +NET "CAT_TX_FR_P" LOC = "K2" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Bank3 LB. +#NET "CAT_RX_FR_N" LOC = "P1" | IOSTANDARD = LVCMOS18; # Bank3 LB. +NET "CAT_RX_FR_P" LOC = "P2" | IOSTANDARD = LVCMOS18; # Bank3 LB. + +# Clocks ('N' clock lines are currently unused) +#NET "CAT_DCLK_N" LOC = "P3" | IOSTANDARD = LVCMOS18; # Data Clock +NET "CAT_DCLK_P" LOC = "N4" | IOSTANDARD = LVCMOS18; # Data Clock +NET "CAT_FBCLK_P" LOC = "J3" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Clock to AD9364. Bank3 LB. +NET "CAT_FBCLK_N" LOC = "J1" | IOSTANDARD = LVCMOS18 | DRIVE = 2 | SLEW = SLOW; # Clock to AD9364. Bank3 LB. + +#### Peripherals ############################################################ +# Radio Switchery +NET "cFE_SEL_TRX_TX" LOC = "A5" | IOSTANDARD = LVCMOS33 | DRIVE = 2 | SLEW = SLOW; # TRX Switch, high to enable TX path (Always on for Duplex) (high for now) +NET "cFE_SEL_TRX_RX" LOC = "A6" | IOSTANDARD = LVCMOS33 | DRIVE = 2 | SLEW = SLOW; # TRX Switch, high to enable RX path (Always off for Duplex) (low for now) +NET "cFE_SEL_RX_TRX" LOC = "B3" | IOSTANDARD = LVCMOS33 | DRIVE = 2 | SLEW = SLOW; # high to enable RX path to TRX switch (Always off for Duplex) (low for now) +NET "cFE_SEL_RX_RX2" LOC = "C5" | IOSTANDARD = LVCMOS33 | DRIVE = 2 | SLEW = SLOW; # high to enable RX path to RX2 port (Always on for Duplex) (high for now) +NET "cTXDRV_PWEN" LOC = "A4" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW; # high to enable power to TX power amplifier (high for now) + +# LEDs R: 5mA / G: 1.25mA / B: 2.5mA (the mcd is equalized with this number), set by resistor already, with LVTTL logic (3.3V) +NET "cLED_TRX_G" LOC = "A7" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW; # low to turn on TRX port LED green +NET "cLED_TRX_B" LOC = "B6" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW; # low to turn on TRX port LED blue +NET "cLED_TRX_R" LOC = "C6" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW; # low to turn on TRX port LED red +NET "cLED_RX2_G" LOC = "A9" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW; # low to turn on RX2 port LED green +NET "cLED_RX2_B" LOC = "B8" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW; # low to turn on RX2 port LED blue +NET "cLED_RX2_R" LOC = "A8" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW; # low to turn on RX2 port LED red +NET "cLED_S0" LOC = "B10" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW; # low to turn on S0 port LED red +NET "cLED_S1" LOC = "A10" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW; # low to turn on S1 port LED red + + +# Clocking +NET "CLK_40MHz_FPGA" LOC = "AA10" | IOSTANDARD = LVCMOS18; # 40MHz VCTCXO clock feed back +NET "PPS_IN" LOC = "B12" | IOSTANDARD = LVCMOS33; # Pulse per second input (external) +NET "CLKIN_10MHz" LOC = "E6" | IOSTANDARD = LVCMOS18; # 10MHz from external source +NET "CLKIN_10MHz_REQ" LOC = "E5" | IOSTANDARD = LVCMOS18; # select 10MHz from external source +NET "CLK_40M_DAC_nSYNC" LOC = "C17" | IOSTANDARD = LVCMOS33 | DRIVE = 2 | SLEW = SLOW; # 40MHz VCTCXO triming DAC serial frame/data latch (high for now) +NET "CLK_40M_DAC_SCLK" LOC = "D17" | IOSTANDARD = LVCMOS33 | DRIVE = 2 | SLEW = SLOW; # 40MHz VCTCXO triming DAC serial data clock (low for now) +NET "CLK_40M_DAC_DIN" LOC = "C16" | IOSTANDARD = LVCMOS33 | DRIVE = 2 | SLEW = SLOW; # 40MHz VCTCXO triming DAC serial data (low for now) + +## GPIO bus +NET "fp_gpio<0>" LOC = "A18" | IOSTANDARD = LVCMOS33 | PULLUP; +NET "fp_gpio<1>" LOC = "A17" | IOSTANDARD = LVCMOS33 | PULLUP; +NET "fp_gpio<2>" LOC = "B16" | IOSTANDARD = LVCMOS33 | PULLUP; +NET "fp_gpio<3>" LOC = "B18" | IOSTANDARD = LVCMOS33 | PULLUP; +NET "fp_gpio<4>" LOC = "C15" | IOSTANDARD = LVCMOS33 | PULLUP; +NET "fp_gpio<5>" LOC = "A15" | IOSTANDARD = LVCMOS33 | PULLUP; +NET "fp_gpio<6>" LOC = "A16" | IOSTANDARD = LVCMOS33 | PULLUP; +NET "fp_gpio<7>" LOC = "A13" | IOSTANDARD = LVCMOS33 | PULLUP; diff --git a/fpga/usrp3/top/b2xxmini/b205.v b/fpga/usrp3/top/b2xxmini/b205.v new file mode 100644 index 000000000..3b95521c4 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/b205.v @@ -0,0 +1,298 @@ +// +// Copyright 2015 Ettus Research, a National Instruments Company +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// + +/*********************************************************** + * B205 Module Declaration + **********************************************************/ +module b205 ( + // AD9364 - SPI Interface: + output CAT_SPI_EN, // Enable + input CAT_SPI_DO, // MISO + output CAT_SPI_DI, // MOSI + output CAT_SPI_CLK, // SPI Clk + + // AD9364 - Control: + output CAT_EN, + output CAT_EN_AGC, + output CAT_RESETn, + output CAT_TXnRX, + output [3:0] CAT_CTL_IN, // These should be outputs + input [7:0] CAT_CTL_OUT, // MUST BE INPUT + + // AD9364 - Data: + input CAT_DCLK_P, // Clock from AD9364 (RX) + output CAT_FBCLK_P, // Clock to AD9364 (TX) + output CAT_FBCLK_N, + input [11:0] CAT_P0_D, // RX data is on Port 0 + output [11:0] CAT_P1_D, // TX data is on Port 1 + input CAT_RX_FR_P, + output CAT_TX_FR_P, + output CAT_TX_FR_N, + + // AD9364 - Always on 40MHz clock: + input CLK_40MHz_FPGA, + + // GPIF, FX3 Slave FIFO + output FX3_PCLK, // pclk + output FX3_CTL0, // n_slcs + output FX3_CTL1, // n_slwr + output FX3_CTL2, // n_sloe + output FX3_CTL3, // n_slrd + output FX3_CTL7, // n_pktend + input FX3_CTL4, // slfifo_flags[0] + input FX3_CTL5, // slfifo_flags[1] + input FX3_CTL6, // Serial settings bus from FX3. SDA + input FX3_CTL8, // Serial settings bus from FX3. SCL + output FX3_CTL11, // slfifo_addr[1] + output FX3_CTL12, // slfifo_addr[0] + inout [31:0] FX3_DQ, + input FX3_CTL9, // global_reset + + // LEDs + output cLED_TRX_G, + output cLED_TRX_B, + output cLED_TRX_R, + output cLED_RX2_G, + output cLED_RX2_B, + output cLED_RX2_R, + output cLED_S0, + output cLED_S1, + + // GPIO + inout [7:0] fp_gpio, + + // PPS or 10 MHz (need to choose from SW) + input PPS_IN, + input CLKIN_10MHz, + output CLKIN_10MHz_REQ, + + // Clock disciplining / AD5662 controls + output CLK_40M_DAC_nSYNC, + output CLK_40M_DAC_SCLK, + output CLK_40M_DAC_DIN, + + // RF Hardware Control + output cFE_SEL_TRX_TX, // Select TX/RX port for Tx + output cFE_SEL_TRX_RX, // Select TX/RX port for Rx + output cFE_SEL_RX_TRX, // Select TX/RX port for Rx + output cFE_SEL_RX_RX2, // Select RX2 port for Rx + output cTXDRV_PWEN // Tx PA enable + + ); + + wire reset_global = FX3_CTL9; + + /////////////////////////////////////////////////////////////////////// + // generate clocks from always on codec main clk + /////////////////////////////////////////////////////////////////////// + wire bus_clk, radio_clk; + wire locked; + wire int_40mhz; + wire ref_pll_clk; + b205_clk_gen gen_clks + ( + .CLK_IN1_40(CLK_40MHz_FPGA), // No differential input! + .CLK_OUT1_40_int(int_40mhz), .CLK_OUT2_100_bus(bus_clk), .CLK_OUT3_200_ref_pll(ref_pll_clk), + .RESET(reset_global), .LOCKED(locked) + ); + + //hold-off logic for clocks ready + reg [15:0] clocks_ready_count; + reg clocks_ready; + always @(posedge bus_clk or posedge reset_global or negedge locked) begin + if (reset_global | !locked) begin + clocks_ready_count <= 16'b0; + clocks_ready <= 1'b0; + end + else if (!clocks_ready) begin + clocks_ready_count <= clocks_ready_count + 1'b1; + clocks_ready <= (clocks_ready_count == 16'hffff); + end + end + + /////////////////////////////////////////////////////////////////////// + // drive output clocks + /////////////////////////////////////////////////////////////////////// + ODDR2 #( + .DDR_ALIGNMENT("NONE"), // to "NONE", "C0" or "C1" + .INIT(1'b0), // output to 1'b0 or 1'b1 + .SRTYPE("ASYNC") // set/reset "SYNC" or "ASYNC" + ) + ODDR2_S6CLK2PIN + ( + .Q(FX3_PCLK), // 1-bit DDR output data + .C0(bus_clk), // 1-bit clock input + .C1(~bus_clk), // 1-bit clock input + .CE(1'b1), // 1-bit clock enable input + .D0(1'b1), // 1-bit data input (associated with C0) + .D1(1'b0), // 1-bit data input (associated with C1) + .R(1'b0), // 1-bit reset input + .S(1'b0) // 1-bit set input + ); + + /////////////////////////////////////////////////////////////////////// + // Create sync reset signals + /////////////////////////////////////////////////////////////////////// + wire bus_rst, ref_pll_rst, radio_rst; + reset_sync bus_sync(.clk(bus_clk), .reset_in(!clocks_ready), .reset_out(bus_rst)); + reset_sync ref_pll_sync(.clk(ref_pll_clk), .reset_in(!clocks_ready), .reset_out(ref_pll_rst)); + reset_sync radio_sync(.clk(radio_clk), .reset_in(!clocks_ready), .reset_out(radio_rst)); + + /////////////////////////////////////////////////////////////////////// + // reference clock PLL + /////////////////////////////////////////////////////////////////////// + wire ref_sel; + wire ext_ref_is_pps; + wire ext_ref_locked; + wire ext_ref = ext_ref_is_pps ? PPS_IN : ref_sel ? CLKIN_10MHz : 1'b0; + b205_ref_pll ref_pll + ( + .reset(ref_pll_rst), + .clk(ref_pll_clk), + .refclk(int_40mhz), + .ref(ext_ref), + .locked(ext_ref_locked), + .sclk(CLK_40M_DAC_SCLK), + .mosi(CLK_40M_DAC_DIN), + .sync_n(CLK_40M_DAC_nSYNC) + ); + assign CLKIN_10MHz_REQ = ref_sel; + + /////////////////////////////////////////////////////////////////////// + // AD9364 I/O + /////////////////////////////////////////////////////////////////////// + wire [31:0] rx_data; + wire [31:0] tx_data; + + b205_io b205_io_i0 + ( + .reset(reset_global), + // Baseband sample interface + .radio_clk(radio_clk), + .rx_i0(rx_data[31:20]), + .rx_q0(rx_data[15:4]), + .tx_i0(tx_data[31:20]), + .tx_q0(tx_data[15:4]), + // Catalina interface + .rx_clk(CAT_DCLK_P), + .rx_frame(CAT_RX_FR_P), + .rx_data(CAT_P0_D), + + .tx_clk(CAT_FBCLK_P), + .tx_frame(CAT_TX_FR_P), + .tx_data(CAT_P1_D) + ); + + assign {rx_data[19:16],rx_data[3:0]} = 8'h0; + assign CAT_FBCLK_N = 1'b0; + assign CAT_TX_FR_N = 1'b0; + + /////////////////////////////////////////////////////////////////////// + // SPI connections + /////////////////////////////////////////////////////////////////////// + wire mosi, miso, sclk; + wire [7:0] sen; + + // AD9364 Slave (it's the only slave for B205) + assign CAT_SPI_EN = sen[0]; + assign CAT_SPI_DI = ~sen[0] & mosi; + assign CAT_SPI_CLK = ~sen[0] & sclk; + assign miso = CAT_SPI_DO; + + /////////////////////////////////////////////////////////////////////// + // bus signals + /////////////////////////////////////////////////////////////////////// + wire [63:0] ctrl_tdata, resp_tdata, rx_tdata, tx_tdata; + wire ctrl_tlast, resp_tlast, rx_tlast, tx_tlast; + wire ctrl_tvalid, resp_tvalid, rx_tvalid, tx_tvalid; + wire ctrl_tready, resp_tready, rx_tready, tx_tready; + + /////////////////////////////////////////////////////////////////////// + // frontend assignments + /////////////////////////////////////////////////////////////////////// + wire [7:0] fe_gpio_out; + reg [7:0] fe_gpio_reg; + + //Register in IOB + always @(posedge radio_clk) + fe_gpio_reg <= fe_gpio_out; + + assign {cTXDRV_PWEN, cFE_SEL_RX_RX2, cFE_SEL_TRX_TX, cFE_SEL_RX_TRX, cFE_SEL_TRX_RX} = fe_gpio_reg[7:3]; + assign cLED_TRX_R = ~fe_gpio_reg[0]; + assign cLED_TRX_G = ~fe_gpio_reg[1]; + assign cLED_TRX_B = 1'b1; + assign cLED_RX2_R = 1'b1; + assign cLED_RX2_G = ~fe_gpio_reg[2]; + assign cLED_RX2_B = 1'b1; + assign cLED_S0 = ~ext_ref_locked; + assign cLED_S1 = ~(ext_ref); + + wire [31:0] misc_outs; + reg [31:0] misc_outs_r; + always @(posedge bus_clk) misc_outs_r <= misc_outs; //register misc ios to ease routing to flop + assign ref_sel = misc_outs_r[0]; + + wire codec_arst = misc_outs_r[2]; + + assign CAT_CTL_IN = 4'b1; + assign CAT_EN_AGC = 1'b1; + assign CAT_TXnRX = 1'b1; + assign CAT_EN = 1'b1; + assign CAT_RESETn = ~codec_arst; // Codec Reset // RESETB // Operates active-low + + /////////////////////////////////////////////////////////////////////// + // b205 core + /////////////////////////////////////////////////////////////////////// + wire [7:0] fp_gpio_in, fp_gpio_out, fp_gpio_ddr; + b205_core #(.EXTRA_BUFF_SIZE(12)) b205_core + ( + .bus_clk(bus_clk), .bus_rst(bus_rst), + .tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready), + .rx_tdata(rx_tdata), .rx_tlast(rx_tlast), .rx_tvalid(rx_tvalid), .rx_tready(rx_tready), + .ctrl_tdata(ctrl_tdata), .ctrl_tlast(ctrl_tlast), .ctrl_tvalid(ctrl_tvalid), .ctrl_tready(ctrl_tready), + .resp_tdata(resp_tdata), .resp_tlast(resp_tlast), .resp_tvalid(resp_tvalid), .resp_tready(resp_tready), + + .radio_clk(radio_clk), .radio_rst(radio_rst), + .rx0(rx_data), + .tx0(tx_data), + .fe_gpio_out(fe_gpio_out), + .fp_gpio_in(fp_gpio_in), .fp_gpio_out(fp_gpio_out), .fp_gpio_ddr(fp_gpio_ddr), + .ext_ref_is_pps(ext_ref_is_pps), + .pps_ext(PPS_IN), + + .sclk(sclk), .sen(sen), .mosi(mosi), .miso(miso), + .rb_misc({31'b0,ext_ref_locked}), .misc_outs(misc_outs), + + .lock_signals(CAT_CTL_OUT[7:6]), + + .debug() + ); + + gpio_atr_io #(.WIDTH(8)) gpio_atr_io_inst ( + .clk(radio_clk), .gpio_pins(fp_gpio), + .gpio_ddr(fp_gpio_ddr), .gpio_out(fp_gpio_out), .gpio_in(fp_gpio_in) + ); + + /////////////////////////////////////////////////////////////////////// + // GPIF2 + /////////////////////////////////////////////////////////////////////// + gpif2_slave_fifo32 #(.DATA_RX_FIFO_SIZE(13), .DATA_TX_FIFO_SIZE(13)) slave_fifo32 + ( + .gpif_clk(bus_clk), .gpif_rst(bus_rst), .gpif_enb(1'b1), + .gpif_ctl({FX3_CTL8, FX3_CTL6, FX3_CTL5, FX3_CTL4}), .fifoadr({FX3_CTL11, FX3_CTL12}), + .slwr(FX3_CTL1), .sloe(FX3_CTL2), .slcs(FX3_CTL0), .slrd(FX3_CTL3), .pktend(FX3_CTL7), + .gpif_d(FX3_DQ), + + .fifo_clk(bus_clk), .fifo_rst(bus_rst), + .tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready), + .rx_tdata(rx_tdata), .rx_tlast(rx_tlast), .rx_tvalid(rx_tvalid), .rx_tready(rx_tready), + .ctrl_tdata(ctrl_tdata), .ctrl_tlast(ctrl_tlast), .ctrl_tvalid(ctrl_tvalid), .ctrl_tready(ctrl_tready), + .resp_tdata(resp_tdata), .resp_tlast(resp_tlast), .resp_tvalid(resp_tvalid), .resp_tready(resp_tready), + + .debug() + ); + +endmodule // B205 diff --git a/fpga/usrp3/top/b2xxmini/b205_core.v b/fpga/usrp3/top/b2xxmini/b205_core.v new file mode 100644 index 000000000..d78ff374c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/b205_core.v @@ -0,0 +1,250 @@ +// +// Copyright 2015 Ettus Research, a National Instruments Company +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// + + +/*********************************************************** + * B205 Core Guts + **********************************************************/ +module b205_core +#( + parameter R0_CTRL_SID = 8'h10, + parameter U0_CTRL_SID = 8'h30, + parameter L0_CTRL_SID = 8'h40, + parameter R0_DATA_SID = 8'h50, + parameter R1_DATA_SID = 8'h60, + parameter DEMUX_SID_MASK = 8'hf0, + parameter EXTRA_BUFF_SIZE = 0, + parameter RADIO_FIFO_SIZE = 11, + parameter SAMPLE_FIFO_SIZE = 11 + +) +( + //////////////////////////////////////////////////////////////////// + // bus interfaces + //////////////////////////////////////////////////////////////////// + input bus_clk, + input bus_rst, + + input [63:0] tx_tdata, input tx_tlast, input tx_tvalid, output tx_tready, + output [63:0] rx_tdata, output rx_tlast, output rx_tvalid, input rx_tready, + input [63:0] ctrl_tdata, input ctrl_tlast, input ctrl_tvalid, output ctrl_tready, + output [63:0] resp_tdata, output resp_tlast, output resp_tvalid, input resp_tready, + + //////////////////////////////////////////////////////////////////// + // radio interfaces + //////////////////////////////////////////////////////////////////// + input radio_clk, + input radio_rst, + + input [31:0] rx0, + output [31:0] tx0, + output [7:0] fe_gpio_out, + input [7:0] fp_gpio_in, output [7:0] fp_gpio_out, output [7:0] fp_gpio_ddr, + output ext_ref_is_pps, + input pps_ext, + + //////////////////////////////////////////////////////////////////// + // core interfaces + //////////////////////////////////////////////////////////////////// + output [7:0] sen, output sclk, output mosi, input miso, + input [31:0] rb_misc, + output [31:0] misc_outs, + + //////////////////////////////////////////////////////////////////// + // fe lock signals + //////////////////////////////////////////////////////////////////// + input [1:0] lock_signals, + + //////////////////////////////////////////////////////////////////// + // debug signals + //////////////////////////////////////////////////////////////////// + output [63:0] debug +); + localparam SR_CORE_SPI = 8'd8; + localparam SR_CORE_MISC = 8'd16; + localparam SR_CORE_COMPAT = 8'd24; + localparam SR_CORE_READBACK = 8'd32; + localparam SR_CORE_GPSDO_ST = 8'd40; + localparam SR_CORE_SYNC = 8'd48; + localparam COMPAT_MAJOR = 16'h0007; + localparam COMPAT_MINOR = 16'h0000; + + reg [1:0] lock_state; + reg [1:0] lock_state_r; + + always @(posedge bus_clk) + if (bus_rst) + {lock_state_r, lock_state} <= 4'h0; + else + {lock_state_r, lock_state} <= {lock_state, lock_signals}; + + + /******************************************************************* + * PPS Timing stuff + ******************************************************************/ + + // Generate an internal PPS signal + wire int_pps; + pps_generator #(.CLK_FREQ(100000000)) pps_gen + (.clk(bus_clk), .pps(int_pps)); + + // Flop PPS signals into radio clock domain + reg [1:0] ext_pps_del, int_pps_del; + always @(posedge radio_clk) ext_pps_del[1:0] <= {ext_pps_del[0], pps_ext}; + always @(posedge radio_clk) int_pps_del[1:0] <= {int_pps_del[0], int_pps}; + + // PPS mux + wire [1:0] pps_select; + wire pps = (pps_select == 2'b01)? ext_pps_del[1] : + (pps_select == 2'b10)? int_pps_del[1] : + 1'b0; + assign ext_ref_is_pps = (pps_select == 2'b01); + + /******************************************************************* + * Response mux Routing logic + ******************************************************************/ + wire [63:0] r0_resp_tdata; wire r0_resp_tlast, r0_resp_tvalid, r0_resp_tready; + wire [63:0] l0_resp_tdata; wire l0_resp_tlast, l0_resp_tvalid, l0_resp_tready; + + axi_mux4 #(.WIDTH(64), .BUFFER(1)) mux_for_resp + ( + .clk(bus_clk), .reset(bus_rst), .clear(1'b0), + .i0_tdata(r0_resp_tdata), .i0_tlast(r0_resp_tlast), .i0_tvalid(r0_resp_tvalid), .i0_tready(r0_resp_tready), + .i1_tdata(l0_resp_tdata), .i1_tlast(l0_resp_tlast), .i1_tvalid(l0_resp_tvalid), .i1_tready(l0_resp_tready), + .i2_tdata(64'd0), .i2_tlast(1'b0), .i2_tvalid(1'b0), .i2_tready(), + .i3_tdata(64'd0), .i3_tlast(1'b0), .i3_tvalid(1'b0), .i3_tready(), + .o_tdata(resp_tdata), .o_tlast(resp_tlast), .o_tvalid(resp_tvalid), .o_tready(resp_tready) + ); + + /******************************************************************* + * Control demux Routing logic + ******************************************************************/ + wire [63:0] r0_ctrl_tdata; wire r0_ctrl_tlast, r0_ctrl_tvalid, r0_ctrl_tready; + wire [63:0] l0_ctrl_tdata; wire l0_ctrl_tlast, l0_ctrl_tvalid, l0_ctrl_tready; + + wire [63:0] ctrl_hdr; + wire [1:0] ctrl_dst = + ((ctrl_hdr[7:0] & DEMUX_SID_MASK) == R0_CTRL_SID)? 0 : ( + ((ctrl_hdr[7:0] & DEMUX_SID_MASK) == L0_CTRL_SID)? 1 : ( + 3)); + axi_demux4 #(.ACTIVE_CHAN(4'b1111), .WIDTH(64), .BUFFER(1)) demux_for_ctrl + ( + .clk(bus_clk), .reset(bus_rst), .clear(1'b0), + .header(ctrl_hdr), .dest(ctrl_dst), + .i_tdata(ctrl_tdata), .i_tlast(ctrl_tlast), .i_tvalid(ctrl_tvalid), .i_tready(ctrl_tready), + .o0_tdata(r0_ctrl_tdata), .o0_tlast(r0_ctrl_tlast), .o0_tvalid(r0_ctrl_tvalid), .o0_tready(r0_ctrl_tready), + .o1_tdata(l0_ctrl_tdata), .o1_tlast(l0_ctrl_tlast), .o1_tvalid(l0_ctrl_tvalid), .o1_tready(l0_ctrl_tready), + .o2_tdata(), .o2_tlast(), .o2_tvalid(), .o2_tready(1'b1), + .o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b1) + ); + + /******************************************************************* + * Misc controls + ******************************************************************/ + wire set_stb; + wire [7:0] set_addr; + wire [31:0] set_data; + + wire spi_ready; + wire [31:0] spi_readback; + + wire [1:0] rb_addr; + reg [63:0] rb_data; + + wire [63:0] l0i_ctrl_tdata; wire l0i_ctrl_tlast, l0i_ctrl_tvalid, l0i_ctrl_tready; + + wire time_sync, time_sync_r; + + synchronizer time_sync_synchronizer + (.clk(radio_clk), .rst(radio_rst), .in(time_sync), .out(time_sync_r)); + + axi_fifo #(.WIDTH(65), .SIZE(0)) radio_ctrl_proc_timing_fifo + ( + .clk(bus_clk), .reset(bus_rst), .clear(1'b0), + .i_tdata({l0_ctrl_tlast, l0_ctrl_tdata}), .i_tvalid(l0_ctrl_tvalid), .i_tready(l0_ctrl_tready), .space(), + .o_tdata({l0i_ctrl_tlast, l0i_ctrl_tdata}), .o_tvalid(l0i_ctrl_tvalid), .o_tready(l0i_ctrl_tready), .occupied() + ); + + radio_ctrl_proc radio_ctrl_proc + ( + .clk(bus_clk), .reset(bus_rst), .clear(1'b0), + .ctrl_tdata(l0i_ctrl_tdata), .ctrl_tlast(l0i_ctrl_tlast), .ctrl_tvalid(l0i_ctrl_tvalid), .ctrl_tready(l0i_ctrl_tready), + .resp_tdata(l0_resp_tdata), .resp_tlast(l0_resp_tlast), .resp_tvalid(l0_resp_tvalid), .resp_tready(l0_resp_tready), + .vita_time(64'b0), + .set_stb(set_stb), .set_addr(set_addr), .set_data(set_data), + .ready(spi_ready), .readback(rb_data), + .debug() + ); + + setting_reg #(.my_addr(SR_CORE_MISC), .awidth(8), .width(32), .at_reset(8'h0)) sr_misc + ( + .clk(bus_clk), .rst(bus_rst), .strobe(set_stb), .addr(set_addr), .in(set_data), + .out(misc_outs), .changed() + ); + + setting_reg #(.my_addr(SR_CORE_READBACK), .awidth(8), .width(2)) sr_rdback + ( + .clk(bus_clk), .rst(bus_rst), .strobe(set_stb), .addr(set_addr), .in(set_data), + .out(rb_addr), .changed() + ); + + setting_reg #(.my_addr(SR_CORE_SYNC), .awidth(8), .width(3)) sr_sync + ( + .clk(bus_clk), .rst(bus_rst), .strobe(set_stb), .addr(set_addr), .in(set_data), + .out({time_sync,pps_select}), .changed() + ); + + simple_spi_core #(.BASE(SR_CORE_SPI), .WIDTH(8), .CLK_IDLE(0), .SEN_IDLE(8'hFF)) misc_spi + ( + .clock(bus_clk), .reset(bus_rst), + .set_stb(set_stb), .set_addr(set_addr), .set_data(set_data), + .readback(spi_readback), .ready(spi_ready), + .sen(sen), .sclk(sclk), .mosi(mosi), .miso(miso), + .debug() + ); + + always @* + case(rb_addr) + 2'd0 : rb_data <= { 32'hACE0BA5E, COMPAT_MAJOR, COMPAT_MINOR }; + 2'd1 : rb_data <= { 32'b0, spi_readback }; + 2'd2 : rb_data <= { 16'b0, 8'd1, 8'd0, rb_misc }; + 2'd3 : rb_data <= { 30'h0, lock_state_r }; + default : rb_data <= 64'd0; + endcase // case (rb_addr) + + /******************************************************************* + * Radio + ******************************************************************/ + wire [31:0] fe_gpio_out32; + wire [9:0] fp_gpio_out10, fp_gpio_ddr10; + assign fe_gpio_out = fe_gpio_out32[7:0]; + assign fp_gpio_out = fp_gpio_out10[7:0]; + assign fp_gpio_ddr = fp_gpio_ddr10[7:0]; + + radio_legacy #( + .RADIO_FIFO_SIZE(RADIO_FIFO_SIZE), + .SAMPLE_FIFO_SIZE(SAMPLE_FIFO_SIZE), + .FP_GPIO(1), + .NEW_HB_INTERP(1), + .NEW_HB_DECIM(1), + .SOURCE_FLOW_CONTROL(0), + .USER_SETTINGS(0), + .DEVICE("SPARTAN6") + ) radio ( + .radio_clk(radio_clk), .radio_rst(radio_rst), + .rx(rx0), .tx(tx0), .pps(pps), .time_sync(time_sync_r), + .fe_gpio_in(32'h00000000), .fe_gpio_out(fe_gpio_out32), .fe_gpio_ddr(/* Always assumed to be outputs */), + .fp_gpio_in({2'b00, fp_gpio_in}), .fp_gpio_out(fp_gpio_out10), .fp_gpio_ddr(fp_gpio_ddr10), + .bus_clk(bus_clk), .bus_rst(bus_rst), + .tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready), + .rx_tdata(rx_tdata), .rx_tlast(rx_tlast), .rx_tvalid(rx_tvalid), .rx_tready(rx_tready), + .ctrl_tdata(r0_ctrl_tdata), .ctrl_tlast(r0_ctrl_tlast), .ctrl_tvalid(r0_ctrl_tvalid), .ctrl_tready(r0_ctrl_tready), + .resp_tdata(r0_resp_tdata), .resp_tlast(r0_resp_tlast), .resp_tvalid(r0_resp_tvalid), .resp_tready(r0_resp_tready), + .debug() + ); + + +endmodule // b205_core diff --git a/fpga/usrp3/top/b2xxmini/b205_io.v b/fpga/usrp3/top/b2xxmini/b205_io.v new file mode 100644 index 000000000..97e4cba24 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/b205_io.v @@ -0,0 +1,459 @@ +// +// Copyright 2015 Ettus Research, a National Instruments Company +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// + +//------------------------------------------------------------------ +// NOTE: B205 is a SISO only device. MIMO references are unused code branches. +// +// In SISO mode, we output a clock thats 1x the frequency of the Catalina +// source-synchronous bus clock to be used as the radio_clk. +// +//------------------------------------------------------------------ + +module b205_io + ( + input reset, + + // Baseband sample interface + output radio_clk, + output [11:0] rx_i0, + output [11:0] rx_q0, + input [11:0] tx_i0, + input [11:0] tx_q0, + + // Catalina interface + input rx_clk, + input rx_frame, + input [11:0] rx_data, + output tx_clk, + output tx_frame, + output [11:0] tx_data + ); + + + genvar z; + + + //------------------------------------------------------------------ + // Clock Buffering. + // BUFIO2 drives all IDDR2 and ODDR2 cells directly in bank3. + // Need two pairs of BUFIO2 one pair each for Top Left and Bottom Left half banks. + //------------------------------------------------------------------ + wire rx_clk_buf; + wire siso_clk_unbuf; + wire siso_clk2_unbuf; + + IBUFG clk_ibufg (.O(rx_clk_buf), .I(rx_clk)); + + //------------------------------------------------------------------ + // + // Buffers for LEFT TOP half bank pins + // BUFIO2_X0Y22 + // + //------------------------------------------------------------------ + BUFIO2 #( + .DIVIDE(4), + .DIVIDE_BYPASS("FALSE"), + .I_INVERT("FALSE"), + .USE_DOUBLER("TRUE")) + clk_bufio_lt + ( + .IOCLK(io_clk_lt), + .DIVCLK(), + .SERDESSTROBE(), + .I(rx_clk_buf) + ); + + // BUFIO2_X0Y23 + BUFIO2 #( + .DIVIDE(1), + .DIVIDE_BYPASS("FALSE"), + .I_INVERT("TRUE"), + .USE_DOUBLER("FALSE")) + clk_bufio_lt_b + ( + .IOCLK(io_clk_lt_b), + .DIVCLK(siso_clk2_unbuf), // Inverted source of 1x interface clock for radio_clk + .SERDESSTROBE(), + .I(rx_clk_buf) + ); + + //------------------------------------------------------------------ + // + // Buffers for LEFT BOTTOM half bank pins + // BUFIO2_X1Y14 + // + //------------------------------------------------------------------ + BUFIO2 #( + .DIVIDE(1), + .DIVIDE_BYPASS("FALSE"), + .I_INVERT("FALSE"), + .USE_DOUBLER("FALSE")) + clk_bufio_lb + ( + .IOCLK(io_clk_lb), + .DIVCLK(siso_clk_unbuf), // Non-inverted source of 1x interface clock for local IO use + .SERDESSTROBE(), + .I(rx_clk_buf) + ); + + // BUFIO2_X1Y15 + BUFIO2 #( + .DIVIDE(1), + .DIVIDE_BYPASS("FALSE"), + .I_INVERT("TRUE"), + .USE_DOUBLER("FALSE")) + clk_bufio_lb_b + ( + .IOCLK(io_clk_lb_b), + .DIVCLK(/*siso_clk2_unbuf*/), + .SERDESSTROBE(), + .I(rx_clk_buf) + ); + + //------------------------------------------------------------------ + // Always-on SISO clk needed to load/unload DDR2 I/O Regs + //------------------------------------------------------------------ + BUFG siso_clk_bufg ( + .I(siso_clk_unbuf), + .O(siso_clk) + ); + + //------------------------------------------------------------------ + // BUFG to drive global radio_clk. + //------------------------------------------------------------------ + BUFG radio_clk_bufg ( + .I(siso_clk2_unbuf), + .O(radio_clk) + ); + + //------------------------------------------------------------------ + // RX Frame Signal - In bank 3 LB + //------------------------------------------------------------------ + wire rx_frame_0, rx_frame_1; + + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_frame ( + .Q0(rx_frame_1), + .Q1(rx_frame_0), + .C0(io_clk_lb), + .C1(io_clk_lb_b), + .CE(1'b1), + .D(rx_frame), + .R(1'b0), + .S(1'b0)); + + reg rx_frame_d1, rx_frame_d2; + always @(posedge siso_clk) + { rx_frame_d2, rx_frame_d1 } <= { rx_frame_1, 1'b0 }; + + + //------------------------------------------------------------------ + // RX Data Bus - In bank3 both LT and LB + //------------------------------------------------------------------ + wire [11:0] rx_i,rx_q; + + // Bit0 LB + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i0 ( + .Q0(rx_q[0]), + .Q1(rx_i[0]), + .C0(io_clk_lb), + .C1(io_clk_lb_b), + .CE(1'b1), + .D(rx_data[0]), + .R(1'b0), + .S(1'b0)); + + // Bit1 LB + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i1 ( + .Q0(rx_q[1]), + .Q1(rx_i[1]), + .C0(io_clk_lb), + .C1(io_clk_lb_b), + .CE(1'b1), + .D(rx_data[1]), + .R(1'b0), + .S(1'b0)); + + // Bit2 LB + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i2 ( + .Q0(rx_q[2]), + .Q1(rx_i[2]), + .C0(io_clk_lt), + .C1(io_clk_lt_b), + .CE(1'b1), + .D(rx_data[2]), + .R(1'b0), + .S(1'b0)); + + // Bit3 LT + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i3 ( + .Q0(rx_q[3]), + .Q1(rx_i[3]), + .C0(io_clk_lt), + .C1(io_clk_lt_b), + .CE(1'b1), + .D(rx_data[3]), + .R(1'b0), + .S(1'b0)); + + // Bit4 LB + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i4 ( + .Q0(rx_q[4]), + .Q1(rx_i[4]), + .C0(io_clk_lt), + .C1(io_clk_lt_b), + .CE(1'b1), + .D(rx_data[4]), + .R(1'b0), + .S(1'b0)); + + // Bit5 LT + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i5 ( + .Q0(rx_q[5]), + .Q1(rx_i[5]), + .C0(io_clk_lt), + .C1(io_clk_lt_b), + .CE(1'b1), + .D(rx_data[5]), + .R(1'b0), + .S(1'b0)); + + // Bit6 LB + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i6 ( + .Q0(rx_q[6]), + .Q1(rx_i[6]), + .C0(io_clk_lt), + .C1(io_clk_lt_b), + .CE(1'b1), + .D(rx_data[6]), + .R(1'b0), + .S(1'b0)); + + // Bit7 LT + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i7 ( + .Q0(rx_q[7]), + .Q1(rx_i[7]), + .C0(io_clk_lt), + .C1(io_clk_lt_b), + .CE(1'b1), + .D(rx_data[7]), + .R(1'b0), + .S(1'b0)); + + // Bit8 LB + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i8 ( + .Q0(rx_q[8]), + .Q1(rx_i[8]), + .C0(io_clk_lb), + .C1(io_clk_lb_b), + .CE(1'b1), + .D(rx_data[8]), + .R(1'b0), + .S(1'b0)); + + // Bit9 LT + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i9 ( + .Q0(rx_q[9]), + .Q1(rx_i[9]), + .C0(io_clk_lb), + .C1(io_clk_lb_b), + .CE(1'b1), + .D(rx_data[9]), + .R(1'b0), + .S(1'b0)); + + // Bit10 LB + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i10 ( + .Q0(rx_q[10]), + .Q1(rx_i[10]), + .C0(io_clk_lb), + .C1(io_clk_lb_b), + .CE(1'b1), + .D(rx_data[10]), + .R(1'b0), + .S(1'b0)); + + // Bit11 LB + IDDR2 #( + .DDR_ALIGNMENT("C0")) + iddr2_i11 ( + .Q0(rx_q[11]), + .Q1(rx_i[11]), + .C0(io_clk_lb), + .C1(io_clk_lb_b), + .CE(1'b1), + .D(rx_data[11]), + .R(1'b0), + .S(1'b0)); + + //------------------------------------------------------------------ + // + // De-mux I & Q onto fullrate clock. + // + // We grab data from the IDDR2 using negedge of siso_clk. + // IDDR2 updates all Q pins on posedge of io_clk. siso_clk does not have aligned phase + // with io_clk...siso_clk is always a little more delayed than io_clk. + // This small delay is always much smaller than half a clk cycle. Thus by sampling the Q outputs + // with negedge siso_clk we avoid any risk of a race condition (hold violation on receiveing register). + // + //------------------------------------------------------------------ + reg [11:0] rx_i_del, rx_q_del; + reg [11:0] rx_i0_siso_pos; + reg [11:0] rx_q0_siso_pos; + reg [11:0] rx_i0_siso_neg; + reg [11:0] rx_q0_siso_neg; + reg [11:0] rx_i0_siso; + reg [11:0] rx_q0_siso; + + always @(negedge siso_clk) + begin + rx_i0_siso[11:0] <= rx_i[11:0]; + rx_q0_siso[11:0] <= rx_q[11:0]; + end // else: !if(rx_frame_0) + + //------------------------------------------------------------------ + // + // Now prepare data for crossing into radio_clk domain which is always for SISO mode (inverted) siso_clk. + // (Note: posedge is used so that we have massive margin against a fast-path race condition + // betwwen siso_clk and radio_clk). + // + //------------------------------------------------------------------ + + // This code block only relevent in SISO mode. + always @(posedge siso_clk) + begin + rx_i0_siso_pos[11:0] <= rx_i0_siso[11:0]; + rx_q0_siso_pos[11:0] <= rx_q0_siso[11:0]; + end + + assign rx_i0 = rx_i0_siso_pos; + assign rx_q0 = rx_q0_siso_pos; + + + //------------------------------------------------------------------ + // TX Data Bus - In bank3 LB + //------------------------------------------------------------------ + reg [11:0] tx_i,tx_q; + + generate + for(z = 0; z < 12; z = z + 1) + begin : gen_pins + ODDR2 #( + .DDR_ALIGNMENT("C0"), .SRTYPE("ASYNC")) + oddr2 ( + .Q(tx_data[z]), .C0(io_clk_lb), .C1(io_clk_lb_b), + .CE(1'b1), .D0(tx_i[z]), .D1(tx_q[z]), .R(1'b0), .S(1'b0)); + end + endgenerate + + //------------------------------------------------------------------ + // TX Frame Signal - In bank 3 LB + //------------------------------------------------------------------ + ODDR2 #( + .DDR_ALIGNMENT("C0"), .SRTYPE("ASYNC")) + oddr2_frame ( + .Q(tx_frame), .C0(io_clk_lb), .C1(io_clk_lb_b), + .CE(1'b1), .D0(1'b1), .D1(1'b0), .R(1'b0), .S(1'b0)); + + //------------------------------------------------------------------ + // TX Clock Signal - In bank 3 LB + //------------------------------------------------------------------ + ODDR2 #( + .DDR_ALIGNMENT("C0"), .SRTYPE("ASYNC")) + oddr2_clk ( + .Q(tx_clk), .C0(io_clk_lb), .C1(io_clk_lb_b), + .CE(1'b1), .D0(1'b1), .D1(1'b0), .R(1'b0), .S(1'b0)); + + //------------------------------------------------------------------ + // + // Mux I & Q, onto fullrate clock TX bus to AD9361 + // + //------------------------------------------------------------------ + + always @(posedge siso_clk) + begin + {tx_i,tx_q} <= {tx_i0,tx_q0}; + end + + // + // Debug + // +/* -----\/----- EXCLUDED -----\/----- + wire [35:0] CONTROL0; + reg [11:0] tx_i_del_debug, tx_q_del_debug; + reg [11:0] tx_i_debug,tx_q_debug; + reg [11:0] tx_i0_debug,tx_q0_debug; + reg find_radio_clk_phase_debug; + reg find_radio_clk_phase_del_debug; + reg tx_strobe_debug; + reg tx_strobe_del_debug; + + + always @(posedge siso_clk) begin + tx_i_del_debug <= tx_i_del; + tx_q_del_debug <= tx_q_del; + tx_i_debug <= tx_i; + tx_q_debug <= tx_q; + tx_i0_debug <=tx_i0; + tx_q0_debug <= tx_q0; + find_radio_clk_phase_debug <= find_radio_clk_phase; + find_radio_clk_phase_del_debug <= find_radio_clk_phase_del; + tx_strobe_debug <= tx_strobe; + tx_strobe_del_debug <= tx_strobe_del; + end + + + + chipscope_icon chipscope_icon_i0 + ( + .CONTROL0(CONTROL0) // INOUT BUS [35:0] + ); + + chipscope_ila_128 chipscope_ila_i0 + ( + .CONTROL(CONTROL0), // INOUT BUS [35:0] + .CLK(siso_clk), // IN + .TRIG0( + { + tx_i_del_debug[11:0], + tx_q_del_debug[11:0], + tx_i_debug[11:0], + tx_q_debug[11:0], + tx_i0_debug[11:0], + tx_q0_debug[11:0], + find_radio_clk_phase_debug, + find_radio_clk_phase_del_debug, + tx_strobe_debug, + tx_strobe_del_debug + } + ) + + ); + -----/\----- EXCLUDED -----/\----- */ +endmodule diff --git a/fpga/usrp3/top/b2xxmini/b205_ref_pll.v b/fpga/usrp3/top/b2xxmini/b205_ref_pll.v new file mode 100644 index 000000000..0483bc93b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/b205_ref_pll.v @@ -0,0 +1,278 @@ +// +// Copyright 2015 Ettus Research, a National Instruments Company +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// + +module b205_ref_pll( + input reset, + input clk, // 200 MHz sample clock + input refclk, // 40 MHz reference clock + input ref, // PPS or 10 MHz external reference + output reg locked, + + // SPI lines to AD5662 + output sclk, + output mosi, + output sync_n + ); + + // Base parameters + localparam SAMPLE_CLOCK_FREQ=200_000_000; + localparam REF_FREQ_PPS=1; + localparam REF_FREQ_10MHZ=10_000_000; + localparam REF_CLK_FREQ=40_000_000; + localparam PFD_FREQ_PPS=1; + localparam PFD_FREQ_10MHZ=10; + + // Lock detection parameters + localparam LOCK_TOLERANCE_PPM=1; + localparam LOCK_MARGIN_PPS=(SAMPLE_CLOCK_FREQ/PFD_FREQ_PPS)*LOCK_TOLERANCE_PPM/1_000_000; + localparam LOCK_MARGIN_10MHZ=(SAMPLE_CLOCK_FREQ/PFD_FREQ_10MHZ)*LOCK_TOLERANCE_PPM/1_000_000; + + // Reference frequency detection parameters + // References are only valid if they are +/-5ppm because that is the range of the VCTXCO + localparam REF_PERIOD_PPS=SAMPLE_CLOCK_FREQ/REF_FREQ_PPS; + localparam REF_PERIOD_10MHZ=SAMPLE_CLOCK_FREQ/REF_FREQ_10MHZ; + localparam REF_PERIOD_PPS_MIN=REF_PERIOD_PPS-(REF_PERIOD_PPS*5/1_000_000)-1; + localparam REF_PERIOD_PPS_MAX=REF_PERIOD_PPS+(REF_PERIOD_PPS*5/1_000_000)+1; + localparam REF_PERIOD_10MHZ_MIN=REF_PERIOD_10MHZ-(REF_PERIOD_10MHZ*5/1_000_000)-1; + localparam REF_PERIOD_10MHZ_MAX=REF_PERIOD_10MHZ+(REF_PERIOD_10MHZ*5/1_000_000)+1; + + // R divider parameters + localparam RDIV_PPS=REF_FREQ_PPS/PFD_FREQ_PPS; + localparam RDIV_10MHZ=REF_FREQ_10MHZ/PFD_FREQ_10MHZ; + + // N divider parameters (refclk is divided by 2) + localparam NDIV_PPS=REF_CLK_FREQ/2/PFD_FREQ_PPS; + localparam NDIV_10MHZ=REF_CLK_FREQ/2/PFD_FREQ_10MHZ; + + // PFD parameters + localparam PFD_PERIOD_PPS=SAMPLE_CLOCK_FREQ/PFD_FREQ_PPS; + localparam PFD_PERIOD_10MHZ=SAMPLE_CLOCK_FREQ/PFD_FREQ_10MHZ; + + + // Initial divide by 2 for 40 MHz clock + // (since refclk cannot be sampled directly) + reg refclk_div; + always @(posedge refclk) begin + refclk_div <= ~refclk_div; + end + + // flop signals into sample clock domain together + reg [3:0] refsmp; + reg [3:0] refclksmp; + always @(posedge clk) begin + refsmp <= {refsmp[2:0],ref}; + refclksmp <= {refclksmp[2:0],refclk_div}; + end + + // rising edge detection + wire ref_rising = (refsmp[3:2] == 2'b01); + wire refclk_rising = (refclksmp[3:2] == 2'b01); + + // reference frequency detection + reg [27:0] refcnt; + reg ref_detected; + reg ref_is_10M; + reg ref_is_pps; + wire valid_ref = ref_is_10M | ref_is_pps; + always @(posedge clk) begin + if (reset) begin + refcnt <= 28'd0; + ref_detected <= 1'b0; + ref_is_10M <= 1'b0; + ref_is_pps <= 1'b0; + end + else if (ref_rising) begin + refcnt <= 28'd1; + ref_detected <= 1'b1; + ref_is_10M <= ((refcnt >= REF_PERIOD_10MHZ_MIN) && (refcnt <= REF_PERIOD_10MHZ_MAX)); + ref_is_pps <= ((refcnt >= REF_PERIOD_PPS_MIN) && (refcnt <= REF_PERIOD_PPS_MAX)); + end + else if ((ref_is_10M && (refcnt > REF_PERIOD_10MHZ_MAX)) || (refcnt > REF_PERIOD_PPS_MAX)) begin + // consider the reference lost + refcnt <= 28'd0; + ref_detected <= 1'b0; + ref_is_10M <= 1'b0; + ref_is_pps <= 1'b0; + end + else if (ref_detected) + refcnt <= refcnt + 28'd1; + end + + // R divider + wire [23:0] rdiv = ref_is_10M ? RDIV_10MHZ : RDIV_PPS; + reg [23:0] rcnt; + wire [23:0] next_rcnt = ~valid_ref ? 24'd0 : (rcnt == rdiv) ? 24'd1 : rcnt + 1'b1; + reg r_rising; + always @(posedge clk) begin + if (ref_rising) + rcnt <= next_rcnt; + r_rising <= (ref_rising && ((ref_is_10M && (rcnt == rdiv)) || ref_is_pps)); + end + + // N divider + // Enable on rising edge of R after valid_ref + // is asserted so R and N signals start aligned. + // Disable if reference lost. + wire [25:0] ndiv = ref_is_10M ? NDIV_10MHZ : NDIV_PPS; + reg [25:0] ncnt; + wire [25:0] next_ncnt = ~valid_ref ? 26'd0 : ncnt == ndiv ? 26'd1 : ncnt + 1'b1; + reg n_rising; + always @(posedge clk) begin + if (refclk_rising) + ncnt <= next_ncnt; + n_rising <= (refclk_rising && (ncnt == ndiv)); + end + + // Frequency Counter + wire signed [28:0] period = ref_is_10M ? PFD_PERIOD_10MHZ : PFD_PERIOD_PPS; + reg signed [28:0] r_period_cnt; + reg signed [28:0] freq_err; + always @(posedge clk) begin + if (reset | ~valid_ref) begin + r_period_cnt <= 28'd0; + freq_err <= 29'sd0; + end + else if (r_rising) begin + r_period_cnt <= 28'd1; + freq_err <= period - r_period_cnt; + end + else + r_period_cnt <= r_period_cnt + 28'd1; + end + + // Phase Counter + reg signed [28:0] lead_cnt; + reg lead_cnt_ena; + reg signed [28:0] lead; + always @(posedge clk) begin + // Count how much N leads R + // The count is negative because it measures + // how much the VCTCXO must be slowed down. + if (~valid_ref | n_rising) begin + lead_cnt <= 29'sd0; + lead_cnt_ena <= 1'b1; + if (r_rising) + lead <= 29'sd0; + end + else if (r_rising) begin + if (lead_cnt_ena) + lead <= lead_cnt - 29'sd1; + else begin + // R rising with no preceding N rising. + // N has changed from leading to lagging R, + // but we don't yet know by how much so + // assume 1. + lead <= 29'sd1; + end + lead_cnt_ena <= 1'b0; + end + else if (lead_cnt_ena) + lead_cnt <= lead_cnt - 29'sd1; + end + + // PFD State Machine + localparam MEASURE=4'd0; + localparam CAPTURE=4'd1; + localparam CAPTURE_LAG=4'd2; + localparam CAPTURE_LEAD=4'd3; + localparam CALCULATE_ERROR=4'd4; + localparam CALCULATE_10M_GAIN=4'd5; + localparam CALCULATE_ADJUSTMENT=4'd6; + localparam CALCULATE_OUTPUT_VALUE=4'd7; + localparam APPLY_OUTPUT_VALUE=4'd8; + reg [3:0] state; + reg [15:0] daco = 16'd32767; + wire signed [28:0] lock_margin = ref_is_10M ? LOCK_MARGIN_10MHZ : LOCK_MARGIN_PPS; + wire signed [28:0] lag = lead + period; + reg signed [28:0] phase_err; + reg signed [28:0] err; + reg signed [28:0] shift; + reg signed [28:0] adj; + wire signed [28:0] dacv = {13'd0, daco}; + reg signed [28:0] sum; + reg [2:0] ld; + always @(posedge clk) begin + if (reset || ~valid_ref) begin + state <= MEASURE; + daco <= 16'd32767; + err <= 29'sd0; + shift <= 29'sd0; + adj <= 29'sd0; + ld <= 3'd0; + end + else begin + case(state) + MEASURE: begin + if (r_rising) + state <= CAPTURE; + end + CAPTURE: begin + if (lag < -lead) + state <= CAPTURE_LAG; + else + state <= CAPTURE_LEAD; + end + CAPTURE_LAG: begin + phase_err <= lag; + ld <= {ld[1:0], (lag <= lock_margin)}; + state <= CALCULATE_ERROR; + end + CAPTURE_LEAD: begin + phase_err <= lead; + ld <= {ld[1:0], (-lead <= lock_margin)}; + state <= CALCULATE_ERROR; + end + CALCULATE_ERROR: begin + err <= phase_err + freq_err; + state <= ref_is_10M ? CALCULATE_10M_GAIN : CALCULATE_ADJUSTMENT; + end + CALCULATE_10M_GAIN: begin + shift <= (err < -7 || err > 7) ? 7 : (err < 0 ? -err : err); + state <= CALCULATE_ADJUSTMENT; + end + CALCULATE_ADJUSTMENT: begin + // The VCTCXO is +/-5 ppm from 0.3V to 1.5V and the DAC is 16 bits, + // which works out to 0.000228885 ppm per DAC unit. + // The 200 MHz sampling clock means each unit of error is 0.005 ppm, + // which works out to 21.845 DAC units to correct each unit of error. + // Theory is nice, but the proportional and integral gains used here + // were determined through manual tuning. + if (ref_is_10M) + adj <= (err <<< shift); + else + adj <= (err <<< 4) - err; + state <= CALCULATE_OUTPUT_VALUE; + end + CALCULATE_OUTPUT_VALUE: begin + sum <= dacv + adj; + state <= APPLY_OUTPUT_VALUE; + end + APPLY_OUTPUT_VALUE: begin + // Clip and apply + if (sum < 29'sd0) + daco <= 16'd0; + else if (sum > 29'sd65535) + daco <= 16'd65535; + else + daco <= sum[15:0]; + state <= MEASURE; + end + endcase + end + end + + always @(posedge clk) + locked <= (ld == 3'b111); + + ad5662_auto_spi dac + ( + .clk(clk), + .dat(daco), + .sclk(sclk), + .mosi(mosi), + .sync_n(sync_n) + ); +endmodule diff --git a/fpga/usrp3/top/b2xxmini/coregen/.gitignore b/fpga/usrp3/top/b2xxmini/coregen/.gitignore new file mode 100644 index 000000000..bdeac28ca --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/.gitignore @@ -0,0 +1,5 @@ +/tmp +/_xmsgs +/*.log +/*.gise +/*.xise diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.asy b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.asy new file mode 100644 index 000000000..c2995765a --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.asy @@ -0,0 +1,29 @@ +Version 4 +SymbolType BLOCK +TEXT 32 32 LEFT 4 b205_clk_gen +RECTANGLE Normal 32 32 576 1088 +LINE Normal 0 80 32 80 +PIN 0 80 LEFT 36 +PINATTR PinName clk_in1 +PINATTR Polarity IN +LINE Normal 0 432 32 432 +PIN 0 432 LEFT 36 +PINATTR PinName reset +PINATTR Polarity IN +LINE Normal 608 80 576 80 +PIN 608 80 RIGHT 36 +PINATTR PinName clk_out1 +PINATTR Polarity OUT +LINE Normal 608 176 576 176 +PIN 608 176 RIGHT 36 +PINATTR PinName clk_out2 +PINATTR Polarity OUT +LINE Normal 608 272 576 272 +PIN 608 272 RIGHT 36 +PINATTR PinName clk_out3 +PINATTR Polarity OUT +LINE Normal 608 976 576 976 +PIN 608 976 RIGHT 36 +PINATTR PinName locked +PINATTR Polarity OUT + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.ucf b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.ucf new file mode 100755 index 000000000..9b318e829 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.ucf @@ -0,0 +1,59 @@ +# file: b205_clk_gen.ucf +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# Input clock periods. These duplicate the values entered for the +# input clocks. You can use these to time your system +#---------------------------------------------------------------- +NET "CLK_IN1" TNM_NET = "CLK_IN1"; +TIMESPEC "TS_CLK_IN1" = PERIOD "CLK_IN1" 25.0 ns HIGH 50% INPUT_JITTER 250.0ps; + + +# FALSE PATH constraints +PIN "RESET" TIG; + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.v b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.v new file mode 100755 index 000000000..e4184e6fc --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.v @@ -0,0 +1,158 @@ +// file: b205_clk_gen.v +// +// (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//---------------------------------------------------------------------------- +// User entered comments +//---------------------------------------------------------------------------- +// None +// +//---------------------------------------------------------------------------- +// "Output Output Phase Duty Pk-to-Pk Phase" +// "Clock Freq (MHz) (degrees) Cycle (%) Jitter (ps) Error (ps)" +//---------------------------------------------------------------------------- +// CLK_OUT1____40.000______0.000______50.0______312.078____259.584 +// CLK_OUT2___100.000______0.000______50.0______255.594____259.584 +// CLK_OUT3___200.000______0.000______50.0______225.630____259.584 +// +//---------------------------------------------------------------------------- +// "Input Clock Freq (MHz) Input Jitter (UI)" +//---------------------------------------------------------------------------- +// __primary__________40.000____________0.010 + +`timescale 1ps/1ps + +(* CORE_GENERATION_INFO = "b205_clk_gen,clk_wiz_v3_6,{component_name=b205_clk_gen,use_phase_alignment=true,use_min_o_jitter=false,use_max_i_jitter=false,use_dyn_phase_shift=false,use_inclk_switchover=false,use_dyn_reconfig=false,feedback_source=FDBK_AUTO,primtype_sel=PLL_BASE,num_out_clk=3,clkin1_period=25.0,clkin2_period=25.0,use_power_down=false,use_reset=true,use_locked=true,use_inclk_stopped=false,use_status=false,use_freeze=false,use_clk_valid=false,feedback_type=SINGLE,clock_mgr_type=AUTO,manual_override=false}" *) +module b205_clk_gen + (// Clock in ports + input CLK_IN1_40, + // Clock out ports + output CLK_OUT1_40_int, + output CLK_OUT2_100_bus, + output CLK_OUT3_200_ref_pll, + // Status and control signals + input RESET, + output LOCKED + ); + + // Input buffering + //------------------------------------ + IBUFG clkin1_buf + (.O (clkin1), + .I (CLK_IN1_40)); + + + // Clocking primitive + //------------------------------------ + // Instantiation of the PLL primitive + // * Unused inputs are tied off + // * Unused outputs are labeled unused + wire [15:0] do_unused; + wire drdy_unused; + wire clkfbout; + wire clkfbout_buf; + wire clkout3_unused; + wire clkout4_unused; + wire clkout5_unused; + + PLL_BASE + #(.BANDWIDTH ("OPTIMIZED"), + .CLK_FEEDBACK ("CLKFBOUT"), + .COMPENSATION ("SYSTEM_SYNCHRONOUS"), + .DIVCLK_DIVIDE (1), + .CLKFBOUT_MULT (10), + .CLKFBOUT_PHASE (0.000), + .CLKOUT0_DIVIDE (10), + .CLKOUT0_PHASE (0.000), + .CLKOUT0_DUTY_CYCLE (0.500), + .CLKOUT1_DIVIDE (4), + .CLKOUT1_PHASE (0.000), + .CLKOUT1_DUTY_CYCLE (0.500), + .CLKOUT2_DIVIDE (2), + .CLKOUT2_PHASE (0.000), + .CLKOUT2_DUTY_CYCLE (0.500), + .CLKIN_PERIOD (25.0), + .REF_JITTER (0.010)) + pll_base_inst + // Output clocks + (.CLKFBOUT (clkfbout), + .CLKOUT0 (clkout0), + .CLKOUT1 (clkout1), + .CLKOUT2 (clkout2), + .CLKOUT3 (clkout3_unused), + .CLKOUT4 (clkout4_unused), + .CLKOUT5 (clkout5_unused), + // Status and control signals + .LOCKED (LOCKED), + .RST (RESET), + // Input clock control + .CLKFBIN (clkfbout_buf), + .CLKIN (clkin1)); + + + // Output buffering + //----------------------------------- + BUFG clkf_buf + (.O (clkfbout_buf), + .I (clkfbout)); + + BUFG clkout1_buf + (.O (CLK_OUT1_40_int), + .I (clkout0)); + + + BUFG clkout2_buf + (.O (CLK_OUT2_100_bus), + .I (clkout1)); + + BUFG clkout3_buf + (.O (CLK_OUT3_200_ref_pll), + .I (clkout2)); + + + +endmodule diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.veo b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.veo new file mode 100755 index 000000000..874e6b65c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.veo @@ -0,0 +1,82 @@ +// +// (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//---------------------------------------------------------------------------- +// User entered comments +//---------------------------------------------------------------------------- +// None +// +//---------------------------------------------------------------------------- +// "Output Output Phase Duty Pk-to-Pk Phase" +// "Clock Freq (MHz) (degrees) Cycle (%) Jitter (ps) Error (ps)" +//---------------------------------------------------------------------------- +// CLK_OUT1____40.000______0.000______50.0______312.078____259.584 +// CLK_OUT2___100.000______0.000______50.0______255.594____259.584 +// CLK_OUT3___200.000______0.000______50.0______225.630____259.584 +// +//---------------------------------------------------------------------------- +// "Input Clock Freq (MHz) Input Jitter (UI)" +//---------------------------------------------------------------------------- +// __primary__________40.000____________0.010 + +// The following must be inserted into your Verilog file for this +// core to be instantiated. Change the instance name and port connections +// (in parentheses) to your own signal names. + +//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG + + b205_clk_gen instance_name + (// Clock in ports + .CLK_IN1_40(CLK_IN1_40), // IN + // Clock out ports + .CLK_OUT1_40_int(CLK_OUT1_40_int), // OUT + .CLK_OUT2_100_bus(CLK_OUT2_100_bus), // OUT + .CLK_OUT3_200_ref_pll(CLK_OUT3_200_ref_pll), // OUT + // Status and control signals + .RESET(RESET),// IN + .LOCKED(LOCKED)); // OUT +// INST_TAG_END ------ End INSTANTIATION Template --------- diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.xco b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.xco new file mode 100644 index 000000000..d3688079a --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.xco @@ -0,0 +1,269 @@ +############################################################## +# +# Xilinx Core Generator version 14.7 +# Date: Tue Jul 14 00:18:05 2015 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# Generated from component: xilinx.com:ip:clk_wiz:3.6 +# +############################################################## +# +# BEGIN Project Options +SET addpads = false +SET asysymbol = true +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = false +SET designentry = Verilog +SET device = xc6slx75 +SET devicefamily = spartan6 +SET flowvendor = Foundation_ISE +SET formalverification = false +SET foundationsym = false +SET implementationfiletype = Ngc +SET package = csg484 +SET removerpms = false +SET simulationfiles = Behavioral +SET speedgrade = -3 +SET verilogsim = true +SET vhdlsim = false +# END Project Options +# BEGIN Select +SELECT Clocking_Wizard xilinx.com:ip:clk_wiz:3.6 +# END Select +# BEGIN Parameters +CSET calc_done=DONE +CSET clk_in_sel_port=CLK_IN_SEL +CSET clk_out1_port=CLK_OUT1_40_int +CSET clk_out1_use_fine_ps_gui=false +CSET clk_out2_port=CLK_OUT2_100_bus +CSET clk_out2_use_fine_ps_gui=false +CSET clk_out3_port=CLK_OUT3_200_ref_pll +CSET clk_out3_use_fine_ps_gui=false +CSET clk_out4_port=CLK_OUT4_gpif +CSET clk_out4_use_fine_ps_gui=false +CSET clk_out5_port=CLK_OUT5 +CSET clk_out5_use_fine_ps_gui=false +CSET clk_out6_port=CLK_OUT6 +CSET clk_out6_use_fine_ps_gui=false +CSET clk_out7_port=CLK_OUT7 +CSET clk_out7_use_fine_ps_gui=false +CSET clk_valid_port=CLK_VALID +CSET clkfb_in_n_port=CLKFB_IN_N +CSET clkfb_in_p_port=CLKFB_IN_P +CSET clkfb_in_port=CLKFB_IN +CSET clkfb_in_signaling=SINGLE +CSET clkfb_out_n_port=CLKFB_OUT_N +CSET clkfb_out_p_port=CLKFB_OUT_P +CSET clkfb_out_port=CLKFB_OUT +CSET clkfb_stopped_port=CLKFB_STOPPED +CSET clkin1_jitter_ps=250.0 +CSET clkin1_ui_jitter=0.010 +CSET clkin2_jitter_ps=100.0 +CSET clkin2_ui_jitter=0.010 +CSET clkout1_drives=BUFG +CSET clkout1_requested_duty_cycle=50.000 +CSET clkout1_requested_out_freq=40.000 +CSET clkout1_requested_phase=0.000 +CSET clkout2_drives=BUFG +CSET clkout2_requested_duty_cycle=50.000 +CSET clkout2_requested_out_freq=100.000 +CSET clkout2_requested_phase=0.000 +CSET clkout2_used=true +CSET clkout3_drives=BUFG +CSET clkout3_requested_duty_cycle=50.000 +CSET clkout3_requested_out_freq=200.000 +CSET clkout3_requested_phase=0.000 +CSET clkout3_used=true +CSET clkout4_drives=BUFG +CSET clkout4_requested_duty_cycle=50.000 +CSET clkout4_requested_out_freq=80.000 +CSET clkout4_requested_phase=0.000 +CSET clkout4_used=false +CSET clkout5_drives=BUFG +CSET clkout5_requested_duty_cycle=50.000 +CSET clkout5_requested_out_freq=100.000 +CSET clkout5_requested_phase=0.000 +CSET clkout5_used=false +CSET clkout6_drives=BUFG +CSET clkout6_requested_duty_cycle=50.000 +CSET clkout6_requested_out_freq=100.000 +CSET clkout6_requested_phase=0.000 +CSET clkout6_used=false +CSET clkout7_drives=BUFG +CSET clkout7_requested_duty_cycle=50.000 +CSET clkout7_requested_out_freq=100.000 +CSET clkout7_requested_phase=0.000 +CSET clkout7_used=false +CSET clock_mgr_type=AUTO +CSET component_name=b205_clk_gen +CSET daddr_port=DADDR +CSET dclk_port=DCLK +CSET dcm_clk_feedback=1X +CSET dcm_clk_out1_port=CLK0 +CSET dcm_clk_out2_port=CLKFX +CSET dcm_clk_out3_port=CLKFX +CSET dcm_clk_out4_port=CLK0 +CSET dcm_clk_out5_port=CLK0 +CSET dcm_clk_out6_port=CLK0 +CSET dcm_clkdv_divide=2.0 +CSET dcm_clkfx_divide=2 +CSET dcm_clkfx_multiply=5 +CSET dcm_clkgen_clk_out1_port=CLKFX +CSET dcm_clkgen_clk_out2_port=CLKFX +CSET dcm_clkgen_clk_out3_port=CLKFX +CSET dcm_clkgen_clkfx_divide=1 +CSET dcm_clkgen_clkfx_md_max=0.000 +CSET dcm_clkgen_clkfx_multiply=4 +CSET dcm_clkgen_clkfxdv_divide=2 +CSET dcm_clkgen_clkin_period=10.000 +CSET dcm_clkgen_notes=None +CSET dcm_clkgen_spread_spectrum=NONE +CSET dcm_clkgen_startup_wait=false +CSET dcm_clkin_divide_by_2=false +CSET dcm_clkin_period=25.000 +CSET dcm_clkout_phase_shift=NONE +CSET dcm_deskew_adjust=SYSTEM_SYNCHRONOUS +CSET dcm_notes=None +CSET dcm_phase_shift=0 +CSET dcm_pll_cascade=NONE +CSET dcm_startup_wait=false +CSET den_port=DEN +CSET din_port=DIN +CSET dout_port=DOUT +CSET drdy_port=DRDY +CSET dwe_port=DWE +CSET feedback_source=FDBK_AUTO +CSET in_freq_units=Units_MHz +CSET in_jitter_units=Units_UI +CSET input_clk_stopped_port=INPUT_CLK_STOPPED +CSET jitter_options=UI +CSET jitter_sel=No_Jitter +CSET locked_port=LOCKED +CSET mmcm_bandwidth=OPTIMIZED +CSET mmcm_clkfbout_mult_f=4.000 +CSET mmcm_clkfbout_phase=0.000 +CSET mmcm_clkfbout_use_fine_ps=false +CSET mmcm_clkin1_period=10.000 +CSET mmcm_clkin2_period=10.000 +CSET mmcm_clkout0_divide_f=4.000 +CSET mmcm_clkout0_duty_cycle=0.500 +CSET mmcm_clkout0_phase=0.000 +CSET mmcm_clkout0_use_fine_ps=false +CSET mmcm_clkout1_divide=1 +CSET mmcm_clkout1_duty_cycle=0.500 +CSET mmcm_clkout1_phase=0.000 +CSET mmcm_clkout1_use_fine_ps=false +CSET mmcm_clkout2_divide=1 +CSET mmcm_clkout2_duty_cycle=0.500 +CSET mmcm_clkout2_phase=0.000 +CSET mmcm_clkout2_use_fine_ps=false +CSET mmcm_clkout3_divide=1 +CSET mmcm_clkout3_duty_cycle=0.500 +CSET mmcm_clkout3_phase=0.000 +CSET mmcm_clkout3_use_fine_ps=false +CSET mmcm_clkout4_cascade=false +CSET mmcm_clkout4_divide=1 +CSET mmcm_clkout4_duty_cycle=0.500 +CSET mmcm_clkout4_phase=0.000 +CSET mmcm_clkout4_use_fine_ps=false +CSET mmcm_clkout5_divide=1 +CSET mmcm_clkout5_duty_cycle=0.500 +CSET mmcm_clkout5_phase=0.000 +CSET mmcm_clkout5_use_fine_ps=false +CSET mmcm_clkout6_divide=1 +CSET mmcm_clkout6_duty_cycle=0.500 +CSET mmcm_clkout6_phase=0.000 +CSET mmcm_clkout6_use_fine_ps=false +CSET mmcm_clock_hold=false +CSET mmcm_compensation=ZHOLD +CSET mmcm_divclk_divide=1 +CSET mmcm_notes=None +CSET mmcm_ref_jitter1=0.010 +CSET mmcm_ref_jitter2=0.010 +CSET mmcm_startup_wait=false +CSET num_out_clks=3 +CSET override_dcm=false +CSET override_dcm_clkgen=false +CSET override_mmcm=false +CSET override_pll=false +CSET platform=lin64 +CSET pll_bandwidth=OPTIMIZED +CSET pll_clk_feedback=CLKFBOUT +CSET pll_clkfbout_mult=10 +CSET pll_clkfbout_phase=0.000 +CSET pll_clkin_period=25.0 +CSET pll_clkout0_divide=10 +CSET pll_clkout0_duty_cycle=0.500 +CSET pll_clkout0_phase=0.000 +CSET pll_clkout1_divide=4 +CSET pll_clkout1_duty_cycle=0.500 +CSET pll_clkout1_phase=0.000 +CSET pll_clkout2_divide=2 +CSET pll_clkout2_duty_cycle=0.500 +CSET pll_clkout2_phase=0.000 +CSET pll_clkout3_divide=5 +CSET pll_clkout3_duty_cycle=0.500 +CSET pll_clkout3_phase=0.000 +CSET pll_clkout4_divide=1 +CSET pll_clkout4_duty_cycle=0.500 +CSET pll_clkout4_phase=0.000 +CSET pll_clkout5_divide=1 +CSET pll_clkout5_duty_cycle=0.500 +CSET pll_clkout5_phase=0.000 +CSET pll_compensation=SYSTEM_SYNCHRONOUS +CSET pll_divclk_divide=1 +CSET pll_notes=None +CSET pll_ref_jitter=0.010 +CSET power_down_port=POWER_DOWN +CSET prim_in_freq=40.000 +CSET prim_in_jitter=0.010 +CSET prim_source=Single_ended_clock_capable_pin +CSET primary_port=CLK_IN1_40 +CSET primitive=MMCM +CSET primtype_sel=PLL_BASE +CSET psclk_port=PSCLK +CSET psdone_port=PSDONE +CSET psen_port=PSEN +CSET psincdec_port=PSINCDEC +CSET relative_inclk=REL_PRIMARY +CSET reset_port=RESET +CSET secondary_in_freq=100.000 +CSET secondary_in_jitter=0.010 +CSET secondary_port=CLK_IN2 +CSET secondary_source=Single_ended_clock_capable_pin +CSET ss_mod_freq=250 +CSET ss_mode=CENTER_HIGH +CSET status_port=STATUS +CSET summary_strings=empty +CSET use_clk_valid=false +CSET use_clkfb_stopped=false +CSET use_dyn_phase_shift=false +CSET use_dyn_reconfig=false +CSET use_freeze=false +CSET use_freq_synth=true +CSET use_inclk_stopped=false +CSET use_inclk_switchover=false +CSET use_locked=true +CSET use_max_i_jitter=false +CSET use_min_o_jitter=false +CSET use_min_power=false +CSET use_phase_alignment=true +CSET use_power_down=false +CSET use_reset=true +CSET use_spread_spectrum=false +CSET use_spread_spectrum_1=false +CSET use_status=false +# END Parameters +# BEGIN Extra information +MISC pkg_timestamp=2012-05-10T12:44:55Z +# END Extra information +GENERATE +# CRC: 14fd4cf9 diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.xdc b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.xdc new file mode 100755 index 000000000..992f39959 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen.xdc @@ -0,0 +1,67 @@ +# file: b205_clk_gen.xdc +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# Input clock periods. These duplicate the values entered for the +# input clocks. You can use these to time your system +#---------------------------------------------------------------- +create_clock -name CLK_IN1 -period 25.0 [get_ports CLK_IN1] +set_propagated_clock CLK_IN1 +set_input_jitter CLK_IN1 0.25 + +set_false_path -from [get_ports "RESET"] + +# Derived clock periods. These are commented out because they are +# automatically propogated by the tools +# However, if you'd like to use them for module level testing, you +# can copy them into your module level timing checks +#----------------------------------------------------------------- + +#----------------------------------------------------------------- + +#----------------------------------------------------------------- diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/clk_wiz_v3_6_readme.txt b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/clk_wiz_v3_6_readme.txt new file mode 100644 index 000000000..91dcdd01f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/clk_wiz_v3_6_readme.txt @@ -0,0 +1,184 @@ +CHANGE LOG for LogiCORE Clocking Wizard V3.6 + + Release Date: June 19, 2013 +-------------------------------------------------------------------------------- + +Table of Contents + +1. INTRODUCTION +2. DEVICE SUPPORT +3. NEW FEATURE HISTORY +4. RESOLVED ISSUES +5. KNOWN ISSUES & LIMITATIONS +6. TECHNICAL SUPPORT & FEEDBACK +7. CORE RELEASE HISTORY +8. LEGAL DISCLAIMER + +-------------------------------------------------------------------------------- + + +1. INTRODUCTION + +For installation instructions for this release, please go to: + + http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm + +For system requirements: + + http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm + +This file contains release notes for the Xilinx LogiCORE IP Clocking Wizard v3.6 +solution. For the latest core updates, see the product page at: + + http://www.xilinx.com/products/design_resources/conn_central/solution_kits/wizards/ + +................................................................................ + +2. DEVICE SUPPORT + + + 2.1 ISE + + + The following device families are supported by the core for this release. + + All 7 Series devices + + + Zynq-7000 devices + Zynq-7000 + Defense Grade Zynq-7000Q (XQ) + + + All Virtex-6 devices + + + All Spartan-6 devices + + +................................................................................ + +3. NEW FEATURE HISTORY + + + 3.1 ISE + + - Spread Spectrum support for 7 series MMCME2 + + - ISE 14.2 software support + +................................................................................ + +4. RESOLVED ISSUES + + + 4.1 ISE + + Resolved issue with example design becoming core top in planAhead + + Resolved issue with Virtex6 MMCM instantiation for VHDL project + Please refer to AR 50719 - http://www.xilinx.com/support/answers/50719.htm + +................................................................................ + +5. KNOWN ISSUES & LIMITATIONS + + + 5.1 ISE + + + The most recent information, including known issues, workarounds, and + resolutions for this version is provided in the IP Release Notes Guide + located at + + www.xilinx.com/support/documentation/user_guides/xtp025.pdf + + +................................................................................ + +6. TECHNICAL SUPPORT & FEEDBACK + + +To obtain technical support, create a WebCase at www.xilinx.com/support. +Questions are routed to a team with expertise using this product. + +Xilinx provides technical support for use of this product when used +according to the guidelines described in the core documentation, and +cannot guarantee timing, functionality, or support of this product for +designs that do not follow specified guidelines. + + +................................................................................ + +7. CORE RELEASE HISTORY + + +Date By Version Description +================================================================================ +06/19/2013 Xilinx, Inc. 3.6(Rev3) ISE 14.6 support +10/16/2012 Xilinx, Inc. 3.6(Rev2) ISE 14.3 support +07/25/2012 Xilinx, Inc. 3.6 ISE 14.2 support +04/24/2012 Xilinx, Inc. 3.5 ISE 14.1 support +01/18/2012 Xilinx, Inc. 3.3 ISE 13.4 support +06/22/2011 Xilinx, Inc. 3.2 ISE 13.2 support +03/01/2011 Xilinx, Inc. 3.1 ISE 13.1 support +12/14/2010 Xilinx, Inc. 1.8 ISE 12.4 support +09/21/2010 Xilinx, Inc. 1.7 ISE 12.3 support +07/23/2010 Xilinx, Inc. 1.6 ISE 12.2 support +04/19/2010 Xilinx, Inc. 1.5 ISE 12.1 support +12/02/2009 Xilinx, Inc. 1.4 ISE 11.4 support +09/16/2009 Xilinx, Inc. 1.3 ISE 11.3 support +06/24/2009 Xilinx, Inc. 1.2 ISE 11.2 support +04/24/2009 Xilinx, Inc. 1.1 Initial release; 11.1 support +================================================================================ + +................................................................................ + +8. LEGAL DISCLAIMER + +(c) Copyright 2008 - 2013 Xilinx, Inc. All rights reserved. + +This file contains confidential and proprietary information +of Xilinx, Inc. and is protected under U.S. and +international copyright and other intellectual property +laws. + +DISCLAIMER +This disclaimer is not a license and does not grant any +rights to the materials distributed herewith. Except as +otherwise provided in a valid license issued to you by +Xilinx, and to the maximum extent permitted by applicable +law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +(2) Xilinx shall not be liable (whether in contract or tort, +including negligence, or under any other theory of +liability) for any loss or damage of any kind or nature +related to, arising under or in connection with these +materials, including for any direct, or any indirect, +special, incidental, or consequential loss or damage +(including loss of data, profits, goodwill, or any type of +loss or damage suffered as a result of any action brought +by a third party) even if such damage or loss was +reasonably foreseeable or Xilinx had been advised of the +possibility of the same. + +CRITICAL APPLICATIONS +Xilinx products are not designed or intended to be fail- +safe, or for use in any application requiring fail-safe +performance, such as life-support or safety devices or +systems, Class III medical devices, nuclear facilities, +applications related to the deployment of airbags, or any +other applications that could lead to death, personal +injury, or severe property or environmental damage +(individually and collectively, "Critical +Applications"). Customer assumes the sole risk and +liability of any use of Xilinx products in Critical +Applications, subject only to applicable laws and +regulations governing limitations on product liability. + +THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +PART OF THIS FILE AT ALL TIMES. + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/doc/clk_wiz_v3_6_readme.txt b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/doc/clk_wiz_v3_6_readme.txt new file mode 100644 index 000000000..91dcdd01f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/doc/clk_wiz_v3_6_readme.txt @@ -0,0 +1,184 @@ +CHANGE LOG for LogiCORE Clocking Wizard V3.6 + + Release Date: June 19, 2013 +-------------------------------------------------------------------------------- + +Table of Contents + +1. INTRODUCTION +2. DEVICE SUPPORT +3. NEW FEATURE HISTORY +4. RESOLVED ISSUES +5. KNOWN ISSUES & LIMITATIONS +6. TECHNICAL SUPPORT & FEEDBACK +7. CORE RELEASE HISTORY +8. LEGAL DISCLAIMER + +-------------------------------------------------------------------------------- + + +1. INTRODUCTION + +For installation instructions for this release, please go to: + + http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm + +For system requirements: + + http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm + +This file contains release notes for the Xilinx LogiCORE IP Clocking Wizard v3.6 +solution. For the latest core updates, see the product page at: + + http://www.xilinx.com/products/design_resources/conn_central/solution_kits/wizards/ + +................................................................................ + +2. DEVICE SUPPORT + + + 2.1 ISE + + + The following device families are supported by the core for this release. + + All 7 Series devices + + + Zynq-7000 devices + Zynq-7000 + Defense Grade Zynq-7000Q (XQ) + + + All Virtex-6 devices + + + All Spartan-6 devices + + +................................................................................ + +3. NEW FEATURE HISTORY + + + 3.1 ISE + + - Spread Spectrum support for 7 series MMCME2 + + - ISE 14.2 software support + +................................................................................ + +4. RESOLVED ISSUES + + + 4.1 ISE + + Resolved issue with example design becoming core top in planAhead + + Resolved issue with Virtex6 MMCM instantiation for VHDL project + Please refer to AR 50719 - http://www.xilinx.com/support/answers/50719.htm + +................................................................................ + +5. KNOWN ISSUES & LIMITATIONS + + + 5.1 ISE + + + The most recent information, including known issues, workarounds, and + resolutions for this version is provided in the IP Release Notes Guide + located at + + www.xilinx.com/support/documentation/user_guides/xtp025.pdf + + +................................................................................ + +6. TECHNICAL SUPPORT & FEEDBACK + + +To obtain technical support, create a WebCase at www.xilinx.com/support. +Questions are routed to a team with expertise using this product. + +Xilinx provides technical support for use of this product when used +according to the guidelines described in the core documentation, and +cannot guarantee timing, functionality, or support of this product for +designs that do not follow specified guidelines. + + +................................................................................ + +7. CORE RELEASE HISTORY + + +Date By Version Description +================================================================================ +06/19/2013 Xilinx, Inc. 3.6(Rev3) ISE 14.6 support +10/16/2012 Xilinx, Inc. 3.6(Rev2) ISE 14.3 support +07/25/2012 Xilinx, Inc. 3.6 ISE 14.2 support +04/24/2012 Xilinx, Inc. 3.5 ISE 14.1 support +01/18/2012 Xilinx, Inc. 3.3 ISE 13.4 support +06/22/2011 Xilinx, Inc. 3.2 ISE 13.2 support +03/01/2011 Xilinx, Inc. 3.1 ISE 13.1 support +12/14/2010 Xilinx, Inc. 1.8 ISE 12.4 support +09/21/2010 Xilinx, Inc. 1.7 ISE 12.3 support +07/23/2010 Xilinx, Inc. 1.6 ISE 12.2 support +04/19/2010 Xilinx, Inc. 1.5 ISE 12.1 support +12/02/2009 Xilinx, Inc. 1.4 ISE 11.4 support +09/16/2009 Xilinx, Inc. 1.3 ISE 11.3 support +06/24/2009 Xilinx, Inc. 1.2 ISE 11.2 support +04/24/2009 Xilinx, Inc. 1.1 Initial release; 11.1 support +================================================================================ + +................................................................................ + +8. LEGAL DISCLAIMER + +(c) Copyright 2008 - 2013 Xilinx, Inc. All rights reserved. + +This file contains confidential and proprietary information +of Xilinx, Inc. and is protected under U.S. and +international copyright and other intellectual property +laws. + +DISCLAIMER +This disclaimer is not a license and does not grant any +rights to the materials distributed herewith. Except as +otherwise provided in a valid license issued to you by +Xilinx, and to the maximum extent permitted by applicable +law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +(2) Xilinx shall not be liable (whether in contract or tort, +including negligence, or under any other theory of +liability) for any loss or damage of any kind or nature +related to, arising under or in connection with these +materials, including for any direct, or any indirect, +special, incidental, or consequential loss or damage +(including loss of data, profits, goodwill, or any type of +loss or damage suffered as a result of any action brought +by a third party) even if such damage or loss was +reasonably foreseeable or Xilinx had been advised of the +possibility of the same. + +CRITICAL APPLICATIONS +Xilinx products are not designed or intended to be fail- +safe, or for use in any application requiring fail-safe +performance, such as life-support or safety devices or +systems, Class III medical devices, nuclear facilities, +applications related to the deployment of airbags, or any +other applications that could lead to death, personal +injury, or severe property or environmental damage +(individually and collectively, "Critical +Applications"). Customer assumes the sole risk and +liability of any use of Xilinx products in Critical +Applications, subject only to applicable laws and +regulations governing limitations on product liability. + +THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +PART OF THIS FILE AT ALL TIMES. + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/doc/clk_wiz_v3_6_vinfo.html b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/doc/clk_wiz_v3_6_vinfo.html new file mode 100644 index 000000000..d6deba06c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/doc/clk_wiz_v3_6_vinfo.html @@ -0,0 +1,195 @@ +<HTML> +<HEAD> +<TITLE>clk_wiz_v3_6_vinfo</TITLE> +<META HTTP-EQUIV="Content-Type" CONTENT="text/plain;CHARSET=iso-8859-1"> +</HEAD> +<BODY> +<PRE><FONT face="Arial, Helvetica, sans-serif" size="-1"> +CHANGE LOG for LogiCORE Clocking Wizard V3.6 + + Release Date: June 19, 2013 +-------------------------------------------------------------------------------- + +Table of Contents + +1. INTRODUCTION +2. DEVICE SUPPORT +3. NEW FEATURE HISTORY +4. RESOLVED ISSUES +5. KNOWN ISSUES & LIMITATIONS +6. TECHNICAL SUPPORT & FEEDBACK +7. CORE RELEASE HISTORY +8. LEGAL DISCLAIMER + +-------------------------------------------------------------------------------- + + +1. INTRODUCTION + +For installation instructions for this release, please go to: + + <A HREF="http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm">www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm</A> + +For system requirements: + + <A HREF="http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm">www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm</A> + +This file contains release notes for the Xilinx LogiCORE IP Clocking Wizard v3.6 +solution. For the latest core updates, see the product page at: + + <A HREF="http://www.xilinx.com/products/design_resources/conn_central/solution_kits/wizards/">www.xilinx.com/products/design_resources/conn_central/solution_kits/wizards/</A> + +................................................................................ + +2. DEVICE SUPPORT + + + 2.1 ISE + + + The following device families are supported by the core for this release. + + All 7 Series devices + + + Zynq-7000 devices + Zynq-7000 + Defense Grade Zynq-7000Q (XQ) + + + All Virtex-6 devices + + + All Spartan-6 devices + + +................................................................................ + +3. NEW FEATURE HISTORY + + + 3.1 ISE + + - Spread Spectrum support for 7 series MMCME2 + + - ISE 14.2 software support + +................................................................................ + +4. RESOLVED ISSUES + + + 4.1 ISE + + Resolved issue with example design becoming core top in planAhead + + Resolved issue with Virtex6 MMCM instantiation for VHDL project + Please refer to AR 50719 - <A HREF="http://www.xilinx.com/support/answers/50719.htm">www.xilinx.com/support/answers/50719.htm</A> + +................................................................................ + +5. KNOWN ISSUES & LIMITATIONS + + + 5.1 ISE + + + The most recent information, including known issues, workarounds, and + resolutions for this version is provided in the IP Release Notes Guide + located at + + <A HREF="http://www.xilinx.com/support/documentation/user_guides/xtp025.pdf">www.xilinx.com/support/documentation/user_guides/xtp025.pdf</A> + + +................................................................................ + +6. TECHNICAL SUPPORT & FEEDBACK + + +To obtain technical support, create a WebCase at <A HREF="http://www.xilinx.com/support.">www.xilinx.com/support.</A> +Questions are routed to a team with expertise using this product. + +Xilinx provides technical support for use of this product when used +according to the guidelines described in the core documentation, and +cannot guarantee timing, functionality, or support of this product for +designs that do not follow specified guidelines. + + +................................................................................ + +7. CORE RELEASE HISTORY + + +Date By Version Description +================================================================================ +06/19/2013 Xilinx, Inc. 3.6(Rev3) ISE 14.6 support +10/16/2012 Xilinx, Inc. 3.6(Rev2) ISE 14.3 support +07/25/2012 Xilinx, Inc. 3.6 ISE 14.2 support +04/24/2012 Xilinx, Inc. 3.5 ISE 14.1 support +01/18/2012 Xilinx, Inc. 3.3 ISE 13.4 support +06/22/2011 Xilinx, Inc. 3.2 ISE 13.2 support +03/01/2011 Xilinx, Inc. 3.1 ISE 13.1 support +12/14/2010 Xilinx, Inc. 1.8 ISE 12.4 support +09/21/2010 Xilinx, Inc. 1.7 ISE 12.3 support +07/23/2010 Xilinx, Inc. 1.6 ISE 12.2 support +04/19/2010 Xilinx, Inc. 1.5 ISE 12.1 support +12/02/2009 Xilinx, Inc. 1.4 ISE 11.4 support +09/16/2009 Xilinx, Inc. 1.3 ISE 11.3 support +06/24/2009 Xilinx, Inc. 1.2 ISE 11.2 support +04/24/2009 Xilinx, Inc. 1.1 Initial release; 11.1 support +================================================================================ + +................................................................................ + +8. LEGAL DISCLAIMER + +(c) Copyright 2008 - 2013 Xilinx, Inc. All rights reserved. + +This file contains confidential and proprietary information +of Xilinx, Inc. and is protected under U.S. and +international copyright and other intellectual property +laws. + +DISCLAIMER +This disclaimer is not a license and does not grant any +rights to the materials distributed herewith. Except as +otherwise provided in a valid license issued to you by +Xilinx, and to the maximum extent permitted by applicable +law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +(2) Xilinx shall not be liable (whether in contract or tort, +including negligence, or under any other theory of +liability) for any loss or damage of any kind or nature +related to, arising under or in connection with these +materials, including for any direct, or any indirect, +special, incidental, or consequential loss or damage +(including loss of data, profits, goodwill, or any type of +loss or damage suffered as a result of any action brought +by a third party) even if such damage or loss was +reasonably foreseeable or Xilinx had been advised of the +possibility of the same. + +CRITICAL APPLICATIONS +Xilinx products are not designed or intended to be fail- +safe, or for use in any application requiring fail-safe +performance, such as life-support or safety devices or +systems, Class III medical devices, nuclear facilities, +applications related to the deployment of airbags, or any +other applications that could lead to death, personal +injury, or severe property or environmental damage +(individually and collectively, "Critical +Applications"). Customer assumes the sole risk and +liability of any use of Xilinx products in Critical +Applications, subject only to applicable laws and +regulations governing limitations on product liability. + +THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +PART OF THIS FILE AT ALL TIMES. + +</FONT> +</PRE> +</BODY> +</HTML> diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/doc/pg065_clk_wiz.pdf b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/doc/pg065_clk_wiz.pdf Binary files differnew file mode 100644 index 000000000..a7daa6089 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/doc/pg065_clk_wiz.pdf diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/example_design/b205_clk_gen_exdes.ucf b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/example_design/b205_clk_gen_exdes.ucf new file mode 100755 index 000000000..c98fa6f8c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/example_design/b205_clk_gen_exdes.ucf @@ -0,0 +1,60 @@ +# file: b205_clk_gen_exdes.ucf +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# Input clock periods. These duplicate the values entered for the +# input clocks. You can use these to time your system +#---------------------------------------------------------------- +NET "CLK_IN1" TNM_NET = "CLK_IN1"; +TIMESPEC "TS_CLK_IN1" = PERIOD "CLK_IN1" 25.0 ns HIGH 50% INPUT_JITTER 250.0ps; + + +# FALSE PATH constraints +PIN "COUNTER_RESET" TIG; +PIN "RESET" TIG; + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/example_design/b205_clk_gen_exdes.v b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/example_design/b205_clk_gen_exdes.v new file mode 100755 index 000000000..45b605d7f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/example_design/b205_clk_gen_exdes.v @@ -0,0 +1,178 @@ +// file: b205_clk_gen_exdes.v +// +// (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// + +//---------------------------------------------------------------------------- +// Clocking wizard example design +//---------------------------------------------------------------------------- +// This example design instantiates the created clocking network, where each +// output clock drives a counter. The high bit of each counter is ported. +//---------------------------------------------------------------------------- + +`timescale 1ps/1ps + +module b205_clk_gen_exdes + #( + parameter TCQ = 100 + ) + (// Clock in ports + input CLK_IN1, + // Reset that only drives logic in example design + input COUNTER_RESET, + output [3:1] CLK_OUT, + // High bits of counters driven by clocks + output [3:1] COUNT, + // Status and control signals + input RESET, + output LOCKED + ); + + // Parameters for the counters + //------------------------------- + // Counter width + localparam C_W = 16; + // Number of counters + localparam NUM_C = 3; + genvar count_gen; + // When the clock goes out of lock, reset the counters + wire reset_int = !LOCKED || RESET || COUNTER_RESET; + + reg [NUM_C:1] rst_sync; + reg [NUM_C:1] rst_sync_int; + reg [NUM_C:1] rst_sync_int1; + reg [NUM_C:1] rst_sync_int2; + + + // Declare the clocks and counters + wire [NUM_C:1] clk_int; + wire [NUM_C:1] clk_n; + wire [NUM_C:1] clk; + reg [C_W-1:0] counter [NUM_C:1]; + + // Instantiation of the clocking network + //-------------------------------------- + b205_clk_gen clknetwork + (// Clock in ports + .CLK_IN1_40 (CLK_IN1), + // Clock out ports + .CLK_OUT1_40_int (clk_int[1]), + .CLK_OUT2_100_bus (clk_int[2]), + .CLK_OUT3_200_ref_pll (clk_int[3]), + // Status and control signals + .RESET (RESET), + .LOCKED (LOCKED)); + +genvar clk_out_pins; + +generate + for (clk_out_pins = 1; clk_out_pins <= NUM_C; clk_out_pins = clk_out_pins + 1) + begin: gen_outclk_oddr + assign clk_n[clk_out_pins] = ~clk[clk_out_pins]; + + ODDR2 clkout_oddr + (.Q (CLK_OUT[clk_out_pins]), + .C0 (clk[clk_out_pins]), + .C1 (clk_n[clk_out_pins]), + .CE (1'b1), + .D0 (1'b1), + .D1 (1'b0), + .R (1'b0), + .S (1'b0)); + end +endgenerate + + // Connect the output clocks to the design + //----------------------------------------- + assign clk[1] = clk_int[1]; + assign clk[2] = clk_int[2]; + assign clk[3] = clk_int[3]; + + + // Reset synchronizer + //----------------------------------- + generate for (count_gen = 1; count_gen <= NUM_C; count_gen = count_gen + 1) begin: counters_1 + always @(posedge reset_int or posedge clk[count_gen]) begin + if (reset_int) begin + rst_sync[count_gen] <= 1'b1; + rst_sync_int[count_gen]<= 1'b1; + rst_sync_int1[count_gen]<= 1'b1; + rst_sync_int2[count_gen]<= 1'b1; + end + else begin + rst_sync[count_gen] <= 1'b0; + rst_sync_int[count_gen] <= rst_sync[count_gen]; + rst_sync_int1[count_gen] <= rst_sync_int[count_gen]; + rst_sync_int2[count_gen] <= rst_sync_int1[count_gen]; + end + end + end + endgenerate + + + // Output clock sampling + //----------------------------------- + generate for (count_gen = 1; count_gen <= NUM_C; count_gen = count_gen + 1) begin: counters + + always @(posedge clk[count_gen] or posedge rst_sync_int2[count_gen]) begin + if (rst_sync_int2[count_gen]) begin + counter[count_gen] <= #TCQ { C_W { 1'b 0 } }; + end else begin + counter[count_gen] <= #TCQ counter[count_gen] + 1'b 1; + end + end + // alias the high bit of each counter to the corresponding + // bit in the output bus + assign COUNT[count_gen] = counter[count_gen][C_W-1]; + end + endgenerate + + + + + +endmodule diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/example_design/b205_clk_gen_exdes.xdc b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/example_design/b205_clk_gen_exdes.xdc new file mode 100755 index 000000000..0678543c6 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/example_design/b205_clk_gen_exdes.xdc @@ -0,0 +1,69 @@ +# file: b205_clk_gen_exdes.xdc +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# Input clock periods. These duplicate the values entered for the +# input clocks. You can use these to time your system +#---------------------------------------------------------------- +create_clock -name CLK_IN1 -period 25.0 [get_ports CLK_IN1] +set_propagated_clock CLK_IN1 +set_input_jitter CLK_IN1 0.25 + +# FALSE PATH constraint added on COUNTER_RESET +set_false_path -from [get_ports "COUNTER_RESET"] +set_false_path -from [get_ports "RESET"] + +# Derived clock periods. These are commented out because they are +# automatically propogated by the tools +# However, if you'd like to use them for module level testing, you +# can copy them into your module level timing checks +#----------------------------------------------------------------- + +#----------------------------------------------------------------- + +#----------------------------------------------------------------- diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/implement.bat b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/implement.bat new file mode 100755 index 000000000..729bfef85 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/implement.bat @@ -0,0 +1,90 @@ +REM file: implement.bat +REM +REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +REM +REM This file contains confidential and proprietary information +REM of Xilinx, Inc. and is protected under U.S. and +REM international copyright and other intellectual property +REM laws. +REM +REM DISCLAIMER +REM This disclaimer is not a license and does not grant any +REM rights to the materials distributed herewith. Except as +REM otherwise provided in a valid license issued to you by +REM Xilinx, and to the maximum extent permitted by applicable +REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +REM (2) Xilinx shall not be liable (whether in contract or tort, +REM including negligence, or under any other theory of +REM liability) for any loss or damage of any kind or nature +REM related to, arising under or in connection with these +REM materials, including for any direct, or any indirect, +REM special, incidental, or consequential loss or damage +REM (including loss of data, profits, goodwill, or any type of +REM loss or damage suffered as a result of any action brought +REM by a third party) even if such damage or loss was +REM reasonably foreseeable or Xilinx had been advised of the +REM possibility of the same. +REM +REM CRITICAL APPLICATIONS +REM Xilinx products are not designed or intended to be fail- +REM safe, or for use in any application requiring fail-safe +REM performance, such as life-support or safety devices or +REM systems, Class III medical devices, nuclear facilities, +REM applications related to the deployment of airbags, or any +REM other applications that could lead to death, personal +REM injury, or severe property or environmental damage +REM (individually and collectively, "Critical +REM Applications"). Customer assumes the sole risk and +REM liability of any use of Xilinx products in Critical +REM Applications, subject only to applicable laws and +REM regulations governing limitations on product liability. +REM +REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +REM PART OF THIS FILE AT ALL TIMES. +REM + +REM ----------------------------------------------------------------------------- +REM Script to synthesize and implement the RTL provided for the clocking wizard +REM ----------------------------------------------------------------------------- + +REM Clean up the results directory +rmdir /S /Q results +mkdir results + +REM Copy unisim_comp.v file to results directory +copy %XILINX%\verilog\src\iSE\unisim_comp.v .\results\ + +REM Synthesize the Verilog Wrapper Files +echo 'Synthesizing Clocking Wizard design with XST' +xst -ifn xst.scr +move b205_clk_gen_exdes.ngc results\ + +REM Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +copy ..\example_design\b205_clk_gen_exdes.ucf results\ + +cd results + +echo 'Running ngdbuild' +ngdbuild -uc b205_clk_gen_exdes.ucf b205_clk_gen_exdes + +echo 'Running map' +map -timing -pr b b205_clk_gen_exdes -o mapped.ncd + +echo 'Running par' +par -w mapped.ncd routed mapped.pcf + +echo 'Running trce' +trce -e 10 routed -o routed mapped.pcf + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level model for the clocking wizard example design' +netgen -ofmt verilog -sim -sdf_anno false -tm b205_clk_gen_exdes -w routed.ncd routed.v +cd .. + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/implement.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/implement.sh new file mode 100755 index 000000000..ffac9e81c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/implement.sh @@ -0,0 +1,91 @@ +#!/bin/sh +# file: implement.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +#----------------------------------------------------------------------------- +# Script to synthesize and implement the RTL provided for the clocking wizard +#----------------------------------------------------------------------------- + +# Clean up the results directory +rm -rf results +mkdir results + +# Copy unisim_comp.v file to results directory +cp $XILINX/verilog/src/iSE/unisim_comp.v ./results/ + +# Synthesize the Verilog Wrapper Files +echo 'Synthesizing Clocking Wizard design with XST' +xst -ifn xst.scr +mv b205_clk_gen_exdes.ngc results/ + +# Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +cp ../example_design/b205_clk_gen_exdes.ucf results/ + +cd results + +echo 'Running ngdbuild' +ngdbuild -uc b205_clk_gen_exdes.ucf b205_clk_gen_exdes + +echo 'Running map' +map -timing b205_clk_gen_exdes -o mapped.ncd + +echo 'Running par' +par -w mapped.ncd routed mapped.pcf + +echo 'Running trce' +trce -e 10 routed -o routed mapped.pcf + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level model for the clocking wizard example design' +netgen -ofmt verilog -sim -sdf_anno false -tm b205_clk_gen_exdes -w routed.ncd routed.v + +cd .. diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_ise.bat b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_ise.bat new file mode 100755 index 000000000..8ac771810 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_ise.bat @@ -0,0 +1,58 @@ +REM file: planAhead_ise.bat +REM +REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +REM +REM This file contains confidential and proprietary information +REM of Xilinx, Inc. and is protected under U.S. and +REM international copyright and other intellectual property +REM laws. +REM +REM DISCLAIMER +REM This disclaimer is not a license and does not grant any +REM rights to the materials distributed herewith. Except as +REM otherwise provided in a valid license issued to you by +REM Xilinx, and to the maximum extent permitted by applicable +REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +REM (2) Xilinx shall not be liable (whether in contract or tort, +REM including negligence, or under any other theory of +REM liability) for any loss or damage of any kind or nature +REM related to, arising under or in connection with these +REM materials, including for any direct, or any indirect, +REM special, incidental, or consequential loss or damage +REM (including loss of data, profits, goodwill, or any type of +REM loss or damage suffered as a result of any action brought +REM by a third party) even if such damage or loss was +REM reasonably foreseeable or Xilinx had been advised of the +REM possibility of the same. +REM +REM CRITICAL APPLICATIONS +REM Xilinx products are not designed or intended to be fail- +REM safe, or for use in any application requiring fail-safe +REM performance, such as life-support or safety devices or +REM systems, Class III medical devices, nuclear facilities, +REM applications related to the deployment of airbags, or any +REM other applications that could lead to death, personal +REM injury, or severe property or environmental damage +REM (individually and collectively, "Critical +REM Applications"). Customer assumes the sole risk and +REM liability of any use of Xilinx products in Critical +REM Applications, subject only to applicable laws and +REM regulations governing limitations on product liability. +REM +REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +REM PART OF THIS FILE AT ALL TIMES. +REM + +REM----------------------------------------------------------------------------- +REM Script to synthesize and implement the RTL provided for the clocking wizard +REM----------------------------------------------------------------------------- + +del \f results +mkdir results +cd results + +planAhead -mode batch -source ..\planAhead_ise.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_ise.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_ise.sh new file mode 100755 index 000000000..6c8c837d3 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_ise.sh @@ -0,0 +1,59 @@ +#!/bin/sh +# file: planAhead_ise.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +#----------------------------------------------------------------------------- +# Script to synthesize and implement the RTL provided for the clocking wizard +#----------------------------------------------------------------------------- + +rm -rf results +mkdir results +cd results + +planAhead -mode batch -source ../planAhead_ise.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_ise.tcl b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_ise.tcl new file mode 100755 index 000000000..74ddb6a1a --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_ise.tcl @@ -0,0 +1,78 @@ +# file: planAhead_ise.tcl +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +set projDir [file dirname [info script]] +set projName b205_clk_gen +set topName b205_clk_gen_exdes +set device xc6slx75csg484-3 + +create_project $projName $projDir/results/$projName -part $device + +set_property design_mode RTL [get_filesets sources_1] + +## Source files +#set verilogSources [glob $srcDir/*.v] +import_files -fileset [get_filesets sources_1] -force -norecurse ../../example_design/b205_clk_gen_exdes.v +import_files -fileset [get_filesets sources_1] -force -norecurse ../../../b205_clk_gen.v + + +#UCF file +import_files -fileset [get_filesets constrs_1] -force -norecurse ../../example_design/b205_clk_gen_exdes.ucf + +set_property top $topName [get_property srcset [current_run]] + +launch_runs -runs synth_1 +wait_on_run synth_1 + +set_property add_step Bitgen [get_runs impl_1] +launch_runs -runs impl_1 +wait_on_run impl_1 + + + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_rdn.bat b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_rdn.bat new file mode 100755 index 000000000..42273f5d4 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_rdn.bat @@ -0,0 +1,58 @@ +REM file: planAhead_rdn.sh +REM +REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +REM +REM This file contains confidential and proprietary information +REM of Xilinx, Inc. and is protected under U.S. and +REM international copyright and other intellectual property +REM laws. +REM +REM DISCLAIMER +REM This disclaimer is not a license and does not grant any +REM rights to the materials distributed herewith. Except as +REM otherwise provided in a valid license issued to you by +REM Xilinx, and to the maximum extent permitted by applicable +REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +REM (2) Xilinx shall not be liable (whether in contract or tort, +REM including negligence, or under any other theory of +REM liability) for any loss or damage of any kind or nature +REM related to, arising under or in connection with these +REM materials, including for any direct, or any indirect, +REM special, incidental, or consequential loss or damage +REM (including loss of data, profits, goodwill, or any type of +REM loss or damage suffered as a result of any action brought +REM by a third party) even if such damage or loss was +REM reasonably foreseeable or Xilinx had been advised of the +REM possibility of the same. +REM +REM CRITICAL APPLICATIONS +REM Xilinx products are not designed or intended to be fail- +REM safe, or for use in any application requiring fail-safe +REM performance, such as life-support or safety devices or +REM systems, Class III medical devices, nuclear facilities, +REM applications related to the deployment of airbags, or any +REM other applications that could lead to death, personal +REM injury, or severe property or environmental damage +REM (individually and collectively, "Critical +REM Applications"). Customer assumes the sole risk and +REM liability of any use of Xilinx products in Critical +REM Applications, subject only to applicable laws and +REM regulations governing limitations on product liability. +REM +REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +REM PART OF THIS FILE AT ALL TIMES. +REM + +REM----------------------------------------------------------------------------- +REM Script to synthesize and implement the RTL provided for the XADC wizard +REM----------------------------------------------------------------------------- + +del \f results +mkdir results +cd results + +planAhead -mode batch -source ..\planAhead_rdn.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_rdn.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_rdn.sh new file mode 100755 index 000000000..f4c14729e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_rdn.sh @@ -0,0 +1,57 @@ +#!/bin/sh +# file: planAhead_rdn.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +#----------------------------------------------------------------------------- +# Script to synthesize and implement the RTL provided for the XADC wizard +#----------------------------------------------------------------------------- +rm -rf results +mkdir results +cd results +planAhead -mode batch -source ../planAhead_rdn.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_rdn.tcl b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_rdn.tcl new file mode 100755 index 000000000..8c4276049 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/planAhead_rdn.tcl @@ -0,0 +1,69 @@ +# file : planAhead_rdn.tcl +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +set device xc6slx75csg484-3 +set projName b205_clk_gen +set design b205_clk_gen +set projDir [file dirname [info script]] +create_project $projName $projDir/results/$projName -part $device -force +set_property design_mode RTL [current_fileset -srcset] +set top_module b205_clk_gen_exdes +set_property top b205_clk_gen_exdes [get_property srcset [current_run]] +add_files -norecurse {../../../b205_clk_gen.v} +add_files -norecurse {../../example_design/b205_clk_gen_exdes.v} +import_files -fileset [get_filesets constrs_1 ] -force -norecurse {../../example_design/b205_clk_gen_exdes.xdc} +synth_design +opt_design +place_design +route_design +write_sdf -rename_top_module b205_clk_gen_exdes -file routed.sdf +write_verilog -nolib -mode timesim -sdf_anno false -rename_top_module b205_clk_gen_exdes -file routed.v +report_timing -nworst 30 -path_type full -file routed.twr +report_drc -file report.drc +write_bitstream -bitgen_options {-g UnconstrainedPins:Allow} -file routed.bit diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/xst.prj b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/xst.prj new file mode 100755 index 000000000..0579440e0 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/xst.prj @@ -0,0 +1,2 @@ +verilog work ../../b205_clk_gen.v +verilog work ../example_design/b205_clk_gen_exdes.v diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/xst.scr b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/xst.scr new file mode 100755 index 000000000..ce30cf255 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/implement/xst.scr @@ -0,0 +1,9 @@ +run +-ifmt MIXED +-top b205_clk_gen_exdes +-p xc6slx75-csg484-3 +-ifn xst.prj +-ofn b205_clk_gen_exdes +-keep_hierarchy soft +-equivalent_register_removal no +-max_fanout 65535 diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/b205_clk_gen_tb.v b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/b205_clk_gen_tb.v new file mode 100755 index 000000000..a324a5983 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/b205_clk_gen_tb.v @@ -0,0 +1,143 @@ +// file: b205_clk_gen_tb.v +// +// (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// + +//---------------------------------------------------------------------------- +// Clocking wizard demonstration testbench +//---------------------------------------------------------------------------- +// This demonstration testbench instantiates the example design for the +// clocking wizard. Input clocks are toggled, which cause the clocking +// network to lock and the counters to increment. +//---------------------------------------------------------------------------- + +`timescale 1ps/1ps + +`define wait_lock @(posedge LOCKED) + +module b205_clk_gen_tb (); + + // Clock to Q delay of 100ps + localparam TCQ = 100; + + + // timescale is 1ps/1ps + localparam ONE_NS = 1000; + localparam PHASE_ERR_MARGIN = 100; // 100ps + // how many cycles to run + localparam COUNT_PHASE = 1024; + // we'll be using the period in many locations + localparam time PER1 = 25.0*ONE_NS; + localparam time PER1_1 = PER1/2; + localparam time PER1_2 = PER1 - PER1/2; + + // Declare the input clock signals + reg CLK_IN1 = 1; + + // The high bits of the sampling counters + wire [3:1] COUNT; + // Status and control signals + reg RESET = 0; + wire LOCKED; + reg COUNTER_RESET = 0; +wire [3:1] CLK_OUT; +//Freq Check using the M & D values setting and actual Frequency generated + + + // Input clock generation + //------------------------------------ + always begin + CLK_IN1 = #PER1_1 ~CLK_IN1; + CLK_IN1 = #PER1_2 ~CLK_IN1; + end + + // Test sequence + reg [15*8-1:0] test_phase = ""; + initial begin + // Set up any display statements using time to be readable + $timeformat(-12, 2, "ps", 10); + COUNTER_RESET = 0; + test_phase = "reset"; + RESET = 1; + #(PER1*6); + RESET = 0; + test_phase = "wait lock"; + `wait_lock; + #(PER1*6); + COUNTER_RESET = 1; + #(PER1*20) + COUNTER_RESET = 0; + + test_phase = "counting"; + #(PER1*COUNT_PHASE); + + $display("SIMULATION PASSED"); + $display("SYSTEM_CLOCK_COUNTER : %0d\n",$time/PER1); + $finish; + end + + // Instantiation of the example design containing the clock + // network and sampling counters + //--------------------------------------------------------- + b205_clk_gen_exdes + #( + .TCQ (TCQ) + ) dut + (// Clock in ports + .CLK_IN1 (CLK_IN1), + // Reset for logic in example design + .COUNTER_RESET (COUNTER_RESET), + .CLK_OUT (CLK_OUT), + // High bits of the counters + .COUNT (COUNT), + // Status and control signals + .RESET (RESET), + .LOCKED (LOCKED)); + +// Freq Check + +endmodule diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simcmds.tcl b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simcmds.tcl new file mode 100755 index 000000000..0c370db66 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simcmds.tcl @@ -0,0 +1,8 @@ +# file: simcmds.tcl + +# create the simulation script +vcd dumpfile isim.vcd +vcd dumpvars -m /b205_clk_gen_tb -l 0 +wave add / +run 50000ns +quit diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_isim.bat b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_isim.bat new file mode 100755 index 000000000..63b151629 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_isim.bat @@ -0,0 +1,59 @@ +REM file: simulate_isim.bat +REM +REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +REM +REM This file contains confidential and proprietary information +REM of Xilinx, Inc. and is protected under U.S. and +REM international copyright and other intellectual property +REM laws. +REM +REM DISCLAIMER +REM This disclaimer is not a license and does not grant any +REM rights to the materials distributed herewith. Except as +REM otherwise provided in a valid license issued to you by +REM Xilinx, and to the maximum extent permitted by applicable +REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +REM (2) Xilinx shall not be liable (whether in contract or tort, +REM including negligence, or under any other theory of +REM liability) for any loss or damage of any kind or nature +REM related to, arising under or in connection with these +REM materials, including for any direct, or any indirect, +REM special, incidental, or consequential loss or damage +REM (including loss of data, profits, goodwill, or any type of +REM loss or damage suffered as a result of any action brought +REM by a third party) even if such damage or loss was +REM reasonably foreseeable or Xilinx had been advised of the +REM possibility of the same. +REM +REM CRITICAL APPLICATIONS +REM Xilinx products are not designed or intended to be fail- +REM safe, or for use in any application requiring fail-safe +REM performance, such as life-support or safety devices or +REM systems, Class III medical devices, nuclear facilities, +REM applications related to the deployment of airbags, or any +REM other applications that could lead to death, personal +REM injury, or severe property or environmental damage +REM (individually and collectively, "Critical +REM Applications"). Customer assumes the sole risk and +REM liability of any use of Xilinx products in Critical +REM Applications, subject only to applicable laws and +REM regulations governing limitations on product liability. +REM +REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +REM PART OF THIS FILE AT ALL TIMES. +REM + +vlogcomp -work work %XILINX%\verilog\src\glbl.v +vlogcomp -work work ..\..\..\b205_clk_gen.v +vlogcomp -work work ..\..\example_design\b205_clk_gen_exdes.v +vlogcomp -work work ..\b205_clk_gen_tb.v + +REM compile the project +fuse work.b205_clk_gen_tb work.glbl -L unisims_ver -o b205_clk_gen_isim.exe + +REM run the simulation script +.\b205_clk_gen_isim.exe -gui -tclbatch simcmds.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_isim.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_isim.sh new file mode 100755 index 000000000..9ea0bb115 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_isim.sh @@ -0,0 +1,61 @@ +# file: simulate_isim.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# lin64 +# create the project +vlogcomp -work work ${XILINX}/verilog/src/glbl.v +vlogcomp -work work ../../../b205_clk_gen.v +vlogcomp -work work ../../example_design/b205_clk_gen_exdes.v +vlogcomp -work work ../b205_clk_gen_tb.v + +# compile the project +fuse work.b205_clk_gen_tb work.glbl -L unisims_ver -o b205_clk_gen_isim.exe + +# run the simulation script +./b205_clk_gen_isim.exe -gui -tclbatch simcmds.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_mti.bat b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_mti.bat new file mode 100755 index 000000000..74786e3eb --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_mti.bat @@ -0,0 +1,61 @@ +REM file: simulate_mti.bat +REM +REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +REM +REM This file contains confidential and proprietary information +REM of Xilinx, Inc. and is protected under U.S. and +REM international copyright and other intellectual property +REM laws. +REM +REM DISCLAIMER +REM This disclaimer is not a license and does not grant any +REM rights to the materials distributed herewith. Except as +REM otherwise provided in a valid license issued to you by +REM Xilinx, and to the maximum extent permitted by applicable +REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +REM (2) Xilinx shall not be liable (whether in contract or tort, +REM including negligence, or under any other theory of +REM liability) for any loss or damage of any kind or nature +REM related to, arising under or in connection with these +REM materials, including for any direct, or any indirect, +REM special, incidental, or consequential loss or damage +REM (including loss of data, profits, goodwill, or any type of +REM loss or damage suffered as a result of any action brought +REM by a third party) even if such damage or loss was +REM reasonably foreseeable or Xilinx had been advised of the +REM possibility of the same. +REM +REM CRITICAL APPLICATIONS +REM Xilinx products are not designed or intended to be fail- +REM safe, or for use in any application requiring fail-safe +REM performance, such as life-support or safety devices or +REM systems, Class III medical devices, nuclear facilities, +REM applications related to the deployment of airbags, or any +REM other applications that could lead to death, personal +REM injury, or severe property or environmental damage +REM (individually and collectively, "Critical +REM Applications"). Customer assumes the sole risk and +REM liability of any use of Xilinx products in Critical +REM Applications, subject only to applicable laws and +REM regulations governing limitations on product liability. +REM +REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +REM PART OF THIS FILE AT ALL TIMES. +REM + +REM set up the working directory +vlib work + +REM compile all of the files +vlog -work work %XILINX%\verilog\src\glbl.v +vlog -work work ..\..\..\b205_clk_gen.v +vlog -work work ..\..\example_design\b205_clk_gen_exdes.v +vlog -work work ..\b205_clk_gen_tb.v + +REM run the simulation +vsim -c -t ps -voptargs="+acc" -L secureip -L unisims_ver work.b205_clk_gen_tb work.glbl + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_mti.do b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_mti.do new file mode 100755 index 000000000..2a9f3b03c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_mti.do @@ -0,0 +1,65 @@ +# file: simulate_mti.do +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# set up the working directory +set work work +vlib work + +# compile all of the files +vlog -work work $env(XILINX)/verilog/src/glbl.v +vlog -work work ../../../b205_clk_gen.v +vlog -work work ../../example_design/b205_clk_gen_exdes.v +vlog -work work ../b205_clk_gen_tb.v + +# run the simulation +vsim -t ps -voptargs="+acc" -L unisims_ver work.b205_clk_gen_tb work.glbl +do wave.do +log b205_clk_gen_tb/dut/counter +log -r /* +run 50000ns diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_mti.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_mti.sh new file mode 100755 index 000000000..0fe952789 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_mti.sh @@ -0,0 +1,61 @@ +#/bin/sh +# file: simulate_mti.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# +# set up the working directory +set work work +vlib work + +# compile all of the files +vlog -work work $XILINX/verilog/src/glbl.v +vlog -work work ../../../b205_clk_gen.v +vlog -work work ../../example_design/b205_clk_gen_exdes.v +vlog -work work ../b205_clk_gen_tb.v + +# run the simulation +vsim -c -t ps -voptargs="+acc" -L secureip -L unisims_ver work.b205_clk_gen_tb work.glbl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_ncsim.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_ncsim.sh new file mode 100755 index 000000000..0ca92d135 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_ncsim.sh @@ -0,0 +1,62 @@ +#/bin/sh +# file: simulate_ncsim.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# set up the working directory +mkdir work + +# compile all of the files +ncvlog -work work ${XILINX}/verilog/src/glbl.v +ncvlog -work work ../../../b205_clk_gen.v +ncvlog -work work ../../example_design/b205_clk_gen_exdes.v +ncvlog -work work ../b205_clk_gen_tb.v + +# elaborate and run the simulation +ncelab -work work -access +wc work.b205_clk_gen_tb work.glbl +ncsim -input "@database -open -shm nc; probe -create -database nc -all -depth all; probe dut.counter; run 50000ns; exit" work.b205_clk_gen_tb diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_vcs.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_vcs.sh new file mode 100755 index 000000000..13f45cebf --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/simulate_vcs.sh @@ -0,0 +1,72 @@ +#!/bin/sh +# file: simulate_vcs.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# remove old files +rm -rf simv* csrc DVEfiles AN.DB + +# compile all of the files +# Note that -sverilog is not strictly required- You can +# remove the -sverilog if you change the type of the +# localparam for the periods in the testbench file to +# [63:0] from time +vlogan -sverilog \ + ${XILINX}/verilog/src/glbl.v \ + ../../../b205_clk_gen.v \ + ../../example_design/b205_clk_gen_exdes.v \ + ../b205_clk_gen_tb.v + +# prepare the simulation +vcs +vcs+lic+wait -debug b205_clk_gen_tb glbl + +# run the simulation +./simv -ucli -i ucli_commands.key + +# launch the viewer +dve -vpd vcdplus.vpd -session vcs_session.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/ucli_commands.key b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/ucli_commands.key new file mode 100755 index 000000000..d125f20f1 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/ucli_commands.key @@ -0,0 +1,5 @@ +call {$vcdpluson} +call {$vcdplusmemon(b205_clk_gen_tb.dut.counter)} +run +call {$vcdplusclose} +quit diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/vcs_session.tcl b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/vcs_session.tcl new file mode 100755 index 000000000..eedc9fa49 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/vcs_session.tcl @@ -0,0 +1,18 @@ +gui_open_window Wave +gui_sg_create b205_clk_gen_group +gui_list_add_group -id Wave.1 {b205_clk_gen_group} +gui_sg_addsignal -group b205_clk_gen_group {b205_clk_gen_tb.test_phase} +gui_set_radix -radix {ascii} -signals {b205_clk_gen_tb.test_phase} +gui_sg_addsignal -group b205_clk_gen_group {{Input_clocks}} -divider +gui_sg_addsignal -group b205_clk_gen_group {b205_clk_gen_tb.CLK_IN1} +gui_sg_addsignal -group b205_clk_gen_group {{Output_clocks}} -divider +gui_sg_addsignal -group b205_clk_gen_group {b205_clk_gen_tb.dut.clk} +gui_list_expand -id Wave.1 b205_clk_gen_tb.dut.clk +gui_sg_addsignal -group b205_clk_gen_group {{Status_control}} -divider +gui_sg_addsignal -group b205_clk_gen_group {b205_clk_gen_tb.RESET} +gui_sg_addsignal -group b205_clk_gen_group {b205_clk_gen_tb.LOCKED} +gui_sg_addsignal -group b205_clk_gen_group {{Counters}} -divider +gui_sg_addsignal -group b205_clk_gen_group {b205_clk_gen_tb.COUNT} +gui_sg_addsignal -group b205_clk_gen_group {b205_clk_gen_tb.dut.counter} +gui_list_expand -id Wave.1 b205_clk_gen_tb.dut.counter +gui_zoom -window Wave.1 -full diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/wave.do b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/wave.do new file mode 100755 index 000000000..4549dbf6e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/wave.do @@ -0,0 +1,60 @@ +# file: wave.do +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +add wave -noupdate -format Literal -radix ascii /b205_clk_gen_tb/test_phase +add wave -noupdate -divider {Input clocks} +add wave -noupdate -format Logic /b205_clk_gen_tb/CLK_IN1 +add wave -noupdate -divider {Output clocks} +add wave -noupdate -format Literal -expand /b205_clk_gen_tb/dut/clk +add wave -noupdate -divider Status/control +add wave -noupdate -format Logic /b205_clk_gen_tb/RESET +add wave -noupdate -format Logic /b205_clk_gen_tb/LOCKED +add wave -noupdate -divider Counters +add wave -noupdate -format Literal -radix hexadecimal /b205_clk_gen_tb/COUNT +add wave -noupdate -format Literal -radix hexadecimal -expand /b205_clk_gen_tb/dut/counter diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/wave.sv b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/wave.sv new file mode 100755 index 000000000..a785ec556 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/functional/wave.sv @@ -0,0 +1,119 @@ +# file: wave.sv +# +# (c) Copyright 2008 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# +# Get the windows set up +# +if {[catch {window new WatchList -name "Design Browser 1" -geometry 1054x819+536+322}] != ""} { + window geometry "Design Browser 1" 1054x819+536+322 +} +window target "Design Browser 1" on +browser using {Design Browser 1} +browser set \ + -scope nc::b205_clk_gen_tb +browser yview see nc::b205_clk_gen_tb +browser timecontrol set -lock 0 + +if {[catch {window new WaveWindow -name "Waveform 1" -geometry 1010x600+0+541}] != ""} { + window geometry "Waveform 1" 1010x600+0+541 +} +window target "Waveform 1" on +waveform using {Waveform 1} +waveform sidebar visibility partial +waveform set \ + -primarycursor TimeA \ + -signalnames name \ + -signalwidth 175 \ + -units ns \ + -valuewidth 75 +cursor set -using TimeA -time 0 +waveform baseline set -time 0 +waveform xview limits 0 20000n + +# +# Define signal groups +# +catch {group new -name {Output clocks} -overlay 0} +catch {group new -name {Status/control} -overlay 0} +catch {group new -name {Counters} -overlay 0} + +set id [waveform add -signals [list {nc::b205_clk_gen_tb.CLK_IN1}]] + +group using {Output clocks} +group set -overlay 0 +group set -comment {} +group clear 0 end + +group insert \ + {b205_clk_gen_tb.dut.clk[1]} \ + {b205_clk_gen_tb.dut.clk[2]} \ {b205_clk_gen_tb.dut.clk[3]} +group using {Counters} +group set -overlay 0 +group set -comment {} +group clear 0 end + +group insert \ + {b205_clk_gen_tb.dut.counter[1]} \ + {b205_clk_gen_tb.dut.counter[2]} \ {b205_clk_gen_tb.dut.counter[3]} +group using {Status/control} +group set -overlay 0 +group set -comment {} +group clear 0 end + +group insert \ + {nc::b205_clk_gen_tb.RESET} {nc::b205_clk_gen_tb.LOCKED} + + +set id [waveform add -signals [list {nc::b205_clk_gen_tb.COUNT} ]] + +set id [waveform add -signals [list {nc::b205_clk_gen_tb.test_phase} ]] +waveform format $id -radix %a + +set groupId [waveform add -groups {{Input clocks}}] +set groupId [waveform add -groups {{Output clocks}}] +set groupId [waveform add -groups {{Status/control}}] +set groupId [waveform add -groups {{Counters}}] diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/b205_clk_gen_tb.v b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/b205_clk_gen_tb.v new file mode 100755 index 000000000..04a2cf036 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/b205_clk_gen_tb.v @@ -0,0 +1,157 @@ +// file: b205_clk_gen_tb.v +// +// (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// + +//---------------------------------------------------------------------------- +// Clocking wizard demonstration testbench +//---------------------------------------------------------------------------- +// This demonstration testbench instantiates the example design for the +// clocking wizard. Input clocks are toggled, which cause the clocking +// network to lock and the counters to increment. +//---------------------------------------------------------------------------- + +`timescale 1ps/1ps + +`define wait_lock @(posedge LOCKED) + +module b205_clk_gen_tb (); + + // Clock to Q delay of 100ps + localparam TCQ = 100; + + + // timescale is 1ps/1ps + localparam ONE_NS = 1000; + localparam PHASE_ERR_MARGIN = 100; // 100ps + // how many cycles to run + localparam COUNT_PHASE = 1024; + // we'll be using the period in many locations + localparam time PER1 = 25.0*ONE_NS; + localparam time PER1_1 = PER1/2; + localparam time PER1_2 = PER1 - PER1/2; + + // Declare the input clock signals + reg CLK_IN1 = 1; + + // The high bits of the sampling counters + wire [3:1] COUNT; + // Status and control signals + reg RESET = 0; + wire LOCKED; + reg COUNTER_RESET = 0; +wire [3:1] CLK_OUT; +//Freq Check using the M & D values setting and actual Frequency generated + + reg [13:0] timeout_counter = 14'b00000000000000; + + // Input clock generation + //------------------------------------ + always begin + CLK_IN1 = #PER1_1 ~CLK_IN1; + CLK_IN1 = #PER1_2 ~CLK_IN1; + end + + // Test sequence + reg [15*8-1:0] test_phase = ""; + initial begin + // Set up any display statements using time to be readable + $timeformat(-12, 2, "ps", 10); + $display ("Timing checks are not valid"); + COUNTER_RESET = 0; + test_phase = "reset"; + RESET = 1; + #(PER1*6); + RESET = 0; + test_phase = "wait lock"; + `wait_lock; + #(PER1*6); + COUNTER_RESET = 1; + #(PER1*19.5) + COUNTER_RESET = 0; + #(PER1*1) + $display ("Timing checks are valid"); + test_phase = "counting"; + #(PER1*COUNT_PHASE); + + $display("SIMULATION PASSED"); + $display("SYSTEM_CLOCK_COUNTER : %0d\n",$time/PER1); + $finish; + end + + + always@(posedge CLK_IN1) begin + timeout_counter <= timeout_counter + 1'b1; + if (timeout_counter == 14'b10000000000000) begin + if (LOCKED != 1'b1) begin + $display("ERROR : NO LOCK signal"); + $display("SYSTEM_CLOCK_COUNTER : %0d\n",$time/PER1); + $finish; + end + end + end + + // Instantiation of the example design containing the clock + // network and sampling counters + //--------------------------------------------------------- + b205_clk_gen_exdes + dut + (// Clock in ports + .CLK_IN1 (CLK_IN1), + // Reset for logic in example design + .COUNTER_RESET (COUNTER_RESET), + .CLK_OUT (CLK_OUT), + // High bits of the counters + .COUNT (COUNT), + // Status and control signals + .RESET (RESET), + .LOCKED (LOCKED)); + + +// Freq Check + +endmodule diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/sdf_cmd_file b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/sdf_cmd_file new file mode 100755 index 000000000..755ed5bcf --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/sdf_cmd_file @@ -0,0 +1,2 @@ +COMPILED_SDF_FILE = "../../implement/results/routed.sdf.X", +SCOPE = b205_clk_gen_tb.dut; diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simcmds.tcl b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simcmds.tcl new file mode 100755 index 000000000..8d4b92771 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simcmds.tcl @@ -0,0 +1,9 @@ +# file: simcmds.tcl + +# create the simulation script +vcd dumpfile isim.vcd +vcd dumpvars -m /b205_clk_gen_tb -l 0 +wave add / +run 50000ns +quit + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_isim.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_isim.sh new file mode 100755 index 000000000..45cf4fe5e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_isim.sh @@ -0,0 +1,62 @@ +# file: simulate_isim.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# create the project +vlogcomp -work work ${XILINX}/verilog/src/glbl.v +vlogcomp -work work ../../implement/results/routed.v +vlogcomp -work work b205_clk_gen_tb.v + +# compile the project +fuse work.b205_clk_gen_tb work.glbl -L secureip -L simprims_ver -o b205_clk_gen_isim.exe + +# run the simulation script +./b205_clk_gen_isim.exe -tclbatch simcmds.tcl -sdfmax /b205_clk_gen_tb/dut=../../implement/results/routed.sdf + +# run the simulation script +#./b205_clk_gen_isim.exe -gui -tclbatch simcmds.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_mti.bat b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_mti.bat new file mode 100755 index 000000000..51d1d37d6 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_mti.bat @@ -0,0 +1,59 @@ +REM file: simulate_mti.bat +REM +REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +REM +REM This file contains confidential and proprietary information +REM of Xilinx, Inc. and is protected under U.S. and +REM international copyright and other intellectual property +REM laws. +REM +REM DISCLAIMER +REM This disclaimer is not a license and does not grant any +REM rights to the materials distributed herewith. Except as +REM otherwise provided in a valid license issued to you by +REM Xilinx, and to the maximum extent permitted by applicable +REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +REM (2) Xilinx shall not be liable (whether in contract or tort, +REM including negligence, or under any other theory of +REM liability) for any loss or damage of any kind or nature +REM related to, arising under or in connection with these +REM materials, including for any direct, or any indirect, +REM special, incidental, or consequential loss or damage +REM (including loss of data, profits, goodwill, or any type of +REM loss or damage suffered as a result of any action brought +REM by a third party) even if such damage or loss was +REM reasonably foreseeable or Xilinx had been advised of the +REM possibility of the same. +REM +REM CRITICAL APPLICATIONS +REM Xilinx products are not designed or intended to be fail- +REM safe, or for use in any application requiring fail-safe +REM performance, such as life-support or safety devices or +REM systems, Class III medical devices, nuclear facilities, +REM applications related to the deployment of airbags, or any +REM other applications that could lead to death, personal +REM injury, or severe property or environmental damage +REM (individually and collectively, "Critical +REM Applications"). Customer assumes the sole risk and +REM liability of any use of Xilinx products in Critical +REM Applications, subject only to applicable laws and +REM regulations governing limitations on product liability. +REM +REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +REM PART OF THIS FILE AT ALL TIMES. +REM +# set up the working directory +set work work +vlib work + +REM compile all of the files +vlog -work work %XILINX%\verilog\src\glbl.v +vlog -work work ..\..\implement\results\routed.v +vlog -work work b205_clk_gen_tb.v + +REM run the simulation +vsim -c -t ps +transport_int_delays -voptargs="+acc" -L secureip -L simprims_ver -sdfmax b205_clk_gen_tb\dut=..\..\implement\results\routed.sdf +no_notifier work.b205_clk_gen_tb work.glbl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_mti.do b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_mti.do new file mode 100755 index 000000000..a984ba095 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_mti.do @@ -0,0 +1,65 @@ +# file: simulate_mti.do +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# set up the working directory +set work work +vlib work + +# compile all of the files +vlog -work work $env(XILINX)/verilog/src/glbl.v +vlog -work work ../../implement/results/routed.v +vlog -work work b205_clk_gen_tb.v + +# run the simulation +vsim -t ps +transport_int_delays -voptargs="+acc" -L secureip -L simprims_ver -sdfmax b205_clk_gen_tb/dut=../../implement/results/routed.sdf +no_notifier work.b205_clk_gen_tb work.glbl +#do wave.do +#log -r /* +run 50000ns + + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_mti.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_mti.sh new file mode 100755 index 000000000..379eb7600 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_mti.sh @@ -0,0 +1,61 @@ +#/bin/sh +# file: simulate_mti.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# set up the working directory +set work work +vlib work + +# compile all of the files +vlog -work work $XILINX/verilog/src/glbl.v +vlog -work work ../../implement/results/routed.v +vlog -work work b205_clk_gen_tb.v + +# run the simulation +vsim -c -t ps +transport_int_delays -voptargs="+acc" -L secureip -L simprims_ver -sdfmax b205_clk_gen_tb/dut=../../implement/results/routed.sdf +no_notifier work.b205_clk_gen_tb work.glbl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_ncsim.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_ncsim.sh new file mode 100755 index 000000000..8b73dc5c6 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_ncsim.sh @@ -0,0 +1,64 @@ +#!/bin/sh +# file: simulate_ncsim.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# set up the working directory +mkdir work + +# compile all of the files +ncvlog -work work ${XILINX}/verilog/src/glbl.v +ncvlog -work work ../../implement/results/routed.v +ncvlog -work work b205_clk_gen_tb.v + +# elaborate and run the simulation +ncsdfc ../../implement/results/routed.sdf + +ncelab -work work -access +wc -pulse_r 10 -nonotifier work.b205_clk_gen_tb work.glbl -sdf_cmd_file sdf_cmd_file +ncsim -input "@database -open -shm nc; probe -create -database nc -all -depth all; run 50000ns; exit" work.b205_clk_gen_tb + diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_vcs.sh b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_vcs.sh new file mode 100755 index 000000000..7ead02584 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/simulate_vcs.sh @@ -0,0 +1,72 @@ +#!/bin/sh +# file: simulate_vcs.sh +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +# remove old files +rm -rf simv* csrc DVEfiles AN.DB + +# compile all of the files +# Note that -sverilog is not strictly required- You can +# remove the -sverilog if you change the type of the +# localparam for the periods in the testbench file to +# [63:0] from time + vlogan -sverilog \ + b205_clk_gen_tb.v \ + ../../implement/results/routed.v + + +# prepare the simulation +vcs -sdf max:b205_clk_gen_exdes:../../implement/results/routed.sdf +v2k -y $XILINX/verilog/src/simprims \ + +libext+.v -debug b205_clk_gen_tb.v ../../implement/results/routed.v + +# run the simulation +./simv -ucli -i ucli_commands.key + +# launch the viewer +#dve -vpd vcdplus.vpd -session vcs_session.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/ucli_commands.key b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/ucli_commands.key new file mode 100755 index 000000000..0548d1733 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/ucli_commands.key @@ -0,0 +1,5 @@ + +call {$vcdpluson} +run 50000ns +call {$vcdplusclose} +quit diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/vcs_session.tcl b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/vcs_session.tcl new file mode 100755 index 000000000..1438f6bed --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/vcs_session.tcl @@ -0,0 +1 @@ +gui_open_window Wave diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/wave.do b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/wave.do new file mode 100755 index 000000000..440a8384f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen/simulation/timing/wave.do @@ -0,0 +1,72 @@ +# file: wave.do +# +# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# + +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate /b205_clk_gen_tb/CLK_IN1 +add wave -noupdate /b205_clk_gen_tb/COUNT +add wave -noupdate /b205_clk_gen_tb/LOCKED +add wave -noupdate /b205_clk_gen_tb/RESET +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {3223025 ps} 0} +configure wave -namecolwidth 238 +configure wave -valuecolwidth 107 +configure wave -justifyvalue left +configure wave -signalnamewidth 0 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ps +update +WaveRestoreZoom {0 ps} {74848022 ps} diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen_flist.txt b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen_flist.txt new file mode 100644 index 000000000..2028a2ab7 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen_flist.txt @@ -0,0 +1,54 @@ +# Output products list for <b205_clk_gen> +_xmsgs/pn_parser.xmsgs +b205_clk_gen/clk_wiz_v3_6_readme.txt +b205_clk_gen/doc/clk_wiz_v3_6_readme.txt +b205_clk_gen/doc/clk_wiz_v3_6_vinfo.html +b205_clk_gen/doc/pg065_clk_wiz.pdf +b205_clk_gen/example_design/b205_clk_gen_exdes.ucf +b205_clk_gen/example_design/b205_clk_gen_exdes.v +b205_clk_gen/example_design/b205_clk_gen_exdes.xdc +b205_clk_gen/implement/implement.bat +b205_clk_gen/implement/implement.sh +b205_clk_gen/implement/planAhead_ise.bat +b205_clk_gen/implement/planAhead_ise.sh +b205_clk_gen/implement/planAhead_ise.tcl +b205_clk_gen/implement/planAhead_rdn.bat +b205_clk_gen/implement/planAhead_rdn.sh +b205_clk_gen/implement/planAhead_rdn.tcl +b205_clk_gen/implement/xst.prj +b205_clk_gen/implement/xst.scr +b205_clk_gen/simulation/b205_clk_gen_tb.v +b205_clk_gen/simulation/functional/simcmds.tcl +b205_clk_gen/simulation/functional/simulate_isim.bat +b205_clk_gen/simulation/functional/simulate_isim.sh +b205_clk_gen/simulation/functional/simulate_mti.bat +b205_clk_gen/simulation/functional/simulate_mti.do +b205_clk_gen/simulation/functional/simulate_mti.sh +b205_clk_gen/simulation/functional/simulate_ncsim.sh +b205_clk_gen/simulation/functional/simulate_vcs.sh +b205_clk_gen/simulation/functional/ucli_commands.key +b205_clk_gen/simulation/functional/vcs_session.tcl +b205_clk_gen/simulation/functional/wave.do +b205_clk_gen/simulation/functional/wave.sv +b205_clk_gen/simulation/timing/b205_clk_gen_tb.v +b205_clk_gen/simulation/timing/sdf_cmd_file +b205_clk_gen/simulation/timing/simcmds.tcl +b205_clk_gen/simulation/timing/simulate_isim.sh +b205_clk_gen/simulation/timing/simulate_mti.bat +b205_clk_gen/simulation/timing/simulate_mti.do +b205_clk_gen/simulation/timing/simulate_mti.sh +b205_clk_gen/simulation/timing/simulate_ncsim.sh +b205_clk_gen/simulation/timing/simulate_vcs.sh +b205_clk_gen/simulation/timing/ucli_commands.key +b205_clk_gen/simulation/timing/vcs_session.tcl +b205_clk_gen/simulation/timing/wave.do +b205_clk_gen.asy +b205_clk_gen.gise +b205_clk_gen.ucf +b205_clk_gen.v +b205_clk_gen.veo +b205_clk_gen.xco +b205_clk_gen.xdc +b205_clk_gen.xise +b205_clk_gen_flist.txt +b205_clk_gen_xmdf.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen_xmdf.tcl b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen_xmdf.tcl new file mode 100755 index 000000000..9b1f239ac --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/b205_clk_gen_xmdf.tcl @@ -0,0 +1,140 @@ +# The package naming convention is <core_name>_xmdf +package provide b205_clk_gen_xmdf 1.0 + +# This includes some utilities that support common XMDF operations +package require utilities_xmdf + +# Define a namespace for this package. The name of the name space +# is <core_name>_xmdf +namespace eval ::b205_clk_gen_xmdf { +# Use this to define any statics +} + +# Function called by client to rebuild the params and port arrays +# Optional when the use context does not require the param or ports +# arrays to be available. +proc ::b205_clk_gen_xmdf::xmdfInit { instance } { +# Variable containg name of library into which module is compiled +# Recommendation: <module_name> +# Required +utilities_xmdf::xmdfSetData $instance Module Attributes Name b205_clk_gen +} +# ::b205_clk_gen_xmdf::xmdfInit + +# Function called by client to fill in all the xmdf* data variables +# based on the current settings of the parameters +proc ::b205_clk_gen_xmdf::xmdfApplyParams { instance } { + +set fcount 0 +# Array containing libraries that are assumed to exist +# Examples include unisim and xilinxcorelib +# Optional +# In this example, we assume that the unisim library will +# be magically +# available to the simulation and synthesis tool +utilities_xmdf::xmdfSetData $instance FileSet $fcount type logical_library +utilities_xmdf::xmdfSetData $instance FileSet $fcount logical_library unisim +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/clk_wiz_readme.txt +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/doc/clk_wiz_ds709.pdf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/doc/clk_wiz_gsg521.pdf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/implement/implement.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/implement/implement.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/implement/xst.prj +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/implement/xst.scr +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/b205_clk_gen_tb.v +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/functional/simcmds.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/functional/simulate_isim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/functional/simulate_mti.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/functional/simulate_ncsim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/functional/simulate_vcs.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/functional/ucli_commands.key +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/functional/vcs_session.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/functional/wave.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen/simulation/functional/wave.sv +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen.asy +utilities_xmdf::xmdfSetData $instance FileSet $fcount type asy +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen.ejp +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen.ucf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type ucf +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen.v +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen.veo +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog_template +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen.xco +utilities_xmdf::xmdfSetData $instance FileSet $fcount type coregen_ip +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path b205_clk_gen_xmdf.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount associated_module b205_clk_gen +incr fcount + +} + +# ::gen_comp_name_xmdf::xmdfApplyParams diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.asy b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.asy new file mode 100644 index 000000000..a0153d32c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.asy @@ -0,0 +1,9 @@ +Version 4 +SymbolType BLOCK +TEXT 32 32 LEFT 4 chipscope_icon +RECTANGLE Normal 32 32 544 864 +LINE Wide 576 112 544 112 +PIN 576 112 RIGHT 36 +PINATTR PinName control0[35:0] +PINATTR Polarity BOTH + diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.constraints/chipscope_icon.ucf b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.constraints/chipscope_icon.ucf new file mode 100644 index 000000000..b83296f8e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.constraints/chipscope_icon.ucf @@ -0,0 +1,9 @@ +NET "U0/U_ICON/*/iDRCK_LOCAL" TNM_NET = J_CLK ; +TIMESPEC TS_J_CLK = PERIOD J_CLK 30 ns ; +#Update Constraints +NET "U0/iUPDATE_OUT" TNM_NET = U_CLK ; +NET "U0/iSHIFT_OUT" TIG ; +TIMESPEC TS_U_TO_J = FROM U_CLK TO J_CLK 15 ns ; +TIMESPEC TS_U_TO_U = FROM U_CLK TO U_CLK 15 ns ; +TIMESPEC TS_J_TO_D = FROM J_CLK TO D_CLK TIG ; +TIMESPEC TS_D_TO_J = FROM D_CLK TO J_CLK TIG ; diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.constraints/chipscope_icon.xdc b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.constraints/chipscope_icon.xdc new file mode 100644 index 000000000..903799425 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.constraints/chipscope_icon.xdc @@ -0,0 +1,7 @@ +# icon XDC +create_clock -name J_CLK -period 30 -waveform {15 30} [get_pins -of [get_cells -hier * -filter {LIB_CELL =~ BSCAN*}] -filter {name =~ */U_ICON/*/DRCK}] +create_generated_clock -name U_CLK -source [get_pins -of [get_cells -hier * -filter {LIB_CELL =~ BSCAN*}] -filter {name =~ */U_ICON/*/DRCK}] -multiply_by 1 -invert [get_pins -of [get_cells -hier * -filter {LIB_CELL =~ BSCAN*}] -filter {NAME =~ */U_ICON/*/UPDATE}] +set_false_path -through [get_pins -of [get_cells -hier * -filter {LIB_CELL =~ BSCAN*}] -filter {NAME =~ */U_ICON/*/SHIFT}] +set_multicycle_path -from [get_clocks U_CLK] -to [get_clocks J_CLK] -setup 2 +set_multicycle_path -from [get_clocks U_CLK] -to [get_clocks J_CLK] -hold 1 +set_clock_groups -asynchronous -name cross_jtag_clock_domains -group {J_CLK U_CLK} diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.ncf b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.ncf new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.ncf diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.ngc b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.ngc new file mode 100644 index 000000000..1beaa38c9 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.ngc @@ -0,0 +1,3 @@ +XILINX-XDB 0.1 STUB 0.1 ASCII +XILINX-XDM V1.6e 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<g=?01C=5<4H05g?!>428h>7)8i:0;8 =?=90;0e;750;9j2d<722c=n7>5;h4`>5<<g181<75rbd094?3=83:p(4o5789K5=4<@8=o7)6<:0`6?!0a2830(5751808m3?=831b:l4?::k5f?6=3`<h6=44o9094?=zjl91<7;50;2x <g=?01C=5<4H05g?!>428h>7)8i:0;8 =?=9080e;750;9j2d<722c=n7>5;h4`>5<<g181<75rbd694?3=83:p(4o5789K5=4<@8=o7)6<:0`6?!0a2830(5751818m3?=831b:l4?::k5f?6=3`<h6=44o9094?=zjl?1<7;50;2x <g=?01C=5<4H05g?!>428h>7)8i:0;8 =?=9090e;750;9j2d<722c=n7>5;h4`>5<<g181<75rbd494?3=83:p(4o5789K5=4<@8=o7)6<:0`6?!0a2830(5751868m3?=831b:l4?::k5f?6=3`<h6=44o9094?=zjl=1<7;50;2x <g=?01C=5<4H05g?!>428h>7)8i:0;8 =?=90>0e;750;9j2d<722c=n7>5;h4`>5<<g181<75rbd:94?3=83:p(4o5789K5=4<@8=o7)6<:0`6?!0a2830(5751878m3?=831b:l4?::k5f?6=3`<h6=44o9094?=zjl31<7;50;2x <g=?01C=5<4H05g?!>428h>7)8i:0;8 =?=90?0e;750;9j2d<722c=n7>5;h4`>5<<g181<75rbdc94?3=83:p(4o5789K5=4<@8=o7)6<:0`6?!0a2830(5751858m3?=831b:l4?::k5f?6=3`<h6=44o9094?=zjlh1<7;50;2x <g=?01C=5<4H05g?!>428h>7)8i:0;8 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\ No newline at end of file diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.ucf b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.ucf new file mode 100644 index 000000000..b83296f8e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.ucf @@ -0,0 +1,9 @@ +NET "U0/U_ICON/*/iDRCK_LOCAL" TNM_NET = J_CLK ; +TIMESPEC TS_J_CLK = PERIOD J_CLK 30 ns ; +#Update Constraints +NET "U0/iUPDATE_OUT" TNM_NET = U_CLK ; +NET "U0/iSHIFT_OUT" TIG ; +TIMESPEC TS_U_TO_J = FROM U_CLK TO J_CLK 15 ns ; +TIMESPEC TS_U_TO_U = FROM U_CLK TO U_CLK 15 ns ; +TIMESPEC TS_J_TO_D = FROM J_CLK TO D_CLK TIG ; +TIMESPEC TS_D_TO_J = FROM D_CLK TO J_CLK TIG ; diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.v b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.v new file mode 100644 index 000000000..24282de22 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.v @@ -0,0 +1,27 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright (c) 2015 Xilinx, Inc. +// All Rights Reserved +/////////////////////////////////////////////////////////////////////////////// +// ____ ____ +// / /\/ / +// /___/ \ / Vendor : Xilinx +// \ \ \/ Version : 14.6 +// \ \ Application: Xilinx CORE Generator +// / / Filename : chipscope_icon.v +// /___/ /\ Timestamp : Tue Apr 14 17:06:06 PDT 2015 +// \ \ / \ +// \___\/\___\ +// +// Design Name: Verilog Synthesis Wrapper +/////////////////////////////////////////////////////////////////////////////// +// This wrapper is used to integrate with Project Navigator and PlanAhead + +`timescale 1ns/1ps + +module chipscope_icon( + CONTROL0) /* synthesis syn_black_box syn_noprune=1 */; + + +inout [35 : 0] CONTROL0; + +endmodule diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.veo b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.veo new file mode 100644 index 000000000..094dbf8de --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.veo @@ -0,0 +1,28 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright (c) 2015 Xilinx, Inc. +// All Rights Reserved +/////////////////////////////////////////////////////////////////////////////// +// ____ ____ +// / /\/ / +// /___/ \ / Vendor : Xilinx +// \ \ \/ Version : 14.6 +// \ \ Application: Xilinx CORE Generator +// / / Filename : chipscope_icon.veo +// /___/ /\ Timestamp : Tue Apr 14 17:06:06 PDT 2015 +// \ \ / \ +// \___\/\___\ +// +// Design Name: ISE Instantiation template +/////////////////////////////////////////////////////////////////////////////// + +// The following must be inserted into your Verilog file for this +// core to be instantiated. Change the instance name and port connections +// (in parentheses) to your own signal names. + +//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG +chipscope_icon YourInstanceName ( + .CONTROL0(CONTROL0) // INOUT BUS [35:0] +); + +// INST_TAG_END ------ End INSTANTIATION Template --------- + diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.xco b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.xco new file mode 100644 index 000000000..211cf181f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.xco @@ -0,0 +1,56 @@ +############################################################## +# +# Xilinx Core Generator version 14.6 +# Date: Wed Apr 15 00:05:36 2015 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# Generated from component: xilinx.com:ip:chipscope_icon:1.06.a +# +############################################################## +# +# BEGIN Project Options +SET addpads = false +SET asysymbol = true +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = false +SET designentry = Verilog +SET device = xc6slx75 +SET devicefamily = spartan6 +SET flowvendor = Foundation_ISE +SET formalverification = false +SET foundationsym = false +SET implementationfiletype = Ngc +SET package = fgg484 +SET removerpms = false +SET simulationfiles = Structural +SET speedgrade = -3 +SET verilogsim = true +SET vhdlsim = false +# END Project Options +# BEGIN Select +SELECT ICON_(ChipScope_Pro_-_Integrated_Controller) family Xilinx,_Inc. 1.06.a +# END Select +# BEGIN Parameters +CSET component_name=chipscope_icon +CSET constraint_type=external +CSET enable_jtag_bufg=true +CSET example_design=false +CSET number_control_ports=1 +CSET use_ext_bscan=false +CSET use_softbscan=false +CSET use_unused_bscan=false +CSET user_scan_chain=USER1 +# END Parameters +# BEGIN Extra information +MISC pkg_timestamp=2013-06-08T17:28:33Z +# END Extra information +GENERATE +# CRC: b52cbe62 diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.xdc b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.xdc new file mode 100644 index 000000000..903799425 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon.xdc @@ -0,0 +1,7 @@ +# icon XDC +create_clock -name J_CLK -period 30 -waveform {15 30} [get_pins -of [get_cells -hier * -filter {LIB_CELL =~ BSCAN*}] -filter {name =~ */U_ICON/*/DRCK}] +create_generated_clock -name U_CLK -source [get_pins -of [get_cells -hier * -filter {LIB_CELL =~ BSCAN*}] -filter {name =~ */U_ICON/*/DRCK}] -multiply_by 1 -invert [get_pins -of [get_cells -hier * -filter {LIB_CELL =~ BSCAN*}] -filter {NAME =~ */U_ICON/*/UPDATE}] +set_false_path -through [get_pins -of [get_cells -hier * -filter {LIB_CELL =~ BSCAN*}] -filter {NAME =~ */U_ICON/*/SHIFT}] +set_multicycle_path -from [get_clocks U_CLK] -to [get_clocks J_CLK] -setup 2 +set_multicycle_path -from [get_clocks U_CLK] -to [get_clocks J_CLK] -hold 1 +set_clock_groups -asynchronous -name cross_jtag_clock_domains -group {J_CLK U_CLK} diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon_flist.txt b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon_flist.txt new file mode 100644 index 000000000..bf55dc492 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon_flist.txt @@ -0,0 +1,15 @@ +# Output products list for <chipscope_icon> +chipscope_icon.asy +chipscope_icon.constraints/chipscope_icon.ucf +chipscope_icon.constraints/chipscope_icon.xdc +chipscope_icon.gise +chipscope_icon.ngc +chipscope_icon.ucf +chipscope_icon.v +chipscope_icon.veo +chipscope_icon.xco +chipscope_icon.xdc +chipscope_icon.xise +chipscope_icon_flist.txt +chipscope_icon_readme.txt +chipscope_icon_xmdf.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon_readme.txt b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon_readme.txt new file mode 100644 index 000000000..304eb5252 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon_readme.txt @@ -0,0 +1,45 @@ +The following files were generated for 'chipscope_icon' in directory +/home/mwest/git/fpgadev/usrp3/top/b205/coregen/ + +XCO file generator: + Generate an XCO file for compatibility with legacy flows. + + * chipscope_icon.xco + +Creates an implementation netlist: + Creates an implementation netlist for the IP. + + * chipscope_icon.constraints/chipscope_icon.ucf + * chipscope_icon.constraints/chipscope_icon.xdc + * chipscope_icon.ngc + * chipscope_icon.ucf + * chipscope_icon.v + * chipscope_icon.veo + * chipscope_icon.xdc + * chipscope_icon_xmdf.tcl + +IP Symbol Generator: + Generate an IP symbol based on the current project options'. + + * chipscope_icon.asy + +Generate ISE subproject: + Create an ISE subproject for use when including this core in ISE designs + + * chipscope_icon.gise + * chipscope_icon.xise + +Deliver Readme: + Readme file for the IP. + + * chipscope_icon_readme.txt + +Generate FLIST file: + Text file listing all of the output files produced when a customized core was + generated in the CORE Generator. + + * chipscope_icon_flist.txt + +Please see the Xilinx CORE Generator online help for further details on +generated files and how to use them. + diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon_xmdf.tcl b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon_xmdf.tcl new file mode 100755 index 000000000..241f4d5ae --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_icon_xmdf.tcl @@ -0,0 +1,88 @@ +# The package naming convention is <core_name>_xmdf +package provide chipscope_icon_xmdf 1.0 + +# This includes some utilities that support common XMDF operations +package require utilities_xmdf + +# Define a namespace for this package. The name of the name space +# is <core_name>_xmdf +namespace eval ::chipscope_icon_xmdf { +# Use this to define any statics +} + +# Function called by client to rebuild the params and port arrays +# Optional when the use context does not require the param or ports +# arrays to be available. +proc ::chipscope_icon_xmdf::xmdfInit { instance } { +# Variable containing name of library into which module is compiled +# Recommendation: <module_name> +# Required +utilities_xmdf::xmdfSetData $instance Module Attributes Name chipscope_icon +} +# ::chipscope_icon_xmdf::xmdfInit + +# Function called by client to fill in all the xmdf* data variables +# based on the current settings of the parameters +proc ::chipscope_icon_xmdf::xmdfApplyParams { instance } { + +set fcount 0 +# Array containing libraries that are assumed to exist +# Examples include unisim and xilinxcorelib +# Optional +# In this example, we assume that the unisim library will +# be available to the simulation and synthesis tool +utilities_xmdf::xmdfSetData $instance FileSet $fcount type logical_library +utilities_xmdf::xmdfSetData $instance FileSet $fcount logical_library unisim +incr fcount + + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon.asy +utilities_xmdf::xmdfSetData $instance FileSet $fcount type asy +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon.constraints/chipscope_icon.ucf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ucf +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon.ncf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ncf +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon.constraints/chipscope_icon.xdc +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Xdc +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon.xcf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + + + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon.ngc +utilities_xmdf::xmdfSetData $instance FileSet $fcount type ngc +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon.v +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon.veo +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog_template +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon.xco +utilities_xmdf::xmdfSetData $instance FileSet $fcount type coregen_ip +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_icon_xmdf.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount associated_module chipscope_icon +incr fcount + +} + +# ::gen_comp_name_xmdf::xmdfApplyParams + + diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.asy b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.asy new file mode 100644 index 000000000..4b7848a2a --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.asy @@ -0,0 +1,17 @@ +Version 4 +SymbolType BLOCK +TEXT 32 32 LEFT 4 chipscope_ila +RECTANGLE Normal 32 32 288 704 +LINE Wide 0 80 32 80 +PIN 0 80 LEFT 36 +PINATTR PinName control[35:0] +PINATTR Polarity IN +LINE Normal 0 112 32 112 +PIN 0 112 LEFT 36 +PINATTR PinName clk +PINATTR Polarity IN +LINE Wide 0 176 32 176 +PIN 0 176 LEFT 36 +PINATTR PinName trig0[127:0] +PINATTR Polarity IN + diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.cdc b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.cdc new file mode 100644 index 000000000..3cb2c112f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.cdc @@ -0,0 +1,144 @@ +#ChipScope Core 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+SignalExport.triggerChannel<0000><0080>=TRIG0[80] +SignalExport.triggerChannel<0000><0081>=TRIG0[81] +SignalExport.triggerChannel<0000><0082>=TRIG0[82] +SignalExport.triggerChannel<0000><0083>=TRIG0[83] +SignalExport.triggerChannel<0000><0084>=TRIG0[84] +SignalExport.triggerChannel<0000><0085>=TRIG0[85] +SignalExport.triggerChannel<0000><0086>=TRIG0[86] +SignalExport.triggerChannel<0000><0087>=TRIG0[87] +SignalExport.triggerChannel<0000><0088>=TRIG0[88] +SignalExport.triggerChannel<0000><0089>=TRIG0[89] +SignalExport.triggerChannel<0000><0090>=TRIG0[90] +SignalExport.triggerChannel<0000><0091>=TRIG0[91] +SignalExport.triggerChannel<0000><0092>=TRIG0[92] +SignalExport.triggerChannel<0000><0093>=TRIG0[93] +SignalExport.triggerChannel<0000><0094>=TRIG0[94] +SignalExport.triggerChannel<0000><0095>=TRIG0[95] +SignalExport.triggerChannel<0000><0096>=TRIG0[96] +SignalExport.triggerChannel<0000><0097>=TRIG0[97] +SignalExport.triggerChannel<0000><0098>=TRIG0[98] +SignalExport.triggerChannel<0000><0099>=TRIG0[99] +SignalExport.triggerChannel<0000><0100>=TRIG0[100] +SignalExport.triggerChannel<0000><0101>=TRIG0[101] +SignalExport.triggerChannel<0000><0102>=TRIG0[102] +SignalExport.triggerChannel<0000><0103>=TRIG0[103] +SignalExport.triggerChannel<0000><0104>=TRIG0[104] +SignalExport.triggerChannel<0000><0105>=TRIG0[105] +SignalExport.triggerChannel<0000><0106>=TRIG0[106] +SignalExport.triggerChannel<0000><0107>=TRIG0[107] +SignalExport.triggerChannel<0000><0108>=TRIG0[108] +SignalExport.triggerChannel<0000><0109>=TRIG0[109] +SignalExport.triggerChannel<0000><0110>=TRIG0[110] +SignalExport.triggerChannel<0000><0111>=TRIG0[111] +SignalExport.triggerChannel<0000><0112>=TRIG0[112] +SignalExport.triggerChannel<0000><0113>=TRIG0[113] +SignalExport.triggerChannel<0000><0114>=TRIG0[114] +SignalExport.triggerChannel<0000><0115>=TRIG0[115] +SignalExport.triggerChannel<0000><0116>=TRIG0[116] +SignalExport.triggerChannel<0000><0117>=TRIG0[117] +SignalExport.triggerChannel<0000><0118>=TRIG0[118] +SignalExport.triggerChannel<0000><0119>=TRIG0[119] +SignalExport.triggerChannel<0000><0120>=TRIG0[120] +SignalExport.triggerChannel<0000><0121>=TRIG0[121] +SignalExport.triggerChannel<0000><0122>=TRIG0[122] +SignalExport.triggerChannel<0000><0123>=TRIG0[123] +SignalExport.triggerChannel<0000><0124>=TRIG0[124] +SignalExport.triggerChannel<0000><0125>=TRIG0[125] +SignalExport.triggerChannel<0000><0126>=TRIG0[126] +SignalExport.triggerChannel<0000><0127>=TRIG0[127] +SignalExport.triggerPort<0000>.name=TRIG0 +SignalExport.triggerPortCount=1 +SignalExport.triggerPortIsData<0000>=true +SignalExport.triggerPortWidth<0000>=128 +SignalExport.type=ila + diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.constraints/chipscope_ila.ucf b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.constraints/chipscope_ila.ucf new file mode 100644 index 000000000..c94e639df --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.constraints/chipscope_ila.ucf @@ -0,0 +1,15 @@ +# +# Clock constraints +# +NET "CLK" TNM_NET = D_CLK ; +INST "U0/*/U_STAT/U_DIRTY_LDC" TNM = D2_CLK; +TIMESPEC TS_D2_TO_T2_chipscope_ila = FROM D2_CLK TO "FFS" TIG; +TIMESPEC TS_J2_TO_D2_chipscope_ila = FROM "FFS" TO D2_CLK TIG; +TIMESPEC TS_J3_TO_D2_chipscope_ila = FROM "FFS" TO D2_CLK TIG; +TIMESPEC TS_J4_TO_D2_chipscope_ila = FROM "FFS" TO D2_CLK TIG; + +# +# Input keep/save net constraints +# +NET "TRIG0<*" S; +NET "TRIG0<*" KEEP; diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.constraints/chipscope_ila.xdc b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.constraints/chipscope_ila.xdc new file mode 100644 index 000000000..49e2b9e7b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.constraints/chipscope_ila.xdc @@ -0,0 +1,6 @@ +# +# Clock constraints +# +set_false_path -from [get_cells U0/*/U_STAT/U_DIRTY_LDC] -to [get_cells -of_objects [filter [all_fanout -flat -endpoints_only -from [get_nets CONTROL[0]]] IS_CLOCK]] +set_false_path -from [get_cells -of_objects [filter [all_fanout -flat -endpoints_only -from [get_nets CONTROL[0]]] IS_CLOCK]] -to [get_cells U0/*/U_STAT/U_DIRTY_LDC] +set_false_path -from [get_cells U0/*/U_RST/U_ARM_XFER/U_GEN_DELAY[3].U_FD] -to [get_cells U0/*/U_STAT/U_DIRTY_LDC] diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.ncf b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.ncf new file mode 100644 index 000000000..6be9051a2 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.ncf @@ -0,0 +1,15 @@ +# +# Clock constraints +# +NET "CLK" TNM_NET = D_CLK ; +INST "U0/*/U_STAT/U_DIRTY_LDC" TNM = D2_CLK; +TIMESPEC TS_D2_TO_T2 = FROM D2_CLK TO "FFS" TIG; +TIMESPEC TS_J2_TO_D2 = FROM "FFS" TO D2_CLK TIG; +TIMESPEC TS_J3_TO_D2 = FROM "FFS" TO D2_CLK TIG; +TIMESPEC TS_J4_TO_D2 = FROM "FFS" TO D2_CLK TIG; + +# +# Input keep/save net constraints +# +NET "TRIG0<*" S; +NET "TRIG0<*" KEEP; diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.ngc b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.ngc new file mode 100644 index 000000000..1c4da9412 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.ngc @@ -0,0 +1,3 @@ +XILINX-XDB 0.1 STUB 0.1 ASCII +XILINX-XDM V1.6e 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\ No newline at end of file diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.ucf b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.ucf new file mode 100644 index 000000000..c94e639df --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.ucf @@ -0,0 +1,15 @@ +# +# Clock constraints +# +NET "CLK" TNM_NET = D_CLK ; +INST "U0/*/U_STAT/U_DIRTY_LDC" TNM = D2_CLK; +TIMESPEC TS_D2_TO_T2_chipscope_ila = FROM D2_CLK TO "FFS" TIG; +TIMESPEC TS_J2_TO_D2_chipscope_ila = FROM "FFS" TO D2_CLK TIG; +TIMESPEC TS_J3_TO_D2_chipscope_ila = FROM "FFS" TO D2_CLK TIG; +TIMESPEC TS_J4_TO_D2_chipscope_ila = FROM "FFS" TO D2_CLK TIG; + +# +# Input keep/save net constraints +# +NET "TRIG0<*" S; +NET "TRIG0<*" KEEP; diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.v b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.v new file mode 100644 index 000000000..e231eaf35 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.v @@ -0,0 +1,31 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright (c) 2015 Xilinx, Inc. +// All Rights Reserved +/////////////////////////////////////////////////////////////////////////////// +// ____ ____ +// / /\/ / +// /___/ \ / Vendor : Xilinx +// \ \ \/ Version : 14.7 +// \ \ Application: Xilinx CORE Generator +// / / Filename : chipscope_ila.v +// /___/ /\ Timestamp : Tue Jun 30 11:48:11 PDT 2015 +// \ \ / \ +// \___\/\___\ +// +// Design Name: Verilog Synthesis Wrapper +/////////////////////////////////////////////////////////////////////////////// +// This wrapper is used to integrate with Project Navigator and PlanAhead + +`timescale 1ns/1ps + +module chipscope_ila( + CONTROL, + CLK, + TRIG0) /* synthesis syn_black_box syn_noprune=1 */; + + +inout [35 : 0] CONTROL; +input CLK; +input [127 : 0] TRIG0; + +endmodule diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.veo b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.veo new file mode 100644 index 000000000..4c4ce1250 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.veo @@ -0,0 +1,30 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright (c) 2015 Xilinx, Inc. +// All Rights Reserved +/////////////////////////////////////////////////////////////////////////////// +// ____ ____ +// / /\/ / +// /___/ \ / Vendor : Xilinx +// \ \ \/ Version : 14.7 +// \ \ Application: Xilinx CORE Generator +// / / Filename : chipscope_ila.veo +// /___/ /\ Timestamp : Tue Jun 30 11:48:11 PDT 2015 +// \ \ / \ +// \___\/\___\ +// +// Design Name: ISE Instantiation template +/////////////////////////////////////////////////////////////////////////////// + +// The following must be inserted into your Verilog file for this +// core to be instantiated. Change the instance name and port connections +// (in parentheses) to your own signal names. + +//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG +chipscope_ila YourInstanceName ( + .CONTROL(CONTROL), // INOUT BUS [35:0] + .CLK(CLK), // IN + .TRIG0(TRIG0) // IN BUS [127:0] +); + +// INST_TAG_END ------ End INSTANTIATION Template --------- + diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.xco b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.xco new file mode 100644 index 000000000..823a5cccf --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.xco @@ -0,0 +1,141 @@ +############################################################## +# +# Xilinx Core Generator version 14.7 +# Date: Tue Jun 30 18:46:21 2015 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# Generated from component: xilinx.com:ip:chipscope_ila:1.05.a +# +############################################################## +# +# BEGIN Project Options +SET addpads = false +SET asysymbol = true +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = false +SET designentry = Verilog +SET device = xc6slx75 +SET devicefamily = spartan6 +SET flowvendor = Foundation_ISE +SET formalverification = false +SET foundationsym = false +SET implementationfiletype = Ngc +SET package = csg484 +SET removerpms = false +SET simulationfiles = Structural +SET speedgrade = -3 +SET verilogsim = true +SET vhdlsim = false +# END Project Options +# BEGIN Select +SELECT ILA_(ChipScope_Pro_-_Integrated_Logic_Analyzer) family Xilinx,_Inc. 1.05.a +# END Select +# BEGIN Parameters +CSET check_bramcount=false +CSET component_name=chipscope_ila +CSET constraint_type=external +CSET counter_width_1=Disabled +CSET counter_width_10=Disabled +CSET counter_width_11=Disabled +CSET counter_width_12=Disabled +CSET counter_width_13=Disabled +CSET counter_width_14=Disabled +CSET counter_width_15=Disabled +CSET counter_width_16=Disabled +CSET counter_width_2=Disabled +CSET counter_width_3=Disabled +CSET counter_width_4=Disabled +CSET counter_width_5=Disabled +CSET counter_width_6=Disabled +CSET counter_width_7=Disabled +CSET counter_width_8=Disabled +CSET counter_width_9=Disabled +CSET data_port_width=0 +CSET data_same_as_trigger=true +CSET disable_save_keep=false +CSET enable_storage_qualification=true +CSET enable_trigger_output_port=false +CSET example_design=false +CSET exclude_from_data_storage_1=false +CSET exclude_from_data_storage_10=false +CSET exclude_from_data_storage_11=false +CSET exclude_from_data_storage_12=false +CSET exclude_from_data_storage_13=false +CSET exclude_from_data_storage_14=false +CSET exclude_from_data_storage_15=false +CSET exclude_from_data_storage_16=false +CSET exclude_from_data_storage_2=false +CSET exclude_from_data_storage_3=false +CSET exclude_from_data_storage_4=false +CSET exclude_from_data_storage_5=false +CSET exclude_from_data_storage_6=false +CSET exclude_from_data_storage_7=false +CSET exclude_from_data_storage_8=false +CSET exclude_from_data_storage_9=false +CSET match_type_1=basic_with_edges +CSET match_type_10=basic_with_edges +CSET match_type_11=basic_with_edges +CSET match_type_12=basic_with_edges +CSET match_type_13=basic_with_edges +CSET match_type_14=basic_with_edges +CSET match_type_15=basic_with_edges +CSET match_type_16=basic_with_edges +CSET match_type_2=basic_with_edges +CSET match_type_3=basic_with_edges +CSET match_type_4=basic_with_edges +CSET match_type_5=basic_with_edges +CSET match_type_6=basic_with_edges +CSET match_type_7=basic_with_edges +CSET match_type_8=basic_with_edges +CSET match_type_9=basic_with_edges +CSET match_units_1=1 +CSET match_units_10=1 +CSET match_units_11=1 +CSET match_units_12=1 +CSET match_units_13=1 +CSET match_units_14=1 +CSET match_units_15=1 +CSET match_units_16=1 +CSET match_units_2=1 +CSET match_units_3=1 +CSET match_units_4=1 +CSET match_units_5=1 +CSET match_units_6=1 +CSET match_units_7=1 +CSET match_units_8=1 +CSET match_units_9=1 +CSET max_sequence_levels=1 +CSET number_of_trigger_ports=1 +CSET sample_data_depth=1024 +CSET sample_on=Rising +CSET trigger_port_width_1=128 +CSET trigger_port_width_10=8 +CSET trigger_port_width_11=8 +CSET trigger_port_width_12=8 +CSET trigger_port_width_13=8 +CSET trigger_port_width_14=8 +CSET trigger_port_width_15=8 +CSET trigger_port_width_16=8 +CSET trigger_port_width_2=8 +CSET trigger_port_width_3=8 +CSET trigger_port_width_4=8 +CSET trigger_port_width_5=8 +CSET trigger_port_width_6=8 +CSET trigger_port_width_7=8 +CSET trigger_port_width_8=8 +CSET trigger_port_width_9=8 +CSET use_rpms=false +# END Parameters +# BEGIN Extra information +MISC pkg_timestamp=2013-10-13T14:13:15Z +# END Extra information +GENERATE +# CRC: 76868b6e diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.xdc b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.xdc new file mode 100644 index 000000000..49e2b9e7b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila.xdc @@ -0,0 +1,6 @@ +# +# Clock constraints +# +set_false_path -from [get_cells U0/*/U_STAT/U_DIRTY_LDC] -to [get_cells -of_objects [filter [all_fanout -flat -endpoints_only -from [get_nets CONTROL[0]]] IS_CLOCK]] +set_false_path -from [get_cells -of_objects [filter [all_fanout -flat -endpoints_only -from [get_nets CONTROL[0]]] IS_CLOCK]] -to [get_cells U0/*/U_STAT/U_DIRTY_LDC] +set_false_path -from [get_cells U0/*/U_RST/U_ARM_XFER/U_GEN_DELAY[3].U_FD] -to [get_cells U0/*/U_STAT/U_DIRTY_LDC] diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila_flist.txt b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila_flist.txt new file mode 100644 index 000000000..5c3195e53 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila_flist.txt @@ -0,0 +1,18 @@ +# Output products list for <chipscope_ila> +_xmsgs/pn_parser.xmsgs +chipscope_ila.asy +chipscope_ila.cdc +chipscope_ila.constraints/chipscope_ila.ucf +chipscope_ila.constraints/chipscope_ila.xdc +chipscope_ila.gise +chipscope_ila.ncf +chipscope_ila.ngc +chipscope_ila.ucf +chipscope_ila.v +chipscope_ila.veo +chipscope_ila.xco +chipscope_ila.xdc +chipscope_ila.xise +chipscope_ila_flist.txt +chipscope_ila_readme.txt +chipscope_ila_xmdf.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila_readme.txt b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila_readme.txt new file mode 100644 index 000000000..9d997cd6f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila_readme.txt @@ -0,0 +1,48 @@ +The following files were generated for 'chipscope_ila' in directory +/home/mwest/git/fpgadev/usrp3/top/b205/coregen/ + +XCO file generator: + Generate an XCO file for compatibility with legacy flows. + + * chipscope_ila.xco + +Creates an implementation netlist: + Creates an implementation netlist for the IP. + + * chipscope_ila.cdc + * chipscope_ila.constraints/chipscope_ila.ucf + * chipscope_ila.constraints/chipscope_ila.xdc + * chipscope_ila.ncf + * chipscope_ila.ngc + * chipscope_ila.ucf + * chipscope_ila.v + * chipscope_ila.veo + * chipscope_ila.xdc + * chipscope_ila_xmdf.tcl + +IP Symbol Generator: + Generate an IP symbol based on the current project options'. + + * chipscope_ila.asy + +Generate ISE subproject: + Create an ISE subproject for use when including this core in ISE designs + + * _xmsgs/pn_parser.xmsgs + * chipscope_ila.gise + * chipscope_ila.xise + +Deliver Readme: + Readme file for the IP. + + * chipscope_ila_readme.txt + +Generate FLIST file: + Text file listing all of the output files produced when a customized core was + generated in the CORE Generator. + + * chipscope_ila_flist.txt + +Please see the Xilinx CORE Generator online help for further details on +generated files and how to use them. + diff --git a/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila_xmdf.tcl b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila_xmdf.tcl new file mode 100755 index 000000000..b18241e0b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/chipscope_ila_xmdf.tcl @@ -0,0 +1,87 @@ +# The package naming convention is <core_name>_xmdf +package provide chipscope_ila_xmdf 1.0 + +# This includes some utilities that support common XMDF operations +package require utilities_xmdf + +# Define a namespace for this package. The name of the name space +# is <core_name>_xmdf +namespace eval ::chipscope_ila_xmdf { +# Use this to define any statics +} + +# Function called by client to rebuild the params and port arrays +# Optional when the use context does not require the param or ports +# arrays to be available. +proc ::chipscope_ila_xmdf::xmdfInit { instance } { +# Variable containing name of library into which module is compiled +# Recommendation: <module_name> +# Required +utilities_xmdf::xmdfSetData $instance Module Attributes Name chipscope_ila +} +# ::chipscope_ila_xmdf::xmdfInit + +# Function called by client to fill in all the xmdf* data variables +# based on the current settings of the parameters +proc ::chipscope_ila_xmdf::xmdfApplyParams { instance } { + +set fcount 0 +# Array containing libraries that are assumed to exist +# Examples include unisim and xilinxcorelib +# Optional +# In this example, we assume that the unisim library will +# be available to the simulation and synthesis tool +utilities_xmdf::xmdfSetData $instance FileSet $fcount type logical_library +utilities_xmdf::xmdfSetData $instance FileSet $fcount logical_library unisim +incr fcount + + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila.asy +utilities_xmdf::xmdfSetData $instance FileSet $fcount type asy +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila.cdc +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila.constraints/chipscope_ila.ucf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ucf +incr fcount + + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila.ncf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ncf +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila.constraints/chipscope_ila.xdc +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Xdc +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila.ngc +utilities_xmdf::xmdfSetData $instance FileSet $fcount type ngc +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila.v +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila.veo +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog_template +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila.xco +utilities_xmdf::xmdfSetData $instance FileSet $fcount type coregen_ip +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path chipscope_ila_xmdf.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount associated_module chipscope_ila +incr fcount + +} + +# ::gen_comp_name_xmdf::xmdfApplyParams + diff --git a/fpga/usrp3/top/b2xxmini/coregen/coregen.cgp b/fpga/usrp3/top/b2xxmini/coregen/coregen.cgp new file mode 100644 index 000000000..127790678 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/coregen.cgp @@ -0,0 +1,9 @@ +SET busformat = BusFormatAngleBracketNotRipped +SET designentry = Verilog +SET device = xc6slx150 +SET devicefamily = spartan6 +SET flowvendor = Foundation_ISE +SET package = csg484 +SET speedgrade = -3 +SET verilogsim = true +SET vhdlsim = false diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.asy b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.asy new file mode 100644 index 000000000..fd6eef6f7 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.asy @@ -0,0 +1,49 @@ +Version 4 +SymbolType BLOCK +TEXT 32 32 LEFT 4 fifo_4k_2clk +RECTANGLE Normal 32 32 800 4064 +LINE Normal 0 112 32 112 +PIN 0 112 LEFT 36 +PINATTR PinName rst +PINATTR Polarity IN +LINE Normal 0 208 32 208 +PIN 0 208 LEFT 36 +PINATTR PinName wr_clk +PINATTR Polarity IN +LINE Wide 0 240 32 240 +PIN 0 240 LEFT 36 +PINATTR PinName din[71:0] +PINATTR Polarity IN +LINE Normal 0 272 32 272 +PIN 0 272 LEFT 36 +PINATTR PinName wr_en +PINATTR Polarity IN +LINE Normal 0 464 32 464 +PIN 0 464 LEFT 36 +PINATTR PinName full +PINATTR Polarity OUT +LINE Wide 0 624 32 624 +PIN 0 624 LEFT 36 +PINATTR PinName wr_data_count[9:0] +PINATTR Polarity OUT +LINE Normal 832 240 800 240 +PIN 832 240 RIGHT 36 +PINATTR PinName rd_clk +PINATTR Polarity IN +LINE Wide 832 272 800 272 +PIN 832 272 RIGHT 36 +PINATTR PinName dout[71:0] +PINATTR Polarity OUT +LINE Normal 832 304 800 304 +PIN 832 304 RIGHT 36 +PINATTR PinName rd_en +PINATTR Polarity IN +LINE Normal 832 496 800 496 +PIN 832 496 RIGHT 36 +PINATTR PinName empty +PINATTR Polarity OUT +LINE Wide 832 656 800 656 +PIN 832 656 RIGHT 36 +PINATTR PinName rd_data_count[9:0] +PINATTR Polarity OUT + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.ncf b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.ncf new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.ncf diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.ngc b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.ngc new file mode 100644 index 000000000..61795f415 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.ngc @@ -0,0 +1,3 @@ +XILINX-XDB 0.1 STUB 0.1 ASCII +XILINX-XDM V1.6e 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\ No newline at end of file diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.v b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.v new file mode 100644 index 000000000..0d514578b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.v @@ -0,0 +1,491 @@ +/******************************************************************************* +* This file is owned and controlled by Xilinx and must be used solely * +* for design, simulation, implementation and creation of design files * +* limited to Xilinx devices or technologies. Use with non-Xilinx * +* devices or technologies is expressly prohibited and immediately * +* terminates your license. * +* * +* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY * +* FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY * +* PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE * +* IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS * +* MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY * +* CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY * +* RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY * +* DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE * +* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR * +* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF * +* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * +* PARTICULAR PURPOSE. * +* * +* Xilinx products are not intended for use in life support appliances, * +* devices, or systems. Use in such applications are expressly * +* prohibited. * +* * +* (c) Copyright 1995-2015 Xilinx, Inc. * +* All rights reserved. * +*******************************************************************************/ +// You must compile the wrapper file fifo_4k_2clk.v when simulating +// the core, fifo_4k_2clk. When compiling the wrapper file, be sure to +// reference the XilinxCoreLib Verilog simulation library. For detailed +// instructions, please refer to the "CORE Generator Help". + +// The synthesis directives "translate_off/translate_on" specified below are +// supported by Xilinx, Mentor Graphics and Synplicity synthesis +// tools. Ensure they are correct for your synthesis tool(s). + +`timescale 1ns/1ps + +module fifo_4k_2clk( + rst, + wr_clk, + rd_clk, + din, + wr_en, + rd_en, + dout, + full, + empty, + rd_data_count, + wr_data_count +); + +input rst; +input wr_clk; +input rd_clk; +input [71 : 0] din; +input wr_en; +input rd_en; +output [71 : 0] dout; +output full; +output empty; +output [9 : 0] rd_data_count; +output [9 : 0] wr_data_count; + +// synthesis translate_off + + FIFO_GENERATOR_V9_3 #( + .C_ADD_NGC_CONSTRAINT(0), + .C_APPLICATION_TYPE_AXIS(0), + .C_APPLICATION_TYPE_RACH(0), + .C_APPLICATION_TYPE_RDCH(0), + .C_APPLICATION_TYPE_WACH(0), + .C_APPLICATION_TYPE_WDCH(0), + .C_APPLICATION_TYPE_WRCH(0), + .C_AXI_ADDR_WIDTH(32), + .C_AXI_ARUSER_WIDTH(1), + .C_AXI_AWUSER_WIDTH(1), + .C_AXI_BUSER_WIDTH(1), + .C_AXI_DATA_WIDTH(64), + .C_AXI_ID_WIDTH(4), + .C_AXI_RUSER_WIDTH(1), + .C_AXI_TYPE(0), + .C_AXI_WUSER_WIDTH(1), + .C_AXIS_TDATA_WIDTH(64), + .C_AXIS_TDEST_WIDTH(4), + .C_AXIS_TID_WIDTH(8), + .C_AXIS_TKEEP_WIDTH(4), + .C_AXIS_TSTRB_WIDTH(4), + .C_AXIS_TUSER_WIDTH(4), + .C_AXIS_TYPE(0), + .C_COMMON_CLOCK(0), + .C_COUNT_TYPE(0), + .C_DATA_COUNT_WIDTH(9), + .C_DEFAULT_VALUE("BlankString"), + .C_DIN_WIDTH(72), + .C_DIN_WIDTH_AXIS(1), + .C_DIN_WIDTH_RACH(32), + .C_DIN_WIDTH_RDCH(64), + .C_DIN_WIDTH_WACH(32), + .C_DIN_WIDTH_WDCH(64), + .C_DIN_WIDTH_WRCH(2), + .C_DOUT_RST_VAL("0"), + .C_DOUT_WIDTH(72), + .C_ENABLE_RLOCS(0), + .C_ENABLE_RST_SYNC(1), + .C_ERROR_INJECTION_TYPE(0), + .C_ERROR_INJECTION_TYPE_AXIS(0), + .C_ERROR_INJECTION_TYPE_RACH(0), + .C_ERROR_INJECTION_TYPE_RDCH(0), + .C_ERROR_INJECTION_TYPE_WACH(0), + .C_ERROR_INJECTION_TYPE_WDCH(0), + .C_ERROR_INJECTION_TYPE_WRCH(0), + .C_FAMILY("spartan6"), + .C_FULL_FLAGS_RST_VAL(1), + .C_HAS_ALMOST_EMPTY(0), + .C_HAS_ALMOST_FULL(0), + .C_HAS_AXI_ARUSER(0), + .C_HAS_AXI_AWUSER(0), + .C_HAS_AXI_BUSER(0), + .C_HAS_AXI_RD_CHANNEL(0), + .C_HAS_AXI_RUSER(0), + .C_HAS_AXI_WR_CHANNEL(0), + .C_HAS_AXI_WUSER(0), + .C_HAS_AXIS_TDATA(0), + .C_HAS_AXIS_TDEST(0), + .C_HAS_AXIS_TID(0), + .C_HAS_AXIS_TKEEP(0), + .C_HAS_AXIS_TLAST(0), + .C_HAS_AXIS_TREADY(1), + .C_HAS_AXIS_TSTRB(0), + .C_HAS_AXIS_TUSER(0), + .C_HAS_BACKUP(0), + .C_HAS_DATA_COUNT(0), + .C_HAS_DATA_COUNTS_AXIS(0), + .C_HAS_DATA_COUNTS_RACH(0), + .C_HAS_DATA_COUNTS_RDCH(0), + .C_HAS_DATA_COUNTS_WACH(0), + .C_HAS_DATA_COUNTS_WDCH(0), + .C_HAS_DATA_COUNTS_WRCH(0), + .C_HAS_INT_CLK(0), + .C_HAS_MASTER_CE(0), + .C_HAS_MEMINIT_FILE(0), + .C_HAS_OVERFLOW(0), + .C_HAS_PROG_FLAGS_AXIS(0), + .C_HAS_PROG_FLAGS_RACH(0), + .C_HAS_PROG_FLAGS_RDCH(0), + .C_HAS_PROG_FLAGS_WACH(0), + .C_HAS_PROG_FLAGS_WDCH(0), + .C_HAS_PROG_FLAGS_WRCH(0), + .C_HAS_RD_DATA_COUNT(1), + .C_HAS_RD_RST(0), + .C_HAS_RST(1), + .C_HAS_SLAVE_CE(0), + .C_HAS_SRST(0), + .C_HAS_UNDERFLOW(0), + .C_HAS_VALID(0), + .C_HAS_WR_ACK(0), + .C_HAS_WR_DATA_COUNT(1), + .C_HAS_WR_RST(0), + .C_IMPLEMENTATION_TYPE(2), + .C_IMPLEMENTATION_TYPE_AXIS(1), + .C_IMPLEMENTATION_TYPE_RACH(1), + .C_IMPLEMENTATION_TYPE_RDCH(1), + .C_IMPLEMENTATION_TYPE_WACH(1), + .C_IMPLEMENTATION_TYPE_WDCH(1), + .C_IMPLEMENTATION_TYPE_WRCH(1), + .C_INIT_WR_PNTR_VAL(0), + .C_INTERFACE_TYPE(0), + .C_MEMORY_TYPE(1), + .C_MIF_FILE_NAME("BlankString"), + .C_MSGON_VAL(1), + .C_OPTIMIZATION_MODE(0), + .C_OVERFLOW_LOW(0), + .C_PRELOAD_LATENCY(0), + .C_PRELOAD_REGS(1), + .C_PRIM_FIFO_TYPE("512x72"), + .C_PROG_EMPTY_THRESH_ASSERT_VAL(4), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH(1022), + .C_PROG_EMPTY_THRESH_NEGATE_VAL(5), + .C_PROG_EMPTY_TYPE(0), + .C_PROG_EMPTY_TYPE_AXIS(0), + .C_PROG_EMPTY_TYPE_RACH(0), + .C_PROG_EMPTY_TYPE_RDCH(0), + .C_PROG_EMPTY_TYPE_WACH(0), + .C_PROG_EMPTY_TYPE_WDCH(0), + .C_PROG_EMPTY_TYPE_WRCH(0), + .C_PROG_FULL_THRESH_ASSERT_VAL(511), + .C_PROG_FULL_THRESH_ASSERT_VAL_AXIS(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_RACH(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_RDCH(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_WACH(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_WDCH(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_WRCH(1023), + .C_PROG_FULL_THRESH_NEGATE_VAL(510), + .C_PROG_FULL_TYPE(0), + .C_PROG_FULL_TYPE_AXIS(0), + .C_PROG_FULL_TYPE_RACH(0), + .C_PROG_FULL_TYPE_RDCH(0), + .C_PROG_FULL_TYPE_WACH(0), + .C_PROG_FULL_TYPE_WDCH(0), + .C_PROG_FULL_TYPE_WRCH(0), + .C_RACH_TYPE(0), + .C_RD_DATA_COUNT_WIDTH(10), + .C_RD_DEPTH(512), + .C_RD_FREQ(1), + .C_RD_PNTR_WIDTH(9), + .C_RDCH_TYPE(0), + .C_REG_SLICE_MODE_AXIS(0), + .C_REG_SLICE_MODE_RACH(0), + .C_REG_SLICE_MODE_RDCH(0), + .C_REG_SLICE_MODE_WACH(0), + .C_REG_SLICE_MODE_WDCH(0), + .C_REG_SLICE_MODE_WRCH(0), + .C_SYNCHRONIZER_STAGE(2), + .C_UNDERFLOW_LOW(0), + .C_USE_COMMON_OVERFLOW(0), + .C_USE_COMMON_UNDERFLOW(0), + .C_USE_DEFAULT_SETTINGS(0), + .C_USE_DOUT_RST(1), + .C_USE_ECC(0), + .C_USE_ECC_AXIS(0), + .C_USE_ECC_RACH(0), + .C_USE_ECC_RDCH(0), + .C_USE_ECC_WACH(0), + .C_USE_ECC_WDCH(0), + .C_USE_ECC_WRCH(0), + .C_USE_EMBEDDED_REG(0), + .C_USE_FIFO16_FLAGS(0), + .C_USE_FWFT_DATA_COUNT(1), + .C_VALID_LOW(0), + .C_WACH_TYPE(0), + .C_WDCH_TYPE(0), + .C_WR_ACK_LOW(0), + .C_WR_DATA_COUNT_WIDTH(10), + .C_WR_DEPTH(512), + .C_WR_DEPTH_AXIS(1024), + .C_WR_DEPTH_RACH(16), + .C_WR_DEPTH_RDCH(1024), + .C_WR_DEPTH_WACH(16), + .C_WR_DEPTH_WDCH(1024), + .C_WR_DEPTH_WRCH(16), + .C_WR_FREQ(1), + .C_WR_PNTR_WIDTH(9), + .C_WR_PNTR_WIDTH_AXIS(10), + .C_WR_PNTR_WIDTH_RACH(4), + .C_WR_PNTR_WIDTH_RDCH(10), + .C_WR_PNTR_WIDTH_WACH(4), + .C_WR_PNTR_WIDTH_WDCH(10), + .C_WR_PNTR_WIDTH_WRCH(4), + .C_WR_RESPONSE_LATENCY(1), + .C_WRCH_TYPE(0) + ) + inst ( + .RST(rst), + .WR_CLK(wr_clk), + .RD_CLK(rd_clk), + .DIN(din), + .WR_EN(wr_en), + .RD_EN(rd_en), + .DOUT(dout), + .FULL(full), + .EMPTY(empty), + .RD_DATA_COUNT(rd_data_count), + .WR_DATA_COUNT(wr_data_count), + .BACKUP(), + .BACKUP_MARKER(), + .CLK(), + .SRST(), + .WR_RST(), + .RD_RST(), + .PROG_EMPTY_THRESH(), + .PROG_EMPTY_THRESH_ASSERT(), + .PROG_EMPTY_THRESH_NEGATE(), + .PROG_FULL_THRESH(), + .PROG_FULL_THRESH_ASSERT(), + .PROG_FULL_THRESH_NEGATE(), + .INT_CLK(), + .INJECTDBITERR(), + .INJECTSBITERR(), + .ALMOST_FULL(), + .WR_ACK(), + .OVERFLOW(), + .ALMOST_EMPTY(), + .VALID(), + .UNDERFLOW(), + .DATA_COUNT(), + .PROG_FULL(), + .PROG_EMPTY(), + .SBITERR(), + .DBITERR(), + .M_ACLK(), + .S_ACLK(), + .S_ARESETN(), + .M_ACLK_EN(), + .S_ACLK_EN(), + .S_AXI_AWID(), + .S_AXI_AWADDR(), + .S_AXI_AWLEN(), + .S_AXI_AWSIZE(), + .S_AXI_AWBURST(), + .S_AXI_AWLOCK(), + .S_AXI_AWCACHE(), + .S_AXI_AWPROT(), + .S_AXI_AWQOS(), + .S_AXI_AWREGION(), + .S_AXI_AWUSER(), + .S_AXI_AWVALID(), + .S_AXI_AWREADY(), + .S_AXI_WID(), + .S_AXI_WDATA(), + .S_AXI_WSTRB(), + .S_AXI_WLAST(), + .S_AXI_WUSER(), + .S_AXI_WVALID(), + .S_AXI_WREADY(), + .S_AXI_BID(), + .S_AXI_BRESP(), + .S_AXI_BUSER(), + .S_AXI_BVALID(), + .S_AXI_BREADY(), + .M_AXI_AWID(), + .M_AXI_AWADDR(), + .M_AXI_AWLEN(), + .M_AXI_AWSIZE(), + .M_AXI_AWBURST(), + .M_AXI_AWLOCK(), + .M_AXI_AWCACHE(), + .M_AXI_AWPROT(), + .M_AXI_AWQOS(), + .M_AXI_AWREGION(), + .M_AXI_AWUSER(), + .M_AXI_AWVALID(), + .M_AXI_AWREADY(), + .M_AXI_WID(), + .M_AXI_WDATA(), + .M_AXI_WSTRB(), + .M_AXI_WLAST(), + .M_AXI_WUSER(), + .M_AXI_WVALID(), + .M_AXI_WREADY(), + .M_AXI_BID(), + .M_AXI_BRESP(), + .M_AXI_BUSER(), + .M_AXI_BVALID(), + .M_AXI_BREADY(), + .S_AXI_ARID(), + .S_AXI_ARADDR(), + .S_AXI_ARLEN(), + .S_AXI_ARSIZE(), + .S_AXI_ARBURST(), + .S_AXI_ARLOCK(), + .S_AXI_ARCACHE(), + .S_AXI_ARPROT(), + .S_AXI_ARQOS(), + .S_AXI_ARREGION(), + .S_AXI_ARUSER(), + .S_AXI_ARVALID(), + .S_AXI_ARREADY(), + .S_AXI_RID(), + .S_AXI_RDATA(), + .S_AXI_RRESP(), + .S_AXI_RLAST(), + .S_AXI_RUSER(), + .S_AXI_RVALID(), + .S_AXI_RREADY(), + .M_AXI_ARID(), + .M_AXI_ARADDR(), + .M_AXI_ARLEN(), + .M_AXI_ARSIZE(), + .M_AXI_ARBURST(), + .M_AXI_ARLOCK(), + .M_AXI_ARCACHE(), + .M_AXI_ARPROT(), + .M_AXI_ARQOS(), + .M_AXI_ARREGION(), + .M_AXI_ARUSER(), + .M_AXI_ARVALID(), + .M_AXI_ARREADY(), + .M_AXI_RID(), + .M_AXI_RDATA(), + .M_AXI_RRESP(), + .M_AXI_RLAST(), + .M_AXI_RUSER(), + .M_AXI_RVALID(), + .M_AXI_RREADY(), + .S_AXIS_TVALID(), + .S_AXIS_TREADY(), + .S_AXIS_TDATA(), + .S_AXIS_TSTRB(), + .S_AXIS_TKEEP(), + .S_AXIS_TLAST(), + .S_AXIS_TID(), + .S_AXIS_TDEST(), + .S_AXIS_TUSER(), + .M_AXIS_TVALID(), + .M_AXIS_TREADY(), + .M_AXIS_TDATA(), + .M_AXIS_TSTRB(), + .M_AXIS_TKEEP(), + .M_AXIS_TLAST(), + .M_AXIS_TID(), + .M_AXIS_TDEST(), + .M_AXIS_TUSER(), + .AXI_AW_INJECTSBITERR(), + .AXI_AW_INJECTDBITERR(), + .AXI_AW_PROG_FULL_THRESH(), + .AXI_AW_PROG_EMPTY_THRESH(), + .AXI_AW_DATA_COUNT(), + .AXI_AW_WR_DATA_COUNT(), + .AXI_AW_RD_DATA_COUNT(), + .AXI_AW_SBITERR(), + .AXI_AW_DBITERR(), + .AXI_AW_OVERFLOW(), + .AXI_AW_UNDERFLOW(), + .AXI_AW_PROG_FULL(), + .AXI_AW_PROG_EMPTY(), + .AXI_W_INJECTSBITERR(), + .AXI_W_INJECTDBITERR(), + .AXI_W_PROG_FULL_THRESH(), + .AXI_W_PROG_EMPTY_THRESH(), + .AXI_W_DATA_COUNT(), + .AXI_W_WR_DATA_COUNT(), + .AXI_W_RD_DATA_COUNT(), + .AXI_W_SBITERR(), + .AXI_W_DBITERR(), + .AXI_W_OVERFLOW(), + .AXI_W_UNDERFLOW(), + .AXI_B_INJECTSBITERR(), + .AXI_W_PROG_FULL(), + .AXI_W_PROG_EMPTY(), + .AXI_B_INJECTDBITERR(), + .AXI_B_PROG_FULL_THRESH(), + .AXI_B_PROG_EMPTY_THRESH(), + .AXI_B_DATA_COUNT(), + .AXI_B_WR_DATA_COUNT(), + .AXI_B_RD_DATA_COUNT(), + .AXI_B_SBITERR(), + .AXI_B_DBITERR(), + .AXI_B_OVERFLOW(), + .AXI_B_UNDERFLOW(), + .AXI_AR_INJECTSBITERR(), + .AXI_B_PROG_FULL(), + .AXI_B_PROG_EMPTY(), + .AXI_AR_INJECTDBITERR(), + .AXI_AR_PROG_FULL_THRESH(), + .AXI_AR_PROG_EMPTY_THRESH(), + .AXI_AR_DATA_COUNT(), + .AXI_AR_WR_DATA_COUNT(), + .AXI_AR_RD_DATA_COUNT(), + .AXI_AR_SBITERR(), + .AXI_AR_DBITERR(), + .AXI_AR_OVERFLOW(), + .AXI_AR_UNDERFLOW(), + .AXI_AR_PROG_FULL(), + .AXI_AR_PROG_EMPTY(), + .AXI_R_INJECTSBITERR(), + .AXI_R_INJECTDBITERR(), + .AXI_R_PROG_FULL_THRESH(), + .AXI_R_PROG_EMPTY_THRESH(), + .AXI_R_DATA_COUNT(), + .AXI_R_WR_DATA_COUNT(), + .AXI_R_RD_DATA_COUNT(), + .AXI_R_SBITERR(), + .AXI_R_DBITERR(), + .AXI_R_OVERFLOW(), + .AXI_R_UNDERFLOW(), + .AXIS_INJECTSBITERR(), + .AXI_R_PROG_FULL(), + .AXI_R_PROG_EMPTY(), + .AXIS_INJECTDBITERR(), + .AXIS_PROG_FULL_THRESH(), + .AXIS_PROG_EMPTY_THRESH(), + .AXIS_DATA_COUNT(), + .AXIS_WR_DATA_COUNT(), + .AXIS_RD_DATA_COUNT(), + .AXIS_SBITERR(), + .AXIS_DBITERR(), + .AXIS_OVERFLOW(), + .AXIS_UNDERFLOW(), + .AXIS_PROG_FULL(), + .AXIS_PROG_EMPTY() + ); + +// synthesis translate_on + +endmodule diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.veo b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.veo new file mode 100644 index 000000000..faaf82107 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.veo @@ -0,0 +1,79 @@ +/******************************************************************************* +* This file is owned and controlled by Xilinx and must be used solely * +* for design, simulation, implementation and creation of design files * +* limited to Xilinx devices or technologies. Use with non-Xilinx * +* devices or technologies is expressly prohibited and immediately * +* terminates your license. * +* * +* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY * +* FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY * +* PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE * +* IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS * +* MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY * +* CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY * +* RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY * +* DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE * +* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR * +* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF * +* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * +* PARTICULAR PURPOSE. * +* * +* Xilinx products are not intended for use in life support appliances, * +* devices, or systems. Use in such applications are expressly * +* prohibited. * +* * +* (c) Copyright 1995-2015 Xilinx, Inc. * +* All rights reserved. * +*******************************************************************************/ + +/******************************************************************************* +* Generated from core with identifier: xilinx.com:ip:fifo_generator:9.3 * +* * +* Rev 1. The FIFO Generator is a parameterizable first-in/first-out * +* memory queue generator. Use it to generate resource and performance * +* optimized FIFOs with common or independent read/write clock domains, * +* and optional fixed or programmable full and empty flags and * +* handshaking signals. Choose from a selection of memory resource * +* types for implementation. Optional Hamming code based error * +* detection and correction as well as error injection capability for * +* system test help to insure data integrity. FIFO width and depth are * +* parameterizable, and for native interface FIFOs, asymmetric read and * +* write port widths are also supported. * +*******************************************************************************/ + +// Interfaces: +// AXI4Stream_MASTER_M_AXIS +// AXI4Stream_SLAVE_S_AXIS +// AXI4_MASTER_M_AXI +// AXI4_SLAVE_S_AXI +// AXI4Lite_MASTER_M_AXI +// AXI4Lite_SLAVE_S_AXI +// master_aclk +// slave_aclk +// slave_aresetn + +// The following must be inserted into your Verilog file for this +// core to be instantiated. Change the instance name and port connections +// (in parentheses) to your own signal names. + +//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG +fifo_4k_2clk your_instance_name ( + .rst(rst), // input rst + .wr_clk(wr_clk), // input wr_clk + .rd_clk(rd_clk), // input rd_clk + .din(din), // input [71 : 0] din + .wr_en(wr_en), // input wr_en + .rd_en(rd_en), // input rd_en + .dout(dout), // output [71 : 0] dout + .full(full), // output full + .empty(empty), // output empty + .rd_data_count(rd_data_count), // output [9 : 0] rd_data_count + .wr_data_count(wr_data_count) // output [9 : 0] wr_data_count +); +// INST_TAG_END ------ End INSTANTIATION Template --------- + +// You must compile the wrapper file fifo_4k_2clk.v when simulating +// the core, fifo_4k_2clk. When compiling the wrapper file, be sure to +// reference the XilinxCoreLib Verilog simulation library. For detailed +// instructions, please refer to the "CORE Generator Help". + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.xco b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.xco new file mode 100644 index 000000000..bd508490c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk.xco @@ -0,0 +1,213 @@ +############################################################## +# +# Xilinx Core Generator version 14.7 +# Date: Thu Mar 26 19:28:41 2015 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# Generated from component: xilinx.com:ip:fifo_generator:9.3 +# +############################################################## +# +# BEGIN Project Options +SET addpads = false +SET asysymbol = true +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = false +SET designentry = Verilog +SET device = xc6slx75 +SET devicefamily = spartan6 +SET flowvendor = Foundation_ISE +SET formalverification = false +SET foundationsym = false +SET implementationfiletype = Ngc +SET package = csg484 +SET removerpms = false +SET simulationfiles = Behavioral +SET speedgrade = -3 +SET verilogsim = true +SET vhdlsim = false +# END Project Options +# BEGIN Select +SELECT FIFO_Generator xilinx.com:ip:fifo_generator:9.3 +# END Select +# BEGIN Parameters +CSET add_ngc_constraint_axi=false +CSET almost_empty_flag=false +CSET almost_full_flag=false +CSET aruser_width=1 +CSET awuser_width=1 +CSET axi_address_width=32 +CSET axi_data_width=64 +CSET axi_type=AXI4_Stream +CSET axis_type=FIFO +CSET buser_width=1 +CSET clock_enable_type=Slave_Interface_Clock_Enable +CSET clock_type_axi=Common_Clock +CSET component_name=fifo_4k_2clk +CSET data_count=false +CSET data_count_width=9 +CSET disable_timing_violations=false +CSET disable_timing_violations_axi=false +CSET dout_reset_value=0 +CSET empty_threshold_assert_value=4 +CSET empty_threshold_assert_value_axis=1022 +CSET empty_threshold_assert_value_rach=1022 +CSET empty_threshold_assert_value_rdch=1022 +CSET empty_threshold_assert_value_wach=1022 +CSET empty_threshold_assert_value_wdch=1022 +CSET empty_threshold_assert_value_wrch=1022 +CSET empty_threshold_negate_value=5 +CSET enable_aruser=false +CSET enable_awuser=false +CSET enable_buser=false +CSET enable_common_overflow=false +CSET enable_common_underflow=false +CSET enable_data_counts_axis=false +CSET enable_data_counts_rach=false +CSET enable_data_counts_rdch=false +CSET enable_data_counts_wach=false +CSET enable_data_counts_wdch=false +CSET enable_data_counts_wrch=false +CSET enable_ecc=false +CSET enable_ecc_axis=false +CSET enable_ecc_rach=false +CSET enable_ecc_rdch=false +CSET enable_ecc_wach=false +CSET enable_ecc_wdch=false +CSET enable_ecc_wrch=false +CSET enable_read_channel=false +CSET enable_read_pointer_increment_by2=false +CSET enable_reset_synchronization=true +CSET enable_ruser=false +CSET enable_tdata=false +CSET enable_tdest=false +CSET enable_tid=false +CSET enable_tkeep=false +CSET enable_tlast=false +CSET enable_tready=true +CSET enable_tstrobe=false +CSET enable_tuser=false +CSET enable_write_channel=false +CSET enable_wuser=false +CSET fifo_application_type_axis=Data_FIFO +CSET fifo_application_type_rach=Data_FIFO +CSET fifo_application_type_rdch=Data_FIFO +CSET fifo_application_type_wach=Data_FIFO +CSET fifo_application_type_wdch=Data_FIFO +CSET fifo_application_type_wrch=Data_FIFO +CSET fifo_implementation=Independent_Clocks_Block_RAM +CSET fifo_implementation_axis=Common_Clock_Block_RAM +CSET fifo_implementation_rach=Common_Clock_Block_RAM +CSET fifo_implementation_rdch=Common_Clock_Block_RAM +CSET fifo_implementation_wach=Common_Clock_Block_RAM +CSET fifo_implementation_wdch=Common_Clock_Block_RAM +CSET fifo_implementation_wrch=Common_Clock_Block_RAM +CSET full_flags_reset_value=1 +CSET full_threshold_assert_value=511 +CSET full_threshold_assert_value_axis=1023 +CSET full_threshold_assert_value_rach=1023 +CSET full_threshold_assert_value_rdch=1023 +CSET full_threshold_assert_value_wach=1023 +CSET full_threshold_assert_value_wdch=1023 +CSET full_threshold_assert_value_wrch=1023 +CSET full_threshold_negate_value=510 +CSET id_width=4 +CSET inject_dbit_error=false +CSET inject_dbit_error_axis=false +CSET inject_dbit_error_rach=false +CSET inject_dbit_error_rdch=false +CSET inject_dbit_error_wach=false +CSET inject_dbit_error_wdch=false +CSET inject_dbit_error_wrch=false +CSET inject_sbit_error=false +CSET inject_sbit_error_axis=false +CSET inject_sbit_error_rach=false +CSET inject_sbit_error_rdch=false +CSET inject_sbit_error_wach=false +CSET inject_sbit_error_wdch=false +CSET inject_sbit_error_wrch=false +CSET input_data_width=72 +CSET input_depth=512 +CSET input_depth_axis=1024 +CSET input_depth_rach=16 +CSET input_depth_rdch=1024 +CSET input_depth_wach=16 +CSET input_depth_wdch=1024 +CSET input_depth_wrch=16 +CSET interface_type=Native +CSET output_data_width=72 +CSET output_depth=512 +CSET overflow_flag=false +CSET overflow_flag_axi=false +CSET overflow_sense=Active_High +CSET overflow_sense_axi=Active_High +CSET performance_options=First_Word_Fall_Through +CSET programmable_empty_type=No_Programmable_Empty_Threshold +CSET programmable_empty_type_axis=No_Programmable_Empty_Threshold +CSET programmable_empty_type_rach=No_Programmable_Empty_Threshold +CSET programmable_empty_type_rdch=No_Programmable_Empty_Threshold +CSET programmable_empty_type_wach=No_Programmable_Empty_Threshold +CSET programmable_empty_type_wdch=No_Programmable_Empty_Threshold +CSET programmable_empty_type_wrch=No_Programmable_Empty_Threshold +CSET programmable_full_type=No_Programmable_Full_Threshold +CSET programmable_full_type_axis=No_Programmable_Full_Threshold +CSET programmable_full_type_rach=No_Programmable_Full_Threshold +CSET programmable_full_type_rdch=No_Programmable_Full_Threshold +CSET programmable_full_type_wach=No_Programmable_Full_Threshold +CSET programmable_full_type_wdch=No_Programmable_Full_Threshold +CSET programmable_full_type_wrch=No_Programmable_Full_Threshold +CSET rach_type=FIFO +CSET rdch_type=FIFO +CSET read_clock_frequency=1 +CSET read_data_count=true +CSET read_data_count_width=10 +CSET register_slice_mode_axis=Fully_Registered +CSET register_slice_mode_rach=Fully_Registered +CSET register_slice_mode_rdch=Fully_Registered +CSET register_slice_mode_wach=Fully_Registered +CSET register_slice_mode_wdch=Fully_Registered +CSET register_slice_mode_wrch=Fully_Registered +CSET reset_pin=true +CSET reset_type=Asynchronous_Reset +CSET ruser_width=1 +CSET synchronization_stages=2 +CSET synchronization_stages_axi=2 +CSET tdata_width=64 +CSET tdest_width=4 +CSET tid_width=8 +CSET tkeep_width=4 +CSET tstrb_width=4 +CSET tuser_width=4 +CSET underflow_flag=false +CSET underflow_flag_axi=false +CSET underflow_sense=Active_High +CSET underflow_sense_axi=Active_High +CSET use_clock_enable=false +CSET use_dout_reset=true +CSET use_embedded_registers=false +CSET use_extra_logic=true +CSET valid_flag=false +CSET valid_sense=Active_High +CSET wach_type=FIFO +CSET wdch_type=FIFO +CSET wrch_type=FIFO +CSET write_acknowledge_flag=false +CSET write_acknowledge_sense=Active_High +CSET write_clock_frequency=1 +CSET write_data_count=true +CSET write_data_count_width=10 +CSET wuser_width=1 +# END Parameters +# BEGIN Extra information +MISC pkg_timestamp=2012-11-19T12:39:56Z +# END Extra information +GENERATE +# CRC: d3cdd696 diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/doc/fifo_generator_v9_3_readme.txt b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/doc/fifo_generator_v9_3_readme.txt new file mode 100644 index 000000000..7853ebde8 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/doc/fifo_generator_v9_3_readme.txt @@ -0,0 +1,236 @@ +CHANGE LOG for LogiCORE FIFO Generator V9.3 Rev 1 + + Release Date: December 18, 2012 +-------------------------------------------------------------------------------- + +Table of Contents + +1. INTRODUCTION +2. DEVICE SUPPORT +3. NEW FEATURE HISTORY +4. RESOLVED ISSUES +5. KNOWN ISSUES & LIMITATIONS +6. TECHNICAL SUPPORT & FEEDBACK +7. CORE RELEASE HISTORY +8. LEGAL DISCLAIMER + +-------------------------------------------------------------------------------- + + +1. INTRODUCTION + +For installation instructions for this release, please go to: + + http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm + +For system requirements: + + http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm + +This file contains release notes for the Xilinx LogiCORE IP FIFO Generator v9.3 Rev 1 +solution. For the latest core updates, see the product page at: + + http://www.xilinx.com/products/ipcenter/FIFO_Generator.htm + +................................................................................ + + +2. DEVICE SUPPORT + + + 2.1 ISE + + The following device families are supported by the core for this release. + + + All 7 Series devices + Zynq-7000 devices + All Virtex-6 devices + All Spartan-6 devices + All Virtex-5 devices + All Spartan-3 devices + All Virtex-4 devices + + + 2.2 Vivado + + All 7 Series devices + Zynq-7000 devices + +................................................................................ + + +3. NEW FEATURE HISTORY + + + 3.1 ISE + + - ISE 14.4 software support + + + 3.2 Vivado + + - 2012.4 software support + - IP level constraint for Built-in FIFO reset synchronizer + +................................................................................ + + +4. RESOLVED ISSUES + + + 4.1 ISE + + - N/A + + + 4.2 Vivado + + - N/A + + +................................................................................ + + +5. KNOWN ISSUES & LIMITATIONS + + + 5.1 ISE + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Importing an XCO file alters the XCO configurations + + Description: In the FIFO Generator GUI, after importing an XCO file (Independent clock, distributed memory configuration) + into a Virtex-4 CORE Generator project, if the FIFO type is changed to "Independent Clocks, Built-in FIFO" in page 1, + page 2 does not correctly offer the Read Clock Frequency and Write Clock Frequency options as it should. + + CR 467240 + AR 31379 + + 2. Status flags after the first write to Common Clock Built-in FIFO not guaranteed + + Description: When using Common Clock Built-in FIFO configuration with asynchronous reset for Virtex-6 FPGA, + correct behavior of the FIFO status flags cannot be guaranteed after the first write. + + Workaround: To work around this issue, synchronize the negative edge of reset to RDCLK/WRCLK. + For more information and additional workaround see Answer Record 41099. + + 5.2 Vivado + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Description: When Trying to upgrade to latest version of FIFO Generator from older verions, following error message is seen + ERROR: [Common 17-69] Command failed: invalid command name "puts" and Auto Upgradation does not work. + + CR 665836 + +The most recent information, including known issues, workarounds, and +resolutions for this version is provided in the IP Release Notes User Guide +located at + + www.xilinx.com/support/documentation/user_guides/xtp025.pdf + +................................................................................ + + +6. TECHNICAL SUPPORT & FEEDBACK + +To obtain technical support, create a WebCase at www.xilinx.com/support. +Questions are routed to a team with expertise using this product. + +Xilinx provides technical support for use of this product when used +according to the guidelines described in the core documentation, and +cannot guarantee timing, functionality, or support of this product for +designs that do not follow specified guidelines. + +................................................................................ + + +7. CORE RELEASE HISTORY + +Date By Version Description +================================================================================ +12/18/2012 Xilinx, Inc. 9.3 Rev 1 ISE 14.4 and Vivado 2012.4 support; IP level constraint for Built-in FIFO reset synchronizer +10/16/2012 Xilinx, Inc. 9.3 ISE 14.3 and Vivado 2012.3 support; Clock Enable support for AXI4 Stream FIFO +07/25/2012 Xilinx, Inc. 9.2 ISE 14.2 and Vivado 2012.2 support; Accurate data count support for AXI4 Stream Packet FIFO +04/24/2012 Xilinx, Inc. 9.1 ISE 14.1 and Vivado 2012.1 support; Defense Grade 7 Series and Zynq devices, and Automotive Zynq device support + AXI FIFO data width support up to 4096; Programmable Full/Empty as sideband signals for AXI FIFO +01/18/2012 Xilinx, Inc. 8.4 ISE 13.4 support and Packet FIFO feature addition; Artix-7 Lower Power and Automotive Artix-7 device support +10/19/2011 Xilinx, Inc. 8.3 ISE 13.3 support and QVirtex-6L device support +06/22/2011 Xilinx, Inc. 8.2 ISE 13.2 support and Kintex-7L, Virtex-7L, Artix-7 and Zynq-7000 device support +03/01/2011 Xilinx, Inc. 8.1 ISE 13.1 support and Virtex-7 and Kintex-7 device support; Wiring Logic and Register Slice Support +10/29/2010 Xilinx, Inc. 7.3 ISE 13.0.2 support +09/21/2010 Xilinx, Inc. 7.2 ISE 12.3 support; AXI4 Support +07/30/2010 Xilinx, Inc. 7.1 ISE 13.0.1 support +06/18/2010 Xilinx, Inc. 6.2 ISE 12.2 support +04/19/2010 Xilinx, Inc. 6.1 ISE 12.1 support +12/02/2009 Xilinx, Inc. 5.3 rev 1 ISE 11.4 support; Spartan-6 Low Power and Automotive Spartan-6 Device support +09/16/2009 Xilinx, Inc. 5.3 Update to add 11.3; Virtex-6 Low Power and Virtex-6 HXT Device support +06/24/2009 Xilinx, Inc. 5.2 Update to add 11.2 and Virtex-6 CXT device support +04/24/2009 Xilinx, Inc. 5.1 Update to add 11.1 and Virtex-6 and Spartan-6 device support +09/19/2008 Xilinx, Inc. 4.4 Update to add 10.1 SP3 and Virtex-5 TXT device support and miscellaneous bug fixes +03/24/2008 Xilinx, Inc. 4.3 Update to add 10.1 support and miscellaneous bug fixes +10/03/2007 Xilinx, Inc. 4.2 Support for FWFT for Block RAM and Distributed RAM Common Clock FIFOs +08/08/2007 Xilinx, Inc. 4.1 Update to add 9.2i support; Revised to v4.1; ECC support for block RAM FIFO +04/02/2007 Xilinx, Inc. 3.3 Update to add 9.1i support; Revised to v3.3; Spartan-3A and Spartan-3A DSP support; ECC support +09/21/2006 Xilinx, Inc. 3.2 Revised to v3.2; Spartan-3 and Virtex-4 automotive device support +07/13/2006 Xilinx, Inc. 3.1 Update to add 8.2i support; Revised to v3.1; Virtex-5 support +01/11/2006 Xilinx, Inc. 2.3 Update to add 8.1i support; Revised to v2.3 +08/31/2005 Xilinx, Inc. 2.2 Update to add 7.1i SP4 support; Revised to v2.2 +04/28/2005 Xilinx, Inc. 2.1 Update to add 7.1i SP1 support; Revised to v2.1 +11/04/2004 Xilinx, Inc. 2.0 Update to add 6.3i support; Revised to v2.0 +05/21/2004 Xilinx, Inc. 1.1 Revised to v1.1; Virtex-4 support +04/23/2004 Xilinx, Inc. 1.0 Update to add 6.2i support; First release +================================================================================ + +................................................................................ + + +8. LEGAL DISCLAIMER + +(c) Copyright 2002 - 2012 Xilinx, Inc. All rights reserved. + + This file contains confidential and proprietary information + of Xilinx, Inc. and is protected under U.S. and + international copyright and other intellectual property + laws. + + DISCLAIMER + This disclaimer is not a license and does not grant any + rights to the materials distributed herewith. Except as + otherwise provided in a valid license issued to you by + Xilinx, and to the maximum extent permitted by applicable + law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND + WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES + AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING + BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- + INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and + (2) Xilinx shall not be liable (whether in contract or tort, + including negligence, or under any other theory of + liability) for any loss or damage of any kind or nature + related to, arising under or in connection with these + materials, including for any direct, or any indirect, + special, incidental, or consequential loss or damage + (including loss of data, profits, goodwill, or any type of + loss or damage suffered as a result of any action brought + by a third party) even if such damage or loss was + reasonably foreseeable or Xilinx had been advised of the + possibility of the same. + + CRITICAL APPLICATIONS + Xilinx products are not designed or intended to be fail- + safe, or for use in any application requiring fail-safe + performance, such as life-support or safety devices or + systems, Class III medical devices, nuclear facilities, + applications related to the deployment of airbags, or any + other applications that could lead to death, personal + injury, or severe property or environmental damage + (individually and collectively, "Critical + Applications"). Customer assumes the sole risk and + liability of any use of Xilinx products in Critical + Applications, subject only to applicable laws and + regulations governing limitations on product liability. + + THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS + PART OF THIS FILE AT ALL TIMES. diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/doc/fifo_generator_v9_3_vinfo.html b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/doc/fifo_generator_v9_3_vinfo.html new file mode 100644 index 000000000..fefce62a3 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/doc/fifo_generator_v9_3_vinfo.html @@ -0,0 +1,247 @@ +<HTML> +<HEAD> +<TITLE>fifo_generator_v9_3_vinfo</TITLE> +<META HTTP-EQUIV="Content-Type" CONTENT="text/plain;CHARSET=iso-8859-1"> +</HEAD> +<BODY> +<PRE><FONT face="Arial, Helvetica, sans-serif" size="-1"> +CHANGE LOG for LogiCORE FIFO Generator V9.3 Rev 1 + + Release Date: December 18, 2012 +-------------------------------------------------------------------------------- + +Table of Contents + +1. INTRODUCTION +2. DEVICE SUPPORT +3. NEW FEATURE HISTORY +4. RESOLVED ISSUES +5. KNOWN ISSUES & LIMITATIONS +6. TECHNICAL SUPPORT & FEEDBACK +7. CORE RELEASE HISTORY +8. LEGAL DISCLAIMER + +-------------------------------------------------------------------------------- + + +1. INTRODUCTION + +For installation instructions for this release, please go to: + + <A HREF="http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm">www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm</A> + +For system requirements: + + <A HREF="http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm">www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm</A> + +This file contains release notes for the Xilinx LogiCORE IP FIFO Generator v9.3 Rev 1 +solution. For the latest core updates, see the product page at: + + <A HREF="http://www.xilinx.com/products/ipcenter/FIFO_Generator.htm">www.xilinx.com/products/ipcenter/FIFO_Generator.htm</A> + +................................................................................ + + +2. DEVICE SUPPORT + + + 2.1 ISE + + The following device families are supported by the core for this release. + + + All 7 Series devices + Zynq-7000 devices + All Virtex-6 devices + All Spartan-6 devices + All Virtex-5 devices + All Spartan-3 devices + All Virtex-4 devices + + + 2.2 Vivado + + All 7 Series devices + Zynq-7000 devices + +................................................................................ + + +3. NEW FEATURE HISTORY + + + 3.1 ISE + + - ISE 14.4 software support + + + 3.2 Vivado + + - 2012.4 software support + - IP level constraint for Built-in FIFO reset synchronizer + +................................................................................ + + +4. RESOLVED ISSUES + + + 4.1 ISE + + - N/A + + + 4.2 Vivado + + - N/A + + +................................................................................ + + +5. KNOWN ISSUES & LIMITATIONS + + + 5.1 ISE + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Importing an XCO file alters the XCO configurations + + Description: In the FIFO Generator GUI, after importing an XCO file (Independent clock, distributed memory configuration) + into a Virtex-4 CORE Generator project, if the FIFO type is changed to "Independent Clocks, Built-in FIFO" in page 1, + page 2 does not correctly offer the Read Clock Frequency and Write Clock Frequency options as it should. + + CR 467240 + AR 31379 + + 2. Status flags after the first write to Common Clock Built-in FIFO not guaranteed + + Description: When using Common Clock Built-in FIFO configuration with asynchronous reset for Virtex-6 FPGA, + correct behavior of the FIFO status flags cannot be guaranteed after the first write. + + Workaround: To work around this issue, synchronize the negative edge of reset to RDCLK/WRCLK. + For more information and additional workaround see Answer Record 41099. + + 5.2 Vivado + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Description: When Trying to upgrade to latest version of FIFO Generator from older verions, following error message is seen + ERROR: [Common 17-69] Command failed: invalid command name "puts" and Auto Upgradation does not work. + + CR 665836 + +The most recent information, including known issues, workarounds, and +resolutions for this version is provided in the IP Release Notes User Guide +located at + + <A HREF="http://www.xilinx.com/support/documentation/user_guides/xtp025.pdf">www.xilinx.com/support/documentation/user_guides/xtp025.pdf</A> + +................................................................................ + + +6. TECHNICAL SUPPORT & FEEDBACK + +To obtain technical support, create a WebCase at <A HREF="http://www.xilinx.com/support.">www.xilinx.com/support.</A> +Questions are routed to a team with expertise using this product. + +Xilinx provides technical support for use of this product when used +according to the guidelines described in the core documentation, and +cannot guarantee timing, functionality, or support of this product for +designs that do not follow specified guidelines. + +................................................................................ + + +7. CORE RELEASE HISTORY + +Date By Version Description +================================================================================ +12/18/2012 Xilinx, Inc. 9.3 Rev 1 ISE 14.4 and Vivado 2012.4 support; IP level constraint for Built-in FIFO reset synchronizer +10/16/2012 Xilinx, Inc. 9.3 ISE 14.3 and Vivado 2012.3 support; Clock Enable support for AXI4 Stream FIFO +07/25/2012 Xilinx, Inc. 9.2 ISE 14.2 and Vivado 2012.2 support; Accurate data count support for AXI4 Stream Packet FIFO +04/24/2012 Xilinx, Inc. 9.1 ISE 14.1 and Vivado 2012.1 support; Defense Grade 7 Series and Zynq devices, and Automotive Zynq device support + AXI FIFO data width support up to 4096; Programmable Full/Empty as sideband signals for AXI FIFO +01/18/2012 Xilinx, Inc. 8.4 ISE 13.4 support and Packet FIFO feature addition; Artix-7 Lower Power and Automotive Artix-7 device support +10/19/2011 Xilinx, Inc. 8.3 ISE 13.3 support and QVirtex-6L device support +06/22/2011 Xilinx, Inc. 8.2 ISE 13.2 support and Kintex-7L, Virtex-7L, Artix-7 and Zynq-7000 device support +03/01/2011 Xilinx, Inc. 8.1 ISE 13.1 support and Virtex-7 and Kintex-7 device support; Wiring Logic and Register Slice Support +10/29/2010 Xilinx, Inc. 7.3 ISE 13.0.2 support +09/21/2010 Xilinx, Inc. 7.2 ISE 12.3 support; AXI4 Support +07/30/2010 Xilinx, Inc. 7.1 ISE 13.0.1 support +06/18/2010 Xilinx, Inc. 6.2 ISE 12.2 support +04/19/2010 Xilinx, Inc. 6.1 ISE 12.1 support +12/02/2009 Xilinx, Inc. 5.3 rev 1 ISE 11.4 support; Spartan-6 Low Power and Automotive Spartan-6 Device support +09/16/2009 Xilinx, Inc. 5.3 Update to add 11.3; Virtex-6 Low Power and Virtex-6 HXT Device support +06/24/2009 Xilinx, Inc. 5.2 Update to add 11.2 and Virtex-6 CXT device support +04/24/2009 Xilinx, Inc. 5.1 Update to add 11.1 and Virtex-6 and Spartan-6 device support +09/19/2008 Xilinx, Inc. 4.4 Update to add 10.1 SP3 and Virtex-5 TXT device support and miscellaneous bug fixes +03/24/2008 Xilinx, Inc. 4.3 Update to add 10.1 support and miscellaneous bug fixes +10/03/2007 Xilinx, Inc. 4.2 Support for FWFT for Block RAM and Distributed RAM Common Clock FIFOs +08/08/2007 Xilinx, Inc. 4.1 Update to add 9.2i support; Revised to v4.1; ECC support for block RAM FIFO +04/02/2007 Xilinx, Inc. 3.3 Update to add 9.1i support; Revised to v3.3; Spartan-3A and Spartan-3A DSP support; ECC support +09/21/2006 Xilinx, Inc. 3.2 Revised to v3.2; Spartan-3 and Virtex-4 automotive device support +07/13/2006 Xilinx, Inc. 3.1 Update to add 8.2i support; Revised to v3.1; Virtex-5 support +01/11/2006 Xilinx, Inc. 2.3 Update to add 8.1i support; Revised to v2.3 +08/31/2005 Xilinx, Inc. 2.2 Update to add 7.1i SP4 support; Revised to v2.2 +04/28/2005 Xilinx, Inc. 2.1 Update to add 7.1i SP1 support; Revised to v2.1 +11/04/2004 Xilinx, Inc. 2.0 Update to add 6.3i support; Revised to v2.0 +05/21/2004 Xilinx, Inc. 1.1 Revised to v1.1; Virtex-4 support +04/23/2004 Xilinx, Inc. 1.0 Update to add 6.2i support; First release +================================================================================ + +................................................................................ + + +8. LEGAL DISCLAIMER + +(c) Copyright 2002 - 2012 Xilinx, Inc. All rights reserved. + + This file contains confidential and proprietary information + of Xilinx, Inc. and is protected under U.S. and + international copyright and other intellectual property + laws. + + DISCLAIMER + This disclaimer is not a license and does not grant any + rights to the materials distributed herewith. Except as + otherwise provided in a valid license issued to you by + Xilinx, and to the maximum extent permitted by applicable + law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND + WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES + AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING + BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- + INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and + (2) Xilinx shall not be liable (whether in contract or tort, + including negligence, or under any other theory of + liability) for any loss or damage of any kind or nature + related to, arising under or in connection with these + materials, including for any direct, or any indirect, + special, incidental, or consequential loss or damage + (including loss of data, profits, goodwill, or any type of + loss or damage suffered as a result of any action brought + by a third party) even if such damage or loss was + reasonably foreseeable or Xilinx had been advised of the + possibility of the same. + + CRITICAL APPLICATIONS + Xilinx products are not designed or intended to be fail- + safe, or for use in any application requiring fail-safe + performance, such as life-support or safety devices or + systems, Class III medical devices, nuclear facilities, + applications related to the deployment of airbags, or any + other applications that could lead to death, personal + injury, or severe property or environmental damage + (individually and collectively, "Critical + Applications"). Customer assumes the sole risk and + liability of any use of Xilinx products in Critical + Applications, subject only to applicable laws and + regulations governing limitations on product liability. + + THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS + PART OF THIS FILE AT ALL TIMES. +</FONT> +</PRE> +</BODY> +</HTML> diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/doc/pg057-fifo-generator.pdf b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/doc/pg057-fifo-generator.pdf Binary files differnew file mode 100644 index 000000000..5ec45fbcb --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/doc/pg057-fifo-generator.pdf diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.ucf b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.ucf new file mode 100755 index 000000000..62e5058ab --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.ucf @@ -0,0 +1,56 @@ +################################################################################ +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# +################################################################################ + +# Core Period Constraint. This constraint can be modified, and is +# valid as long as it is met after place and route. + NET "RD_CLK" TNM_NET = "RD_CLK"; + NET "WR_CLK" TNM_NET = "WR_CLK"; + TIMESPEC "TS_RD_CLK" = PERIOD "RD_CLK" 50 MHZ; + TIMESPEC "TS_WR_CLK" = PERIOD "WR_CLK" 50 MHZ; +################################################################################ diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.vhd new file mode 100755 index 000000000..2674443c8 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.vhd @@ -0,0 +1,145 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core - core top file for implementation +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_4k_2clk_exdes.vhd +-- +-- Description: +-- This is the FIFO core wrapper with BUFG instances for clock connections. +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +library unisim; +use unisim.vcomponents.all; + +-------------------------------------------------------------------------------- +-- Entity Declaration +-------------------------------------------------------------------------------- +entity fifo_4k_2clk_exdes is + PORT ( + WR_CLK : IN std_logic; + RD_CLK : IN std_logic; + WR_DATA_COUNT : OUT std_logic_vector(10-1 DOWNTO 0); + RD_DATA_COUNT : OUT std_logic_vector(10-1 DOWNTO 0); + RST : IN std_logic; + WR_EN : IN std_logic; + RD_EN : IN std_logic; + DIN : IN std_logic_vector(72-1 DOWNTO 0); + DOUT : OUT std_logic_vector(72-1 DOWNTO 0); + FULL : OUT std_logic; + EMPTY : OUT std_logic); + +end fifo_4k_2clk_exdes; + + + +architecture xilinx of fifo_4k_2clk_exdes is + + signal wr_clk_i : std_logic; + signal rd_clk_i : std_logic; + + + + component fifo_4k_2clk is + PORT ( + WR_CLK : IN std_logic; + RD_CLK : IN std_logic; + WR_DATA_COUNT : OUT std_logic_vector(10-1 DOWNTO 0); + RD_DATA_COUNT : OUT std_logic_vector(10-1 DOWNTO 0); + RST : IN std_logic; + WR_EN : IN std_logic; + RD_EN : IN std_logic; + DIN : IN std_logic_vector(72-1 DOWNTO 0); + DOUT : OUT std_logic_vector(72-1 DOWNTO 0); + FULL : OUT std_logic; + EMPTY : OUT std_logic); + + end component; + + +begin + + wr_clk_buf: bufg + PORT map( + i => WR_CLK, + o => wr_clk_i + ); + + rd_clk_buf: bufg + PORT map( + i => RD_CLK, + o => rd_clk_i + ); + + + exdes_inst : fifo_4k_2clk + PORT MAP ( + WR_CLK => wr_clk_i, + RD_CLK => rd_clk_i, + WR_DATA_COUNT => wr_data_count, + RD_DATA_COUNT => rd_data_count, + RST => rst, + WR_EN => wr_en, + RD_EN => rd_en, + DIN => din, + DOUT => dout, + FULL => full, + EMPTY => empty); + +end xilinx; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/fifo_generator_v9_3_readme.txt b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/fifo_generator_v9_3_readme.txt new file mode 100644 index 000000000..7853ebde8 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/fifo_generator_v9_3_readme.txt @@ -0,0 +1,236 @@ +CHANGE LOG for LogiCORE FIFO Generator V9.3 Rev 1 + + Release Date: December 18, 2012 +-------------------------------------------------------------------------------- + +Table of Contents + +1. INTRODUCTION +2. DEVICE SUPPORT +3. NEW FEATURE HISTORY +4. RESOLVED ISSUES +5. KNOWN ISSUES & LIMITATIONS +6. TECHNICAL SUPPORT & FEEDBACK +7. CORE RELEASE HISTORY +8. LEGAL DISCLAIMER + +-------------------------------------------------------------------------------- + + +1. INTRODUCTION + +For installation instructions for this release, please go to: + + http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm + +For system requirements: + + http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm + +This file contains release notes for the Xilinx LogiCORE IP FIFO Generator v9.3 Rev 1 +solution. For the latest core updates, see the product page at: + + http://www.xilinx.com/products/ipcenter/FIFO_Generator.htm + +................................................................................ + + +2. DEVICE SUPPORT + + + 2.1 ISE + + The following device families are supported by the core for this release. + + + All 7 Series devices + Zynq-7000 devices + All Virtex-6 devices + All Spartan-6 devices + All Virtex-5 devices + All Spartan-3 devices + All Virtex-4 devices + + + 2.2 Vivado + + All 7 Series devices + Zynq-7000 devices + +................................................................................ + + +3. NEW FEATURE HISTORY + + + 3.1 ISE + + - ISE 14.4 software support + + + 3.2 Vivado + + - 2012.4 software support + - IP level constraint for Built-in FIFO reset synchronizer + +................................................................................ + + +4. RESOLVED ISSUES + + + 4.1 ISE + + - N/A + + + 4.2 Vivado + + - N/A + + +................................................................................ + + +5. KNOWN ISSUES & LIMITATIONS + + + 5.1 ISE + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Importing an XCO file alters the XCO configurations + + Description: In the FIFO Generator GUI, after importing an XCO file (Independent clock, distributed memory configuration) + into a Virtex-4 CORE Generator project, if the FIFO type is changed to "Independent Clocks, Built-in FIFO" in page 1, + page 2 does not correctly offer the Read Clock Frequency and Write Clock Frequency options as it should. + + CR 467240 + AR 31379 + + 2. Status flags after the first write to Common Clock Built-in FIFO not guaranteed + + Description: When using Common Clock Built-in FIFO configuration with asynchronous reset for Virtex-6 FPGA, + correct behavior of the FIFO status flags cannot be guaranteed after the first write. + + Workaround: To work around this issue, synchronize the negative edge of reset to RDCLK/WRCLK. + For more information and additional workaround see Answer Record 41099. + + 5.2 Vivado + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Description: When Trying to upgrade to latest version of FIFO Generator from older verions, following error message is seen + ERROR: [Common 17-69] Command failed: invalid command name "puts" and Auto Upgradation does not work. + + CR 665836 + +The most recent information, including known issues, workarounds, and +resolutions for this version is provided in the IP Release Notes User Guide +located at + + www.xilinx.com/support/documentation/user_guides/xtp025.pdf + +................................................................................ + + +6. TECHNICAL SUPPORT & FEEDBACK + +To obtain technical support, create a WebCase at www.xilinx.com/support. +Questions are routed to a team with expertise using this product. + +Xilinx provides technical support for use of this product when used +according to the guidelines described in the core documentation, and +cannot guarantee timing, functionality, or support of this product for +designs that do not follow specified guidelines. + +................................................................................ + + +7. CORE RELEASE HISTORY + +Date By Version Description +================================================================================ +12/18/2012 Xilinx, Inc. 9.3 Rev 1 ISE 14.4 and Vivado 2012.4 support; IP level constraint for Built-in FIFO reset synchronizer +10/16/2012 Xilinx, Inc. 9.3 ISE 14.3 and Vivado 2012.3 support; Clock Enable support for AXI4 Stream FIFO +07/25/2012 Xilinx, Inc. 9.2 ISE 14.2 and Vivado 2012.2 support; Accurate data count support for AXI4 Stream Packet FIFO +04/24/2012 Xilinx, Inc. 9.1 ISE 14.1 and Vivado 2012.1 support; Defense Grade 7 Series and Zynq devices, and Automotive Zynq device support + AXI FIFO data width support up to 4096; Programmable Full/Empty as sideband signals for AXI FIFO +01/18/2012 Xilinx, Inc. 8.4 ISE 13.4 support and Packet FIFO feature addition; Artix-7 Lower Power and Automotive Artix-7 device support +10/19/2011 Xilinx, Inc. 8.3 ISE 13.3 support and QVirtex-6L device support +06/22/2011 Xilinx, Inc. 8.2 ISE 13.2 support and Kintex-7L, Virtex-7L, Artix-7 and Zynq-7000 device support +03/01/2011 Xilinx, Inc. 8.1 ISE 13.1 support and Virtex-7 and Kintex-7 device support; Wiring Logic and Register Slice Support +10/29/2010 Xilinx, Inc. 7.3 ISE 13.0.2 support +09/21/2010 Xilinx, Inc. 7.2 ISE 12.3 support; AXI4 Support +07/30/2010 Xilinx, Inc. 7.1 ISE 13.0.1 support +06/18/2010 Xilinx, Inc. 6.2 ISE 12.2 support +04/19/2010 Xilinx, Inc. 6.1 ISE 12.1 support +12/02/2009 Xilinx, Inc. 5.3 rev 1 ISE 11.4 support; Spartan-6 Low Power and Automotive Spartan-6 Device support +09/16/2009 Xilinx, Inc. 5.3 Update to add 11.3; Virtex-6 Low Power and Virtex-6 HXT Device support +06/24/2009 Xilinx, Inc. 5.2 Update to add 11.2 and Virtex-6 CXT device support +04/24/2009 Xilinx, Inc. 5.1 Update to add 11.1 and Virtex-6 and Spartan-6 device support +09/19/2008 Xilinx, Inc. 4.4 Update to add 10.1 SP3 and Virtex-5 TXT device support and miscellaneous bug fixes +03/24/2008 Xilinx, Inc. 4.3 Update to add 10.1 support and miscellaneous bug fixes +10/03/2007 Xilinx, Inc. 4.2 Support for FWFT for Block RAM and Distributed RAM Common Clock FIFOs +08/08/2007 Xilinx, Inc. 4.1 Update to add 9.2i support; Revised to v4.1; ECC support for block RAM FIFO +04/02/2007 Xilinx, Inc. 3.3 Update to add 9.1i support; Revised to v3.3; Spartan-3A and Spartan-3A DSP support; ECC support +09/21/2006 Xilinx, Inc. 3.2 Revised to v3.2; Spartan-3 and Virtex-4 automotive device support +07/13/2006 Xilinx, Inc. 3.1 Update to add 8.2i support; Revised to v3.1; Virtex-5 support +01/11/2006 Xilinx, Inc. 2.3 Update to add 8.1i support; Revised to v2.3 +08/31/2005 Xilinx, Inc. 2.2 Update to add 7.1i SP4 support; Revised to v2.2 +04/28/2005 Xilinx, Inc. 2.1 Update to add 7.1i SP1 support; Revised to v2.1 +11/04/2004 Xilinx, Inc. 2.0 Update to add 6.3i support; Revised to v2.0 +05/21/2004 Xilinx, Inc. 1.1 Revised to v1.1; Virtex-4 support +04/23/2004 Xilinx, Inc. 1.0 Update to add 6.2i support; First release +================================================================================ + +................................................................................ + + +8. LEGAL DISCLAIMER + +(c) Copyright 2002 - 2012 Xilinx, Inc. All rights reserved. + + This file contains confidential and proprietary information + of Xilinx, Inc. and is protected under U.S. and + international copyright and other intellectual property + laws. + + DISCLAIMER + This disclaimer is not a license and does not grant any + rights to the materials distributed herewith. Except as + otherwise provided in a valid license issued to you by + Xilinx, and to the maximum extent permitted by applicable + law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND + WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES + AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING + BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- + INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and + (2) Xilinx shall not be liable (whether in contract or tort, + including negligence, or under any other theory of + liability) for any loss or damage of any kind or nature + related to, arising under or in connection with these + materials, including for any direct, or any indirect, + special, incidental, or consequential loss or damage + (including loss of data, profits, goodwill, or any type of + loss or damage suffered as a result of any action brought + by a third party) even if such damage or loss was + reasonably foreseeable or Xilinx had been advised of the + possibility of the same. + + CRITICAL APPLICATIONS + Xilinx products are not designed or intended to be fail- + safe, or for use in any application requiring fail-safe + performance, such as life-support or safety devices or + systems, Class III medical devices, nuclear facilities, + applications related to the deployment of airbags, or any + other applications that could lead to death, personal + injury, or severe property or environmental damage + (individually and collectively, "Critical + Applications"). Customer assumes the sole risk and + liability of any use of Xilinx products in Critical + Applications, subject only to applicable laws and + regulations governing limitations on product liability. + + THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS + PART OF THIS FILE AT ALL TIMES. diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement.bat new file mode 100755 index 000000000..e6d9fb0f6 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement.bat @@ -0,0 +1,88 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +rem Clean up the results directory +rmdir /S /Q results +mkdir results + +rem Synthesize the VHDL Wrapper Files + +#Synthesize the Wrapper Files + +echo 'Synthesizing example design with XST'; +xst -ifn xst.scr +copy fifo_4k_2clk_exdes.ngc .\results\ + + +rem Copy the netlist generated by Coregen +echo 'Copying files from the netlist directory to the results directory' +copy ..\..\fifo_4k_2clk.ngc results\ + + +rem Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +copy ..\example_design\fifo_4k_2clk_exdes.ucf results\ + +cd results + +echo 'Running ngdbuild' + +ngdbuild -p xc6slx75-csg484-3 -sd ../../../ fifo_4k_2clk_exdes + +echo 'Running map' +map fifo_4k_2clk_exdes -o mapped.ncd + +echo 'Running par' +par mapped.ncd routed.ncd + +echo 'Running trce' +trce -e 10 routed.ncd mapped.pcf -o routed + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level Verilog model' +netgen -ofmt verilog -sim -tm fifo_4k_2clk_exdes -pcf mapped.pcf -w -sdf_anno false routed.ncd routed.v diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement.sh new file mode 100755 index 000000000..0b56fa62c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement.sh @@ -0,0 +1,87 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. + +# Clean up the results directory +rm -rf results +mkdir results + +#Synthesize the Wrapper Files + +echo 'Synthesizing example design with XST'; +xst -ifn xst.scr +cp fifo_4k_2clk_exdes.ngc ./results/ + + +# Copy the netlist generated by Coregen +echo 'Copying files from the netlist directory to the results directory' +cp ../../fifo_4k_2clk.ngc results/ + +# Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +cp ../example_design/fifo_4k_2clk_exdes.ucf results/ + +cd results + +echo 'Running ngdbuild' + +ngdbuild -p xc6slx75-csg484-3 -sd ../../../ fifo_4k_2clk_exdes + +echo 'Running map' +map fifo_4k_2clk_exdes -o mapped.ncd + +echo 'Running par' +par mapped.ncd routed.ncd + +echo 'Running trce' +trce -e 10 routed.ncd mapped.pcf -o routed + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level Verilog model' +netgen -ofmt verilog -sim -tm fifo_4k_2clk_exdes -pcf mapped.pcf -w -sdf_anno false routed.ncd routed.v + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement_synplify.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement_synplify.bat new file mode 100755 index 000000000..e0e613a94 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement_synplify.bat @@ -0,0 +1,87 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +rem Clean up the results directory +rmdir /S /Q results +mkdir results + +rem Synthesize the VHDL Wrapper Files + +#Synthesize the Wrapper Files + +echo 'Synthesizing example design with Synplify' +synplify_pro -batch synplify.prj -licensetype synplifypro_xilinx + + +rem Copy the netlist generated by Coregen +echo 'Copying files from the netlist directory to the results directory' +copy ..\..\fifo_4k_2clk.ngc results\ + + +rem Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +copy ..\example_design\fifo_4k_2clk_exdes.ucf results\ + +cd results + +echo 'Running ngdbuild' + +ngdbuild -p xc6slx75-csg484-3 -sd ../../../ fifo_4k_2clk_exdes + +echo 'Running map' +map fifo_4k_2clk_exdes -o mapped.ncd + +echo 'Running par' +par mapped.ncd routed.ncd + +echo 'Running trce' +trce -e 10 routed.ncd mapped.pcf -o routed + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level Verilog model' +netgen -ofmt verilog -sim -tm fifo_4k_2clk_exdes -pcf mapped.pcf -w -sdf_anno false routed.ncd routed.v diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement_synplify.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement_synplify.sh new file mode 100755 index 000000000..fa07eb47d --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/implement_synplify.sh @@ -0,0 +1,86 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. + +# Clean up the results directory +rm -rf results +mkdir results + +#Synthesize the Wrapper Files + +echo 'Synthesizing example design with Synplify' +synplify_pro -batch synplify.prj -licensetype synplifypro_xilinx + + +# Copy the netlist generated by Coregen +echo 'Copying files from the netlist directory to the results directory' +cp ../../fifo_4k_2clk.ngc results/ + +# Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +cp ../example_design/fifo_4k_2clk_exdes.ucf results/ + +cd results + +echo 'Running ngdbuild' + +ngdbuild -p xc6slx75-csg484-3 -sd ../../../ fifo_4k_2clk_exdes + +echo 'Running map' +map fifo_4k_2clk_exdes -o mapped.ncd + +echo 'Running par' +par mapped.ncd routed.ncd + +echo 'Running trce' +trce -e 10 routed.ncd mapped.pcf -o routed + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level Verilog model' +netgen -ofmt verilog -sim -tm fifo_4k_2clk_exdes -pcf mapped.pcf -w -sdf_anno false routed.ncd routed.v + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/planAhead_ise.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/planAhead_ise.bat new file mode 100755 index 000000000..a48fea790 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/planAhead_ise.bat @@ -0,0 +1,54 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +rem ----------------------------------------------------------------------------- +rem Script to synthesize and implement the Coregen FIFO Generator +rem ----------------------------------------------------------------------------- +rmdir /S /Q results +mkdir results +cd results +copy ..\..\..\fifo_4k_2clk.ngc . +planAhead -mode batch -source ..\planAhead_ise.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/planAhead_ise.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/planAhead_ise.sh new file mode 100755 index 000000000..7171a0e5e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/planAhead_ise.sh @@ -0,0 +1,55 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. + +#----------------------------------------------------------------------------- +# Script to synthesize and implement the Coregen FIFO Generator +#----------------------------------------------------------------------------- +rm -rf results +mkdir results +cd results +cp ../../../fifo_4k_2clk.ngc . +planAhead -mode batch -source ../planAhead_ise.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/planAhead_ise.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/planAhead_ise.tcl new file mode 100755 index 000000000..98c6556e8 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/planAhead_ise.tcl @@ -0,0 +1,67 @@ +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. + + +set device xc6slx75csg484-3 +set projName fifo_4k_2clk +set design fifo_4k_2clk +set projDir [file dirname [info script]] +create_project $projName $projDir/results/$projName -part $device -force +set_property design_mode RTL [current_fileset -srcset] +set top_module fifo_4k_2clk_exdes +add_files -norecurse {../../example_design/fifo_4k_2clk_exdes.vhd} +add_files -norecurse {./fifo_4k_2clk.ngc} +import_files -fileset [get_filesets constrs_1] -force -norecurse {../../example_design/fifo_4k_2clk_exdes.xdc} +set_property top fifo_4k_2clk_exdes [get_property srcset [current_run]] +synth_design +opt_design +place_design +route_design +write_sdf -rename_top_module fifo_4k_2clk_exdes -file routed.sdf +write_verilog -nolib -mode timesim -sdf_anno false -rename_top_module fifo_4k_2clk_exdes routed.v +report_timing -nworst 30 -path_type full -file routed.twr +report_drc -file report.drc +write_bitstream -bitgen_options {-g UnconstrainedPins:Allow} diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/xst.prj b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/xst.prj new file mode 100755 index 000000000..573a1716f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/xst.prj @@ -0,0 +1 @@ +work ../example_design/fifo_4k_2clk_exdes.vhd diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/xst.scr b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/xst.scr new file mode 100755 index 000000000..11c7d5a89 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/implement/xst.scr @@ -0,0 +1,13 @@ +run +-ifmt VHDL +-ent fifo_4k_2clk_exdes +-p xc6slx75-csg484-3 +-ifn xst.prj +-write_timing_constraints No +-iobuf YES +-max_fanout 100 +-ofn fifo_4k_2clk_exdes +-ofmt NGC +-bus_delimiter () +-hierarchy_separator / +-case Maintain diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_dgen.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_dgen.vhd new file mode 100755 index 000000000..d14bb7a51 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_dgen.vhd @@ -0,0 +1,123 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_4k_2clk_dgen.vhd +-- +-- Description: +-- Used for write interface stimulus generation +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.all; +USE IEEE.std_logic_arith.all; +USE IEEE.std_logic_misc.all; + +LIBRARY work; +USE work.fifo_4k_2clk_pkg.ALL; + +ENTITY fifo_4k_2clk_dgen IS + GENERIC ( + C_DIN_WIDTH : INTEGER := 32; + C_DOUT_WIDTH : INTEGER := 32; + C_CH_TYPE : INTEGER := 0; + TB_SEED : INTEGER := 2 + ); + PORT ( + RESET : IN STD_LOGIC; + WR_CLK : IN STD_LOGIC; + PRC_WR_EN : IN STD_LOGIC; + FULL : IN STD_LOGIC; + WR_EN : OUT STD_LOGIC; + WR_DATA : OUT STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0) + ); +END ENTITY; + + +ARCHITECTURE fg_dg_arch OF fifo_4k_2clk_dgen IS + + CONSTANT C_DATA_WIDTH : INTEGER := if_then_else(C_DIN_WIDTH > C_DOUT_WIDTH,C_DIN_WIDTH,C_DOUT_WIDTH); + CONSTANT LOOP_COUNT : INTEGER := divroundup(C_DATA_WIDTH,8); + + SIGNAL pr_w_en : STD_LOGIC := '0'; + SIGNAL rand_num : STD_LOGIC_VECTOR(8*LOOP_COUNT-1 DOWNTO 0); + SIGNAL wr_data_i : STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0); + BEGIN + + WR_EN <= PRC_WR_EN ; + WR_DATA <= wr_data_i AFTER 100 ns; + + ---------------------------------------------- + -- Generation of DATA + ---------------------------------------------- + gen_stim:FOR N IN LOOP_COUNT-1 DOWNTO 0 GENERATE + rd_gen_inst1:fifo_4k_2clk_rng + GENERIC MAP( + WIDTH => 8, + SEED => TB_SEED+N + ) + PORT MAP( + CLK => WR_CLK, + RESET => RESET, + RANDOM_NUM => rand_num(8*(N+1)-1 downto 8*N), + ENABLE => pr_w_en + ); + END GENERATE; + + pr_w_en <= PRC_WR_EN AND NOT FULL; + wr_data_i <= rand_num(C_DIN_WIDTH-1 DOWNTO 0); + + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_dverif.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_dverif.vhd new file mode 100755 index 000000000..0a7c2aa87 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_dverif.vhd @@ -0,0 +1,150 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_4k_2clk_dverif.vhd +-- +-- Description: +-- Used for FIFO read interface stimulus generation and data checking +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.all; +USE IEEE.std_logic_arith.all; +USE IEEE.std_logic_misc.all; + +LIBRARY work; +USE work.fifo_4k_2clk_pkg.ALL; + +ENTITY fifo_4k_2clk_dverif IS + GENERIC( + C_DIN_WIDTH : INTEGER := 0; + C_DOUT_WIDTH : INTEGER := 0; + C_USE_EMBEDDED_REG : INTEGER := 0; + C_CH_TYPE : INTEGER := 0; + TB_SEED : INTEGER := 2 + ); + PORT( + RESET : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + PRC_RD_EN : IN STD_LOGIC; + EMPTY : IN STD_LOGIC; + DATA_OUT : IN STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0); + RD_EN : OUT STD_LOGIC; + DOUT_CHK : OUT STD_LOGIC + ); +END ENTITY; + + +ARCHITECTURE fg_dv_arch OF fifo_4k_2clk_dverif IS + + CONSTANT C_DATA_WIDTH : INTEGER := if_then_else(C_DIN_WIDTH > C_DOUT_WIDTH,C_DIN_WIDTH,C_DOUT_WIDTH); + CONSTANT EXTRA_WIDTH : INTEGER := if_then_else(C_CH_TYPE = 2,1,0); + CONSTANT LOOP_COUNT : INTEGER := divroundup(C_DATA_WIDTH+EXTRA_WIDTH,8); + + SIGNAL expected_dout : STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0) := (OTHERS => '0'); + SIGNAL data_chk : STD_LOGIC := '1'; + SIGNAL rand_num : STD_LOGIC_VECTOR(8*LOOP_COUNT-1 downto 0); + SIGNAL rd_en_i : STD_LOGIC := '0'; + SIGNAL pr_r_en : STD_LOGIC := '0'; + SIGNAL rd_en_d1 : STD_LOGIC := '1'; +BEGIN + + + DOUT_CHK <= data_chk; + RD_EN <= rd_en_i; + rd_en_i <= PRC_RD_EN; + rd_en_d1 <= '1'; + + + data_fifo_chk:IF(C_CH_TYPE /=2) GENERATE + ------------------------------------------------------- + -- Expected data generation and checking for data_fifo + ------------------------------------------------------- + + pr_r_en <= rd_en_i AND NOT EMPTY AND rd_en_d1; + expected_dout <= rand_num(C_DOUT_WIDTH-1 DOWNTO 0); + + gen_num:FOR N IN LOOP_COUNT-1 DOWNTO 0 GENERATE + rd_gen_inst2:fifo_4k_2clk_rng + GENERIC MAP( + WIDTH => 8, + SEED => TB_SEED+N + ) + PORT MAP( + CLK => RD_CLK, + RESET => RESET, + RANDOM_NUM => rand_num(8*(N+1)-1 downto 8*N), + ENABLE => pr_r_en + ); + END GENERATE; + + PROCESS (RD_CLK,RESET) + BEGIN + IF(RESET = '1') THEN + data_chk <= '0'; + ELSIF (RD_CLK'event AND RD_CLK='1') THEN + IF(EMPTY = '0') THEN + IF(DATA_OUT = expected_dout) THEN + data_chk <= '0'; + ELSE + data_chk <= '1'; + END IF; + END IF; + END IF; + END PROCESS; + END GENERATE data_fifo_chk; + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_pctrl.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_pctrl.vhd new file mode 100755 index 000000000..fa32e4781 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_pctrl.vhd @@ -0,0 +1,541 @@ + +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_4k_2clk_pctrl.vhd +-- +-- Description: +-- Used for protocol control on write and read interface stimulus and status generation +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.all; +USE IEEE.std_logic_arith.all; +USE IEEE.std_logic_misc.all; + +LIBRARY work; +USE work.fifo_4k_2clk_pkg.ALL; + +ENTITY fifo_4k_2clk_pctrl IS + GENERIC( + AXI_CHANNEL : STRING :="NONE"; + C_APPLICATION_TYPE : INTEGER := 0; + C_DIN_WIDTH : INTEGER := 0; + C_DOUT_WIDTH : INTEGER := 0; + C_WR_PNTR_WIDTH : INTEGER := 0; + C_RD_PNTR_WIDTH : INTEGER := 0; + C_CH_TYPE : INTEGER := 0; + FREEZEON_ERROR : INTEGER := 0; + TB_STOP_CNT : INTEGER := 2; + TB_SEED : INTEGER := 2 + ); + PORT( + RESET_WR : IN STD_LOGIC; + RESET_RD : IN STD_LOGIC; + WR_CLK : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + FULL : IN STD_LOGIC; + EMPTY : IN STD_LOGIC; + ALMOST_FULL : IN STD_LOGIC; + ALMOST_EMPTY : IN STD_LOGIC; + DATA_IN : IN STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0); + DATA_OUT : IN STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0); + DOUT_CHK : IN STD_LOGIC; + PRC_WR_EN : OUT STD_LOGIC; + PRC_RD_EN : OUT STD_LOGIC; + RESET_EN : OUT STD_LOGIC; + SIM_DONE : OUT STD_LOGIC; + STATUS : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) + ); +END ENTITY; + + +ARCHITECTURE fg_pc_arch OF fifo_4k_2clk_pctrl IS + + CONSTANT C_DATA_WIDTH : INTEGER := if_then_else(C_DIN_WIDTH > C_DOUT_WIDTH,C_DIN_WIDTH,C_DOUT_WIDTH); + CONSTANT LOOP_COUNT : INTEGER := divroundup(C_DATA_WIDTH,8); + CONSTANT D_WIDTH_DIFF : INTEGER := log2roundup(C_DOUT_WIDTH/C_DIN_WIDTH); + + SIGNAL data_chk_i : STD_LOGIC := if_then_else(C_CH_TYPE /= 2,'1','0'); + SIGNAL full_chk_i : STD_LOGIC := if_then_else(C_CH_TYPE /= 2,'1','0'); + SIGNAL empty_chk_i : STD_LOGIC := if_then_else(C_CH_TYPE /= 2,'1','0'); + SIGNAL status_i : STD_LOGIC_VECTOR(4 DOWNTO 0):= (OTHERS => '0'); + SIGNAL status_d1_i : STD_LOGIC_VECTOR(4 DOWNTO 0):= (OTHERS => '0'); + SIGNAL wr_en_gen : STD_LOGIC_VECTOR(7 DOWNTO 0):= (OTHERS => '0'); + SIGNAL rd_en_gen : STD_LOGIC_VECTOR(7 DOWNTO 0):= (OTHERS => '0'); + SIGNAL wr_cntr : STD_LOGIC_VECTOR(C_WR_PNTR_WIDTH-2 DOWNTO 0) := (OTHERS => '0'); + SIGNAL full_as_timeout : STD_LOGIC_VECTOR(C_WR_PNTR_WIDTH DOWNTO 0) := (OTHERS => '0'); + SIGNAL full_ds_timeout : STD_LOGIC_VECTOR(C_WR_PNTR_WIDTH DOWNTO 0) := (OTHERS => '0'); + SIGNAL rd_cntr : STD_LOGIC_VECTOR(C_RD_PNTR_WIDTH-2 DOWNTO 0) := (OTHERS => '0'); + SIGNAL empty_as_timeout : STD_LOGIC_VECTOR(C_RD_PNTR_WIDTH DOWNTO 0) := (OTHERS => '0'); + SIGNAL empty_ds_timeout : STD_LOGIC_VECTOR(C_RD_PNTR_WIDTH DOWNTO 0):= (OTHERS => '0'); + SIGNAL wr_en_i : STD_LOGIC := '0'; + SIGNAL rd_en_i : STD_LOGIC := '0'; + SIGNAL state : STD_LOGIC := '0'; + SIGNAL wr_control : STD_LOGIC := '0'; + SIGNAL rd_control : STD_LOGIC := '0'; + SIGNAL stop_on_err : STD_LOGIC := '0'; + SIGNAL sim_stop_cntr : STD_LOGIC_VECTOR(7 DOWNTO 0):= conv_std_logic_vector(if_then_else(C_CH_TYPE=2,64,TB_STOP_CNT),8); + SIGNAL sim_done_i : STD_LOGIC := '0'; + SIGNAL rdw_gt_wrw : STD_LOGIC_VECTOR(D_WIDTH_DIFF-1 DOWNTO 0) := (OTHERS => '1'); + SIGNAL wrw_gt_rdw : STD_LOGIC_VECTOR(D_WIDTH_DIFF-1 DOWNTO 0) := (OTHERS => '1'); + SIGNAL rd_activ_cont : STD_LOGIC_VECTOR(25 downto 0):= (OTHERS => '0'); + SIGNAL prc_we_i : STD_LOGIC := '0'; + SIGNAL prc_re_i : STD_LOGIC := '0'; + SIGNAL reset_en_i : STD_LOGIC := '0'; + SIGNAL sim_done_d1 : STD_LOGIC := '0'; + SIGNAL sim_done_wr1 : STD_LOGIC := '0'; + SIGNAL sim_done_wr2 : STD_LOGIC := '0'; + SIGNAL empty_d1 : STD_LOGIC := '0'; + SIGNAL empty_wr_dom1 : STD_LOGIC := '0'; + SIGNAL state_d1 : STD_LOGIC := '0'; + SIGNAL state_rd_dom1 : STD_LOGIC := '0'; + SIGNAL rd_en_d1 : STD_LOGIC := '0'; + SIGNAL rd_en_wr1 : STD_LOGIC := '0'; + SIGNAL wr_en_d1 : STD_LOGIC := '0'; + SIGNAL wr_en_rd1 : STD_LOGIC := '0'; + SIGNAL full_chk_d1 : STD_LOGIC := '0'; + SIGNAL full_chk_rd1 : STD_LOGIC := '0'; + SIGNAL empty_wr_dom2 : STD_LOGIC := '0'; + + SIGNAL state_rd_dom2 : STD_LOGIC := '0'; + SIGNAL state_rd_dom3 : STD_LOGIC := '0'; + SIGNAL rd_en_wr2 : STD_LOGIC := '0'; + SIGNAL wr_en_rd2 : STD_LOGIC := '0'; + SIGNAL full_chk_rd2 : STD_LOGIC := '0'; + SIGNAL reset_en_d1 : STD_LOGIC := '0'; + SIGNAL reset_en_rd1 : STD_LOGIC := '0'; + SIGNAL reset_en_rd2 : STD_LOGIC := '0'; + + SIGNAL data_chk_wr_d1 : STD_LOGIC := '0'; + SIGNAL data_chk_rd1 : STD_LOGIC := '0'; + SIGNAL data_chk_rd2 : STD_LOGIC := '0'; + SIGNAL post_rst_dly_wr : STD_LOGIC_VECTOR(4 DOWNTO 0) := (OTHERS => '1'); + SIGNAL post_rst_dly_rd : STD_LOGIC_VECTOR(4 DOWNTO 0) := (OTHERS => '1'); +BEGIN + status_i <= data_chk_i & full_chk_rd2 & empty_chk_i & '0' & '0'; + STATUS <= status_d1_i & '0' & '0' & rd_activ_cont(rd_activ_cont'high); + + prc_we_i <= wr_en_i WHEN sim_done_wr2 = '0' ELSE '0'; + prc_re_i <= rd_en_i WHEN sim_done_i = '0' ELSE '0'; + + SIM_DONE <= sim_done_i; + rdw_gt_wrw <= (OTHERS => '1'); + wrw_gt_rdw <= (OTHERS => '1'); + + PROCESS(RD_CLK) + BEGIN + IF (RD_CLK'event AND RD_CLK='1') THEN + IF(prc_re_i = '1') THEN + rd_activ_cont <= rd_activ_cont + "1"; + END IF; + END IF; + END PROCESS; + + + PROCESS(sim_done_i) + BEGIN + assert sim_done_i = '0' + report "Simulation Complete for:" & AXI_CHANNEL + severity note; + END PROCESS; + +----------------------------------------------------- +-- SIM_DONE SIGNAL GENERATION +----------------------------------------------------- +PROCESS (RD_CLK,RESET_RD) +BEGIN + IF(RESET_RD = '1') THEN + --sim_done_i <= '0'; + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF((OR_REDUCE(sim_stop_cntr) = '0' AND TB_STOP_CNT /= 0) OR stop_on_err = '1') THEN + sim_done_i <= '1'; + END IF; + END IF; +END PROCESS; + + -- TB Timeout/Stop + fifo_tb_stop_run:IF(TB_STOP_CNT /= 0) GENERATE + PROCESS (RD_CLK) + BEGIN + IF (RD_CLK'event AND RD_CLK='1') THEN + IF(state_rd_dom2 = '0' AND state_rd_dom3 = '1') THEN + sim_stop_cntr <= sim_stop_cntr - "1"; + END IF; + END IF; + END PROCESS; + END GENERATE fifo_tb_stop_run; + + + -- Stop when error found + PROCESS (RD_CLK) + BEGIN + IF (RD_CLK'event AND RD_CLK='1') THEN + IF(sim_done_i = '0') THEN + status_d1_i <= status_i OR status_d1_i; + END IF; + IF(FREEZEON_ERROR = 1 AND status_i /= "0") THEN + stop_on_err <= '1'; + END IF; + END IF; + END PROCESS; + ----------------------------------------------------- + + ----------------------------------------------------- + -- CHECKS FOR FIFO + ----------------------------------------------------- + + + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + post_rst_dly_rd <= (OTHERS => '1'); + ELSIF (RD_CLK'event AND RD_CLK='1') THEN + post_rst_dly_rd <= post_rst_dly_rd-post_rst_dly_rd(4); + END IF; + END PROCESS; + + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + post_rst_dly_wr <= (OTHERS => '1'); + ELSIF (WR_CLK'event AND WR_CLK='1') THEN + post_rst_dly_wr <= post_rst_dly_wr-post_rst_dly_wr(4); + END IF; + END PROCESS; + + + -- FULL de-assert Counter + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + full_ds_timeout <= (OTHERS => '0'); + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + IF(state = '1') THEN + IF(rd_en_wr2 = '1' AND wr_en_i = '0' AND FULL = '1' AND AND_REDUCE(wrw_gt_rdw) = '1') THEN + full_ds_timeout <= full_ds_timeout + '1'; + END IF; + ELSE + full_ds_timeout <= (OTHERS => '0'); + END IF; + END IF; + END PROCESS; + + + -- EMPTY deassert counter + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + empty_ds_timeout <= (OTHERS => '0'); + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF(state = '0') THEN + IF(wr_en_rd2 = '1' AND rd_en_i = '0' AND EMPTY = '1' AND AND_REDUCE(rdw_gt_wrw) = '1') THEN + empty_ds_timeout <= empty_ds_timeout + '1'; + END IF; + ELSE + empty_ds_timeout <= (OTHERS => '0'); + END IF; + END IF; + END PROCESS; + + -- Full check signal generation + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + full_chk_i <= '0'; + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + IF(C_APPLICATION_TYPE = 1 AND (AXI_CHANNEL = "WACH" OR AXI_CHANNEL = "RACH" OR AXI_CHANNEL = "AXI4_Stream")) THEN + full_chk_i <= '0'; + ELSE + full_chk_i <= AND_REDUCE(full_as_timeout) OR + AND_REDUCE(full_ds_timeout); + END IF; + END IF; + END PROCESS; + + -- Empty checks + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + empty_chk_i <= '0'; + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF(C_APPLICATION_TYPE = 1 AND (AXI_CHANNEL = "WACH" OR AXI_CHANNEL = "RACH" OR AXI_CHANNEL = "AXI4_Stream")) THEN + empty_chk_i <= '0'; + ELSE + empty_chk_i <= AND_REDUCE(empty_as_timeout) OR + AND_REDUCE(empty_ds_timeout); + END IF; + END IF; + END PROCESS; + + fifo_d_chk:IF(C_CH_TYPE /= 2) GENERATE + PRC_WR_EN <= prc_we_i AFTER 100 ns; + PRC_RD_EN <= prc_re_i AFTER 50 ns; + data_chk_i <= dout_chk; + END GENERATE fifo_d_chk; + ----------------------------------------------------- + + + ----------------------------------------------------- + -- SYNCHRONIZERS B/W WRITE AND READ DOMAINS + ----------------------------------------------------- + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + empty_wr_dom1 <= '1'; + empty_wr_dom2 <= '1'; + state_d1 <= '0'; + wr_en_d1 <= '0'; + rd_en_wr1 <= '0'; + rd_en_wr2 <= '0'; + full_chk_d1 <= '0'; + reset_en_d1 <= '0'; + sim_done_wr1 <= '0'; + sim_done_wr2 <= '0'; + ELSIF (WR_CLK'event AND WR_CLK='1') THEN + sim_done_wr1 <= sim_done_d1; + sim_done_wr2 <= sim_done_wr1; + reset_en_d1 <= reset_en_i; + state_d1 <= state; + empty_wr_dom1 <= empty_d1; + empty_wr_dom2 <= empty_wr_dom1; + wr_en_d1 <= wr_en_i; + rd_en_wr1 <= rd_en_d1; + rd_en_wr2 <= rd_en_wr1; + full_chk_d1 <= full_chk_i; + END IF; + END PROCESS; + + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + empty_d1 <= '1'; + state_rd_dom1 <= '0'; + state_rd_dom2 <= '0'; + state_rd_dom3 <= '0'; + wr_en_rd1 <= '0'; + wr_en_rd2 <= '0'; + rd_en_d1 <= '0'; + full_chk_rd1 <= '0'; + full_chk_rd2 <= '0'; + reset_en_rd1 <= '0'; + reset_en_rd2 <= '0'; + sim_done_d1 <= '0'; + ELSIF (RD_CLK'event AND RD_CLK='1') THEN + sim_done_d1 <= sim_done_i; + reset_en_rd1 <= reset_en_d1; + reset_en_rd2 <= reset_en_rd1; + empty_d1 <= EMPTY; + rd_en_d1 <= rd_en_i; + state_rd_dom1 <= state_d1; + state_rd_dom2 <= state_rd_dom1; + state_rd_dom3 <= state_rd_dom2; + wr_en_rd1 <= wr_en_d1; + wr_en_rd2 <= wr_en_rd1; + full_chk_rd1 <= full_chk_d1; + full_chk_rd2 <= full_chk_rd1; + END IF; + END PROCESS; + + RESET_EN <= reset_en_rd2; + + + data_fifo_en:IF(C_CH_TYPE /= 2) GENERATE + ----------------------------------------------------- + -- WR_EN GENERATION + ----------------------------------------------------- + gen_rand_wr_en:fifo_4k_2clk_rng + GENERIC MAP( + WIDTH => 8, + SEED => TB_SEED+1 + ) + PORT MAP( + CLK => WR_CLK, + RESET => RESET_WR, + RANDOM_NUM => wr_en_gen, + ENABLE => '1' + ); + + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + wr_en_i <= '0'; + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + IF(state = '1') THEN + wr_en_i <= wr_en_gen(0) AND wr_en_gen(7) AND wr_en_gen(2) AND wr_control; + ELSE + wr_en_i <= (wr_en_gen(3) OR wr_en_gen(4) OR wr_en_gen(2)) AND (NOT post_rst_dly_wr(4)); + END IF; + END IF; + END PROCESS; + + ----------------------------------------------------- + -- WR_EN CONTROL + ----------------------------------------------------- + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + wr_cntr <= (OTHERS => '0'); + wr_control <= '1'; + full_as_timeout <= (OTHERS => '0'); + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + IF(state = '1') THEN + IF(wr_en_i = '1') THEN + wr_cntr <= wr_cntr + "1"; + END IF; + full_as_timeout <= (OTHERS => '0'); + ELSE + wr_cntr <= (OTHERS => '0'); + IF(rd_en_wr2 = '0') THEN + IF(wr_en_i = '1') THEN + full_as_timeout <= full_as_timeout + "1"; + END IF; + ELSE + full_as_timeout <= (OTHERS => '0'); + END IF; + END IF; + + wr_control <= NOT wr_cntr(wr_cntr'high); + + END IF; + END PROCESS; + + ----------------------------------------------------- + -- RD_EN GENERATION + ----------------------------------------------------- + gen_rand_rd_en:fifo_4k_2clk_rng + GENERIC MAP( + WIDTH => 8, + SEED => TB_SEED + ) + PORT MAP( + CLK => RD_CLK, + RESET => RESET_RD, + RANDOM_NUM => rd_en_gen, + ENABLE => '1' + ); + + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + rd_en_i <= '0'; + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF(state_rd_dom2 = '0') THEN + rd_en_i <= rd_en_gen(1) AND rd_en_gen(5) AND rd_en_gen(3) AND rd_control AND (NOT post_rst_dly_rd(4)); + ELSE + rd_en_i <= rd_en_gen(0) OR rd_en_gen(6); + END IF; + END IF; + END PROCESS; + + ----------------------------------------------------- + -- RD_EN CONTROL + ----------------------------------------------------- + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + rd_cntr <= (OTHERS => '0'); + rd_control <= '1'; + empty_as_timeout <= (OTHERS => '0'); + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF(state_rd_dom2 = '0') THEN + IF(rd_en_i = '1') THEN + rd_cntr <= rd_cntr + "1"; + END IF; + empty_as_timeout <= (OTHERS => '0'); + ELSE + rd_cntr <= (OTHERS => '0'); + IF(wr_en_rd2 = '0') THEN + IF(rd_en_i = '1') THEN + empty_as_timeout <= empty_as_timeout + "1"; + END IF; + ELSE + empty_as_timeout <= (OTHERS => '0'); + END IF; + END IF; + + rd_control <= NOT rd_cntr(rd_cntr'high); + + END IF; + END PROCESS; + + ----------------------------------------------------- + -- STIMULUS CONTROL + ----------------------------------------------------- + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + state <= '0'; + reset_en_i <= '0'; + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + CASE state IS + WHEN '0' => + IF(FULL = '1' AND empty_wr_dom2 = '0') THEN + state <= '1'; + reset_en_i <= '0'; + END IF; + WHEN '1' => + IF(empty_wr_dom2 = '1' AND FULL = '0') THEN + state <= '0'; + reset_en_i <= '1'; + END IF; + WHEN OTHERS => state <= state; + END CASE; + END IF; + END PROCESS; + END GENERATE data_fifo_en; + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_pkg.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_pkg.vhd new file mode 100755 index 000000000..46d4ac9cf --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_pkg.vhd @@ -0,0 +1,350 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_4k_2clk_pkg.vhd +-- +-- Description: +-- This is the demo testbench package file for FIFO Generator core. +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY IEEE; +USE IEEE.STD_LOGIC_1164.ALL; +USE ieee.std_logic_arith.ALL; +USE IEEE.STD_LOGIC_UNSIGNED.ALL; + +PACKAGE fifo_4k_2clk_pkg IS + + FUNCTION divroundup ( + data_value : INTEGER; + divisor : INTEGER) + RETURN INTEGER; + ------------------------ + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : INTEGER; + false_case : INTEGER) + RETURN INTEGER; + ------------------------ + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : STD_LOGIC; + false_case : STD_LOGIC) + RETURN STD_LOGIC; + ------------------------ + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : TIME; + false_case : TIME) + RETURN TIME; + ------------------------ + FUNCTION log2roundup ( + data_value : INTEGER) + RETURN INTEGER; + ------------------------ + FUNCTION hexstr_to_std_logic_vec( + arg1 : string; + size : integer ) + RETURN std_logic_vector; + ------------------------ + COMPONENT fifo_4k_2clk_rng IS + GENERIC (WIDTH : integer := 8; + SEED : integer := 3); + PORT ( + CLK : IN STD_LOGIC; + RESET : IN STD_LOGIC; + ENABLE : IN STD_LOGIC; + RANDOM_NUM : OUT STD_LOGIC_VECTOR (WIDTH-1 DOWNTO 0) + ); + END COMPONENT; + ------------------------ + + COMPONENT fifo_4k_2clk_dgen IS + GENERIC ( + C_DIN_WIDTH : INTEGER := 32; + C_DOUT_WIDTH : INTEGER := 32; + C_CH_TYPE : INTEGER := 0; + TB_SEED : INTEGER := 2 + ); + PORT ( + RESET : IN STD_LOGIC; + WR_CLK : IN STD_LOGIC; + PRC_WR_EN : IN STD_LOGIC; + FULL : IN STD_LOGIC; + WR_EN : OUT STD_LOGIC; + WR_DATA : OUT STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0) + ); + END COMPONENT; + ------------------------ + + COMPONENT fifo_4k_2clk_dverif IS + GENERIC( + C_DIN_WIDTH : INTEGER := 0; + C_DOUT_WIDTH : INTEGER := 0; + C_USE_EMBEDDED_REG : INTEGER := 0; + C_CH_TYPE : INTEGER := 0; + TB_SEED : INTEGER := 2 + ); + PORT( + RESET : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + PRC_RD_EN : IN STD_LOGIC; + EMPTY : IN STD_LOGIC; + DATA_OUT : IN STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0); + RD_EN : OUT STD_LOGIC; + DOUT_CHK : OUT STD_LOGIC + ); + END COMPONENT; + ------------------------ + + COMPONENT fifo_4k_2clk_pctrl IS + GENERIC( + AXI_CHANNEL : STRING := "NONE"; + C_APPLICATION_TYPE : INTEGER := 0; + C_DIN_WIDTH : INTEGER := 0; + C_DOUT_WIDTH : INTEGER := 0; + C_WR_PNTR_WIDTH : INTEGER := 0; + C_RD_PNTR_WIDTH : INTEGER := 0; + C_CH_TYPE : INTEGER := 0; + FREEZEON_ERROR : INTEGER := 0; + TB_STOP_CNT : INTEGER := 2; + TB_SEED : INTEGER := 2 + ); + PORT( + RESET_WR : IN STD_LOGIC; + RESET_RD : IN STD_LOGIC; + WR_CLK : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + FULL : IN STD_LOGIC; + EMPTY : IN STD_LOGIC; + ALMOST_FULL : IN STD_LOGIC; + ALMOST_EMPTY : IN STD_LOGIC; + DATA_IN : IN STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0); + DATA_OUT : IN STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0); + DOUT_CHK : IN STD_LOGIC; + PRC_WR_EN : OUT STD_LOGIC; + PRC_RD_EN : OUT STD_LOGIC; + RESET_EN : OUT STD_LOGIC; + SIM_DONE : OUT STD_LOGIC; + STATUS : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) + ); + END COMPONENT; + ------------------------ + COMPONENT fifo_4k_2clk_synth IS + GENERIC( + FREEZEON_ERROR : INTEGER := 0; + TB_STOP_CNT : INTEGER := 0; + TB_SEED : INTEGER := 1 + ); + PORT( + WR_CLK : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + RESET : IN STD_LOGIC; + SIM_DONE : OUT STD_LOGIC; + STATUS : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) + ); + END COMPONENT; + ------------------------ + COMPONENT fifo_4k_2clk_exdes IS + PORT ( + WR_CLK : IN std_logic; + RD_CLK : IN std_logic; + WR_DATA_COUNT : OUT std_logic_vector(10-1 DOWNTO 0); + RD_DATA_COUNT : OUT std_logic_vector(10-1 DOWNTO 0); + RST : IN std_logic; + WR_EN : IN std_logic; + RD_EN : IN std_logic; + DIN : IN std_logic_vector(72-1 DOWNTO 0); + DOUT : OUT std_logic_vector(72-1 DOWNTO 0); + FULL : OUT std_logic; + EMPTY : OUT std_logic); + + END COMPONENT; + ------------------------ + + +END fifo_4k_2clk_pkg; + + + +PACKAGE BODY fifo_4k_2clk_pkg IS + + FUNCTION divroundup ( + data_value : INTEGER; + divisor : INTEGER) + RETURN INTEGER IS + VARIABLE div : INTEGER; + BEGIN + div := data_value/divisor; + IF ( (data_value MOD divisor) /= 0) THEN + div := div+1; + END IF; + RETURN div; + END divroundup; + --------------------------------- + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : INTEGER; + false_case : INTEGER) + RETURN INTEGER IS + VARIABLE retval : INTEGER := 0; + BEGIN + IF condition=false THEN + retval:=false_case; + ELSE + retval:=true_case; + END IF; + RETURN retval; + END if_then_else; + --------------------------------- + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : STD_LOGIC; + false_case : STD_LOGIC) + RETURN STD_LOGIC IS + VARIABLE retval : STD_LOGIC := '0'; + BEGIN + IF condition=false THEN + retval:=false_case; + ELSE + retval:=true_case; + END IF; + RETURN retval; + END if_then_else; + --------------------------------- + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : TIME; + false_case : TIME) + RETURN TIME IS + VARIABLE retval : TIME := 0 ps; + BEGIN + IF condition=false THEN + retval:=false_case; + ELSE + retval:=true_case; + END IF; + RETURN retval; + END if_then_else; + ------------------------------- + FUNCTION log2roundup ( + data_value : INTEGER) + RETURN INTEGER IS + + VARIABLE width : INTEGER := 0; + VARIABLE cnt : INTEGER := 1; + BEGIN + IF (data_value <= 1) THEN + width := 1; + ELSE + WHILE (cnt < data_value) LOOP + width := width + 1; + cnt := cnt *2; + END LOOP; + END IF; + + RETURN width; + END log2roundup; + ------------------------------------------------------------------------------ + -- hexstr_to_std_logic_vec + -- This function converts a hex string to a std_logic_vector + ------------------------------------------------------------------------------ + FUNCTION hexstr_to_std_logic_vec( + arg1 : string; + size : integer ) + RETURN std_logic_vector IS + VARIABLE result : std_logic_vector(size-1 DOWNTO 0) := (OTHERS => '0'); + VARIABLE bin : std_logic_vector(3 DOWNTO 0); + VARIABLE index : integer := 0; + BEGIN + FOR i IN arg1'reverse_range LOOP + CASE arg1(i) IS + WHEN '0' => bin := (OTHERS => '0'); + WHEN '1' => bin := (0 => '1', OTHERS => '0'); + WHEN '2' => bin := (1 => '1', OTHERS => '0'); + WHEN '3' => bin := (0 => '1', 1 => '1', OTHERS => '0'); + WHEN '4' => bin := (2 => '1', OTHERS => '0'); + WHEN '5' => bin := (0 => '1', 2 => '1', OTHERS => '0'); + WHEN '6' => bin := (1 => '1', 2 => '1', OTHERS => '0'); + WHEN '7' => bin := (3 => '0', OTHERS => '1'); + WHEN '8' => bin := (3 => '1', OTHERS => '0'); + WHEN '9' => bin := (0 => '1', 3 => '1', OTHERS => '0'); + WHEN 'A' => bin := (0 => '0', 2 => '0', OTHERS => '1'); + WHEN 'a' => bin := (0 => '0', 2 => '0', OTHERS => '1'); + WHEN 'B' => bin := (2 => '0', OTHERS => '1'); + WHEN 'b' => bin := (2 => '0', OTHERS => '1'); + WHEN 'C' => bin := (0 => '0', 1 => '0', OTHERS => '1'); + WHEN 'c' => bin := (0 => '0', 1 => '0', OTHERS => '1'); + WHEN 'D' => bin := (1 => '0', OTHERS => '1'); + WHEN 'd' => bin := (1 => '0', OTHERS => '1'); + WHEN 'E' => bin := (0 => '0', OTHERS => '1'); + WHEN 'e' => bin := (0 => '0', OTHERS => '1'); + WHEN 'F' => bin := (OTHERS => '1'); + WHEN 'f' => bin := (OTHERS => '1'); + WHEN OTHERS => + FOR j IN 0 TO 3 LOOP + bin(j) := 'X'; + END LOOP; + END CASE; + FOR j IN 0 TO 3 LOOP + IF (index*4)+j < size THEN + result((index*4)+j) := bin(j); + END IF; + END LOOP; + index := index + 1; + END LOOP; + RETURN result; + END hexstr_to_std_logic_vec; + +END fifo_4k_2clk_pkg; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_rng.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_rng.vhd new file mode 100755 index 000000000..bed58d88e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_rng.vhd @@ -0,0 +1,100 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_4k_2clk_rng.vhd +-- +-- Description: +-- Used for generation of pseudo random numbers +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.all; +USE IEEE.std_logic_arith.all; +USE IEEE.std_logic_misc.all; + +ENTITY fifo_4k_2clk_rng IS + GENERIC ( + WIDTH : integer := 8; + SEED : integer := 3); + PORT ( + CLK : IN STD_LOGIC; + RESET : IN STD_LOGIC; + ENABLE : IN STD_LOGIC; + RANDOM_NUM : OUT STD_LOGIC_VECTOR (WIDTH-1 DOWNTO 0)); +END ENTITY; + +ARCHITECTURE rg_arch OF fifo_4k_2clk_rng IS +BEGIN +PROCESS (CLK,RESET) + VARIABLE rand_temp : STD_LOGIC_VECTOR(width-1 DOWNTO 0):=conv_std_logic_vector(SEED,width); + VARIABLE temp : STD_LOGIC := '0'; +BEGIN + IF(RESET = '1') THEN + rand_temp := conv_std_logic_vector(SEED,width); + temp := '0'; + ELSIF (CLK'event AND CLK = '1') THEN + IF (ENABLE = '1') THEN + temp := rand_temp(width-1) xnor rand_temp(width-3) xnor rand_temp(width-4) xnor rand_temp(width-5); + rand_temp(width-1 DOWNTO 1) := rand_temp(width-2 DOWNTO 0); + rand_temp(0) := temp; + END IF; + END IF; + + RANDOM_NUM <= rand_temp; + +END PROCESS; + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_synth.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_synth.vhd new file mode 100755 index 000000000..4149735c5 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_synth.vhd @@ -0,0 +1,300 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_4k_2clk_synth.vhd +-- +-- Description: +-- This is the demo testbench for fifo_generator core. +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- + + +LIBRARY ieee; +USE ieee.STD_LOGIC_1164.ALL; +USE ieee.STD_LOGIC_unsigned.ALL; +USE IEEE.STD_LOGIC_arith.ALL; +USE ieee.numeric_std.ALL; +USE ieee.STD_LOGIC_misc.ALL; + +LIBRARY std; +USE std.textio.ALL; + +LIBRARY work; +USE work.fifo_4k_2clk_pkg.ALL; + +-------------------------------------------------------------------------------- +-- Entity Declaration +-------------------------------------------------------------------------------- +ENTITY fifo_4k_2clk_synth IS + GENERIC( + FREEZEON_ERROR : INTEGER := 0; + TB_STOP_CNT : INTEGER := 0; + TB_SEED : INTEGER := 1 + ); + PORT( + WR_CLK : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + RESET : IN STD_LOGIC; + SIM_DONE : OUT STD_LOGIC; + STATUS : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) + ); +END ENTITY; + +ARCHITECTURE simulation_arch OF fifo_4k_2clk_synth IS + + -- FIFO interface signal declarations + SIGNAL wr_clk_i : STD_LOGIC; + SIGNAL rd_clk_i : STD_LOGIC; + SIGNAL wr_data_count : STD_LOGIC_VECTOR(10-1 DOWNTO 0); + SIGNAL rd_data_count : STD_LOGIC_VECTOR(10-1 DOWNTO 0); + SIGNAL rst : STD_LOGIC; + SIGNAL wr_en : STD_LOGIC; + SIGNAL rd_en : STD_LOGIC; + SIGNAL din : STD_LOGIC_VECTOR(72-1 DOWNTO 0); + SIGNAL dout : STD_LOGIC_VECTOR(72-1 DOWNTO 0); + SIGNAL full : STD_LOGIC; + SIGNAL empty : STD_LOGIC; + -- TB Signals + SIGNAL wr_data : STD_LOGIC_VECTOR(72-1 DOWNTO 0); + SIGNAL dout_i : STD_LOGIC_VECTOR(72-1 DOWNTO 0); + SIGNAL wr_en_i : STD_LOGIC := '0'; + SIGNAL rd_en_i : STD_LOGIC := '0'; + SIGNAL full_i : STD_LOGIC := '0'; + SIGNAL empty_i : STD_LOGIC := '0'; + SIGNAL almost_full_i : STD_LOGIC := '0'; + SIGNAL almost_empty_i : STD_LOGIC := '0'; + SIGNAL prc_we_i : STD_LOGIC := '0'; + SIGNAL prc_re_i : STD_LOGIC := '0'; + SIGNAL dout_chk_i : STD_LOGIC := '0'; + SIGNAL rst_int_rd : STD_LOGIC := '0'; + SIGNAL rst_int_wr : STD_LOGIC := '0'; + SIGNAL rst_s_wr1 : STD_LOGIC := '0'; + SIGNAL rst_s_wr2 : STD_LOGIC := '0'; + SIGNAL rst_gen_rd : STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0'); + SIGNAL rst_s_wr3 : STD_LOGIC := '0'; + SIGNAL rst_s_rd : STD_LOGIC := '0'; + SIGNAL reset_en : STD_LOGIC := '0'; + SIGNAL rst_async_wr1 : STD_LOGIC := '0'; + SIGNAL rst_async_wr2 : STD_LOGIC := '0'; + SIGNAL rst_async_wr3 : STD_LOGIC := '0'; + SIGNAL rst_async_rd1 : STD_LOGIC := '0'; + SIGNAL rst_async_rd2 : STD_LOGIC := '0'; + SIGNAL rst_async_rd3 : STD_LOGIC := '0'; + + + BEGIN + + ---- Reset generation logic ----- + rst_int_wr <= rst_async_wr3 OR rst_s_wr3; + rst_int_rd <= rst_async_rd3 OR rst_s_rd; + + --Testbench reset synchronization + PROCESS(rd_clk_i,RESET) + BEGIN + IF(RESET = '1') THEN + rst_async_rd1 <= '1'; + rst_async_rd2 <= '1'; + rst_async_rd3 <= '1'; + ELSIF(rd_clk_i'event AND rd_clk_i='1') THEN + rst_async_rd1 <= RESET; + rst_async_rd2 <= rst_async_rd1; + rst_async_rd3 <= rst_async_rd2; + END IF; + END PROCESS; + + PROCESS(wr_clk_i,RESET) + BEGIN + IF(RESET = '1') THEN + rst_async_wr1 <= '1'; + rst_async_wr2 <= '1'; + rst_async_wr3 <= '1'; + ELSIF(wr_clk_i'event AND wr_clk_i='1') THEN + rst_async_wr1 <= RESET; + rst_async_wr2 <= rst_async_wr1; + rst_async_wr3 <= rst_async_wr2; + END IF; + END PROCESS; + + --Soft reset for core and testbench + PROCESS(rd_clk_i) + BEGIN + IF(rd_clk_i'event AND rd_clk_i='1') THEN + rst_gen_rd <= rst_gen_rd + "1"; + IF(reset_en = '1' AND AND_REDUCE(rst_gen_rd) = '1') THEN + rst_s_rd <= '1'; + assert false + report "Reset applied..Memory Collision checks are not valid" + severity note; + ELSE + IF(AND_REDUCE(rst_gen_rd) = '1' AND rst_s_rd = '1') THEN + rst_s_rd <= '0'; + END IF; + END IF; + END IF; + END PROCESS; + + PROCESS(wr_clk_i) + BEGIN + IF(wr_clk_i'event AND wr_clk_i='1') THEN + rst_s_wr1 <= rst_s_rd; + rst_s_wr2 <= rst_s_wr1; + rst_s_wr3 <= rst_s_wr2; + IF(rst_s_wr3 = '1' AND rst_s_wr2 = '0') THEN + assert false + report "Reset removed..Memory Collision checks are valid" + severity note; + END IF; + END IF; + END PROCESS; + ------------------ + + ---- Clock buffers for testbench ---- + wr_clk_i <= WR_CLK; + rd_clk_i <= RD_CLK; + ------------------ + + rst <= RESET OR rst_s_rd AFTER 12 ns; + din <= wr_data; + dout_i <= dout; + wr_en <= wr_en_i; + rd_en <= rd_en_i; + full_i <= full; + empty_i <= empty; + + fg_dg_nv: fifo_4k_2clk_dgen + GENERIC MAP ( + C_DIN_WIDTH => 72, + C_DOUT_WIDTH => 72, + TB_SEED => TB_SEED, + C_CH_TYPE => 0 + ) + PORT MAP ( -- Write Port + RESET => rst_int_wr, + WR_CLK => wr_clk_i, + PRC_WR_EN => prc_we_i, + FULL => full_i, + WR_EN => wr_en_i, + WR_DATA => wr_data + ); + + fg_dv_nv: fifo_4k_2clk_dverif + GENERIC MAP ( + C_DOUT_WIDTH => 72, + C_DIN_WIDTH => 72, + C_USE_EMBEDDED_REG => 0, + TB_SEED => TB_SEED, + C_CH_TYPE => 0 + ) + PORT MAP( + RESET => rst_int_rd, + RD_CLK => rd_clk_i, + PRC_RD_EN => prc_re_i, + RD_EN => rd_en_i, + EMPTY => empty_i, + DATA_OUT => dout_i, + DOUT_CHK => dout_chk_i + ); + + fg_pc_nv: fifo_4k_2clk_pctrl + GENERIC MAP ( + AXI_CHANNEL => "Native", + C_APPLICATION_TYPE => 0, + C_DOUT_WIDTH => 72, + C_DIN_WIDTH => 72, + C_WR_PNTR_WIDTH => 9, + C_RD_PNTR_WIDTH => 9, + C_CH_TYPE => 0, + FREEZEON_ERROR => FREEZEON_ERROR, + TB_SEED => TB_SEED, + TB_STOP_CNT => TB_STOP_CNT + ) + PORT MAP( + RESET_WR => rst_int_wr, + RESET_RD => rst_int_rd, + RESET_EN => reset_en, + WR_CLK => wr_clk_i, + RD_CLK => rd_clk_i, + PRC_WR_EN => prc_we_i, + PRC_RD_EN => prc_re_i, + FULL => full_i, + ALMOST_FULL => almost_full_i, + ALMOST_EMPTY => almost_empty_i, + DOUT_CHK => dout_chk_i, + EMPTY => empty_i, + DATA_IN => wr_data, + DATA_OUT => dout, + SIM_DONE => SIM_DONE, + STATUS => STATUS + ); + + + + + + fifo_4k_2clk_inst : fifo_4k_2clk_exdes + PORT MAP ( + WR_CLK => wr_clk_i, + RD_CLK => rd_clk_i, + WR_DATA_COUNT => wr_data_count, + RD_DATA_COUNT => rd_data_count, + RST => rst, + WR_EN => wr_en, + RD_EN => rd_en, + DIN => din, + DOUT => dout, + FULL => full, + EMPTY => empty); + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_tb.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_tb.vhd new file mode 100755 index 000000000..51d699e21 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/fifo_4k_2clk_tb.vhd @@ -0,0 +1,208 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_4k_2clk_tb.vhd +-- +-- Description: +-- This is the demo testbench top file for fifo_generator core. +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +LIBRARY std; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.ALL; +USE IEEE.std_logic_arith.ALL; +USE IEEE.std_logic_misc.ALL; +USE ieee.numeric_std.ALL; +USE ieee.std_logic_textio.ALL; +USE std.textio.ALL; + +LIBRARY work; +USE work.fifo_4k_2clk_pkg.ALL; + +ENTITY fifo_4k_2clk_tb IS +END ENTITY; + + +ARCHITECTURE fifo_4k_2clk_arch OF fifo_4k_2clk_tb IS + SIGNAL status : STD_LOGIC_VECTOR(7 DOWNTO 0) := "00000000"; + SIGNAL wr_clk : STD_LOGIC; + SIGNAL rd_clk : STD_LOGIC; + SIGNAL reset : STD_LOGIC; + SIGNAL sim_done : STD_LOGIC := '0'; + SIGNAL end_of_sim : STD_LOGIC_VECTOR(4 DOWNTO 0) := (OTHERS => '0'); + -- Write and Read clock periods + CONSTANT wr_clk_period_by_2 : TIME := 200 ns; + CONSTANT rd_clk_period_by_2 : TIME := 100 ns; + -- Procedures to display strings + PROCEDURE disp_str(CONSTANT str:IN STRING) IS + variable dp_l : line := null; + BEGIN + write(dp_l,str); + writeline(output,dp_l); + END PROCEDURE; + + PROCEDURE disp_hex(signal hex:IN STD_LOGIC_VECTOR(7 DOWNTO 0)) IS + variable dp_lx : line := null; + BEGIN + hwrite(dp_lx,hex); + writeline(output,dp_lx); + END PROCEDURE; + +BEGIN + + -- Generation of clock + + PROCESS BEGIN + WAIT FOR 400 ns; -- Wait for global reset + WHILE 1 = 1 LOOP + wr_clk <= '0'; + WAIT FOR wr_clk_period_by_2; + wr_clk <= '1'; + WAIT FOR wr_clk_period_by_2; + END LOOP; + END PROCESS; + + PROCESS BEGIN + WAIT FOR 200 ns;-- Wait for global reset + WHILE 1 = 1 LOOP + rd_clk <= '0'; + WAIT FOR rd_clk_period_by_2; + rd_clk <= '1'; + WAIT FOR rd_clk_period_by_2; + END LOOP; + END PROCESS; + + -- Generation of Reset + + PROCESS BEGIN + reset <= '1'; + WAIT FOR 4200 ns; + reset <= '0'; + WAIT; + END PROCESS; + + + -- Error message printing based on STATUS signal from fifo_4k_2clk_synth + + PROCESS(status) + BEGIN + IF(status /= "0" AND status /= "1") THEN + disp_str("STATUS:"); + disp_hex(status); + END IF; + + IF(status(7) = '1') THEN + assert false + report "Data mismatch found" + severity error; + END IF; + + IF(status(1) = '1') THEN + END IF; + + IF(status(5) = '1') THEN + assert false + report "Empty flag Mismatch/timeout" + severity error; + END IF; + + IF(status(6) = '1') THEN + assert false + report "Full Flag Mismatch/timeout" + severity error; + END IF; + END PROCESS; + + + PROCESS + BEGIN + wait until sim_done = '1'; + IF(status /= "0" AND status /= "1") THEN + assert false + report "Simulation failed" + severity failure; + ELSE + assert false + report "Test Completed Successfully" + severity failure; + END IF; + END PROCESS; + + PROCESS + BEGIN + wait for 400 ms; + assert false + report "Test bench timed out" + severity failure; + END PROCESS; + + -- Instance of fifo_4k_2clk_synth + + fifo_4k_2clk_synth_inst:fifo_4k_2clk_synth + GENERIC MAP( + FREEZEON_ERROR => 0, + TB_STOP_CNT => 2, + TB_SEED => 76 + ) + PORT MAP( + WR_CLK => wr_clk, + RD_CLK => rd_clk, + RESET => reset, + SIM_DONE => sim_done, + STATUS => status + ); + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_isim.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_isim.bat new file mode 100755 index 000000000..3d0783055 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_isim.bat @@ -0,0 +1,63 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogcomp -work work ..\\..\\..\\fifo_4k_2clk.v +vhpcomp -work work ..\\..\\example_design\\fifo_4k_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +vhpcomp -work work ..\\fifo_4k_2clk_pkg.vhd +vhpcomp -work work ..\\fifo_4k_2clk_rng.vhd +vhpcomp -work work ..\\fifo_4k_2clk_dgen.vhd +vhpcomp -work work ..\\fifo_4k_2clk_dverif.vhd +vhpcomp -work work ..\\fifo_4k_2clk_pctrl.vhd +vhpcomp -work work ..\\fifo_4k_2clk_synth.vhd +vhpcomp -work work ..\\fifo_4k_2clk_tb.vhd + +vlogcomp -work work $XILINX\\verilog\\src\\glbl.v +fuse work.fifo_4k_2clk_tb work.glbl -L xilinxcorelib_ver -L unisims_ver -o fifo_4k_2clk_tb.exe + +.\\fifo_4k_2clk_tb.exe -gui -tclbatch .\\wave_isim.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_isim.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_isim.sh new file mode 100755 index 000000000..c3abd5a51 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_isim.sh @@ -0,0 +1,65 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogcomp -work work ../../../fifo_4k_2clk.v +vhpcomp -work work ../../example_design/fifo_4k_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +vhpcomp -work work ../fifo_4k_2clk_pkg.vhd +vhpcomp -work work ../fifo_4k_2clk_rng.vhd +vhpcomp -work work ../fifo_4k_2clk_dgen.vhd +vhpcomp -work work ../fifo_4k_2clk_dverif.vhd +vhpcomp -work work ../fifo_4k_2clk_pctrl.vhd +vhpcomp -work work ../fifo_4k_2clk_synth.vhd +vhpcomp -work work ../fifo_4k_2clk_tb.vhd + +vlogcomp -work work $XILINX/verilog/src/glbl.v +fuse work.fifo_4k_2clk_tb work.glbl -L xilinxcorelib_ver -L unisims_ver -o fifo_4k_2clk_tb.exe + +./fifo_4k_2clk_tb.exe -gui -tclbatch ./wave_isim.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_mti.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_mti.bat new file mode 100755 index 000000000..35375ce20 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_mti.bat @@ -0,0 +1,47 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +vsim -c -do simulate_mti.do diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_mti.do b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_mti.do new file mode 100755 index 000000000..af53abefb --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_mti.do @@ -0,0 +1,74 @@ +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +vlib work +vmap work work + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlog -work work ../../../fifo_4k_2clk.v +vcom -work work ../../example_design/fifo_4k_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +vcom -work work ../fifo_4k_2clk_pkg.vhd +vcom -work work ../fifo_4k_2clk_rng.vhd +vcom -work work ../fifo_4k_2clk_dgen.vhd +vcom -work work ../fifo_4k_2clk_dverif.vhd +vcom -work work ../fifo_4k_2clk_pctrl.vhd +vcom -work work ../fifo_4k_2clk_synth.vhd +vcom -work work ../fifo_4k_2clk_tb.vhd + +vlog -work work $env(XILINX)/verilog/src/glbl.v +vsim -t ps -voptargs="+acc" -L XilinxCoreLib_ver -L unisims_ver glbl work.fifo_4k_2clk_tb + +add log -r /* +do wave_mti.do +#Ignore integer warnings at time 0 +set StdArithNoWarnings 1 +run 0 +set StdArithNoWarnings 0 + +run -all diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_mti.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_mti.sh new file mode 100755 index 000000000..edb1b0dd9 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_mti.sh @@ -0,0 +1,49 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +vsim -c -do simulate_mti.do diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_ncsim.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_ncsim.sh new file mode 100755 index 000000000..0d3376452 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_ncsim.sh @@ -0,0 +1,69 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- +mkdir work + +echo "Compiling Core Verilog UNISIM/Behavioral model" +ncvlog -work work ../../../fifo_4k_2clk.v +ncvhdl -v93 -work work ../../example_design/fifo_4k_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +ncvhdl -v93 -work work ../fifo_4k_2clk_pkg.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_rng.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_dgen.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_dverif.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_pctrl.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_synth.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_tb.vhd + +echo "Elaborating Design" +ncvlog -work work $XILINX/verilog/src/glbl.v +ncelab -access +rwc glbl work.fifo_4k_2clk_tb + +echo "Simulating Design" +ncsim -gui -input @"simvision -input wave_ncsim.sv" work.fifo_4k_2clk_tb + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_vcs.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_vcs.sh new file mode 100755 index 000000000..8c26af20c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/simulate_vcs.sh @@ -0,0 +1,69 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- +rm -rf simv* csrc DVEfiles AN.DB + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogan +v2k ../../../fifo_4k_2clk.v +vhdlan ../../example_design/fifo_4k_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +vhdlan ../fifo_4k_2clk_pkg.vhd +vhdlan ../fifo_4k_2clk_rng.vhd +vhdlan ../fifo_4k_2clk_dgen.vhd +vhdlan ../fifo_4k_2clk_dverif.vhd +vhdlan ../fifo_4k_2clk_pctrl.vhd +vhdlan ../fifo_4k_2clk_synth.vhd +vhdlan ../fifo_4k_2clk_tb.vhd + +echo "Elaborating Design" +vlogan +v2k $XILINX/verilog/src/glbl.v +vcs -time_res 1ps +vcs+lic+wait -debug fifo_4k_2clk_tb glbl + +echo "Simulating Design" +./simv -ucli -i ucli_commands.key +dve -session vcs_session.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/ucli_commands.key b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/ucli_commands.key new file mode 100755 index 000000000..9c95a2ade --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/ucli_commands.key @@ -0,0 +1,4 @@ +dump -file fifo_4k_2clk.vpd -type VPD +dump -add fifo_4k_2clk_tb +run +quit diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/vcs_session.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/vcs_session.tcl new file mode 100755 index 000000000..b9ef9837a --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/vcs_session.tcl @@ -0,0 +1,77 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: vcs_session.tcl +# +# Description: +# This is the VCS wave form file. +# +#-------------------------------------------------------------------------------- +if { ![gui_is_db_opened -db {fifo_4k_2clk.vpd}] } { + gui_open_db -design V1 -file fifo_4k_2clk.vpd -nosource +} +gui_set_precision 1ps +gui_set_time_units 1ps + + +gui_open_window Wave +gui_sg_create fifo_4k_2clk_Group +gui_list_add_group -id Wave.1 {fifo_4k_2clk_Group} + +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RST +gui_sg_addsignal -group fifo_4k_2clk_Group WRITE -divider +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_CLK +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_EN +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/FULL +gui_sg_addsignal -group fifo_4k_2clk_Group READ -divider +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_CLK +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_EN +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/EMPTY +gui_zoom -window Wave.1 -full diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/wave_isim.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/wave_isim.tcl new file mode 100755 index 000000000..10be1a965 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/wave_isim.tcl @@ -0,0 +1,68 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: wave_isim.tcl +# +# Description: +# This is the ISIM wave form file. +# +#-------------------------------------------------------------------------------- +wcfg new +isim set radix hex +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RST +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_CLK +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_EN +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/FULL +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_CLK +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_EN +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/EMPTY +run all +quit + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/wave_mti.do b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/wave_mti.do new file mode 100755 index 000000000..adc4cb8d7 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/wave_mti.do @@ -0,0 +1,88 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +# Filename: wave_mti.do +# +# Description: +# This is the modelsim wave form file. +# +#-------------------------------------------------------------------------------- + +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RST +add wave -noupdate -divider WRITE +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_CLK +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_EN +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/FULL +add wave -noupdate -radix hexadecimal /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/DIN +add wave -noupdate -divider READ +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_CLK +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_EN +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/EMPTY +add wave -noupdate -radix hexadecimal /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/DOUT + +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {2164886 ps} 0} +configure wave -namecolwidth 197 +configure wave -valuecolwidth 106 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ps +update +WaveRestoreZoom {0 ps} {9464063 ps} diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/wave_ncsim.sv b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/wave_ncsim.sv new file mode 100755 index 000000000..51819bad9 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/functional/wave_ncsim.sv @@ -0,0 +1,70 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: wave_ncsim.sv +# +# Description: +# This is the IUS wave form file. +# +#-------------------------------------------------------------------------------- + +window new WaveWindow -name "Waves for FIFO Generator Example Design" +waveform using "Waves for FIFO Generator Example Design" + +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RST +waveform add -label WRITE +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_CLK +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_EN +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/FULL +waveform add -label READ +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_CLK +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_EN +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/EMPTY +console submit -using simulator -wait no "run" diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_isim.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_isim.bat new file mode 100755 index 000000000..a6f8ce91f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_isim.bat @@ -0,0 +1,61 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogcomp -work work ..\\..\\implement\\results\\routed.v + +echo "Compiling Test Bench Files" +vhpcomp -work work ..\\fifo_4k_2clk_pkg.vhd +vhpcomp -work work ..\\fifo_4k_2clk_rng.vhd +vhpcomp -work work ..\\fifo_4k_2clk_dgen.vhd +vhpcomp -work work ..\\fifo_4k_2clk_dverif.vhd +vhpcomp -work work ..\\fifo_4k_2clk_pctrl.vhd +vhpcomp -work work ..\\fifo_4k_2clk_synth.vhd +vhpcomp -work work ..\\fifo_4k_2clk_tb.vhd + +fuse work.fifo_4k_2clk_tb work.glbl -L simprims_ver -o fifo_4k_2clk_tb.exe + +.\\fifo_4k_2clk_tb.exe -sdfmax /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst=..\\..\\implement\\results\\routed.sdf -gui -tclbatch .\\wave_isim.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_isim.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_isim.sh new file mode 100755 index 000000000..f5ad36b7e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_isim.sh @@ -0,0 +1,63 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogcomp -work work ../../implement/results/routed.v + +echo "Compiling Test Bench Files" +vhpcomp -work work ../fifo_4k_2clk_pkg.vhd +vhpcomp -work work ../fifo_4k_2clk_rng.vhd +vhpcomp -work work ../fifo_4k_2clk_dgen.vhd +vhpcomp -work work ../fifo_4k_2clk_dverif.vhd +vhpcomp -work work ../fifo_4k_2clk_pctrl.vhd +vhpcomp -work work ../fifo_4k_2clk_synth.vhd +vhpcomp -work work ../fifo_4k_2clk_tb.vhd + +fuse work.fifo_4k_2clk_tb work.glbl -L simprims_ver -o fifo_4k_2clk_tb.exe + +./fifo_4k_2clk_tb.exe -sdfmax /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst=../../implement/results/routed.sdf -gui -tclbatch ./wave_isim.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_mti.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_mti.bat new file mode 100755 index 000000000..35375ce20 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_mti.bat @@ -0,0 +1,47 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +vsim -c -do simulate_mti.do diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_mti.do b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_mti.do new file mode 100755 index 000000000..74e930a13 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_mti.do @@ -0,0 +1,72 @@ +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +vlib work +vmap work work + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlog -work work ../../implement/results/routed.v + +echo "Compiling Test Bench Files" +vcom -work work ../fifo_4k_2clk_pkg.vhd +vcom -work work ../fifo_4k_2clk_rng.vhd +vcom -work work ../fifo_4k_2clk_dgen.vhd +vcom -work work ../fifo_4k_2clk_dverif.vhd +vcom -work work ../fifo_4k_2clk_pctrl.vhd +vcom -work work ../fifo_4k_2clk_synth.vhd +vcom -work work ../fifo_4k_2clk_tb.vhd + +vsim -t ps -voptargs="+acc" +transport_int_delays -L simprims_ver glbl -sdfmax /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst=../../implement/results/routed.sdf work.fifo_4k_2clk_tb + +add log -r /* +do wave_mti.do +#Ignore integer warnings at time 0 +set StdArithNoWarnings 1 +run 0 +set StdArithNoWarnings 0 + +run -all diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_mti.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_mti.sh new file mode 100755 index 000000000..edb1b0dd9 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_mti.sh @@ -0,0 +1,49 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +vsim -c -do simulate_mti.do diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_ncsim.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_ncsim.sh new file mode 100755 index 000000000..a1967adcf --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_ncsim.sh @@ -0,0 +1,73 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- +mkdir work +echo "Compiling Core Verilog UNISIM/Behavioral model" +ncvlog -work work ../../implement/results/routed.v + +echo "Compiling Test Bench Files" +ncvhdl -v93 -work work ../fifo_4k_2clk_pkg.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_rng.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_dgen.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_dverif.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_pctrl.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_synth.vhd +ncvhdl -v93 -work work ../fifo_4k_2clk_tb.vhd + +echo "Compiling SDF file" +ncsdfc ../../implement/results/routed.sdf -output ./routed.sdf.X + +echo "Generating SDF command file" +echo 'COMPILED_SDF_FILE = "routed.sdf.X",' > sdf.cmd +echo 'SCOPE = :fifo_4k_2clk_synth_inst:fifo_4k_2clk_inst,' >> sdf.cmd +echo 'MTM_CONTROL = "MAXIMUM";' >> sdf.cmd + +echo "Elaborating Design" +ncelab -access +rwc glbl -sdf_cmd_file sdf.cmd work.fifo_4k_2clk_tb + +echo "Simulating Design" +ncsim -gui -input @"simvision -input wave_ncsim.sv" work.fifo_4k_2clk_tb diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_vcs.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_vcs.sh new file mode 100755 index 000000000..f62f540be --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/simulate_vcs.sh @@ -0,0 +1,67 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- +rm -rf simv* csrc DVEfiles AN.DB + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogan +v2k ../../implement/results/routed.v + +echo "Compiling Test Bench Files" +vhdlan ../fifo_4k_2clk_pkg.vhd +vhdlan ../fifo_4k_2clk_rng.vhd +vhdlan ../fifo_4k_2clk_dgen.vhd +vhdlan ../fifo_4k_2clk_dverif.vhd +vhdlan ../fifo_4k_2clk_pctrl.vhd +vhdlan ../fifo_4k_2clk_synth.vhd +vhdlan ../fifo_4k_2clk_tb.vhd + +echo "Elaborating Design" +vcs -time_res 1ps +neg_tchk -sdf max:/fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst:../../implement/results/routed.sdf +vcs+lic+wait -debug fifo_4k_2clk_tb glbl + +echo "Simulating Design" +./simv -ucli -i ucli_commands.key +dve -session vcs_session.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/ucli_commands.key b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/ucli_commands.key new file mode 100755 index 000000000..9c95a2ade --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/ucli_commands.key @@ -0,0 +1,4 @@ +dump -file fifo_4k_2clk.vpd -type VPD +dump -add fifo_4k_2clk_tb +run +quit diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/vcs_session.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/vcs_session.tcl new file mode 100755 index 000000000..28ebc1163 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/vcs_session.tcl @@ -0,0 +1,76 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: vcs_session.tcl +# +# Description: +# This is the VCS wave form file. +# +#-------------------------------------------------------------------------------- +if { ![gui_is_db_opened -db {fifo_4k_2clk.vpd}] } { + gui_open_db -design V1 -file fifo_4k_2clk.vpd -nosource +} +gui_set_precision 1ps +gui_set_time_units 1ps + +gui_open_window Wave +gui_sg_create fifo_4k_2clk_Group +gui_list_add_group -id Wave.1 {fifo_4k_2clk_Group} + +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RST +gui_sg_addsignal -group fifo_4k_2clk_Group WRITE -divider +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_CLK +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_EN +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/FULL +gui_sg_addsignal -group fifo_4k_2clk_Group READ -divider +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_CLK +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_EN +gui_sg_addsignal -group fifo_4k_2clk_Group /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/EMPTY +gui_zoom -window Wave.1 -full diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/wave_isim.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/wave_isim.tcl new file mode 100755 index 000000000..10be1a965 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/wave_isim.tcl @@ -0,0 +1,68 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: wave_isim.tcl +# +# Description: +# This is the ISIM wave form file. +# +#-------------------------------------------------------------------------------- +wcfg new +isim set radix hex +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RST +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_CLK +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_EN +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/FULL +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_CLK +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_EN +wave add /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/EMPTY +run all +quit + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/wave_mti.do b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/wave_mti.do new file mode 100755 index 000000000..adc4cb8d7 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/wave_mti.do @@ -0,0 +1,88 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +# Filename: wave_mti.do +# +# Description: +# This is the modelsim wave form file. +# +#-------------------------------------------------------------------------------- + +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RST +add wave -noupdate -divider WRITE +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_CLK +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_EN +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/FULL +add wave -noupdate -radix hexadecimal /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/DIN +add wave -noupdate -divider READ +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_CLK +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_EN +add wave -noupdate /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/EMPTY +add wave -noupdate -radix hexadecimal /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/DOUT + +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {2164886 ps} 0} +configure wave -namecolwidth 197 +configure wave -valuecolwidth 106 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ps +update +WaveRestoreZoom {0 ps} {9464063 ps} diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/wave_ncsim.sv b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/wave_ncsim.sv new file mode 100755 index 000000000..51819bad9 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk/simulation/timing/wave_ncsim.sv @@ -0,0 +1,70 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: wave_ncsim.sv +# +# Description: +# This is the IUS wave form file. +# +#-------------------------------------------------------------------------------- + +window new WaveWindow -name "Waves for FIFO Generator Example Design" +waveform using "Waves for FIFO Generator Example Design" + +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RST +waveform add -label WRITE +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_CLK +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/WR_EN +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/FULL +waveform add -label READ +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_CLK +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/RD_EN +waveform add -signals /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst/EMPTY +console submit -using simulator -wait no "run" diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk_flist.txt b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk_flist.txt new file mode 100644 index 000000000..a0152ac70 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk_flist.txt @@ -0,0 +1,57 @@ +# Output products list for <fifo_4k_2clk> +_xmsgs/pn_parser.xmsgs +fifo_4k_2clk/doc/fifo_generator_v9_3_readme.txt +fifo_4k_2clk/doc/fifo_generator_v9_3_vinfo.html +fifo_4k_2clk/doc/pg057-fifo-generator.pdf +fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.ucf +fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.vhd +fifo_4k_2clk/fifo_generator_v9_3_readme.txt +fifo_4k_2clk/implement/implement.bat +fifo_4k_2clk/implement/implement.sh +fifo_4k_2clk/implement/implement_synplify.bat +fifo_4k_2clk/implement/implement_synplify.sh +fifo_4k_2clk/implement/planAhead_ise.bat +fifo_4k_2clk/implement/planAhead_ise.sh +fifo_4k_2clk/implement/planAhead_ise.tcl +fifo_4k_2clk/implement/xst.prj +fifo_4k_2clk/implement/xst.scr +fifo_4k_2clk/simulation/fifo_4k_2clk_dgen.vhd +fifo_4k_2clk/simulation/fifo_4k_2clk_dverif.vhd +fifo_4k_2clk/simulation/fifo_4k_2clk_pctrl.vhd +fifo_4k_2clk/simulation/fifo_4k_2clk_pkg.vhd +fifo_4k_2clk/simulation/fifo_4k_2clk_rng.vhd +fifo_4k_2clk/simulation/fifo_4k_2clk_synth.vhd +fifo_4k_2clk/simulation/fifo_4k_2clk_tb.vhd +fifo_4k_2clk/simulation/functional/simulate_isim.bat +fifo_4k_2clk/simulation/functional/simulate_isim.sh +fifo_4k_2clk/simulation/functional/simulate_mti.bat +fifo_4k_2clk/simulation/functional/simulate_mti.do +fifo_4k_2clk/simulation/functional/simulate_mti.sh +fifo_4k_2clk/simulation/functional/simulate_ncsim.sh +fifo_4k_2clk/simulation/functional/simulate_vcs.sh +fifo_4k_2clk/simulation/functional/ucli_commands.key +fifo_4k_2clk/simulation/functional/vcs_session.tcl +fifo_4k_2clk/simulation/functional/wave_isim.tcl +fifo_4k_2clk/simulation/functional/wave_mti.do +fifo_4k_2clk/simulation/functional/wave_ncsim.sv +fifo_4k_2clk/simulation/timing/simulate_isim.bat +fifo_4k_2clk/simulation/timing/simulate_isim.sh +fifo_4k_2clk/simulation/timing/simulate_mti.bat +fifo_4k_2clk/simulation/timing/simulate_mti.do +fifo_4k_2clk/simulation/timing/simulate_mti.sh +fifo_4k_2clk/simulation/timing/simulate_ncsim.sh +fifo_4k_2clk/simulation/timing/simulate_vcs.sh +fifo_4k_2clk/simulation/timing/ucli_commands.key +fifo_4k_2clk/simulation/timing/vcs_session.tcl +fifo_4k_2clk/simulation/timing/wave_isim.tcl +fifo_4k_2clk/simulation/timing/wave_mti.do +fifo_4k_2clk/simulation/timing/wave_ncsim.sv +fifo_4k_2clk.asy +fifo_4k_2clk.gise +fifo_4k_2clk.ngc +fifo_4k_2clk.v +fifo_4k_2clk.veo +fifo_4k_2clk.xco +fifo_4k_2clk.xise +fifo_4k_2clk_flist.txt +fifo_4k_2clk_xmdf.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk_xmdf.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk_xmdf.tcl new file mode 100644 index 000000000..bdc5c355d --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_4k_2clk_xmdf.tcl @@ -0,0 +1,251 @@ +# The package naming convention is <core_name>_xmdf +package provide fifo_4k_2clk_xmdf 1.0 + +# This includes some utilities that support common XMDF operations +package require utilities_xmdf + +# Define a namespace for this package. The name of the name space +# is <core_name>_xmdf +namespace eval ::fifo_4k_2clk_xmdf { +# Use this to define any statics +} + +# Function called by client to rebuild the params and port arrays +# Optional when the use context does not require the param or ports +# arrays to be available. +proc ::fifo_4k_2clk_xmdf::xmdfInit { instance } { +# Variable containing name of library into which module is compiled +# Recommendation: <module_name> +# Required +utilities_xmdf::xmdfSetData $instance Module Attributes Name fifo_4k_2clk +} +# ::fifo_4k_2clk_xmdf::xmdfInit + +# Function called by client to fill in all the xmdf* data variables +# based on the current settings of the parameters +proc ::fifo_4k_2clk_xmdf::xmdfApplyParams { instance } { + +set fcount 0 +# Array containing libraries that are assumed to exist +# Examples include unisim and xilinxcorelib +# Optional +# In this example, we assume that the unisim library will +# be available to the simulation and synthesis tool +utilities_xmdf::xmdfSetData $instance FileSet $fcount type logical_library +utilities_xmdf::xmdfSetData $instance FileSet $fcount logical_library unisim +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/doc/fifo_generator_v9_3_readme.txt +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/doc/fifo_generator_v9_3_vinfo.html +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/doc/pg057-fifo-generator.pdf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.ucf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/example_design/fifo_4k_2clk_exdes.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/fifo_generator_v9_3_readme.txt +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/implement/implement.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/implement/implement.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/implement/implement_synplify.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/implement/implement_synplify.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/implement/planAhead_ise.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/implement/planAhead_ise.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/implement/planAhead_ise.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/implement/xst.prj +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/implement/xst.scr +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/fifo_4k_2clk_dgen.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/fifo_4k_2clk_dverif.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/fifo_4k_2clk_pctrl.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/fifo_4k_2clk_pkg.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/fifo_4k_2clk_rng.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/fifo_4k_2clk_synth.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/fifo_4k_2clk_tb.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/simulate_isim.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/simulate_isim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/simulate_mti.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/simulate_mti.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/simulate_mti.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/simulate_ncsim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/simulate_vcs.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/ucli_commands.key +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/vcs_session.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/wave_isim.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/wave_mti.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/functional/wave_ncsim.sv +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/simulate_isim.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/simulate_isim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/simulate_mti.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/simulate_mti.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/simulate_mti.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/simulate_ncsim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/simulate_vcs.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/ucli_commands.key +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/vcs_session.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/wave_isim.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/wave_mti.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk/simulation/timing/wave_ncsim.sv +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk.asy +utilities_xmdf::xmdfSetData $instance FileSet $fcount type asy +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk.ngc +utilities_xmdf::xmdfSetData $instance FileSet $fcount type ngc +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk.v +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk.veo +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog_template +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk.xco +utilities_xmdf::xmdfSetData $instance FileSet $fcount type coregen_ip +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_4k_2clk_xmdf.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount associated_module fifo_4k_2clk +incr fcount + +} + +# ::gen_comp_name_xmdf::xmdfApplyParams diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.asy b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.asy new file mode 100644 index 000000000..1c03599f3 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.asy @@ -0,0 +1,49 @@ +Version 4 +SymbolType BLOCK +TEXT 32 32 LEFT 4 fifo_short_2clk +RECTANGLE Normal 32 32 800 4064 +LINE Normal 0 112 32 112 +PIN 0 112 LEFT 36 +PINATTR PinName rst +PINATTR Polarity IN +LINE Normal 0 208 32 208 +PIN 0 208 LEFT 36 +PINATTR PinName wr_clk +PINATTR Polarity IN +LINE Wide 0 240 32 240 +PIN 0 240 LEFT 36 +PINATTR PinName din[71:0] +PINATTR Polarity IN +LINE Normal 0 272 32 272 +PIN 0 272 LEFT 36 +PINATTR PinName wr_en +PINATTR Polarity IN +LINE Normal 0 464 32 464 +PIN 0 464 LEFT 36 +PINATTR PinName full +PINATTR Polarity OUT +LINE Wide 0 624 32 624 +PIN 0 624 LEFT 36 +PINATTR PinName wr_data_count[5:0] +PINATTR Polarity OUT +LINE Normal 832 240 800 240 +PIN 832 240 RIGHT 36 +PINATTR PinName rd_clk +PINATTR Polarity IN +LINE Wide 832 272 800 272 +PIN 832 272 RIGHT 36 +PINATTR PinName dout[71:0] +PINATTR Polarity OUT +LINE Normal 832 304 800 304 +PIN 832 304 RIGHT 36 +PINATTR PinName rd_en +PINATTR Polarity IN +LINE Normal 832 496 800 496 +PIN 832 496 RIGHT 36 +PINATTR PinName empty +PINATTR Polarity OUT +LINE Wide 832 656 800 656 +PIN 832 656 RIGHT 36 +PINATTR PinName rd_data_count[5:0] +PINATTR Polarity OUT + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.ncf b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.ncf new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.ncf diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.ngc b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.ngc new file mode 100644 index 000000000..6d6ba3499 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.ngc @@ -0,0 +1,3 @@ +XILINX-XDB 0.1 STUB 0.1 ASCII +XILINX-XDM V1.6e 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\ No newline at end of file diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.v b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.v new file mode 100644 index 000000000..0dceb161c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.v @@ -0,0 +1,491 @@ +/******************************************************************************* +* This file is owned and controlled by Xilinx and must be used solely * +* for design, simulation, implementation and creation of design files * +* limited to Xilinx devices or technologies. Use with non-Xilinx * +* devices or technologies is expressly prohibited and immediately * +* terminates your license. * +* * +* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY * +* FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY * +* PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE * +* IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS * +* MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY * +* CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY * +* RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY * +* DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE * +* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR * +* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF * +* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * +* PARTICULAR PURPOSE. * +* * +* Xilinx products are not intended for use in life support appliances, * +* devices, or systems. Use in such applications are expressly * +* prohibited. * +* * +* (c) Copyright 1995-2015 Xilinx, Inc. * +* All rights reserved. * +*******************************************************************************/ +// You must compile the wrapper file fifo_short_2clk.v when simulating +// the core, fifo_short_2clk. When compiling the wrapper file, be sure to +// reference the XilinxCoreLib Verilog simulation library. For detailed +// instructions, please refer to the "CORE Generator Help". + +// The synthesis directives "translate_off/translate_on" specified below are +// supported by Xilinx, Mentor Graphics and Synplicity synthesis +// tools. Ensure they are correct for your synthesis tool(s). + +`timescale 1ns/1ps + +module fifo_short_2clk( + rst, + wr_clk, + rd_clk, + din, + wr_en, + rd_en, + dout, + full, + empty, + rd_data_count, + wr_data_count +); + +input rst; +input wr_clk; +input rd_clk; +input [71 : 0] din; +input wr_en; +input rd_en; +output [71 : 0] dout; +output full; +output empty; +output [5 : 0] rd_data_count; +output [5 : 0] wr_data_count; + +// synthesis translate_off + + FIFO_GENERATOR_V9_3 #( + .C_ADD_NGC_CONSTRAINT(0), + .C_APPLICATION_TYPE_AXIS(0), + .C_APPLICATION_TYPE_RACH(0), + .C_APPLICATION_TYPE_RDCH(0), + .C_APPLICATION_TYPE_WACH(0), + .C_APPLICATION_TYPE_WDCH(0), + .C_APPLICATION_TYPE_WRCH(0), + .C_AXI_ADDR_WIDTH(32), + .C_AXI_ARUSER_WIDTH(1), + .C_AXI_AWUSER_WIDTH(1), + .C_AXI_BUSER_WIDTH(1), + .C_AXI_DATA_WIDTH(64), + .C_AXI_ID_WIDTH(4), + .C_AXI_RUSER_WIDTH(1), + .C_AXI_TYPE(0), + .C_AXI_WUSER_WIDTH(1), + .C_AXIS_TDATA_WIDTH(64), + .C_AXIS_TDEST_WIDTH(4), + .C_AXIS_TID_WIDTH(8), + .C_AXIS_TKEEP_WIDTH(4), + .C_AXIS_TSTRB_WIDTH(4), + .C_AXIS_TUSER_WIDTH(4), + .C_AXIS_TYPE(0), + .C_COMMON_CLOCK(0), + .C_COUNT_TYPE(0), + .C_DATA_COUNT_WIDTH(5), + .C_DEFAULT_VALUE("BlankString"), + .C_DIN_WIDTH(72), + .C_DIN_WIDTH_AXIS(1), + .C_DIN_WIDTH_RACH(32), + .C_DIN_WIDTH_RDCH(64), + .C_DIN_WIDTH_WACH(32), + .C_DIN_WIDTH_WDCH(64), + .C_DIN_WIDTH_WRCH(2), + .C_DOUT_RST_VAL("0"), + .C_DOUT_WIDTH(72), + .C_ENABLE_RLOCS(0), + .C_ENABLE_RST_SYNC(1), + .C_ERROR_INJECTION_TYPE(0), + .C_ERROR_INJECTION_TYPE_AXIS(0), + .C_ERROR_INJECTION_TYPE_RACH(0), + .C_ERROR_INJECTION_TYPE_RDCH(0), + .C_ERROR_INJECTION_TYPE_WACH(0), + .C_ERROR_INJECTION_TYPE_WDCH(0), + .C_ERROR_INJECTION_TYPE_WRCH(0), + .C_FAMILY("spartan6"), + .C_FULL_FLAGS_RST_VAL(1), + .C_HAS_ALMOST_EMPTY(0), + .C_HAS_ALMOST_FULL(0), + .C_HAS_AXI_ARUSER(0), + .C_HAS_AXI_AWUSER(0), + .C_HAS_AXI_BUSER(0), + .C_HAS_AXI_RD_CHANNEL(0), + .C_HAS_AXI_RUSER(0), + .C_HAS_AXI_WR_CHANNEL(0), + .C_HAS_AXI_WUSER(0), + .C_HAS_AXIS_TDATA(0), + .C_HAS_AXIS_TDEST(0), + .C_HAS_AXIS_TID(0), + .C_HAS_AXIS_TKEEP(0), + .C_HAS_AXIS_TLAST(0), + .C_HAS_AXIS_TREADY(1), + .C_HAS_AXIS_TSTRB(0), + .C_HAS_AXIS_TUSER(0), + .C_HAS_BACKUP(0), + .C_HAS_DATA_COUNT(0), + .C_HAS_DATA_COUNTS_AXIS(0), + .C_HAS_DATA_COUNTS_RACH(0), + .C_HAS_DATA_COUNTS_RDCH(0), + .C_HAS_DATA_COUNTS_WACH(0), + .C_HAS_DATA_COUNTS_WDCH(0), + .C_HAS_DATA_COUNTS_WRCH(0), + .C_HAS_INT_CLK(0), + .C_HAS_MASTER_CE(0), + .C_HAS_MEMINIT_FILE(0), + .C_HAS_OVERFLOW(0), + .C_HAS_PROG_FLAGS_AXIS(0), + .C_HAS_PROG_FLAGS_RACH(0), + .C_HAS_PROG_FLAGS_RDCH(0), + .C_HAS_PROG_FLAGS_WACH(0), + .C_HAS_PROG_FLAGS_WDCH(0), + .C_HAS_PROG_FLAGS_WRCH(0), + .C_HAS_RD_DATA_COUNT(1), + .C_HAS_RD_RST(0), + .C_HAS_RST(1), + .C_HAS_SLAVE_CE(0), + .C_HAS_SRST(0), + .C_HAS_UNDERFLOW(0), + .C_HAS_VALID(0), + .C_HAS_WR_ACK(0), + .C_HAS_WR_DATA_COUNT(1), + .C_HAS_WR_RST(0), + .C_IMPLEMENTATION_TYPE(2), + .C_IMPLEMENTATION_TYPE_AXIS(1), + .C_IMPLEMENTATION_TYPE_RACH(1), + .C_IMPLEMENTATION_TYPE_RDCH(1), + .C_IMPLEMENTATION_TYPE_WACH(1), + .C_IMPLEMENTATION_TYPE_WDCH(1), + .C_IMPLEMENTATION_TYPE_WRCH(1), + .C_INIT_WR_PNTR_VAL(0), + .C_INTERFACE_TYPE(0), + .C_MEMORY_TYPE(2), + .C_MIF_FILE_NAME("BlankString"), + .C_MSGON_VAL(1), + .C_OPTIMIZATION_MODE(0), + .C_OVERFLOW_LOW(0), + .C_PRELOAD_LATENCY(0), + .C_PRELOAD_REGS(1), + .C_PRIM_FIFO_TYPE("512x72"), + .C_PROG_EMPTY_THRESH_ASSERT_VAL(4), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH(1022), + .C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH(1022), + .C_PROG_EMPTY_THRESH_NEGATE_VAL(5), + .C_PROG_EMPTY_TYPE(0), + .C_PROG_EMPTY_TYPE_AXIS(0), + .C_PROG_EMPTY_TYPE_RACH(0), + .C_PROG_EMPTY_TYPE_RDCH(0), + .C_PROG_EMPTY_TYPE_WACH(0), + .C_PROG_EMPTY_TYPE_WDCH(0), + .C_PROG_EMPTY_TYPE_WRCH(0), + .C_PROG_FULL_THRESH_ASSERT_VAL(31), + .C_PROG_FULL_THRESH_ASSERT_VAL_AXIS(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_RACH(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_RDCH(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_WACH(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_WDCH(1023), + .C_PROG_FULL_THRESH_ASSERT_VAL_WRCH(1023), + .C_PROG_FULL_THRESH_NEGATE_VAL(30), + .C_PROG_FULL_TYPE(0), + .C_PROG_FULL_TYPE_AXIS(0), + .C_PROG_FULL_TYPE_RACH(0), + .C_PROG_FULL_TYPE_RDCH(0), + .C_PROG_FULL_TYPE_WACH(0), + .C_PROG_FULL_TYPE_WDCH(0), + .C_PROG_FULL_TYPE_WRCH(0), + .C_RACH_TYPE(0), + .C_RD_DATA_COUNT_WIDTH(6), + .C_RD_DEPTH(32), + .C_RD_FREQ(1), + .C_RD_PNTR_WIDTH(5), + .C_RDCH_TYPE(0), + .C_REG_SLICE_MODE_AXIS(0), + .C_REG_SLICE_MODE_RACH(0), + .C_REG_SLICE_MODE_RDCH(0), + .C_REG_SLICE_MODE_WACH(0), + .C_REG_SLICE_MODE_WDCH(0), + .C_REG_SLICE_MODE_WRCH(0), + .C_SYNCHRONIZER_STAGE(2), + .C_UNDERFLOW_LOW(0), + .C_USE_COMMON_OVERFLOW(0), + .C_USE_COMMON_UNDERFLOW(0), + .C_USE_DEFAULT_SETTINGS(0), + .C_USE_DOUT_RST(1), + .C_USE_ECC(0), + .C_USE_ECC_AXIS(0), + .C_USE_ECC_RACH(0), + .C_USE_ECC_RDCH(0), + .C_USE_ECC_WACH(0), + .C_USE_ECC_WDCH(0), + .C_USE_ECC_WRCH(0), + .C_USE_EMBEDDED_REG(0), + .C_USE_FIFO16_FLAGS(0), + .C_USE_FWFT_DATA_COUNT(1), + .C_VALID_LOW(0), + .C_WACH_TYPE(0), + .C_WDCH_TYPE(0), + .C_WR_ACK_LOW(0), + .C_WR_DATA_COUNT_WIDTH(6), + .C_WR_DEPTH(32), + .C_WR_DEPTH_AXIS(1024), + .C_WR_DEPTH_RACH(16), + .C_WR_DEPTH_RDCH(1024), + .C_WR_DEPTH_WACH(16), + .C_WR_DEPTH_WDCH(1024), + .C_WR_DEPTH_WRCH(16), + .C_WR_FREQ(1), + .C_WR_PNTR_WIDTH(5), + .C_WR_PNTR_WIDTH_AXIS(10), + .C_WR_PNTR_WIDTH_RACH(4), + .C_WR_PNTR_WIDTH_RDCH(10), + .C_WR_PNTR_WIDTH_WACH(4), + .C_WR_PNTR_WIDTH_WDCH(10), + .C_WR_PNTR_WIDTH_WRCH(4), + .C_WR_RESPONSE_LATENCY(1), + .C_WRCH_TYPE(0) + ) + inst ( + .RST(rst), + .WR_CLK(wr_clk), + .RD_CLK(rd_clk), + .DIN(din), + .WR_EN(wr_en), + .RD_EN(rd_en), + .DOUT(dout), + .FULL(full), + .EMPTY(empty), + .RD_DATA_COUNT(rd_data_count), + .WR_DATA_COUNT(wr_data_count), + .BACKUP(), + .BACKUP_MARKER(), + .CLK(), + .SRST(), + .WR_RST(), + .RD_RST(), + .PROG_EMPTY_THRESH(), + .PROG_EMPTY_THRESH_ASSERT(), + .PROG_EMPTY_THRESH_NEGATE(), + .PROG_FULL_THRESH(), + .PROG_FULL_THRESH_ASSERT(), + .PROG_FULL_THRESH_NEGATE(), + .INT_CLK(), + .INJECTDBITERR(), + .INJECTSBITERR(), + .ALMOST_FULL(), + .WR_ACK(), + .OVERFLOW(), + .ALMOST_EMPTY(), + .VALID(), + .UNDERFLOW(), + .DATA_COUNT(), + .PROG_FULL(), + .PROG_EMPTY(), + .SBITERR(), + .DBITERR(), + .M_ACLK(), + .S_ACLK(), + .S_ARESETN(), + .M_ACLK_EN(), + .S_ACLK_EN(), + .S_AXI_AWID(), + .S_AXI_AWADDR(), + .S_AXI_AWLEN(), + .S_AXI_AWSIZE(), + .S_AXI_AWBURST(), + .S_AXI_AWLOCK(), + .S_AXI_AWCACHE(), + .S_AXI_AWPROT(), + .S_AXI_AWQOS(), + .S_AXI_AWREGION(), + .S_AXI_AWUSER(), + .S_AXI_AWVALID(), + .S_AXI_AWREADY(), + .S_AXI_WID(), + .S_AXI_WDATA(), + .S_AXI_WSTRB(), + .S_AXI_WLAST(), + .S_AXI_WUSER(), + .S_AXI_WVALID(), + .S_AXI_WREADY(), + .S_AXI_BID(), + .S_AXI_BRESP(), + .S_AXI_BUSER(), + .S_AXI_BVALID(), + .S_AXI_BREADY(), + .M_AXI_AWID(), + .M_AXI_AWADDR(), + .M_AXI_AWLEN(), + .M_AXI_AWSIZE(), + .M_AXI_AWBURST(), + .M_AXI_AWLOCK(), + .M_AXI_AWCACHE(), + .M_AXI_AWPROT(), + .M_AXI_AWQOS(), + .M_AXI_AWREGION(), + .M_AXI_AWUSER(), + .M_AXI_AWVALID(), + .M_AXI_AWREADY(), + .M_AXI_WID(), + .M_AXI_WDATA(), + .M_AXI_WSTRB(), + .M_AXI_WLAST(), + .M_AXI_WUSER(), + .M_AXI_WVALID(), + .M_AXI_WREADY(), + .M_AXI_BID(), + .M_AXI_BRESP(), + .M_AXI_BUSER(), + .M_AXI_BVALID(), + .M_AXI_BREADY(), + .S_AXI_ARID(), + .S_AXI_ARADDR(), + .S_AXI_ARLEN(), + .S_AXI_ARSIZE(), + .S_AXI_ARBURST(), + .S_AXI_ARLOCK(), + .S_AXI_ARCACHE(), + .S_AXI_ARPROT(), + .S_AXI_ARQOS(), + .S_AXI_ARREGION(), + .S_AXI_ARUSER(), + .S_AXI_ARVALID(), + .S_AXI_ARREADY(), + .S_AXI_RID(), + .S_AXI_RDATA(), + .S_AXI_RRESP(), + .S_AXI_RLAST(), + .S_AXI_RUSER(), + .S_AXI_RVALID(), + .S_AXI_RREADY(), + .M_AXI_ARID(), + .M_AXI_ARADDR(), + .M_AXI_ARLEN(), + .M_AXI_ARSIZE(), + .M_AXI_ARBURST(), + .M_AXI_ARLOCK(), + .M_AXI_ARCACHE(), + .M_AXI_ARPROT(), + .M_AXI_ARQOS(), + .M_AXI_ARREGION(), + .M_AXI_ARUSER(), + .M_AXI_ARVALID(), + .M_AXI_ARREADY(), + .M_AXI_RID(), + .M_AXI_RDATA(), + .M_AXI_RRESP(), + .M_AXI_RLAST(), + .M_AXI_RUSER(), + .M_AXI_RVALID(), + .M_AXI_RREADY(), + .S_AXIS_TVALID(), + .S_AXIS_TREADY(), + .S_AXIS_TDATA(), + .S_AXIS_TSTRB(), + .S_AXIS_TKEEP(), + .S_AXIS_TLAST(), + .S_AXIS_TID(), + .S_AXIS_TDEST(), + .S_AXIS_TUSER(), + .M_AXIS_TVALID(), + .M_AXIS_TREADY(), + .M_AXIS_TDATA(), + .M_AXIS_TSTRB(), + .M_AXIS_TKEEP(), + .M_AXIS_TLAST(), + .M_AXIS_TID(), + .M_AXIS_TDEST(), + .M_AXIS_TUSER(), + .AXI_AW_INJECTSBITERR(), + .AXI_AW_INJECTDBITERR(), + .AXI_AW_PROG_FULL_THRESH(), + .AXI_AW_PROG_EMPTY_THRESH(), + .AXI_AW_DATA_COUNT(), + .AXI_AW_WR_DATA_COUNT(), + .AXI_AW_RD_DATA_COUNT(), + .AXI_AW_SBITERR(), + .AXI_AW_DBITERR(), + .AXI_AW_OVERFLOW(), + .AXI_AW_UNDERFLOW(), + .AXI_AW_PROG_FULL(), + .AXI_AW_PROG_EMPTY(), + .AXI_W_INJECTSBITERR(), + .AXI_W_INJECTDBITERR(), + .AXI_W_PROG_FULL_THRESH(), + .AXI_W_PROG_EMPTY_THRESH(), + .AXI_W_DATA_COUNT(), + .AXI_W_WR_DATA_COUNT(), + .AXI_W_RD_DATA_COUNT(), + .AXI_W_SBITERR(), + .AXI_W_DBITERR(), + .AXI_W_OVERFLOW(), + .AXI_W_UNDERFLOW(), + .AXI_B_INJECTSBITERR(), + .AXI_W_PROG_FULL(), + .AXI_W_PROG_EMPTY(), + .AXI_B_INJECTDBITERR(), + .AXI_B_PROG_FULL_THRESH(), + .AXI_B_PROG_EMPTY_THRESH(), + .AXI_B_DATA_COUNT(), + .AXI_B_WR_DATA_COUNT(), + .AXI_B_RD_DATA_COUNT(), + .AXI_B_SBITERR(), + .AXI_B_DBITERR(), + .AXI_B_OVERFLOW(), + .AXI_B_UNDERFLOW(), + .AXI_AR_INJECTSBITERR(), + .AXI_B_PROG_FULL(), + .AXI_B_PROG_EMPTY(), + .AXI_AR_INJECTDBITERR(), + .AXI_AR_PROG_FULL_THRESH(), + .AXI_AR_PROG_EMPTY_THRESH(), + .AXI_AR_DATA_COUNT(), + .AXI_AR_WR_DATA_COUNT(), + .AXI_AR_RD_DATA_COUNT(), + .AXI_AR_SBITERR(), + .AXI_AR_DBITERR(), + .AXI_AR_OVERFLOW(), + .AXI_AR_UNDERFLOW(), + .AXI_AR_PROG_FULL(), + .AXI_AR_PROG_EMPTY(), + .AXI_R_INJECTSBITERR(), + .AXI_R_INJECTDBITERR(), + .AXI_R_PROG_FULL_THRESH(), + .AXI_R_PROG_EMPTY_THRESH(), + .AXI_R_DATA_COUNT(), + .AXI_R_WR_DATA_COUNT(), + .AXI_R_RD_DATA_COUNT(), + .AXI_R_SBITERR(), + .AXI_R_DBITERR(), + .AXI_R_OVERFLOW(), + .AXI_R_UNDERFLOW(), + .AXIS_INJECTSBITERR(), + .AXI_R_PROG_FULL(), + .AXI_R_PROG_EMPTY(), + .AXIS_INJECTDBITERR(), + .AXIS_PROG_FULL_THRESH(), + .AXIS_PROG_EMPTY_THRESH(), + .AXIS_DATA_COUNT(), + .AXIS_WR_DATA_COUNT(), + .AXIS_RD_DATA_COUNT(), + .AXIS_SBITERR(), + .AXIS_DBITERR(), + .AXIS_OVERFLOW(), + .AXIS_UNDERFLOW(), + .AXIS_PROG_FULL(), + .AXIS_PROG_EMPTY() + ); + +// synthesis translate_on + +endmodule diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.veo b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.veo new file mode 100644 index 000000000..a40249575 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.veo @@ -0,0 +1,79 @@ +/******************************************************************************* +* This file is owned and controlled by Xilinx and must be used solely * +* for design, simulation, implementation and creation of design files * +* limited to Xilinx devices or technologies. Use with non-Xilinx * +* devices or technologies is expressly prohibited and immediately * +* terminates your license. * +* * +* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY * +* FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY * +* PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE * +* IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS * +* MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY * +* CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY * +* RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY * +* DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE * +* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR * +* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF * +* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * +* PARTICULAR PURPOSE. * +* * +* Xilinx products are not intended for use in life support appliances, * +* devices, or systems. Use in such applications are expressly * +* prohibited. * +* * +* (c) Copyright 1995-2015 Xilinx, Inc. * +* All rights reserved. * +*******************************************************************************/ + +/******************************************************************************* +* Generated from core with identifier: xilinx.com:ip:fifo_generator:9.3 * +* * +* Rev 1. The FIFO Generator is a parameterizable first-in/first-out * +* memory queue generator. Use it to generate resource and performance * +* optimized FIFOs with common or independent read/write clock domains, * +* and optional fixed or programmable full and empty flags and * +* handshaking signals. Choose from a selection of memory resource * +* types for implementation. Optional Hamming code based error * +* detection and correction as well as error injection capability for * +* system test help to insure data integrity. FIFO width and depth are * +* parameterizable, and for native interface FIFOs, asymmetric read and * +* write port widths are also supported. * +*******************************************************************************/ + +// Interfaces: +// AXI4Stream_MASTER_M_AXIS +// AXI4Stream_SLAVE_S_AXIS +// AXI4_MASTER_M_AXI +// AXI4_SLAVE_S_AXI +// AXI4Lite_MASTER_M_AXI +// AXI4Lite_SLAVE_S_AXI +// master_aclk +// slave_aclk +// slave_aresetn + +// The following must be inserted into your Verilog file for this +// core to be instantiated. Change the instance name and port connections +// (in parentheses) to your own signal names. + +//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG +fifo_short_2clk your_instance_name ( + .rst(rst), // input rst + .wr_clk(wr_clk), // input wr_clk + .rd_clk(rd_clk), // input rd_clk + .din(din), // input [71 : 0] din + .wr_en(wr_en), // input wr_en + .rd_en(rd_en), // input rd_en + .dout(dout), // output [71 : 0] dout + .full(full), // output full + .empty(empty), // output empty + .rd_data_count(rd_data_count), // output [5 : 0] rd_data_count + .wr_data_count(wr_data_count) // output [5 : 0] wr_data_count +); +// INST_TAG_END ------ End INSTANTIATION Template --------- + +// You must compile the wrapper file fifo_short_2clk.v when simulating +// the core, fifo_short_2clk. When compiling the wrapper file, be sure to +// reference the XilinxCoreLib Verilog simulation library. For detailed +// instructions, please refer to the "CORE Generator Help". + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.xco b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.xco new file mode 100644 index 000000000..134068453 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk.xco @@ -0,0 +1,213 @@ +############################################################## +# +# Xilinx Core Generator version 14.7 +# Date: Thu Mar 26 19:30:05 2015 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# Generated from component: xilinx.com:ip:fifo_generator:9.3 +# +############################################################## +# +# BEGIN Project Options +SET addpads = false +SET asysymbol = true +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = false +SET designentry = Verilog +SET device = xc6slx75 +SET devicefamily = spartan6 +SET flowvendor = Foundation_ISE +SET formalverification = false +SET foundationsym = false +SET implementationfiletype = Ngc +SET package = csg484 +SET removerpms = false +SET simulationfiles = Behavioral +SET speedgrade = -3 +SET verilogsim = true +SET vhdlsim = false +# END Project Options +# BEGIN Select +SELECT FIFO_Generator xilinx.com:ip:fifo_generator:9.3 +# END Select +# BEGIN Parameters +CSET add_ngc_constraint_axi=false +CSET almost_empty_flag=false +CSET almost_full_flag=false +CSET aruser_width=1 +CSET awuser_width=1 +CSET axi_address_width=32 +CSET axi_data_width=64 +CSET axi_type=AXI4_Stream +CSET axis_type=FIFO +CSET buser_width=1 +CSET clock_enable_type=Slave_Interface_Clock_Enable +CSET clock_type_axi=Common_Clock +CSET component_name=fifo_short_2clk +CSET data_count=false +CSET data_count_width=5 +CSET disable_timing_violations=false +CSET disable_timing_violations_axi=false +CSET dout_reset_value=0 +CSET empty_threshold_assert_value=4 +CSET empty_threshold_assert_value_axis=1022 +CSET empty_threshold_assert_value_rach=1022 +CSET empty_threshold_assert_value_rdch=1022 +CSET empty_threshold_assert_value_wach=1022 +CSET empty_threshold_assert_value_wdch=1022 +CSET empty_threshold_assert_value_wrch=1022 +CSET empty_threshold_negate_value=5 +CSET enable_aruser=false +CSET enable_awuser=false +CSET enable_buser=false +CSET enable_common_overflow=false +CSET enable_common_underflow=false +CSET enable_data_counts_axis=false +CSET enable_data_counts_rach=false +CSET enable_data_counts_rdch=false +CSET enable_data_counts_wach=false +CSET enable_data_counts_wdch=false +CSET enable_data_counts_wrch=false +CSET enable_ecc=false +CSET enable_ecc_axis=false +CSET enable_ecc_rach=false +CSET enable_ecc_rdch=false +CSET enable_ecc_wach=false +CSET enable_ecc_wdch=false +CSET enable_ecc_wrch=false +CSET enable_read_channel=false +CSET enable_read_pointer_increment_by2=false +CSET enable_reset_synchronization=true +CSET enable_ruser=false +CSET enable_tdata=false +CSET enable_tdest=false +CSET enable_tid=false +CSET enable_tkeep=false +CSET enable_tlast=false +CSET enable_tready=true +CSET enable_tstrobe=false +CSET enable_tuser=false +CSET enable_write_channel=false +CSET enable_wuser=false +CSET fifo_application_type_axis=Data_FIFO +CSET fifo_application_type_rach=Data_FIFO +CSET fifo_application_type_rdch=Data_FIFO +CSET fifo_application_type_wach=Data_FIFO +CSET fifo_application_type_wdch=Data_FIFO +CSET fifo_application_type_wrch=Data_FIFO +CSET fifo_implementation=Independent_Clocks_Distributed_RAM +CSET fifo_implementation_axis=Common_Clock_Block_RAM +CSET fifo_implementation_rach=Common_Clock_Block_RAM +CSET fifo_implementation_rdch=Common_Clock_Block_RAM +CSET fifo_implementation_wach=Common_Clock_Block_RAM +CSET fifo_implementation_wdch=Common_Clock_Block_RAM +CSET fifo_implementation_wrch=Common_Clock_Block_RAM +CSET full_flags_reset_value=1 +CSET full_threshold_assert_value=31 +CSET full_threshold_assert_value_axis=1023 +CSET full_threshold_assert_value_rach=1023 +CSET full_threshold_assert_value_rdch=1023 +CSET full_threshold_assert_value_wach=1023 +CSET full_threshold_assert_value_wdch=1023 +CSET full_threshold_assert_value_wrch=1023 +CSET full_threshold_negate_value=30 +CSET id_width=4 +CSET inject_dbit_error=false +CSET inject_dbit_error_axis=false +CSET inject_dbit_error_rach=false +CSET inject_dbit_error_rdch=false +CSET inject_dbit_error_wach=false +CSET inject_dbit_error_wdch=false +CSET inject_dbit_error_wrch=false +CSET inject_sbit_error=false +CSET inject_sbit_error_axis=false +CSET inject_sbit_error_rach=false +CSET inject_sbit_error_rdch=false +CSET inject_sbit_error_wach=false +CSET inject_sbit_error_wdch=false +CSET inject_sbit_error_wrch=false +CSET input_data_width=72 +CSET input_depth=32 +CSET input_depth_axis=1024 +CSET input_depth_rach=16 +CSET input_depth_rdch=1024 +CSET input_depth_wach=16 +CSET input_depth_wdch=1024 +CSET input_depth_wrch=16 +CSET interface_type=Native +CSET output_data_width=72 +CSET output_depth=32 +CSET overflow_flag=false +CSET overflow_flag_axi=false +CSET overflow_sense=Active_High +CSET overflow_sense_axi=Active_High +CSET performance_options=First_Word_Fall_Through +CSET programmable_empty_type=No_Programmable_Empty_Threshold +CSET programmable_empty_type_axis=No_Programmable_Empty_Threshold +CSET programmable_empty_type_rach=No_Programmable_Empty_Threshold +CSET programmable_empty_type_rdch=No_Programmable_Empty_Threshold +CSET programmable_empty_type_wach=No_Programmable_Empty_Threshold +CSET programmable_empty_type_wdch=No_Programmable_Empty_Threshold +CSET programmable_empty_type_wrch=No_Programmable_Empty_Threshold +CSET programmable_full_type=No_Programmable_Full_Threshold +CSET programmable_full_type_axis=No_Programmable_Full_Threshold +CSET programmable_full_type_rach=No_Programmable_Full_Threshold +CSET programmable_full_type_rdch=No_Programmable_Full_Threshold +CSET programmable_full_type_wach=No_Programmable_Full_Threshold +CSET programmable_full_type_wdch=No_Programmable_Full_Threshold +CSET programmable_full_type_wrch=No_Programmable_Full_Threshold +CSET rach_type=FIFO +CSET rdch_type=FIFO +CSET read_clock_frequency=1 +CSET read_data_count=true +CSET read_data_count_width=6 +CSET register_slice_mode_axis=Fully_Registered +CSET register_slice_mode_rach=Fully_Registered +CSET register_slice_mode_rdch=Fully_Registered +CSET register_slice_mode_wach=Fully_Registered +CSET register_slice_mode_wdch=Fully_Registered +CSET register_slice_mode_wrch=Fully_Registered +CSET reset_pin=true +CSET reset_type=Asynchronous_Reset +CSET ruser_width=1 +CSET synchronization_stages=2 +CSET synchronization_stages_axi=2 +CSET tdata_width=64 +CSET tdest_width=4 +CSET tid_width=8 +CSET tkeep_width=4 +CSET tstrb_width=4 +CSET tuser_width=4 +CSET underflow_flag=false +CSET underflow_flag_axi=false +CSET underflow_sense=Active_High +CSET underflow_sense_axi=Active_High +CSET use_clock_enable=false +CSET use_dout_reset=true +CSET use_embedded_registers=false +CSET use_extra_logic=true +CSET valid_flag=false +CSET valid_sense=Active_High +CSET wach_type=FIFO +CSET wdch_type=FIFO +CSET wrch_type=FIFO +CSET write_acknowledge_flag=false +CSET write_acknowledge_sense=Active_High +CSET write_clock_frequency=1 +CSET write_data_count=true +CSET write_data_count_width=6 +CSET wuser_width=1 +# END Parameters +# BEGIN Extra information +MISC pkg_timestamp=2012-11-19T12:39:56Z +# END Extra information +GENERATE +# CRC: 95100427 diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/doc/fifo_generator_v9_3_readme.txt b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/doc/fifo_generator_v9_3_readme.txt new file mode 100644 index 000000000..7853ebde8 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/doc/fifo_generator_v9_3_readme.txt @@ -0,0 +1,236 @@ +CHANGE LOG for LogiCORE FIFO Generator V9.3 Rev 1 + + Release Date: December 18, 2012 +-------------------------------------------------------------------------------- + +Table of Contents + +1. INTRODUCTION +2. DEVICE SUPPORT +3. NEW FEATURE HISTORY +4. RESOLVED ISSUES +5. KNOWN ISSUES & LIMITATIONS +6. TECHNICAL SUPPORT & FEEDBACK +7. CORE RELEASE HISTORY +8. LEGAL DISCLAIMER + +-------------------------------------------------------------------------------- + + +1. INTRODUCTION + +For installation instructions for this release, please go to: + + http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm + +For system requirements: + + http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm + +This file contains release notes for the Xilinx LogiCORE IP FIFO Generator v9.3 Rev 1 +solution. For the latest core updates, see the product page at: + + http://www.xilinx.com/products/ipcenter/FIFO_Generator.htm + +................................................................................ + + +2. DEVICE SUPPORT + + + 2.1 ISE + + The following device families are supported by the core for this release. + + + All 7 Series devices + Zynq-7000 devices + All Virtex-6 devices + All Spartan-6 devices + All Virtex-5 devices + All Spartan-3 devices + All Virtex-4 devices + + + 2.2 Vivado + + All 7 Series devices + Zynq-7000 devices + +................................................................................ + + +3. NEW FEATURE HISTORY + + + 3.1 ISE + + - ISE 14.4 software support + + + 3.2 Vivado + + - 2012.4 software support + - IP level constraint for Built-in FIFO reset synchronizer + +................................................................................ + + +4. RESOLVED ISSUES + + + 4.1 ISE + + - N/A + + + 4.2 Vivado + + - N/A + + +................................................................................ + + +5. KNOWN ISSUES & LIMITATIONS + + + 5.1 ISE + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Importing an XCO file alters the XCO configurations + + Description: In the FIFO Generator GUI, after importing an XCO file (Independent clock, distributed memory configuration) + into a Virtex-4 CORE Generator project, if the FIFO type is changed to "Independent Clocks, Built-in FIFO" in page 1, + page 2 does not correctly offer the Read Clock Frequency and Write Clock Frequency options as it should. + + CR 467240 + AR 31379 + + 2. Status flags after the first write to Common Clock Built-in FIFO not guaranteed + + Description: When using Common Clock Built-in FIFO configuration with asynchronous reset for Virtex-6 FPGA, + correct behavior of the FIFO status flags cannot be guaranteed after the first write. + + Workaround: To work around this issue, synchronize the negative edge of reset to RDCLK/WRCLK. + For more information and additional workaround see Answer Record 41099. + + 5.2 Vivado + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Description: When Trying to upgrade to latest version of FIFO Generator from older verions, following error message is seen + ERROR: [Common 17-69] Command failed: invalid command name "puts" and Auto Upgradation does not work. + + CR 665836 + +The most recent information, including known issues, workarounds, and +resolutions for this version is provided in the IP Release Notes User Guide +located at + + www.xilinx.com/support/documentation/user_guides/xtp025.pdf + +................................................................................ + + +6. TECHNICAL SUPPORT & FEEDBACK + +To obtain technical support, create a WebCase at www.xilinx.com/support. +Questions are routed to a team with expertise using this product. + +Xilinx provides technical support for use of this product when used +according to the guidelines described in the core documentation, and +cannot guarantee timing, functionality, or support of this product for +designs that do not follow specified guidelines. + +................................................................................ + + +7. CORE RELEASE HISTORY + +Date By Version Description +================================================================================ +12/18/2012 Xilinx, Inc. 9.3 Rev 1 ISE 14.4 and Vivado 2012.4 support; IP level constraint for Built-in FIFO reset synchronizer +10/16/2012 Xilinx, Inc. 9.3 ISE 14.3 and Vivado 2012.3 support; Clock Enable support for AXI4 Stream FIFO +07/25/2012 Xilinx, Inc. 9.2 ISE 14.2 and Vivado 2012.2 support; Accurate data count support for AXI4 Stream Packet FIFO +04/24/2012 Xilinx, Inc. 9.1 ISE 14.1 and Vivado 2012.1 support; Defense Grade 7 Series and Zynq devices, and Automotive Zynq device support + AXI FIFO data width support up to 4096; Programmable Full/Empty as sideband signals for AXI FIFO +01/18/2012 Xilinx, Inc. 8.4 ISE 13.4 support and Packet FIFO feature addition; Artix-7 Lower Power and Automotive Artix-7 device support +10/19/2011 Xilinx, Inc. 8.3 ISE 13.3 support and QVirtex-6L device support +06/22/2011 Xilinx, Inc. 8.2 ISE 13.2 support and Kintex-7L, Virtex-7L, Artix-7 and Zynq-7000 device support +03/01/2011 Xilinx, Inc. 8.1 ISE 13.1 support and Virtex-7 and Kintex-7 device support; Wiring Logic and Register Slice Support +10/29/2010 Xilinx, Inc. 7.3 ISE 13.0.2 support +09/21/2010 Xilinx, Inc. 7.2 ISE 12.3 support; AXI4 Support +07/30/2010 Xilinx, Inc. 7.1 ISE 13.0.1 support +06/18/2010 Xilinx, Inc. 6.2 ISE 12.2 support +04/19/2010 Xilinx, Inc. 6.1 ISE 12.1 support +12/02/2009 Xilinx, Inc. 5.3 rev 1 ISE 11.4 support; Spartan-6 Low Power and Automotive Spartan-6 Device support +09/16/2009 Xilinx, Inc. 5.3 Update to add 11.3; Virtex-6 Low Power and Virtex-6 HXT Device support +06/24/2009 Xilinx, Inc. 5.2 Update to add 11.2 and Virtex-6 CXT device support +04/24/2009 Xilinx, Inc. 5.1 Update to add 11.1 and Virtex-6 and Spartan-6 device support +09/19/2008 Xilinx, Inc. 4.4 Update to add 10.1 SP3 and Virtex-5 TXT device support and miscellaneous bug fixes +03/24/2008 Xilinx, Inc. 4.3 Update to add 10.1 support and miscellaneous bug fixes +10/03/2007 Xilinx, Inc. 4.2 Support for FWFT for Block RAM and Distributed RAM Common Clock FIFOs +08/08/2007 Xilinx, Inc. 4.1 Update to add 9.2i support; Revised to v4.1; ECC support for block RAM FIFO +04/02/2007 Xilinx, Inc. 3.3 Update to add 9.1i support; Revised to v3.3; Spartan-3A and Spartan-3A DSP support; ECC support +09/21/2006 Xilinx, Inc. 3.2 Revised to v3.2; Spartan-3 and Virtex-4 automotive device support +07/13/2006 Xilinx, Inc. 3.1 Update to add 8.2i support; Revised to v3.1; Virtex-5 support +01/11/2006 Xilinx, Inc. 2.3 Update to add 8.1i support; Revised to v2.3 +08/31/2005 Xilinx, Inc. 2.2 Update to add 7.1i SP4 support; Revised to v2.2 +04/28/2005 Xilinx, Inc. 2.1 Update to add 7.1i SP1 support; Revised to v2.1 +11/04/2004 Xilinx, Inc. 2.0 Update to add 6.3i support; Revised to v2.0 +05/21/2004 Xilinx, Inc. 1.1 Revised to v1.1; Virtex-4 support +04/23/2004 Xilinx, Inc. 1.0 Update to add 6.2i support; First release +================================================================================ + +................................................................................ + + +8. LEGAL DISCLAIMER + +(c) Copyright 2002 - 2012 Xilinx, Inc. All rights reserved. + + This file contains confidential and proprietary information + of Xilinx, Inc. and is protected under U.S. and + international copyright and other intellectual property + laws. + + DISCLAIMER + This disclaimer is not a license and does not grant any + rights to the materials distributed herewith. Except as + otherwise provided in a valid license issued to you by + Xilinx, and to the maximum extent permitted by applicable + law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND + WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES + AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING + BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- + INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and + (2) Xilinx shall not be liable (whether in contract or tort, + including negligence, or under any other theory of + liability) for any loss or damage of any kind or nature + related to, arising under or in connection with these + materials, including for any direct, or any indirect, + special, incidental, or consequential loss or damage + (including loss of data, profits, goodwill, or any type of + loss or damage suffered as a result of any action brought + by a third party) even if such damage or loss was + reasonably foreseeable or Xilinx had been advised of the + possibility of the same. + + CRITICAL APPLICATIONS + Xilinx products are not designed or intended to be fail- + safe, or for use in any application requiring fail-safe + performance, such as life-support or safety devices or + systems, Class III medical devices, nuclear facilities, + applications related to the deployment of airbags, or any + other applications that could lead to death, personal + injury, or severe property or environmental damage + (individually and collectively, "Critical + Applications"). Customer assumes the sole risk and + liability of any use of Xilinx products in Critical + Applications, subject only to applicable laws and + regulations governing limitations on product liability. + + THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS + PART OF THIS FILE AT ALL TIMES. diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/doc/fifo_generator_v9_3_vinfo.html b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/doc/fifo_generator_v9_3_vinfo.html new file mode 100644 index 000000000..fefce62a3 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/doc/fifo_generator_v9_3_vinfo.html @@ -0,0 +1,247 @@ +<HTML> +<HEAD> +<TITLE>fifo_generator_v9_3_vinfo</TITLE> +<META HTTP-EQUIV="Content-Type" CONTENT="text/plain;CHARSET=iso-8859-1"> +</HEAD> +<BODY> +<PRE><FONT face="Arial, Helvetica, sans-serif" size="-1"> +CHANGE LOG for LogiCORE FIFO Generator V9.3 Rev 1 + + Release Date: December 18, 2012 +-------------------------------------------------------------------------------- + +Table of Contents + +1. INTRODUCTION +2. DEVICE SUPPORT +3. NEW FEATURE HISTORY +4. RESOLVED ISSUES +5. KNOWN ISSUES & LIMITATIONS +6. TECHNICAL SUPPORT & FEEDBACK +7. CORE RELEASE HISTORY +8. LEGAL DISCLAIMER + +-------------------------------------------------------------------------------- + + +1. INTRODUCTION + +For installation instructions for this release, please go to: + + <A HREF="http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm">www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm</A> + +For system requirements: + + <A HREF="http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm">www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm</A> + +This file contains release notes for the Xilinx LogiCORE IP FIFO Generator v9.3 Rev 1 +solution. For the latest core updates, see the product page at: + + <A HREF="http://www.xilinx.com/products/ipcenter/FIFO_Generator.htm">www.xilinx.com/products/ipcenter/FIFO_Generator.htm</A> + +................................................................................ + + +2. DEVICE SUPPORT + + + 2.1 ISE + + The following device families are supported by the core for this release. + + + All 7 Series devices + Zynq-7000 devices + All Virtex-6 devices + All Spartan-6 devices + All Virtex-5 devices + All Spartan-3 devices + All Virtex-4 devices + + + 2.2 Vivado + + All 7 Series devices + Zynq-7000 devices + +................................................................................ + + +3. NEW FEATURE HISTORY + + + 3.1 ISE + + - ISE 14.4 software support + + + 3.2 Vivado + + - 2012.4 software support + - IP level constraint for Built-in FIFO reset synchronizer + +................................................................................ + + +4. RESOLVED ISSUES + + + 4.1 ISE + + - N/A + + + 4.2 Vivado + + - N/A + + +................................................................................ + + +5. KNOWN ISSUES & LIMITATIONS + + + 5.1 ISE + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Importing an XCO file alters the XCO configurations + + Description: In the FIFO Generator GUI, after importing an XCO file (Independent clock, distributed memory configuration) + into a Virtex-4 CORE Generator project, if the FIFO type is changed to "Independent Clocks, Built-in FIFO" in page 1, + page 2 does not correctly offer the Read Clock Frequency and Write Clock Frequency options as it should. + + CR 467240 + AR 31379 + + 2. Status flags after the first write to Common Clock Built-in FIFO not guaranteed + + Description: When using Common Clock Built-in FIFO configuration with asynchronous reset for Virtex-6 FPGA, + correct behavior of the FIFO status flags cannot be guaranteed after the first write. + + Workaround: To work around this issue, synchronize the negative edge of reset to RDCLK/WRCLK. + For more information and additional workaround see Answer Record 41099. + + 5.2 Vivado + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Description: When Trying to upgrade to latest version of FIFO Generator from older verions, following error message is seen + ERROR: [Common 17-69] Command failed: invalid command name "puts" and Auto Upgradation does not work. + + CR 665836 + +The most recent information, including known issues, workarounds, and +resolutions for this version is provided in the IP Release Notes User Guide +located at + + <A HREF="http://www.xilinx.com/support/documentation/user_guides/xtp025.pdf">www.xilinx.com/support/documentation/user_guides/xtp025.pdf</A> + +................................................................................ + + +6. TECHNICAL SUPPORT & FEEDBACK + +To obtain technical support, create a WebCase at <A HREF="http://www.xilinx.com/support.">www.xilinx.com/support.</A> +Questions are routed to a team with expertise using this product. + +Xilinx provides technical support for use of this product when used +according to the guidelines described in the core documentation, and +cannot guarantee timing, functionality, or support of this product for +designs that do not follow specified guidelines. + +................................................................................ + + +7. CORE RELEASE HISTORY + +Date By Version Description +================================================================================ +12/18/2012 Xilinx, Inc. 9.3 Rev 1 ISE 14.4 and Vivado 2012.4 support; IP level constraint for Built-in FIFO reset synchronizer +10/16/2012 Xilinx, Inc. 9.3 ISE 14.3 and Vivado 2012.3 support; Clock Enable support for AXI4 Stream FIFO +07/25/2012 Xilinx, Inc. 9.2 ISE 14.2 and Vivado 2012.2 support; Accurate data count support for AXI4 Stream Packet FIFO +04/24/2012 Xilinx, Inc. 9.1 ISE 14.1 and Vivado 2012.1 support; Defense Grade 7 Series and Zynq devices, and Automotive Zynq device support + AXI FIFO data width support up to 4096; Programmable Full/Empty as sideband signals for AXI FIFO +01/18/2012 Xilinx, Inc. 8.4 ISE 13.4 support and Packet FIFO feature addition; Artix-7 Lower Power and Automotive Artix-7 device support +10/19/2011 Xilinx, Inc. 8.3 ISE 13.3 support and QVirtex-6L device support +06/22/2011 Xilinx, Inc. 8.2 ISE 13.2 support and Kintex-7L, Virtex-7L, Artix-7 and Zynq-7000 device support +03/01/2011 Xilinx, Inc. 8.1 ISE 13.1 support and Virtex-7 and Kintex-7 device support; Wiring Logic and Register Slice Support +10/29/2010 Xilinx, Inc. 7.3 ISE 13.0.2 support +09/21/2010 Xilinx, Inc. 7.2 ISE 12.3 support; AXI4 Support +07/30/2010 Xilinx, Inc. 7.1 ISE 13.0.1 support +06/18/2010 Xilinx, Inc. 6.2 ISE 12.2 support +04/19/2010 Xilinx, Inc. 6.1 ISE 12.1 support +12/02/2009 Xilinx, Inc. 5.3 rev 1 ISE 11.4 support; Spartan-6 Low Power and Automotive Spartan-6 Device support +09/16/2009 Xilinx, Inc. 5.3 Update to add 11.3; Virtex-6 Low Power and Virtex-6 HXT Device support +06/24/2009 Xilinx, Inc. 5.2 Update to add 11.2 and Virtex-6 CXT device support +04/24/2009 Xilinx, Inc. 5.1 Update to add 11.1 and Virtex-6 and Spartan-6 device support +09/19/2008 Xilinx, Inc. 4.4 Update to add 10.1 SP3 and Virtex-5 TXT device support and miscellaneous bug fixes +03/24/2008 Xilinx, Inc. 4.3 Update to add 10.1 support and miscellaneous bug fixes +10/03/2007 Xilinx, Inc. 4.2 Support for FWFT for Block RAM and Distributed RAM Common Clock FIFOs +08/08/2007 Xilinx, Inc. 4.1 Update to add 9.2i support; Revised to v4.1; ECC support for block RAM FIFO +04/02/2007 Xilinx, Inc. 3.3 Update to add 9.1i support; Revised to v3.3; Spartan-3A and Spartan-3A DSP support; ECC support +09/21/2006 Xilinx, Inc. 3.2 Revised to v3.2; Spartan-3 and Virtex-4 automotive device support +07/13/2006 Xilinx, Inc. 3.1 Update to add 8.2i support; Revised to v3.1; Virtex-5 support +01/11/2006 Xilinx, Inc. 2.3 Update to add 8.1i support; Revised to v2.3 +08/31/2005 Xilinx, Inc. 2.2 Update to add 7.1i SP4 support; Revised to v2.2 +04/28/2005 Xilinx, Inc. 2.1 Update to add 7.1i SP1 support; Revised to v2.1 +11/04/2004 Xilinx, Inc. 2.0 Update to add 6.3i support; Revised to v2.0 +05/21/2004 Xilinx, Inc. 1.1 Revised to v1.1; Virtex-4 support +04/23/2004 Xilinx, Inc. 1.0 Update to add 6.2i support; First release +================================================================================ + +................................................................................ + + +8. LEGAL DISCLAIMER + +(c) Copyright 2002 - 2012 Xilinx, Inc. All rights reserved. + + This file contains confidential and proprietary information + of Xilinx, Inc. and is protected under U.S. and + international copyright and other intellectual property + laws. + + DISCLAIMER + This disclaimer is not a license and does not grant any + rights to the materials distributed herewith. Except as + otherwise provided in a valid license issued to you by + Xilinx, and to the maximum extent permitted by applicable + law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND + WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES + AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING + BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- + INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and + (2) Xilinx shall not be liable (whether in contract or tort, + including negligence, or under any other theory of + liability) for any loss or damage of any kind or nature + related to, arising under or in connection with these + materials, including for any direct, or any indirect, + special, incidental, or consequential loss or damage + (including loss of data, profits, goodwill, or any type of + loss or damage suffered as a result of any action brought + by a third party) even if such damage or loss was + reasonably foreseeable or Xilinx had been advised of the + possibility of the same. + + CRITICAL APPLICATIONS + Xilinx products are not designed or intended to be fail- + safe, or for use in any application requiring fail-safe + performance, such as life-support or safety devices or + systems, Class III medical devices, nuclear facilities, + applications related to the deployment of airbags, or any + other applications that could lead to death, personal + injury, or severe property or environmental damage + (individually and collectively, "Critical + Applications"). Customer assumes the sole risk and + liability of any use of Xilinx products in Critical + Applications, subject only to applicable laws and + regulations governing limitations on product liability. + + THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS + PART OF THIS FILE AT ALL TIMES. +</FONT> +</PRE> +</BODY> +</HTML> diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/doc/pg057-fifo-generator.pdf b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/doc/pg057-fifo-generator.pdf Binary files differnew file mode 100644 index 000000000..5ec45fbcb --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/doc/pg057-fifo-generator.pdf diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/example_design/fifo_short_2clk_exdes.ucf b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/example_design/fifo_short_2clk_exdes.ucf new file mode 100755 index 000000000..62e5058ab --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/example_design/fifo_short_2clk_exdes.ucf @@ -0,0 +1,56 @@ +################################################################################ +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# +################################################################################ + +# Core Period Constraint. This constraint can be modified, and is +# valid as long as it is met after place and route. + NET "RD_CLK" TNM_NET = "RD_CLK"; + NET "WR_CLK" TNM_NET = "WR_CLK"; + TIMESPEC "TS_RD_CLK" = PERIOD "RD_CLK" 50 MHZ; + TIMESPEC "TS_WR_CLK" = PERIOD "WR_CLK" 50 MHZ; +################################################################################ diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/example_design/fifo_short_2clk_exdes.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/example_design/fifo_short_2clk_exdes.vhd new file mode 100755 index 000000000..9e38bcb7c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/example_design/fifo_short_2clk_exdes.vhd @@ -0,0 +1,145 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core - core top file for implementation +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_short_2clk_exdes.vhd +-- +-- Description: +-- This is the FIFO core wrapper with BUFG instances for clock connections. +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +library unisim; +use unisim.vcomponents.all; + +-------------------------------------------------------------------------------- +-- Entity Declaration +-------------------------------------------------------------------------------- +entity fifo_short_2clk_exdes is + PORT ( + WR_CLK : IN std_logic; + RD_CLK : IN std_logic; + WR_DATA_COUNT : OUT std_logic_vector(6-1 DOWNTO 0); + RD_DATA_COUNT : OUT std_logic_vector(6-1 DOWNTO 0); + RST : IN std_logic; + WR_EN : IN std_logic; + RD_EN : IN std_logic; + DIN : IN std_logic_vector(72-1 DOWNTO 0); + DOUT : OUT std_logic_vector(72-1 DOWNTO 0); + FULL : OUT std_logic; + EMPTY : OUT std_logic); + +end fifo_short_2clk_exdes; + + + +architecture xilinx of fifo_short_2clk_exdes is + + signal wr_clk_i : std_logic; + signal rd_clk_i : std_logic; + + + + component fifo_short_2clk is + PORT ( + WR_CLK : IN std_logic; + RD_CLK : IN std_logic; + WR_DATA_COUNT : OUT std_logic_vector(6-1 DOWNTO 0); + RD_DATA_COUNT : OUT std_logic_vector(6-1 DOWNTO 0); + RST : IN std_logic; + WR_EN : IN std_logic; + RD_EN : IN std_logic; + DIN : IN std_logic_vector(72-1 DOWNTO 0); + DOUT : OUT std_logic_vector(72-1 DOWNTO 0); + FULL : OUT std_logic; + EMPTY : OUT std_logic); + + end component; + + +begin + + wr_clk_buf: bufg + PORT map( + i => WR_CLK, + o => wr_clk_i + ); + + rd_clk_buf: bufg + PORT map( + i => RD_CLK, + o => rd_clk_i + ); + + + exdes_inst : fifo_short_2clk + PORT MAP ( + WR_CLK => wr_clk_i, + RD_CLK => rd_clk_i, + WR_DATA_COUNT => wr_data_count, + RD_DATA_COUNT => rd_data_count, + RST => rst, + WR_EN => wr_en, + RD_EN => rd_en, + DIN => din, + DOUT => dout, + FULL => full, + EMPTY => empty); + +end xilinx; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/fifo_generator_v9_3_readme.txt b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/fifo_generator_v9_3_readme.txt new file mode 100644 index 000000000..7853ebde8 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/fifo_generator_v9_3_readme.txt @@ -0,0 +1,236 @@ +CHANGE LOG for LogiCORE FIFO Generator V9.3 Rev 1 + + Release Date: December 18, 2012 +-------------------------------------------------------------------------------- + +Table of Contents + +1. INTRODUCTION +2. DEVICE SUPPORT +3. NEW FEATURE HISTORY +4. RESOLVED ISSUES +5. KNOWN ISSUES & LIMITATIONS +6. TECHNICAL SUPPORT & FEEDBACK +7. CORE RELEASE HISTORY +8. LEGAL DISCLAIMER + +-------------------------------------------------------------------------------- + + +1. INTRODUCTION + +For installation instructions for this release, please go to: + + http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm + +For system requirements: + + http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm + +This file contains release notes for the Xilinx LogiCORE IP FIFO Generator v9.3 Rev 1 +solution. For the latest core updates, see the product page at: + + http://www.xilinx.com/products/ipcenter/FIFO_Generator.htm + +................................................................................ + + +2. DEVICE SUPPORT + + + 2.1 ISE + + The following device families are supported by the core for this release. + + + All 7 Series devices + Zynq-7000 devices + All Virtex-6 devices + All Spartan-6 devices + All Virtex-5 devices + All Spartan-3 devices + All Virtex-4 devices + + + 2.2 Vivado + + All 7 Series devices + Zynq-7000 devices + +................................................................................ + + +3. NEW FEATURE HISTORY + + + 3.1 ISE + + - ISE 14.4 software support + + + 3.2 Vivado + + - 2012.4 software support + - IP level constraint for Built-in FIFO reset synchronizer + +................................................................................ + + +4. RESOLVED ISSUES + + + 4.1 ISE + + - N/A + + + 4.2 Vivado + + - N/A + + +................................................................................ + + +5. KNOWN ISSUES & LIMITATIONS + + + 5.1 ISE + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Importing an XCO file alters the XCO configurations + + Description: In the FIFO Generator GUI, after importing an XCO file (Independent clock, distributed memory configuration) + into a Virtex-4 CORE Generator project, if the FIFO type is changed to "Independent Clocks, Built-in FIFO" in page 1, + page 2 does not correctly offer the Read Clock Frequency and Write Clock Frequency options as it should. + + CR 467240 + AR 31379 + + 2. Status flags after the first write to Common Clock Built-in FIFO not guaranteed + + Description: When using Common Clock Built-in FIFO configuration with asynchronous reset for Virtex-6 FPGA, + correct behavior of the FIFO status flags cannot be guaranteed after the first write. + + Workaround: To work around this issue, synchronize the negative edge of reset to RDCLK/WRCLK. + For more information and additional workaround see Answer Record 41099. + + 5.2 Vivado + + The following are known issues for v9.3 Rev 1 of this core at time of release: + + 1. Description: When Trying to upgrade to latest version of FIFO Generator from older verions, following error message is seen + ERROR: [Common 17-69] Command failed: invalid command name "puts" and Auto Upgradation does not work. + + CR 665836 + +The most recent information, including known issues, workarounds, and +resolutions for this version is provided in the IP Release Notes User Guide +located at + + www.xilinx.com/support/documentation/user_guides/xtp025.pdf + +................................................................................ + + +6. TECHNICAL SUPPORT & FEEDBACK + +To obtain technical support, create a WebCase at www.xilinx.com/support. +Questions are routed to a team with expertise using this product. + +Xilinx provides technical support for use of this product when used +according to the guidelines described in the core documentation, and +cannot guarantee timing, functionality, or support of this product for +designs that do not follow specified guidelines. + +................................................................................ + + +7. CORE RELEASE HISTORY + +Date By Version Description +================================================================================ +12/18/2012 Xilinx, Inc. 9.3 Rev 1 ISE 14.4 and Vivado 2012.4 support; IP level constraint for Built-in FIFO reset synchronizer +10/16/2012 Xilinx, Inc. 9.3 ISE 14.3 and Vivado 2012.3 support; Clock Enable support for AXI4 Stream FIFO +07/25/2012 Xilinx, Inc. 9.2 ISE 14.2 and Vivado 2012.2 support; Accurate data count support for AXI4 Stream Packet FIFO +04/24/2012 Xilinx, Inc. 9.1 ISE 14.1 and Vivado 2012.1 support; Defense Grade 7 Series and Zynq devices, and Automotive Zynq device support + AXI FIFO data width support up to 4096; Programmable Full/Empty as sideband signals for AXI FIFO +01/18/2012 Xilinx, Inc. 8.4 ISE 13.4 support and Packet FIFO feature addition; Artix-7 Lower Power and Automotive Artix-7 device support +10/19/2011 Xilinx, Inc. 8.3 ISE 13.3 support and QVirtex-6L device support +06/22/2011 Xilinx, Inc. 8.2 ISE 13.2 support and Kintex-7L, Virtex-7L, Artix-7 and Zynq-7000 device support +03/01/2011 Xilinx, Inc. 8.1 ISE 13.1 support and Virtex-7 and Kintex-7 device support; Wiring Logic and Register Slice Support +10/29/2010 Xilinx, Inc. 7.3 ISE 13.0.2 support +09/21/2010 Xilinx, Inc. 7.2 ISE 12.3 support; AXI4 Support +07/30/2010 Xilinx, Inc. 7.1 ISE 13.0.1 support +06/18/2010 Xilinx, Inc. 6.2 ISE 12.2 support +04/19/2010 Xilinx, Inc. 6.1 ISE 12.1 support +12/02/2009 Xilinx, Inc. 5.3 rev 1 ISE 11.4 support; Spartan-6 Low Power and Automotive Spartan-6 Device support +09/16/2009 Xilinx, Inc. 5.3 Update to add 11.3; Virtex-6 Low Power and Virtex-6 HXT Device support +06/24/2009 Xilinx, Inc. 5.2 Update to add 11.2 and Virtex-6 CXT device support +04/24/2009 Xilinx, Inc. 5.1 Update to add 11.1 and Virtex-6 and Spartan-6 device support +09/19/2008 Xilinx, Inc. 4.4 Update to add 10.1 SP3 and Virtex-5 TXT device support and miscellaneous bug fixes +03/24/2008 Xilinx, Inc. 4.3 Update to add 10.1 support and miscellaneous bug fixes +10/03/2007 Xilinx, Inc. 4.2 Support for FWFT for Block RAM and Distributed RAM Common Clock FIFOs +08/08/2007 Xilinx, Inc. 4.1 Update to add 9.2i support; Revised to v4.1; ECC support for block RAM FIFO +04/02/2007 Xilinx, Inc. 3.3 Update to add 9.1i support; Revised to v3.3; Spartan-3A and Spartan-3A DSP support; ECC support +09/21/2006 Xilinx, Inc. 3.2 Revised to v3.2; Spartan-3 and Virtex-4 automotive device support +07/13/2006 Xilinx, Inc. 3.1 Update to add 8.2i support; Revised to v3.1; Virtex-5 support +01/11/2006 Xilinx, Inc. 2.3 Update to add 8.1i support; Revised to v2.3 +08/31/2005 Xilinx, Inc. 2.2 Update to add 7.1i SP4 support; Revised to v2.2 +04/28/2005 Xilinx, Inc. 2.1 Update to add 7.1i SP1 support; Revised to v2.1 +11/04/2004 Xilinx, Inc. 2.0 Update to add 6.3i support; Revised to v2.0 +05/21/2004 Xilinx, Inc. 1.1 Revised to v1.1; Virtex-4 support +04/23/2004 Xilinx, Inc. 1.0 Update to add 6.2i support; First release +================================================================================ + +................................................................................ + + +8. LEGAL DISCLAIMER + +(c) Copyright 2002 - 2012 Xilinx, Inc. All rights reserved. + + This file contains confidential and proprietary information + of Xilinx, Inc. and is protected under U.S. and + international copyright and other intellectual property + laws. + + DISCLAIMER + This disclaimer is not a license and does not grant any + rights to the materials distributed herewith. Except as + otherwise provided in a valid license issued to you by + Xilinx, and to the maximum extent permitted by applicable + law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND + WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES + AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING + BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- + INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and + (2) Xilinx shall not be liable (whether in contract or tort, + including negligence, or under any other theory of + liability) for any loss or damage of any kind or nature + related to, arising under or in connection with these + materials, including for any direct, or any indirect, + special, incidental, or consequential loss or damage + (including loss of data, profits, goodwill, or any type of + loss or damage suffered as a result of any action brought + by a third party) even if such damage or loss was + reasonably foreseeable or Xilinx had been advised of the + possibility of the same. + + CRITICAL APPLICATIONS + Xilinx products are not designed or intended to be fail- + safe, or for use in any application requiring fail-safe + performance, such as life-support or safety devices or + systems, Class III medical devices, nuclear facilities, + applications related to the deployment of airbags, or any + other applications that could lead to death, personal + injury, or severe property or environmental damage + (individually and collectively, "Critical + Applications"). Customer assumes the sole risk and + liability of any use of Xilinx products in Critical + Applications, subject only to applicable laws and + regulations governing limitations on product liability. + + THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS + PART OF THIS FILE AT ALL TIMES. diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement.bat new file mode 100755 index 000000000..8745ae5d9 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement.bat @@ -0,0 +1,88 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +rem Clean up the results directory +rmdir /S /Q results +mkdir results + +rem Synthesize the VHDL Wrapper Files + +#Synthesize the Wrapper Files + +echo 'Synthesizing example design with XST'; +xst -ifn xst.scr +copy fifo_short_2clk_exdes.ngc .\results\ + + +rem Copy the netlist generated by Coregen +echo 'Copying files from the netlist directory to the results directory' +copy ..\..\fifo_short_2clk.ngc results\ + + +rem Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +copy ..\example_design\fifo_short_2clk_exdes.ucf results\ + +cd results + +echo 'Running ngdbuild' + +ngdbuild -p xc6slx75-csg484-3 -sd ../../../ fifo_short_2clk_exdes + +echo 'Running map' +map fifo_short_2clk_exdes -o mapped.ncd + +echo 'Running par' +par mapped.ncd routed.ncd + +echo 'Running trce' +trce -e 10 routed.ncd mapped.pcf -o routed + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level Verilog model' +netgen -ofmt verilog -sim -tm fifo_short_2clk_exdes -pcf mapped.pcf -w -sdf_anno false routed.ncd routed.v diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement.sh new file mode 100755 index 000000000..3a143e17c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement.sh @@ -0,0 +1,87 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. + +# Clean up the results directory +rm -rf results +mkdir results + +#Synthesize the Wrapper Files + +echo 'Synthesizing example design with XST'; +xst -ifn xst.scr +cp fifo_short_2clk_exdes.ngc ./results/ + + +# Copy the netlist generated by Coregen +echo 'Copying files from the netlist directory to the results directory' +cp ../../fifo_short_2clk.ngc results/ + +# Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +cp ../example_design/fifo_short_2clk_exdes.ucf results/ + +cd results + +echo 'Running ngdbuild' + +ngdbuild -p xc6slx75-csg484-3 -sd ../../../ fifo_short_2clk_exdes + +echo 'Running map' +map fifo_short_2clk_exdes -o mapped.ncd + +echo 'Running par' +par mapped.ncd routed.ncd + +echo 'Running trce' +trce -e 10 routed.ncd mapped.pcf -o routed + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level Verilog model' +netgen -ofmt verilog -sim -tm fifo_short_2clk_exdes -pcf mapped.pcf -w -sdf_anno false routed.ncd routed.v + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement_synplify.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement_synplify.bat new file mode 100755 index 000000000..ac8f61fea --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement_synplify.bat @@ -0,0 +1,87 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +rem Clean up the results directory +rmdir /S /Q results +mkdir results + +rem Synthesize the VHDL Wrapper Files + +#Synthesize the Wrapper Files + +echo 'Synthesizing example design with Synplify' +synplify_pro -batch synplify.prj -licensetype synplifypro_xilinx + + +rem Copy the netlist generated by Coregen +echo 'Copying files from the netlist directory to the results directory' +copy ..\..\fifo_short_2clk.ngc results\ + + +rem Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +copy ..\example_design\fifo_short_2clk_exdes.ucf results\ + +cd results + +echo 'Running ngdbuild' + +ngdbuild -p xc6slx75-csg484-3 -sd ../../../ fifo_short_2clk_exdes + +echo 'Running map' +map fifo_short_2clk_exdes -o mapped.ncd + +echo 'Running par' +par mapped.ncd routed.ncd + +echo 'Running trce' +trce -e 10 routed.ncd mapped.pcf -o routed + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level Verilog model' +netgen -ofmt verilog -sim -tm fifo_short_2clk_exdes -pcf mapped.pcf -w -sdf_anno false routed.ncd routed.v diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement_synplify.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement_synplify.sh new file mode 100755 index 000000000..0ae5d7af5 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/implement_synplify.sh @@ -0,0 +1,86 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. + +# Clean up the results directory +rm -rf results +mkdir results + +#Synthesize the Wrapper Files + +echo 'Synthesizing example design with Synplify' +synplify_pro -batch synplify.prj -licensetype synplifypro_xilinx + + +# Copy the netlist generated by Coregen +echo 'Copying files from the netlist directory to the results directory' +cp ../../fifo_short_2clk.ngc results/ + +# Copy the constraints files generated by Coregen +echo 'Copying files from constraints directory to results directory' +cp ../example_design/fifo_short_2clk_exdes.ucf results/ + +cd results + +echo 'Running ngdbuild' + +ngdbuild -p xc6slx75-csg484-3 -sd ../../../ fifo_short_2clk_exdes + +echo 'Running map' +map fifo_short_2clk_exdes -o mapped.ncd + +echo 'Running par' +par mapped.ncd routed.ncd + +echo 'Running trce' +trce -e 10 routed.ncd mapped.pcf -o routed + +echo 'Running design through bitgen' +bitgen -w routed + +echo 'Running netgen to create gate level Verilog model' +netgen -ofmt verilog -sim -tm fifo_short_2clk_exdes -pcf mapped.pcf -w -sdf_anno false routed.ncd routed.v + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/planAhead_ise.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/planAhead_ise.bat new file mode 100755 index 000000000..49053fd63 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/planAhead_ise.bat @@ -0,0 +1,54 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +rem ----------------------------------------------------------------------------- +rem Script to synthesize and implement the Coregen FIFO Generator +rem ----------------------------------------------------------------------------- +rmdir /S /Q results +mkdir results +cd results +copy ..\..\..\fifo_short_2clk.ngc . +planAhead -mode batch -source ..\planAhead_ise.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/planAhead_ise.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/planAhead_ise.sh new file mode 100755 index 000000000..42916c2bc --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/planAhead_ise.sh @@ -0,0 +1,55 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. + +#----------------------------------------------------------------------------- +# Script to synthesize and implement the Coregen FIFO Generator +#----------------------------------------------------------------------------- +rm -rf results +mkdir results +cd results +cp ../../../fifo_short_2clk.ngc . +planAhead -mode batch -source ../planAhead_ise.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/planAhead_ise.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/planAhead_ise.tcl new file mode 100755 index 000000000..d2c954858 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/planAhead_ise.tcl @@ -0,0 +1,67 @@ +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. + + +set device xc6slx75csg484-3 +set projName fifo_short_2clk +set design fifo_short_2clk +set projDir [file dirname [info script]] +create_project $projName $projDir/results/$projName -part $device -force +set_property design_mode RTL [current_fileset -srcset] +set top_module fifo_short_2clk_exdes +add_files -norecurse {../../example_design/fifo_short_2clk_exdes.vhd} +add_files -norecurse {./fifo_short_2clk.ngc} +import_files -fileset [get_filesets constrs_1] -force -norecurse {../../example_design/fifo_short_2clk_exdes.xdc} +set_property top fifo_short_2clk_exdes [get_property srcset [current_run]] +synth_design +opt_design +place_design +route_design +write_sdf -rename_top_module fifo_short_2clk_exdes -file routed.sdf +write_verilog -nolib -mode timesim -sdf_anno false -rename_top_module fifo_short_2clk_exdes routed.v +report_timing -nworst 30 -path_type full -file routed.twr +report_drc -file report.drc +write_bitstream -bitgen_options {-g UnconstrainedPins:Allow} diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/xst.prj b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/xst.prj new file mode 100755 index 000000000..f16af4308 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/xst.prj @@ -0,0 +1 @@ +work ../example_design/fifo_short_2clk_exdes.vhd diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/xst.scr b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/xst.scr new file mode 100755 index 000000000..7dcd7b83c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/implement/xst.scr @@ -0,0 +1,13 @@ +run +-ifmt VHDL +-ent fifo_short_2clk_exdes +-p xc6slx75-csg484-3 +-ifn xst.prj +-write_timing_constraints No +-iobuf YES +-max_fanout 100 +-ofn fifo_short_2clk_exdes +-ofmt NGC +-bus_delimiter () +-hierarchy_separator / +-case Maintain diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_dgen.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_dgen.vhd new file mode 100755 index 000000000..bc7a1b525 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_dgen.vhd @@ -0,0 +1,123 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_short_2clk_dgen.vhd +-- +-- Description: +-- Used for write interface stimulus generation +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.all; +USE IEEE.std_logic_arith.all; +USE IEEE.std_logic_misc.all; + +LIBRARY work; +USE work.fifo_short_2clk_pkg.ALL; + +ENTITY fifo_short_2clk_dgen IS + GENERIC ( + C_DIN_WIDTH : INTEGER := 32; + C_DOUT_WIDTH : INTEGER := 32; + C_CH_TYPE : INTEGER := 0; + TB_SEED : INTEGER := 2 + ); + PORT ( + RESET : IN STD_LOGIC; + WR_CLK : IN STD_LOGIC; + PRC_WR_EN : IN STD_LOGIC; + FULL : IN STD_LOGIC; + WR_EN : OUT STD_LOGIC; + WR_DATA : OUT STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0) + ); +END ENTITY; + + +ARCHITECTURE fg_dg_arch OF fifo_short_2clk_dgen IS + + CONSTANT C_DATA_WIDTH : INTEGER := if_then_else(C_DIN_WIDTH > C_DOUT_WIDTH,C_DIN_WIDTH,C_DOUT_WIDTH); + CONSTANT LOOP_COUNT : INTEGER := divroundup(C_DATA_WIDTH,8); + + SIGNAL pr_w_en : STD_LOGIC := '0'; + SIGNAL rand_num : STD_LOGIC_VECTOR(8*LOOP_COUNT-1 DOWNTO 0); + SIGNAL wr_data_i : STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0); + BEGIN + + WR_EN <= PRC_WR_EN ; + WR_DATA <= wr_data_i AFTER 100 ns; + + ---------------------------------------------- + -- Generation of DATA + ---------------------------------------------- + gen_stim:FOR N IN LOOP_COUNT-1 DOWNTO 0 GENERATE + rd_gen_inst1:fifo_short_2clk_rng + GENERIC MAP( + WIDTH => 8, + SEED => TB_SEED+N + ) + PORT MAP( + CLK => WR_CLK, + RESET => RESET, + RANDOM_NUM => rand_num(8*(N+1)-1 downto 8*N), + ENABLE => pr_w_en + ); + END GENERATE; + + pr_w_en <= PRC_WR_EN AND NOT FULL; + wr_data_i <= rand_num(C_DIN_WIDTH-1 DOWNTO 0); + + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_dverif.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_dverif.vhd new file mode 100755 index 000000000..b0465d84f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_dverif.vhd @@ -0,0 +1,150 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_short_2clk_dverif.vhd +-- +-- Description: +-- Used for FIFO read interface stimulus generation and data checking +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.all; +USE IEEE.std_logic_arith.all; +USE IEEE.std_logic_misc.all; + +LIBRARY work; +USE work.fifo_short_2clk_pkg.ALL; + +ENTITY fifo_short_2clk_dverif IS + GENERIC( + C_DIN_WIDTH : INTEGER := 0; + C_DOUT_WIDTH : INTEGER := 0; + C_USE_EMBEDDED_REG : INTEGER := 0; + C_CH_TYPE : INTEGER := 0; + TB_SEED : INTEGER := 2 + ); + PORT( + RESET : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + PRC_RD_EN : IN STD_LOGIC; + EMPTY : IN STD_LOGIC; + DATA_OUT : IN STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0); + RD_EN : OUT STD_LOGIC; + DOUT_CHK : OUT STD_LOGIC + ); +END ENTITY; + + +ARCHITECTURE fg_dv_arch OF fifo_short_2clk_dverif IS + + CONSTANT C_DATA_WIDTH : INTEGER := if_then_else(C_DIN_WIDTH > C_DOUT_WIDTH,C_DIN_WIDTH,C_DOUT_WIDTH); + CONSTANT EXTRA_WIDTH : INTEGER := if_then_else(C_CH_TYPE = 2,1,0); + CONSTANT LOOP_COUNT : INTEGER := divroundup(C_DATA_WIDTH+EXTRA_WIDTH,8); + + SIGNAL expected_dout : STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0) := (OTHERS => '0'); + SIGNAL data_chk : STD_LOGIC := '1'; + SIGNAL rand_num : STD_LOGIC_VECTOR(8*LOOP_COUNT-1 downto 0); + SIGNAL rd_en_i : STD_LOGIC := '0'; + SIGNAL pr_r_en : STD_LOGIC := '0'; + SIGNAL rd_en_d1 : STD_LOGIC := '1'; +BEGIN + + + DOUT_CHK <= data_chk; + RD_EN <= rd_en_i; + rd_en_i <= PRC_RD_EN; + rd_en_d1 <= '1'; + + + data_fifo_chk:IF(C_CH_TYPE /=2) GENERATE + ------------------------------------------------------- + -- Expected data generation and checking for data_fifo + ------------------------------------------------------- + + pr_r_en <= rd_en_i AND NOT EMPTY AND rd_en_d1; + expected_dout <= rand_num(C_DOUT_WIDTH-1 DOWNTO 0); + + gen_num:FOR N IN LOOP_COUNT-1 DOWNTO 0 GENERATE + rd_gen_inst2:fifo_short_2clk_rng + GENERIC MAP( + WIDTH => 8, + SEED => TB_SEED+N + ) + PORT MAP( + CLK => RD_CLK, + RESET => RESET, + RANDOM_NUM => rand_num(8*(N+1)-1 downto 8*N), + ENABLE => pr_r_en + ); + END GENERATE; + + PROCESS (RD_CLK,RESET) + BEGIN + IF(RESET = '1') THEN + data_chk <= '0'; + ELSIF (RD_CLK'event AND RD_CLK='1') THEN + IF(EMPTY = '0') THEN + IF(DATA_OUT = expected_dout) THEN + data_chk <= '0'; + ELSE + data_chk <= '1'; + END IF; + END IF; + END IF; + END PROCESS; + END GENERATE data_fifo_chk; + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_pctrl.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_pctrl.vhd new file mode 100755 index 000000000..5d6506398 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_pctrl.vhd @@ -0,0 +1,541 @@ + +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_short_2clk_pctrl.vhd +-- +-- Description: +-- Used for protocol control on write and read interface stimulus and status generation +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.all; +USE IEEE.std_logic_arith.all; +USE IEEE.std_logic_misc.all; + +LIBRARY work; +USE work.fifo_short_2clk_pkg.ALL; + +ENTITY fifo_short_2clk_pctrl IS + GENERIC( + AXI_CHANNEL : STRING :="NONE"; + C_APPLICATION_TYPE : INTEGER := 0; + C_DIN_WIDTH : INTEGER := 0; + C_DOUT_WIDTH : INTEGER := 0; + C_WR_PNTR_WIDTH : INTEGER := 0; + C_RD_PNTR_WIDTH : INTEGER := 0; + C_CH_TYPE : INTEGER := 0; + FREEZEON_ERROR : INTEGER := 0; + TB_STOP_CNT : INTEGER := 2; + TB_SEED : INTEGER := 2 + ); + PORT( + RESET_WR : IN STD_LOGIC; + RESET_RD : IN STD_LOGIC; + WR_CLK : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + FULL : IN STD_LOGIC; + EMPTY : IN STD_LOGIC; + ALMOST_FULL : IN STD_LOGIC; + ALMOST_EMPTY : IN STD_LOGIC; + DATA_IN : IN STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0); + DATA_OUT : IN STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0); + DOUT_CHK : IN STD_LOGIC; + PRC_WR_EN : OUT STD_LOGIC; + PRC_RD_EN : OUT STD_LOGIC; + RESET_EN : OUT STD_LOGIC; + SIM_DONE : OUT STD_LOGIC; + STATUS : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) + ); +END ENTITY; + + +ARCHITECTURE fg_pc_arch OF fifo_short_2clk_pctrl IS + + CONSTANT C_DATA_WIDTH : INTEGER := if_then_else(C_DIN_WIDTH > C_DOUT_WIDTH,C_DIN_WIDTH,C_DOUT_WIDTH); + CONSTANT LOOP_COUNT : INTEGER := divroundup(C_DATA_WIDTH,8); + CONSTANT D_WIDTH_DIFF : INTEGER := log2roundup(C_DOUT_WIDTH/C_DIN_WIDTH); + + SIGNAL data_chk_i : STD_LOGIC := if_then_else(C_CH_TYPE /= 2,'1','0'); + SIGNAL full_chk_i : STD_LOGIC := if_then_else(C_CH_TYPE /= 2,'1','0'); + SIGNAL empty_chk_i : STD_LOGIC := if_then_else(C_CH_TYPE /= 2,'1','0'); + SIGNAL status_i : STD_LOGIC_VECTOR(4 DOWNTO 0):= (OTHERS => '0'); + SIGNAL status_d1_i : STD_LOGIC_VECTOR(4 DOWNTO 0):= (OTHERS => '0'); + SIGNAL wr_en_gen : STD_LOGIC_VECTOR(7 DOWNTO 0):= (OTHERS => '0'); + SIGNAL rd_en_gen : STD_LOGIC_VECTOR(7 DOWNTO 0):= (OTHERS => '0'); + SIGNAL wr_cntr : STD_LOGIC_VECTOR(C_WR_PNTR_WIDTH-2 DOWNTO 0) := (OTHERS => '0'); + SIGNAL full_as_timeout : STD_LOGIC_VECTOR(C_WR_PNTR_WIDTH DOWNTO 0) := (OTHERS => '0'); + SIGNAL full_ds_timeout : STD_LOGIC_VECTOR(C_WR_PNTR_WIDTH DOWNTO 0) := (OTHERS => '0'); + SIGNAL rd_cntr : STD_LOGIC_VECTOR(C_RD_PNTR_WIDTH-2 DOWNTO 0) := (OTHERS => '0'); + SIGNAL empty_as_timeout : STD_LOGIC_VECTOR(C_RD_PNTR_WIDTH DOWNTO 0) := (OTHERS => '0'); + SIGNAL empty_ds_timeout : STD_LOGIC_VECTOR(C_RD_PNTR_WIDTH DOWNTO 0):= (OTHERS => '0'); + SIGNAL wr_en_i : STD_LOGIC := '0'; + SIGNAL rd_en_i : STD_LOGIC := '0'; + SIGNAL state : STD_LOGIC := '0'; + SIGNAL wr_control : STD_LOGIC := '0'; + SIGNAL rd_control : STD_LOGIC := '0'; + SIGNAL stop_on_err : STD_LOGIC := '0'; + SIGNAL sim_stop_cntr : STD_LOGIC_VECTOR(7 DOWNTO 0):= conv_std_logic_vector(if_then_else(C_CH_TYPE=2,64,TB_STOP_CNT),8); + SIGNAL sim_done_i : STD_LOGIC := '0'; + SIGNAL rdw_gt_wrw : STD_LOGIC_VECTOR(D_WIDTH_DIFF-1 DOWNTO 0) := (OTHERS => '1'); + SIGNAL wrw_gt_rdw : STD_LOGIC_VECTOR(D_WIDTH_DIFF-1 DOWNTO 0) := (OTHERS => '1'); + SIGNAL rd_activ_cont : STD_LOGIC_VECTOR(25 downto 0):= (OTHERS => '0'); + SIGNAL prc_we_i : STD_LOGIC := '0'; + SIGNAL prc_re_i : STD_LOGIC := '0'; + SIGNAL reset_en_i : STD_LOGIC := '0'; + SIGNAL sim_done_d1 : STD_LOGIC := '0'; + SIGNAL sim_done_wr1 : STD_LOGIC := '0'; + SIGNAL sim_done_wr2 : STD_LOGIC := '0'; + SIGNAL empty_d1 : STD_LOGIC := '0'; + SIGNAL empty_wr_dom1 : STD_LOGIC := '0'; + SIGNAL state_d1 : STD_LOGIC := '0'; + SIGNAL state_rd_dom1 : STD_LOGIC := '0'; + SIGNAL rd_en_d1 : STD_LOGIC := '0'; + SIGNAL rd_en_wr1 : STD_LOGIC := '0'; + SIGNAL wr_en_d1 : STD_LOGIC := '0'; + SIGNAL wr_en_rd1 : STD_LOGIC := '0'; + SIGNAL full_chk_d1 : STD_LOGIC := '0'; + SIGNAL full_chk_rd1 : STD_LOGIC := '0'; + SIGNAL empty_wr_dom2 : STD_LOGIC := '0'; + + SIGNAL state_rd_dom2 : STD_LOGIC := '0'; + SIGNAL state_rd_dom3 : STD_LOGIC := '0'; + SIGNAL rd_en_wr2 : STD_LOGIC := '0'; + SIGNAL wr_en_rd2 : STD_LOGIC := '0'; + SIGNAL full_chk_rd2 : STD_LOGIC := '0'; + SIGNAL reset_en_d1 : STD_LOGIC := '0'; + SIGNAL reset_en_rd1 : STD_LOGIC := '0'; + SIGNAL reset_en_rd2 : STD_LOGIC := '0'; + + SIGNAL data_chk_wr_d1 : STD_LOGIC := '0'; + SIGNAL data_chk_rd1 : STD_LOGIC := '0'; + SIGNAL data_chk_rd2 : STD_LOGIC := '0'; + SIGNAL post_rst_dly_wr : STD_LOGIC_VECTOR(4 DOWNTO 0) := (OTHERS => '1'); + SIGNAL post_rst_dly_rd : STD_LOGIC_VECTOR(4 DOWNTO 0) := (OTHERS => '1'); +BEGIN + status_i <= data_chk_i & full_chk_rd2 & empty_chk_i & '0' & '0'; + STATUS <= status_d1_i & '0' & '0' & rd_activ_cont(rd_activ_cont'high); + + prc_we_i <= wr_en_i WHEN sim_done_wr2 = '0' ELSE '0'; + prc_re_i <= rd_en_i WHEN sim_done_i = '0' ELSE '0'; + + SIM_DONE <= sim_done_i; + rdw_gt_wrw <= (OTHERS => '1'); + wrw_gt_rdw <= (OTHERS => '1'); + + PROCESS(RD_CLK) + BEGIN + IF (RD_CLK'event AND RD_CLK='1') THEN + IF(prc_re_i = '1') THEN + rd_activ_cont <= rd_activ_cont + "1"; + END IF; + END IF; + END PROCESS; + + + PROCESS(sim_done_i) + BEGIN + assert sim_done_i = '0' + report "Simulation Complete for:" & AXI_CHANNEL + severity note; + END PROCESS; + +----------------------------------------------------- +-- SIM_DONE SIGNAL GENERATION +----------------------------------------------------- +PROCESS (RD_CLK,RESET_RD) +BEGIN + IF(RESET_RD = '1') THEN + --sim_done_i <= '0'; + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF((OR_REDUCE(sim_stop_cntr) = '0' AND TB_STOP_CNT /= 0) OR stop_on_err = '1') THEN + sim_done_i <= '1'; + END IF; + END IF; +END PROCESS; + + -- TB Timeout/Stop + fifo_tb_stop_run:IF(TB_STOP_CNT /= 0) GENERATE + PROCESS (RD_CLK) + BEGIN + IF (RD_CLK'event AND RD_CLK='1') THEN + IF(state_rd_dom2 = '0' AND state_rd_dom3 = '1') THEN + sim_stop_cntr <= sim_stop_cntr - "1"; + END IF; + END IF; + END PROCESS; + END GENERATE fifo_tb_stop_run; + + + -- Stop when error found + PROCESS (RD_CLK) + BEGIN + IF (RD_CLK'event AND RD_CLK='1') THEN + IF(sim_done_i = '0') THEN + status_d1_i <= status_i OR status_d1_i; + END IF; + IF(FREEZEON_ERROR = 1 AND status_i /= "0") THEN + stop_on_err <= '1'; + END IF; + END IF; + END PROCESS; + ----------------------------------------------------- + + ----------------------------------------------------- + -- CHECKS FOR FIFO + ----------------------------------------------------- + + + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + post_rst_dly_rd <= (OTHERS => '1'); + ELSIF (RD_CLK'event AND RD_CLK='1') THEN + post_rst_dly_rd <= post_rst_dly_rd-post_rst_dly_rd(4); + END IF; + END PROCESS; + + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + post_rst_dly_wr <= (OTHERS => '1'); + ELSIF (WR_CLK'event AND WR_CLK='1') THEN + post_rst_dly_wr <= post_rst_dly_wr-post_rst_dly_wr(4); + END IF; + END PROCESS; + + + -- FULL de-assert Counter + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + full_ds_timeout <= (OTHERS => '0'); + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + IF(state = '1') THEN + IF(rd_en_wr2 = '1' AND wr_en_i = '0' AND FULL = '1' AND AND_REDUCE(wrw_gt_rdw) = '1') THEN + full_ds_timeout <= full_ds_timeout + '1'; + END IF; + ELSE + full_ds_timeout <= (OTHERS => '0'); + END IF; + END IF; + END PROCESS; + + + -- EMPTY deassert counter + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + empty_ds_timeout <= (OTHERS => '0'); + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF(state = '0') THEN + IF(wr_en_rd2 = '1' AND rd_en_i = '0' AND EMPTY = '1' AND AND_REDUCE(rdw_gt_wrw) = '1') THEN + empty_ds_timeout <= empty_ds_timeout + '1'; + END IF; + ELSE + empty_ds_timeout <= (OTHERS => '0'); + END IF; + END IF; + END PROCESS; + + -- Full check signal generation + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + full_chk_i <= '0'; + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + IF(C_APPLICATION_TYPE = 1 AND (AXI_CHANNEL = "WACH" OR AXI_CHANNEL = "RACH" OR AXI_CHANNEL = "AXI4_Stream")) THEN + full_chk_i <= '0'; + ELSE + full_chk_i <= AND_REDUCE(full_as_timeout) OR + AND_REDUCE(full_ds_timeout); + END IF; + END IF; + END PROCESS; + + -- Empty checks + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + empty_chk_i <= '0'; + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF(C_APPLICATION_TYPE = 1 AND (AXI_CHANNEL = "WACH" OR AXI_CHANNEL = "RACH" OR AXI_CHANNEL = "AXI4_Stream")) THEN + empty_chk_i <= '0'; + ELSE + empty_chk_i <= AND_REDUCE(empty_as_timeout) OR + AND_REDUCE(empty_ds_timeout); + END IF; + END IF; + END PROCESS; + + fifo_d_chk:IF(C_CH_TYPE /= 2) GENERATE + PRC_WR_EN <= prc_we_i AFTER 100 ns; + PRC_RD_EN <= prc_re_i AFTER 50 ns; + data_chk_i <= dout_chk; + END GENERATE fifo_d_chk; + ----------------------------------------------------- + + + ----------------------------------------------------- + -- SYNCHRONIZERS B/W WRITE AND READ DOMAINS + ----------------------------------------------------- + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + empty_wr_dom1 <= '1'; + empty_wr_dom2 <= '1'; + state_d1 <= '0'; + wr_en_d1 <= '0'; + rd_en_wr1 <= '0'; + rd_en_wr2 <= '0'; + full_chk_d1 <= '0'; + reset_en_d1 <= '0'; + sim_done_wr1 <= '0'; + sim_done_wr2 <= '0'; + ELSIF (WR_CLK'event AND WR_CLK='1') THEN + sim_done_wr1 <= sim_done_d1; + sim_done_wr2 <= sim_done_wr1; + reset_en_d1 <= reset_en_i; + state_d1 <= state; + empty_wr_dom1 <= empty_d1; + empty_wr_dom2 <= empty_wr_dom1; + wr_en_d1 <= wr_en_i; + rd_en_wr1 <= rd_en_d1; + rd_en_wr2 <= rd_en_wr1; + full_chk_d1 <= full_chk_i; + END IF; + END PROCESS; + + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + empty_d1 <= '1'; + state_rd_dom1 <= '0'; + state_rd_dom2 <= '0'; + state_rd_dom3 <= '0'; + wr_en_rd1 <= '0'; + wr_en_rd2 <= '0'; + rd_en_d1 <= '0'; + full_chk_rd1 <= '0'; + full_chk_rd2 <= '0'; + reset_en_rd1 <= '0'; + reset_en_rd2 <= '0'; + sim_done_d1 <= '0'; + ELSIF (RD_CLK'event AND RD_CLK='1') THEN + sim_done_d1 <= sim_done_i; + reset_en_rd1 <= reset_en_d1; + reset_en_rd2 <= reset_en_rd1; + empty_d1 <= EMPTY; + rd_en_d1 <= rd_en_i; + state_rd_dom1 <= state_d1; + state_rd_dom2 <= state_rd_dom1; + state_rd_dom3 <= state_rd_dom2; + wr_en_rd1 <= wr_en_d1; + wr_en_rd2 <= wr_en_rd1; + full_chk_rd1 <= full_chk_d1; + full_chk_rd2 <= full_chk_rd1; + END IF; + END PROCESS; + + RESET_EN <= reset_en_rd2; + + + data_fifo_en:IF(C_CH_TYPE /= 2) GENERATE + ----------------------------------------------------- + -- WR_EN GENERATION + ----------------------------------------------------- + gen_rand_wr_en:fifo_short_2clk_rng + GENERIC MAP( + WIDTH => 8, + SEED => TB_SEED+1 + ) + PORT MAP( + CLK => WR_CLK, + RESET => RESET_WR, + RANDOM_NUM => wr_en_gen, + ENABLE => '1' + ); + + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + wr_en_i <= '0'; + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + IF(state = '1') THEN + wr_en_i <= wr_en_gen(0) AND wr_en_gen(7) AND wr_en_gen(2) AND wr_control; + ELSE + wr_en_i <= (wr_en_gen(3) OR wr_en_gen(4) OR wr_en_gen(2)) AND (NOT post_rst_dly_wr(4)); + END IF; + END IF; + END PROCESS; + + ----------------------------------------------------- + -- WR_EN CONTROL + ----------------------------------------------------- + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + wr_cntr <= (OTHERS => '0'); + wr_control <= '1'; + full_as_timeout <= (OTHERS => '0'); + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + IF(state = '1') THEN + IF(wr_en_i = '1') THEN + wr_cntr <= wr_cntr + "1"; + END IF; + full_as_timeout <= (OTHERS => '0'); + ELSE + wr_cntr <= (OTHERS => '0'); + IF(rd_en_wr2 = '0') THEN + IF(wr_en_i = '1') THEN + full_as_timeout <= full_as_timeout + "1"; + END IF; + ELSE + full_as_timeout <= (OTHERS => '0'); + END IF; + END IF; + + wr_control <= NOT wr_cntr(wr_cntr'high); + + END IF; + END PROCESS; + + ----------------------------------------------------- + -- RD_EN GENERATION + ----------------------------------------------------- + gen_rand_rd_en:fifo_short_2clk_rng + GENERIC MAP( + WIDTH => 8, + SEED => TB_SEED + ) + PORT MAP( + CLK => RD_CLK, + RESET => RESET_RD, + RANDOM_NUM => rd_en_gen, + ENABLE => '1' + ); + + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + rd_en_i <= '0'; + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF(state_rd_dom2 = '0') THEN + rd_en_i <= rd_en_gen(1) AND rd_en_gen(5) AND rd_en_gen(3) AND rd_control AND (NOT post_rst_dly_rd(4)); + ELSE + rd_en_i <= rd_en_gen(0) OR rd_en_gen(6); + END IF; + END IF; + END PROCESS; + + ----------------------------------------------------- + -- RD_EN CONTROL + ----------------------------------------------------- + PROCESS(RD_CLK,RESET_RD) + BEGIN + IF(RESET_RD = '1') THEN + rd_cntr <= (OTHERS => '0'); + rd_control <= '1'; + empty_as_timeout <= (OTHERS => '0'); + ELSIF(RD_CLK'event AND RD_CLK='1') THEN + IF(state_rd_dom2 = '0') THEN + IF(rd_en_i = '1') THEN + rd_cntr <= rd_cntr + "1"; + END IF; + empty_as_timeout <= (OTHERS => '0'); + ELSE + rd_cntr <= (OTHERS => '0'); + IF(wr_en_rd2 = '0') THEN + IF(rd_en_i = '1') THEN + empty_as_timeout <= empty_as_timeout + "1"; + END IF; + ELSE + empty_as_timeout <= (OTHERS => '0'); + END IF; + END IF; + + rd_control <= NOT rd_cntr(rd_cntr'high); + + END IF; + END PROCESS; + + ----------------------------------------------------- + -- STIMULUS CONTROL + ----------------------------------------------------- + PROCESS(WR_CLK,RESET_WR) + BEGIN + IF(RESET_WR = '1') THEN + state <= '0'; + reset_en_i <= '0'; + ELSIF(WR_CLK'event AND WR_CLK='1') THEN + CASE state IS + WHEN '0' => + IF(FULL = '1' AND empty_wr_dom2 = '0') THEN + state <= '1'; + reset_en_i <= '0'; + END IF; + WHEN '1' => + IF(empty_wr_dom2 = '1' AND FULL = '0') THEN + state <= '0'; + reset_en_i <= '1'; + END IF; + WHEN OTHERS => state <= state; + END CASE; + END IF; + END PROCESS; + END GENERATE data_fifo_en; + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_pkg.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_pkg.vhd new file mode 100755 index 000000000..4c0e4035b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_pkg.vhd @@ -0,0 +1,350 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_short_2clk_pkg.vhd +-- +-- Description: +-- This is the demo testbench package file for FIFO Generator core. +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY IEEE; +USE IEEE.STD_LOGIC_1164.ALL; +USE ieee.std_logic_arith.ALL; +USE IEEE.STD_LOGIC_UNSIGNED.ALL; + +PACKAGE fifo_short_2clk_pkg IS + + FUNCTION divroundup ( + data_value : INTEGER; + divisor : INTEGER) + RETURN INTEGER; + ------------------------ + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : INTEGER; + false_case : INTEGER) + RETURN INTEGER; + ------------------------ + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : STD_LOGIC; + false_case : STD_LOGIC) + RETURN STD_LOGIC; + ------------------------ + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : TIME; + false_case : TIME) + RETURN TIME; + ------------------------ + FUNCTION log2roundup ( + data_value : INTEGER) + RETURN INTEGER; + ------------------------ + FUNCTION hexstr_to_std_logic_vec( + arg1 : string; + size : integer ) + RETURN std_logic_vector; + ------------------------ + COMPONENT fifo_short_2clk_rng IS + GENERIC (WIDTH : integer := 8; + SEED : integer := 3); + PORT ( + CLK : IN STD_LOGIC; + RESET : IN STD_LOGIC; + ENABLE : IN STD_LOGIC; + RANDOM_NUM : OUT STD_LOGIC_VECTOR (WIDTH-1 DOWNTO 0) + ); + END COMPONENT; + ------------------------ + + COMPONENT fifo_short_2clk_dgen IS + GENERIC ( + C_DIN_WIDTH : INTEGER := 32; + C_DOUT_WIDTH : INTEGER := 32; + C_CH_TYPE : INTEGER := 0; + TB_SEED : INTEGER := 2 + ); + PORT ( + RESET : IN STD_LOGIC; + WR_CLK : IN STD_LOGIC; + PRC_WR_EN : IN STD_LOGIC; + FULL : IN STD_LOGIC; + WR_EN : OUT STD_LOGIC; + WR_DATA : OUT STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0) + ); + END COMPONENT; + ------------------------ + + COMPONENT fifo_short_2clk_dverif IS + GENERIC( + C_DIN_WIDTH : INTEGER := 0; + C_DOUT_WIDTH : INTEGER := 0; + C_USE_EMBEDDED_REG : INTEGER := 0; + C_CH_TYPE : INTEGER := 0; + TB_SEED : INTEGER := 2 + ); + PORT( + RESET : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + PRC_RD_EN : IN STD_LOGIC; + EMPTY : IN STD_LOGIC; + DATA_OUT : IN STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0); + RD_EN : OUT STD_LOGIC; + DOUT_CHK : OUT STD_LOGIC + ); + END COMPONENT; + ------------------------ + + COMPONENT fifo_short_2clk_pctrl IS + GENERIC( + AXI_CHANNEL : STRING := "NONE"; + C_APPLICATION_TYPE : INTEGER := 0; + C_DIN_WIDTH : INTEGER := 0; + C_DOUT_WIDTH : INTEGER := 0; + C_WR_PNTR_WIDTH : INTEGER := 0; + C_RD_PNTR_WIDTH : INTEGER := 0; + C_CH_TYPE : INTEGER := 0; + FREEZEON_ERROR : INTEGER := 0; + TB_STOP_CNT : INTEGER := 2; + TB_SEED : INTEGER := 2 + ); + PORT( + RESET_WR : IN STD_LOGIC; + RESET_RD : IN STD_LOGIC; + WR_CLK : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + FULL : IN STD_LOGIC; + EMPTY : IN STD_LOGIC; + ALMOST_FULL : IN STD_LOGIC; + ALMOST_EMPTY : IN STD_LOGIC; + DATA_IN : IN STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0); + DATA_OUT : IN STD_LOGIC_VECTOR(C_DOUT_WIDTH-1 DOWNTO 0); + DOUT_CHK : IN STD_LOGIC; + PRC_WR_EN : OUT STD_LOGIC; + PRC_RD_EN : OUT STD_LOGIC; + RESET_EN : OUT STD_LOGIC; + SIM_DONE : OUT STD_LOGIC; + STATUS : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) + ); + END COMPONENT; + ------------------------ + COMPONENT fifo_short_2clk_synth IS + GENERIC( + FREEZEON_ERROR : INTEGER := 0; + TB_STOP_CNT : INTEGER := 0; + TB_SEED : INTEGER := 1 + ); + PORT( + WR_CLK : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + RESET : IN STD_LOGIC; + SIM_DONE : OUT STD_LOGIC; + STATUS : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) + ); + END COMPONENT; + ------------------------ + COMPONENT fifo_short_2clk_exdes IS + PORT ( + WR_CLK : IN std_logic; + RD_CLK : IN std_logic; + WR_DATA_COUNT : OUT std_logic_vector(6-1 DOWNTO 0); + RD_DATA_COUNT : OUT std_logic_vector(6-1 DOWNTO 0); + RST : IN std_logic; + WR_EN : IN std_logic; + RD_EN : IN std_logic; + DIN : IN std_logic_vector(72-1 DOWNTO 0); + DOUT : OUT std_logic_vector(72-1 DOWNTO 0); + FULL : OUT std_logic; + EMPTY : OUT std_logic); + + END COMPONENT; + ------------------------ + + +END fifo_short_2clk_pkg; + + + +PACKAGE BODY fifo_short_2clk_pkg IS + + FUNCTION divroundup ( + data_value : INTEGER; + divisor : INTEGER) + RETURN INTEGER IS + VARIABLE div : INTEGER; + BEGIN + div := data_value/divisor; + IF ( (data_value MOD divisor) /= 0) THEN + div := div+1; + END IF; + RETURN div; + END divroundup; + --------------------------------- + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : INTEGER; + false_case : INTEGER) + RETURN INTEGER IS + VARIABLE retval : INTEGER := 0; + BEGIN + IF condition=false THEN + retval:=false_case; + ELSE + retval:=true_case; + END IF; + RETURN retval; + END if_then_else; + --------------------------------- + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : STD_LOGIC; + false_case : STD_LOGIC) + RETURN STD_LOGIC IS + VARIABLE retval : STD_LOGIC := '0'; + BEGIN + IF condition=false THEN + retval:=false_case; + ELSE + retval:=true_case; + END IF; + RETURN retval; + END if_then_else; + --------------------------------- + FUNCTION if_then_else ( + condition : BOOLEAN; + true_case : TIME; + false_case : TIME) + RETURN TIME IS + VARIABLE retval : TIME := 0 ps; + BEGIN + IF condition=false THEN + retval:=false_case; + ELSE + retval:=true_case; + END IF; + RETURN retval; + END if_then_else; + ------------------------------- + FUNCTION log2roundup ( + data_value : INTEGER) + RETURN INTEGER IS + + VARIABLE width : INTEGER := 0; + VARIABLE cnt : INTEGER := 1; + BEGIN + IF (data_value <= 1) THEN + width := 1; + ELSE + WHILE (cnt < data_value) LOOP + width := width + 1; + cnt := cnt *2; + END LOOP; + END IF; + + RETURN width; + END log2roundup; + ------------------------------------------------------------------------------ + -- hexstr_to_std_logic_vec + -- This function converts a hex string to a std_logic_vector + ------------------------------------------------------------------------------ + FUNCTION hexstr_to_std_logic_vec( + arg1 : string; + size : integer ) + RETURN std_logic_vector IS + VARIABLE result : std_logic_vector(size-1 DOWNTO 0) := (OTHERS => '0'); + VARIABLE bin : std_logic_vector(3 DOWNTO 0); + VARIABLE index : integer := 0; + BEGIN + FOR i IN arg1'reverse_range LOOP + CASE arg1(i) IS + WHEN '0' => bin := (OTHERS => '0'); + WHEN '1' => bin := (0 => '1', OTHERS => '0'); + WHEN '2' => bin := (1 => '1', OTHERS => '0'); + WHEN '3' => bin := (0 => '1', 1 => '1', OTHERS => '0'); + WHEN '4' => bin := (2 => '1', OTHERS => '0'); + WHEN '5' => bin := (0 => '1', 2 => '1', OTHERS => '0'); + WHEN '6' => bin := (1 => '1', 2 => '1', OTHERS => '0'); + WHEN '7' => bin := (3 => '0', OTHERS => '1'); + WHEN '8' => bin := (3 => '1', OTHERS => '0'); + WHEN '9' => bin := (0 => '1', 3 => '1', OTHERS => '0'); + WHEN 'A' => bin := (0 => '0', 2 => '0', OTHERS => '1'); + WHEN 'a' => bin := (0 => '0', 2 => '0', OTHERS => '1'); + WHEN 'B' => bin := (2 => '0', OTHERS => '1'); + WHEN 'b' => bin := (2 => '0', OTHERS => '1'); + WHEN 'C' => bin := (0 => '0', 1 => '0', OTHERS => '1'); + WHEN 'c' => bin := (0 => '0', 1 => '0', OTHERS => '1'); + WHEN 'D' => bin := (1 => '0', OTHERS => '1'); + WHEN 'd' => bin := (1 => '0', OTHERS => '1'); + WHEN 'E' => bin := (0 => '0', OTHERS => '1'); + WHEN 'e' => bin := (0 => '0', OTHERS => '1'); + WHEN 'F' => bin := (OTHERS => '1'); + WHEN 'f' => bin := (OTHERS => '1'); + WHEN OTHERS => + FOR j IN 0 TO 3 LOOP + bin(j) := 'X'; + END LOOP; + END CASE; + FOR j IN 0 TO 3 LOOP + IF (index*4)+j < size THEN + result((index*4)+j) := bin(j); + END IF; + END LOOP; + index := index + 1; + END LOOP; + RETURN result; + END hexstr_to_std_logic_vec; + +END fifo_short_2clk_pkg; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_rng.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_rng.vhd new file mode 100755 index 000000000..80c201c3b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_rng.vhd @@ -0,0 +1,100 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_short_2clk_rng.vhd +-- +-- Description: +-- Used for generation of pseudo random numbers +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.all; +USE IEEE.std_logic_arith.all; +USE IEEE.std_logic_misc.all; + +ENTITY fifo_short_2clk_rng IS + GENERIC ( + WIDTH : integer := 8; + SEED : integer := 3); + PORT ( + CLK : IN STD_LOGIC; + RESET : IN STD_LOGIC; + ENABLE : IN STD_LOGIC; + RANDOM_NUM : OUT STD_LOGIC_VECTOR (WIDTH-1 DOWNTO 0)); +END ENTITY; + +ARCHITECTURE rg_arch OF fifo_short_2clk_rng IS +BEGIN +PROCESS (CLK,RESET) + VARIABLE rand_temp : STD_LOGIC_VECTOR(width-1 DOWNTO 0):=conv_std_logic_vector(SEED,width); + VARIABLE temp : STD_LOGIC := '0'; +BEGIN + IF(RESET = '1') THEN + rand_temp := conv_std_logic_vector(SEED,width); + temp := '0'; + ELSIF (CLK'event AND CLK = '1') THEN + IF (ENABLE = '1') THEN + temp := rand_temp(width-1) xnor rand_temp(width-3) xnor rand_temp(width-4) xnor rand_temp(width-5); + rand_temp(width-1 DOWNTO 1) := rand_temp(width-2 DOWNTO 0); + rand_temp(0) := temp; + END IF; + END IF; + + RANDOM_NUM <= rand_temp; + +END PROCESS; + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_synth.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_synth.vhd new file mode 100755 index 000000000..e9139fc96 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_synth.vhd @@ -0,0 +1,300 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_short_2clk_synth.vhd +-- +-- Description: +-- This is the demo testbench for fifo_generator core. +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- + + +LIBRARY ieee; +USE ieee.STD_LOGIC_1164.ALL; +USE ieee.STD_LOGIC_unsigned.ALL; +USE IEEE.STD_LOGIC_arith.ALL; +USE ieee.numeric_std.ALL; +USE ieee.STD_LOGIC_misc.ALL; + +LIBRARY std; +USE std.textio.ALL; + +LIBRARY work; +USE work.fifo_short_2clk_pkg.ALL; + +-------------------------------------------------------------------------------- +-- Entity Declaration +-------------------------------------------------------------------------------- +ENTITY fifo_short_2clk_synth IS + GENERIC( + FREEZEON_ERROR : INTEGER := 0; + TB_STOP_CNT : INTEGER := 0; + TB_SEED : INTEGER := 1 + ); + PORT( + WR_CLK : IN STD_LOGIC; + RD_CLK : IN STD_LOGIC; + RESET : IN STD_LOGIC; + SIM_DONE : OUT STD_LOGIC; + STATUS : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) + ); +END ENTITY; + +ARCHITECTURE simulation_arch OF fifo_short_2clk_synth IS + + -- FIFO interface signal declarations + SIGNAL wr_clk_i : STD_LOGIC; + SIGNAL rd_clk_i : STD_LOGIC; + SIGNAL wr_data_count : STD_LOGIC_VECTOR(6-1 DOWNTO 0); + SIGNAL rd_data_count : STD_LOGIC_VECTOR(6-1 DOWNTO 0); + SIGNAL rst : STD_LOGIC; + SIGNAL wr_en : STD_LOGIC; + SIGNAL rd_en : STD_LOGIC; + SIGNAL din : STD_LOGIC_VECTOR(72-1 DOWNTO 0); + SIGNAL dout : STD_LOGIC_VECTOR(72-1 DOWNTO 0); + SIGNAL full : STD_LOGIC; + SIGNAL empty : STD_LOGIC; + -- TB Signals + SIGNAL wr_data : STD_LOGIC_VECTOR(72-1 DOWNTO 0); + SIGNAL dout_i : STD_LOGIC_VECTOR(72-1 DOWNTO 0); + SIGNAL wr_en_i : STD_LOGIC := '0'; + SIGNAL rd_en_i : STD_LOGIC := '0'; + SIGNAL full_i : STD_LOGIC := '0'; + SIGNAL empty_i : STD_LOGIC := '0'; + SIGNAL almost_full_i : STD_LOGIC := '0'; + SIGNAL almost_empty_i : STD_LOGIC := '0'; + SIGNAL prc_we_i : STD_LOGIC := '0'; + SIGNAL prc_re_i : STD_LOGIC := '0'; + SIGNAL dout_chk_i : STD_LOGIC := '0'; + SIGNAL rst_int_rd : STD_LOGIC := '0'; + SIGNAL rst_int_wr : STD_LOGIC := '0'; + SIGNAL rst_s_wr1 : STD_LOGIC := '0'; + SIGNAL rst_s_wr2 : STD_LOGIC := '0'; + SIGNAL rst_gen_rd : STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0'); + SIGNAL rst_s_wr3 : STD_LOGIC := '0'; + SIGNAL rst_s_rd : STD_LOGIC := '0'; + SIGNAL reset_en : STD_LOGIC := '0'; + SIGNAL rst_async_wr1 : STD_LOGIC := '0'; + SIGNAL rst_async_wr2 : STD_LOGIC := '0'; + SIGNAL rst_async_wr3 : STD_LOGIC := '0'; + SIGNAL rst_async_rd1 : STD_LOGIC := '0'; + SIGNAL rst_async_rd2 : STD_LOGIC := '0'; + SIGNAL rst_async_rd3 : STD_LOGIC := '0'; + + + BEGIN + + ---- Reset generation logic ----- + rst_int_wr <= rst_async_wr3 OR rst_s_wr3; + rst_int_rd <= rst_async_rd3 OR rst_s_rd; + + --Testbench reset synchronization + PROCESS(rd_clk_i,RESET) + BEGIN + IF(RESET = '1') THEN + rst_async_rd1 <= '1'; + rst_async_rd2 <= '1'; + rst_async_rd3 <= '1'; + ELSIF(rd_clk_i'event AND rd_clk_i='1') THEN + rst_async_rd1 <= RESET; + rst_async_rd2 <= rst_async_rd1; + rst_async_rd3 <= rst_async_rd2; + END IF; + END PROCESS; + + PROCESS(wr_clk_i,RESET) + BEGIN + IF(RESET = '1') THEN + rst_async_wr1 <= '1'; + rst_async_wr2 <= '1'; + rst_async_wr3 <= '1'; + ELSIF(wr_clk_i'event AND wr_clk_i='1') THEN + rst_async_wr1 <= RESET; + rst_async_wr2 <= rst_async_wr1; + rst_async_wr3 <= rst_async_wr2; + END IF; + END PROCESS; + + --Soft reset for core and testbench + PROCESS(rd_clk_i) + BEGIN + IF(rd_clk_i'event AND rd_clk_i='1') THEN + rst_gen_rd <= rst_gen_rd + "1"; + IF(reset_en = '1' AND AND_REDUCE(rst_gen_rd) = '1') THEN + rst_s_rd <= '1'; + assert false + report "Reset applied..Memory Collision checks are not valid" + severity note; + ELSE + IF(AND_REDUCE(rst_gen_rd) = '1' AND rst_s_rd = '1') THEN + rst_s_rd <= '0'; + END IF; + END IF; + END IF; + END PROCESS; + + PROCESS(wr_clk_i) + BEGIN + IF(wr_clk_i'event AND wr_clk_i='1') THEN + rst_s_wr1 <= rst_s_rd; + rst_s_wr2 <= rst_s_wr1; + rst_s_wr3 <= rst_s_wr2; + IF(rst_s_wr3 = '1' AND rst_s_wr2 = '0') THEN + assert false + report "Reset removed..Memory Collision checks are valid" + severity note; + END IF; + END IF; + END PROCESS; + ------------------ + + ---- Clock buffers for testbench ---- + wr_clk_i <= WR_CLK; + rd_clk_i <= RD_CLK; + ------------------ + + rst <= RESET OR rst_s_rd AFTER 12 ns; + din <= wr_data; + dout_i <= dout; + wr_en <= wr_en_i; + rd_en <= rd_en_i; + full_i <= full; + empty_i <= empty; + + fg_dg_nv: fifo_short_2clk_dgen + GENERIC MAP ( + C_DIN_WIDTH => 72, + C_DOUT_WIDTH => 72, + TB_SEED => TB_SEED, + C_CH_TYPE => 0 + ) + PORT MAP ( -- Write Port + RESET => rst_int_wr, + WR_CLK => wr_clk_i, + PRC_WR_EN => prc_we_i, + FULL => full_i, + WR_EN => wr_en_i, + WR_DATA => wr_data + ); + + fg_dv_nv: fifo_short_2clk_dverif + GENERIC MAP ( + C_DOUT_WIDTH => 72, + C_DIN_WIDTH => 72, + C_USE_EMBEDDED_REG => 0, + TB_SEED => TB_SEED, + C_CH_TYPE => 0 + ) + PORT MAP( + RESET => rst_int_rd, + RD_CLK => rd_clk_i, + PRC_RD_EN => prc_re_i, + RD_EN => rd_en_i, + EMPTY => empty_i, + DATA_OUT => dout_i, + DOUT_CHK => dout_chk_i + ); + + fg_pc_nv: fifo_short_2clk_pctrl + GENERIC MAP ( + AXI_CHANNEL => "Native", + C_APPLICATION_TYPE => 0, + C_DOUT_WIDTH => 72, + C_DIN_WIDTH => 72, + C_WR_PNTR_WIDTH => 5, + C_RD_PNTR_WIDTH => 5, + C_CH_TYPE => 0, + FREEZEON_ERROR => FREEZEON_ERROR, + TB_SEED => TB_SEED, + TB_STOP_CNT => TB_STOP_CNT + ) + PORT MAP( + RESET_WR => rst_int_wr, + RESET_RD => rst_int_rd, + RESET_EN => reset_en, + WR_CLK => wr_clk_i, + RD_CLK => rd_clk_i, + PRC_WR_EN => prc_we_i, + PRC_RD_EN => prc_re_i, + FULL => full_i, + ALMOST_FULL => almost_full_i, + ALMOST_EMPTY => almost_empty_i, + DOUT_CHK => dout_chk_i, + EMPTY => empty_i, + DATA_IN => wr_data, + DATA_OUT => dout, + SIM_DONE => SIM_DONE, + STATUS => STATUS + ); + + + + + + fifo_short_2clk_inst : fifo_short_2clk_exdes + PORT MAP ( + WR_CLK => wr_clk_i, + RD_CLK => rd_clk_i, + WR_DATA_COUNT => wr_data_count, + RD_DATA_COUNT => rd_data_count, + RST => rst, + WR_EN => wr_en, + RD_EN => rd_en, + DIN => din, + DOUT => dout, + FULL => full, + EMPTY => empty); + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_tb.vhd b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_tb.vhd new file mode 100755 index 000000000..6d86157db --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/fifo_short_2clk_tb.vhd @@ -0,0 +1,208 @@ +-------------------------------------------------------------------------------- +-- +-- FIFO Generator Core Demo Testbench +-- +-------------------------------------------------------------------------------- +-- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +-------------------------------------------------------------------------------- +-- +-- Filename: fifo_short_2clk_tb.vhd +-- +-- Description: +-- This is the demo testbench top file for fifo_generator core. +-- +-------------------------------------------------------------------------------- +-- Library Declarations +-------------------------------------------------------------------------------- +LIBRARY ieee; +LIBRARY std; +USE ieee.std_logic_1164.ALL; +USE ieee.std_logic_unsigned.ALL; +USE IEEE.std_logic_arith.ALL; +USE IEEE.std_logic_misc.ALL; +USE ieee.numeric_std.ALL; +USE ieee.std_logic_textio.ALL; +USE std.textio.ALL; + +LIBRARY work; +USE work.fifo_short_2clk_pkg.ALL; + +ENTITY fifo_short_2clk_tb IS +END ENTITY; + + +ARCHITECTURE fifo_short_2clk_arch OF fifo_short_2clk_tb IS + SIGNAL status : STD_LOGIC_VECTOR(7 DOWNTO 0) := "00000000"; + SIGNAL wr_clk : STD_LOGIC; + SIGNAL rd_clk : STD_LOGIC; + SIGNAL reset : STD_LOGIC; + SIGNAL sim_done : STD_LOGIC := '0'; + SIGNAL end_of_sim : STD_LOGIC_VECTOR(4 DOWNTO 0) := (OTHERS => '0'); + -- Write and Read clock periods + CONSTANT wr_clk_period_by_2 : TIME := 200 ns; + CONSTANT rd_clk_period_by_2 : TIME := 100 ns; + -- Procedures to display strings + PROCEDURE disp_str(CONSTANT str:IN STRING) IS + variable dp_l : line := null; + BEGIN + write(dp_l,str); + writeline(output,dp_l); + END PROCEDURE; + + PROCEDURE disp_hex(signal hex:IN STD_LOGIC_VECTOR(7 DOWNTO 0)) IS + variable dp_lx : line := null; + BEGIN + hwrite(dp_lx,hex); + writeline(output,dp_lx); + END PROCEDURE; + +BEGIN + + -- Generation of clock + + PROCESS BEGIN + WAIT FOR 400 ns; -- Wait for global reset + WHILE 1 = 1 LOOP + wr_clk <= '0'; + WAIT FOR wr_clk_period_by_2; + wr_clk <= '1'; + WAIT FOR wr_clk_period_by_2; + END LOOP; + END PROCESS; + + PROCESS BEGIN + WAIT FOR 200 ns;-- Wait for global reset + WHILE 1 = 1 LOOP + rd_clk <= '0'; + WAIT FOR rd_clk_period_by_2; + rd_clk <= '1'; + WAIT FOR rd_clk_period_by_2; + END LOOP; + END PROCESS; + + -- Generation of Reset + + PROCESS BEGIN + reset <= '1'; + WAIT FOR 4200 ns; + reset <= '0'; + WAIT; + END PROCESS; + + + -- Error message printing based on STATUS signal from fifo_short_2clk_synth + + PROCESS(status) + BEGIN + IF(status /= "0" AND status /= "1") THEN + disp_str("STATUS:"); + disp_hex(status); + END IF; + + IF(status(7) = '1') THEN + assert false + report "Data mismatch found" + severity error; + END IF; + + IF(status(1) = '1') THEN + END IF; + + IF(status(5) = '1') THEN + assert false + report "Empty flag Mismatch/timeout" + severity error; + END IF; + + IF(status(6) = '1') THEN + assert false + report "Full Flag Mismatch/timeout" + severity error; + END IF; + END PROCESS; + + + PROCESS + BEGIN + wait until sim_done = '1'; + IF(status /= "0" AND status /= "1") THEN + assert false + report "Simulation failed" + severity failure; + ELSE + assert false + report "Test Completed Successfully" + severity failure; + END IF; + END PROCESS; + + PROCESS + BEGIN + wait for 400 ms; + assert false + report "Test bench timed out" + severity failure; + END PROCESS; + + -- Instance of fifo_short_2clk_synth + + fifo_short_2clk_synth_inst:fifo_short_2clk_synth + GENERIC MAP( + FREEZEON_ERROR => 0, + TB_STOP_CNT => 2, + TB_SEED => 108 + ) + PORT MAP( + WR_CLK => wr_clk, + RD_CLK => rd_clk, + RESET => reset, + SIM_DONE => sim_done, + STATUS => status + ); + +END ARCHITECTURE; diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_isim.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_isim.bat new file mode 100755 index 000000000..d40cb85cf --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_isim.bat @@ -0,0 +1,63 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogcomp -work work ..\\..\\..\\fifo_short_2clk.v +vhpcomp -work work ..\\..\\example_design\\fifo_short_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +vhpcomp -work work ..\\fifo_short_2clk_pkg.vhd +vhpcomp -work work ..\\fifo_short_2clk_rng.vhd +vhpcomp -work work ..\\fifo_short_2clk_dgen.vhd +vhpcomp -work work ..\\fifo_short_2clk_dverif.vhd +vhpcomp -work work ..\\fifo_short_2clk_pctrl.vhd +vhpcomp -work work ..\\fifo_short_2clk_synth.vhd +vhpcomp -work work ..\\fifo_short_2clk_tb.vhd + +vlogcomp -work work $XILINX\\verilog\\src\\glbl.v +fuse work.fifo_short_2clk_tb work.glbl -L xilinxcorelib_ver -L unisims_ver -o fifo_short_2clk_tb.exe + +.\\fifo_short_2clk_tb.exe -gui -tclbatch .\\wave_isim.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_isim.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_isim.sh new file mode 100755 index 000000000..78f9ce588 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_isim.sh @@ -0,0 +1,65 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogcomp -work work ../../../fifo_short_2clk.v +vhpcomp -work work ../../example_design/fifo_short_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +vhpcomp -work work ../fifo_short_2clk_pkg.vhd +vhpcomp -work work ../fifo_short_2clk_rng.vhd +vhpcomp -work work ../fifo_short_2clk_dgen.vhd +vhpcomp -work work ../fifo_short_2clk_dverif.vhd +vhpcomp -work work ../fifo_short_2clk_pctrl.vhd +vhpcomp -work work ../fifo_short_2clk_synth.vhd +vhpcomp -work work ../fifo_short_2clk_tb.vhd + +vlogcomp -work work $XILINX/verilog/src/glbl.v +fuse work.fifo_short_2clk_tb work.glbl -L xilinxcorelib_ver -L unisims_ver -o fifo_short_2clk_tb.exe + +./fifo_short_2clk_tb.exe -gui -tclbatch ./wave_isim.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_mti.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_mti.bat new file mode 100755 index 000000000..35375ce20 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_mti.bat @@ -0,0 +1,47 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +vsim -c -do simulate_mti.do diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_mti.do b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_mti.do new file mode 100755 index 000000000..8deb52187 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_mti.do @@ -0,0 +1,74 @@ +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +vlib work +vmap work work + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlog -work work ../../../fifo_short_2clk.v +vcom -work work ../../example_design/fifo_short_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +vcom -work work ../fifo_short_2clk_pkg.vhd +vcom -work work ../fifo_short_2clk_rng.vhd +vcom -work work ../fifo_short_2clk_dgen.vhd +vcom -work work ../fifo_short_2clk_dverif.vhd +vcom -work work ../fifo_short_2clk_pctrl.vhd +vcom -work work ../fifo_short_2clk_synth.vhd +vcom -work work ../fifo_short_2clk_tb.vhd + +vlog -work work $env(XILINX)/verilog/src/glbl.v +vsim -t ps -voptargs="+acc" -L XilinxCoreLib_ver -L unisims_ver glbl work.fifo_short_2clk_tb + +add log -r /* +do wave_mti.do +#Ignore integer warnings at time 0 +set StdArithNoWarnings 1 +run 0 +set StdArithNoWarnings 0 + +run -all diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_mti.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_mti.sh new file mode 100755 index 000000000..edb1b0dd9 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_mti.sh @@ -0,0 +1,49 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +vsim -c -do simulate_mti.do diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_ncsim.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_ncsim.sh new file mode 100755 index 000000000..749f9db06 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_ncsim.sh @@ -0,0 +1,69 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- +mkdir work + +echo "Compiling Core Verilog UNISIM/Behavioral model" +ncvlog -work work ../../../fifo_short_2clk.v +ncvhdl -v93 -work work ../../example_design/fifo_short_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +ncvhdl -v93 -work work ../fifo_short_2clk_pkg.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_rng.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_dgen.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_dverif.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_pctrl.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_synth.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_tb.vhd + +echo "Elaborating Design" +ncvlog -work work $XILINX/verilog/src/glbl.v +ncelab -access +rwc glbl work.fifo_short_2clk_tb + +echo "Simulating Design" +ncsim -gui -input @"simvision -input wave_ncsim.sv" work.fifo_short_2clk_tb + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_vcs.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_vcs.sh new file mode 100755 index 000000000..71a568e24 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/simulate_vcs.sh @@ -0,0 +1,69 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- +rm -rf simv* csrc DVEfiles AN.DB + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogan +v2k ../../../fifo_short_2clk.v +vhdlan ../../example_design/fifo_short_2clk_exdes.vhd + +echo "Compiling Test Bench Files" +vhdlan ../fifo_short_2clk_pkg.vhd +vhdlan ../fifo_short_2clk_rng.vhd +vhdlan ../fifo_short_2clk_dgen.vhd +vhdlan ../fifo_short_2clk_dverif.vhd +vhdlan ../fifo_short_2clk_pctrl.vhd +vhdlan ../fifo_short_2clk_synth.vhd +vhdlan ../fifo_short_2clk_tb.vhd + +echo "Elaborating Design" +vlogan +v2k $XILINX/verilog/src/glbl.v +vcs -time_res 1ps +vcs+lic+wait -debug fifo_short_2clk_tb glbl + +echo "Simulating Design" +./simv -ucli -i ucli_commands.key +dve -session vcs_session.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/ucli_commands.key b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/ucli_commands.key new file mode 100755 index 000000000..f90cccb67 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/ucli_commands.key @@ -0,0 +1,4 @@ +dump -file fifo_short_2clk.vpd -type VPD +dump -add fifo_short_2clk_tb +run +quit diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/vcs_session.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/vcs_session.tcl new file mode 100755 index 000000000..7f3170d74 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/vcs_session.tcl @@ -0,0 +1,77 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: vcs_session.tcl +# +# Description: +# This is the VCS wave form file. +# +#-------------------------------------------------------------------------------- +if { ![gui_is_db_opened -db {fifo_short_2clk.vpd}] } { + gui_open_db -design V1 -file fifo_short_2clk.vpd -nosource +} +gui_set_precision 1ps +gui_set_time_units 1ps + + +gui_open_window Wave +gui_sg_create fifo_short_2clk_Group +gui_list_add_group -id Wave.1 {fifo_short_2clk_Group} + +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RST +gui_sg_addsignal -group fifo_short_2clk_Group WRITE -divider +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_CLK +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_EN +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/FULL +gui_sg_addsignal -group fifo_short_2clk_Group READ -divider +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_CLK +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_EN +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/EMPTY +gui_zoom -window Wave.1 -full diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/wave_isim.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/wave_isim.tcl new file mode 100755 index 000000000..156aad172 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/wave_isim.tcl @@ -0,0 +1,68 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: wave_isim.tcl +# +# Description: +# This is the ISIM wave form file. +# +#-------------------------------------------------------------------------------- +wcfg new +isim set radix hex +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RST +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_CLK +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_EN +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/FULL +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_CLK +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_EN +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/EMPTY +run all +quit + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/wave_mti.do b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/wave_mti.do new file mode 100755 index 000000000..eafc64cf2 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/wave_mti.do @@ -0,0 +1,88 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +# Filename: wave_mti.do +# +# Description: +# This is the modelsim wave form file. +# +#-------------------------------------------------------------------------------- + +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RST +add wave -noupdate -divider WRITE +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_CLK +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_EN +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/FULL +add wave -noupdate -radix hexadecimal /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/DIN +add wave -noupdate -divider READ +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_CLK +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_EN +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/EMPTY +add wave -noupdate -radix hexadecimal /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/DOUT + +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {2164886 ps} 0} +configure wave -namecolwidth 197 +configure wave -valuecolwidth 106 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ps +update +WaveRestoreZoom {0 ps} {9464063 ps} diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/wave_ncsim.sv b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/wave_ncsim.sv new file mode 100755 index 000000000..655d5c65a --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/functional/wave_ncsim.sv @@ -0,0 +1,70 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: wave_ncsim.sv +# +# Description: +# This is the IUS wave form file. +# +#-------------------------------------------------------------------------------- + +window new WaveWindow -name "Waves for FIFO Generator Example Design" +waveform using "Waves for FIFO Generator Example Design" + +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RST +waveform add -label WRITE +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_CLK +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_EN +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/FULL +waveform add -label READ +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_CLK +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_EN +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/EMPTY +console submit -using simulator -wait no "run" diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_isim.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_isim.bat new file mode 100755 index 000000000..536a7cfee --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_isim.bat @@ -0,0 +1,61 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogcomp -work work ..\\..\\implement\\results\\routed.v + +echo "Compiling Test Bench Files" +vhpcomp -work work ..\\fifo_short_2clk_pkg.vhd +vhpcomp -work work ..\\fifo_short_2clk_rng.vhd +vhpcomp -work work ..\\fifo_short_2clk_dgen.vhd +vhpcomp -work work ..\\fifo_short_2clk_dverif.vhd +vhpcomp -work work ..\\fifo_short_2clk_pctrl.vhd +vhpcomp -work work ..\\fifo_short_2clk_synth.vhd +vhpcomp -work work ..\\fifo_short_2clk_tb.vhd + +fuse work.fifo_short_2clk_tb work.glbl -L simprims_ver -o fifo_short_2clk_tb.exe + +.\\fifo_short_2clk_tb.exe -sdfmax /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst=..\\..\\implement\\results\\routed.sdf -gui -tclbatch .\\wave_isim.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_isim.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_isim.sh new file mode 100755 index 000000000..2d9404294 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_isim.sh @@ -0,0 +1,63 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogcomp -work work ../../implement/results/routed.v + +echo "Compiling Test Bench Files" +vhpcomp -work work ../fifo_short_2clk_pkg.vhd +vhpcomp -work work ../fifo_short_2clk_rng.vhd +vhpcomp -work work ../fifo_short_2clk_dgen.vhd +vhpcomp -work work ../fifo_short_2clk_dverif.vhd +vhpcomp -work work ../fifo_short_2clk_pctrl.vhd +vhpcomp -work work ../fifo_short_2clk_synth.vhd +vhpcomp -work work ../fifo_short_2clk_tb.vhd + +fuse work.fifo_short_2clk_tb work.glbl -L simprims_ver -o fifo_short_2clk_tb.exe + +./fifo_short_2clk_tb.exe -sdfmax /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst=../../implement/results/routed.sdf -gui -tclbatch ./wave_isim.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_mti.bat b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_mti.bat new file mode 100755 index 000000000..35375ce20 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_mti.bat @@ -0,0 +1,47 @@ +:: (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +:: +:: This file contains confidential and proprietary information +:: of Xilinx, Inc. and is protected under U.S. and +:: international copyright and other intellectual property +:: laws. +:: +:: DISCLAIMER +:: This disclaimer is not a license and does not grant any +:: rights to the materials distributed herewith. Except as +:: otherwise provided in a valid license issued to you by +:: Xilinx, and to the maximum extent permitted by applicable +:: law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +:: WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +:: AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +:: BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +:: INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +:: (2) Xilinx shall not be liable (whether in contract or tort, +:: including negligence, or under any other theory of +:: liability) for any loss or damage of any kind or nature +:: related to, arising under or in connection with these +:: materials, including for any direct, or any indirect, +:: special, incidental, or consequential loss or damage +:: (including loss of data, profits, goodwill, or any type of +:: loss or damage suffered as a result of any action brought +:: by a third party) even if such damage or loss was +:: reasonably foreseeable or Xilinx had been advised of the +:: possibility of the same. +:: +:: CRITICAL APPLICATIONS +:: Xilinx products are not designed or intended to be fail- +:: safe, or for use in any application requiring fail-safe +:: performance, such as life-support or safety devices or +:: systems, Class III medical devices, nuclear facilities, +:: applications related to the deployment of airbags, or any +:: other applications that could lead to death, personal +:: injury, or severe property or environmental damage +:: (individually and collectively, "Critical +:: Applications"). Customer assumes the sole risk and +:: liability of any use of Xilinx products in Critical +:: Applications, subject only to applicable laws and +:: regulations governing limitations on product liability. +:: +:: THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +:: PART OF THIS FILE AT ALL TIMES. + +vsim -c -do simulate_mti.do diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_mti.do b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_mti.do new file mode 100755 index 000000000..7ec785533 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_mti.do @@ -0,0 +1,72 @@ +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +vlib work +vmap work work + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlog -work work ../../implement/results/routed.v + +echo "Compiling Test Bench Files" +vcom -work work ../fifo_short_2clk_pkg.vhd +vcom -work work ../fifo_short_2clk_rng.vhd +vcom -work work ../fifo_short_2clk_dgen.vhd +vcom -work work ../fifo_short_2clk_dverif.vhd +vcom -work work ../fifo_short_2clk_pctrl.vhd +vcom -work work ../fifo_short_2clk_synth.vhd +vcom -work work ../fifo_short_2clk_tb.vhd + +vsim -t ps -voptargs="+acc" +transport_int_delays -L simprims_ver glbl -sdfmax /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst=../../implement/results/routed.sdf work.fifo_short_2clk_tb + +add log -r /* +do wave_mti.do +#Ignore integer warnings at time 0 +set StdArithNoWarnings 1 +run 0 +set StdArithNoWarnings 0 + +run -all diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_mti.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_mti.sh new file mode 100755 index 000000000..edb1b0dd9 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_mti.sh @@ -0,0 +1,49 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- + +vsim -c -do simulate_mti.do diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_ncsim.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_ncsim.sh new file mode 100755 index 000000000..e9dc952cf --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_ncsim.sh @@ -0,0 +1,73 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- +mkdir work +echo "Compiling Core Verilog UNISIM/Behavioral model" +ncvlog -work work ../../implement/results/routed.v + +echo "Compiling Test Bench Files" +ncvhdl -v93 -work work ../fifo_short_2clk_pkg.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_rng.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_dgen.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_dverif.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_pctrl.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_synth.vhd +ncvhdl -v93 -work work ../fifo_short_2clk_tb.vhd + +echo "Compiling SDF file" +ncsdfc ../../implement/results/routed.sdf -output ./routed.sdf.X + +echo "Generating SDF command file" +echo 'COMPILED_SDF_FILE = "routed.sdf.X",' > sdf.cmd +echo 'SCOPE = :fifo_short_2clk_synth_inst:fifo_short_2clk_inst,' >> sdf.cmd +echo 'MTM_CONTROL = "MAXIMUM";' >> sdf.cmd + +echo "Elaborating Design" +ncelab -access +rwc glbl -sdf_cmd_file sdf.cmd work.fifo_short_2clk_tb + +echo "Simulating Design" +ncsim -gui -input @"simvision -input wave_ncsim.sv" work.fifo_short_2clk_tb diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_vcs.sh b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_vcs.sh new file mode 100755 index 000000000..bbd548a74 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/simulate_vcs.sh @@ -0,0 +1,67 @@ +#!/bin/sh +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +#-------------------------------------------------------------------------------- +rm -rf simv* csrc DVEfiles AN.DB + +echo "Compiling Core Verilog UNISIM/Behavioral model" +vlogan +v2k ../../implement/results/routed.v + +echo "Compiling Test Bench Files" +vhdlan ../fifo_short_2clk_pkg.vhd +vhdlan ../fifo_short_2clk_rng.vhd +vhdlan ../fifo_short_2clk_dgen.vhd +vhdlan ../fifo_short_2clk_dverif.vhd +vhdlan ../fifo_short_2clk_pctrl.vhd +vhdlan ../fifo_short_2clk_synth.vhd +vhdlan ../fifo_short_2clk_tb.vhd + +echo "Elaborating Design" +vcs -time_res 1ps +neg_tchk -sdf max:/fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst:../../implement/results/routed.sdf +vcs+lic+wait -debug fifo_short_2clk_tb glbl + +echo "Simulating Design" +./simv -ucli -i ucli_commands.key +dve -session vcs_session.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/ucli_commands.key b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/ucli_commands.key new file mode 100755 index 000000000..f90cccb67 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/ucli_commands.key @@ -0,0 +1,4 @@ +dump -file fifo_short_2clk.vpd -type VPD +dump -add fifo_short_2clk_tb +run +quit diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/vcs_session.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/vcs_session.tcl new file mode 100755 index 000000000..e27baa9d8 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/vcs_session.tcl @@ -0,0 +1,76 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: vcs_session.tcl +# +# Description: +# This is the VCS wave form file. +# +#-------------------------------------------------------------------------------- +if { ![gui_is_db_opened -db {fifo_short_2clk.vpd}] } { + gui_open_db -design V1 -file fifo_short_2clk.vpd -nosource +} +gui_set_precision 1ps +gui_set_time_units 1ps + +gui_open_window Wave +gui_sg_create fifo_short_2clk_Group +gui_list_add_group -id Wave.1 {fifo_short_2clk_Group} + +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RST +gui_sg_addsignal -group fifo_short_2clk_Group WRITE -divider +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_CLK +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_EN +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/FULL +gui_sg_addsignal -group fifo_short_2clk_Group READ -divider +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_CLK +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_EN +gui_sg_addsignal -group fifo_short_2clk_Group /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/EMPTY +gui_zoom -window Wave.1 -full diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/wave_isim.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/wave_isim.tcl new file mode 100755 index 000000000..156aad172 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/wave_isim.tcl @@ -0,0 +1,68 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: wave_isim.tcl +# +# Description: +# This is the ISIM wave form file. +# +#-------------------------------------------------------------------------------- +wcfg new +isim set radix hex +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RST +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_CLK +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_EN +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/FULL +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_CLK +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_EN +wave add /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/EMPTY +run all +quit + diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/wave_mti.do b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/wave_mti.do new file mode 100755 index 000000000..eafc64cf2 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/wave_mti.do @@ -0,0 +1,88 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +-- +-- This file contains confidential and proprietary information +-- of Xilinx, Inc. and is protected under U.S. and +-- international copyright and other intellectual property +-- laws. +-- +-- DISCLAIMER +-- This disclaimer is not a license and does not grant any +-- rights to the materials distributed herewith. Except as +-- otherwise provided in a valid license issued to you by +-- Xilinx, and to the maximum extent permitted by applicable +-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +-- (2) Xilinx shall not be liable (whether in contract or tort, +-- including negligence, or under any other theory of +-- liability) for any loss or damage of any kind or nature +-- related to, arising under or in connection with these +-- materials, including for any direct, or any indirect, +-- special, incidental, or consequential loss or damage +-- (including loss of data, profits, goodwill, or any type of +-- loss or damage suffered as a result of any action brought +-- by a third party) even if such damage or loss was +-- reasonably foreseeable or Xilinx had been advised of the +-- possibility of the same. +-- +-- CRITICAL APPLICATIONS +-- Xilinx products are not designed or intended to be fail- +-- safe, or for use in any application requiring fail-safe +-- performance, such as life-support or safety devices or +-- systems, Class III medical devices, nuclear facilities, +-- applications related to the deployment of airbags, or any +-- other applications that could lead to death, personal +-- injury, or severe property or environmental damage +-- (individually and collectively, "Critical +-- Applications"). Customer assumes the sole risk and +-- liability of any use of Xilinx products in Critical +-- Applications, subject only to applicable laws and +-- regulations governing limitations on product liability. +-- +-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +-- PART OF THIS FILE AT ALL TIMES. +# Filename: wave_mti.do +# +# Description: +# This is the modelsim wave form file. +# +#-------------------------------------------------------------------------------- + +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RST +add wave -noupdate -divider WRITE +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_CLK +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_EN +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/FULL +add wave -noupdate -radix hexadecimal /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/DIN +add wave -noupdate -divider READ +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_CLK +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_EN +add wave -noupdate /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/EMPTY +add wave -noupdate -radix hexadecimal /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/DOUT + +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {2164886 ps} 0} +configure wave -namecolwidth 197 +configure wave -valuecolwidth 106 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ps +update +WaveRestoreZoom {0 ps} {9464063 ps} diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/wave_ncsim.sv b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/wave_ncsim.sv new file mode 100755 index 000000000..655d5c65a --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk/simulation/timing/wave_ncsim.sv @@ -0,0 +1,70 @@ +#-------------------------------------------------------------------------------- +#-- +#-- FIFO Generator Core Demo Testbench +#-- +#-------------------------------------------------------------------------------- +# (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# Filename: wave_ncsim.sv +# +# Description: +# This is the IUS wave form file. +# +#-------------------------------------------------------------------------------- + +window new WaveWindow -name "Waves for FIFO Generator Example Design" +waveform using "Waves for FIFO Generator Example Design" + +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RST +waveform add -label WRITE +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_CLK +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/WR_EN +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/FULL +waveform add -label READ +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_CLK +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/RD_EN +waveform add -signals /fifo_short_2clk_tb/fifo_short_2clk_synth_inst/fifo_short_2clk_inst/EMPTY +console submit -using simulator -wait no "run" diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk_flist.txt b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk_flist.txt new file mode 100644 index 000000000..4ab119a52 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk_flist.txt @@ -0,0 +1,57 @@ +# Output products list for <fifo_short_2clk> +_xmsgs/pn_parser.xmsgs +fifo_short_2clk/doc/fifo_generator_v9_3_readme.txt +fifo_short_2clk/doc/fifo_generator_v9_3_vinfo.html +fifo_short_2clk/doc/pg057-fifo-generator.pdf +fifo_short_2clk/example_design/fifo_short_2clk_exdes.ucf +fifo_short_2clk/example_design/fifo_short_2clk_exdes.vhd +fifo_short_2clk/fifo_generator_v9_3_readme.txt +fifo_short_2clk/implement/implement.bat +fifo_short_2clk/implement/implement.sh +fifo_short_2clk/implement/implement_synplify.bat +fifo_short_2clk/implement/implement_synplify.sh +fifo_short_2clk/implement/planAhead_ise.bat +fifo_short_2clk/implement/planAhead_ise.sh +fifo_short_2clk/implement/planAhead_ise.tcl +fifo_short_2clk/implement/xst.prj +fifo_short_2clk/implement/xst.scr +fifo_short_2clk/simulation/fifo_short_2clk_dgen.vhd +fifo_short_2clk/simulation/fifo_short_2clk_dverif.vhd +fifo_short_2clk/simulation/fifo_short_2clk_pctrl.vhd +fifo_short_2clk/simulation/fifo_short_2clk_pkg.vhd +fifo_short_2clk/simulation/fifo_short_2clk_rng.vhd +fifo_short_2clk/simulation/fifo_short_2clk_synth.vhd +fifo_short_2clk/simulation/fifo_short_2clk_tb.vhd +fifo_short_2clk/simulation/functional/simulate_isim.bat +fifo_short_2clk/simulation/functional/simulate_isim.sh +fifo_short_2clk/simulation/functional/simulate_mti.bat +fifo_short_2clk/simulation/functional/simulate_mti.do +fifo_short_2clk/simulation/functional/simulate_mti.sh +fifo_short_2clk/simulation/functional/simulate_ncsim.sh +fifo_short_2clk/simulation/functional/simulate_vcs.sh +fifo_short_2clk/simulation/functional/ucli_commands.key +fifo_short_2clk/simulation/functional/vcs_session.tcl +fifo_short_2clk/simulation/functional/wave_isim.tcl +fifo_short_2clk/simulation/functional/wave_mti.do +fifo_short_2clk/simulation/functional/wave_ncsim.sv +fifo_short_2clk/simulation/timing/simulate_isim.bat +fifo_short_2clk/simulation/timing/simulate_isim.sh +fifo_short_2clk/simulation/timing/simulate_mti.bat +fifo_short_2clk/simulation/timing/simulate_mti.do +fifo_short_2clk/simulation/timing/simulate_mti.sh +fifo_short_2clk/simulation/timing/simulate_ncsim.sh +fifo_short_2clk/simulation/timing/simulate_vcs.sh +fifo_short_2clk/simulation/timing/ucli_commands.key +fifo_short_2clk/simulation/timing/vcs_session.tcl +fifo_short_2clk/simulation/timing/wave_isim.tcl +fifo_short_2clk/simulation/timing/wave_mti.do +fifo_short_2clk/simulation/timing/wave_ncsim.sv +fifo_short_2clk.asy +fifo_short_2clk.gise +fifo_short_2clk.ngc +fifo_short_2clk.v +fifo_short_2clk.veo +fifo_short_2clk.xco +fifo_short_2clk.xise +fifo_short_2clk_flist.txt +fifo_short_2clk_xmdf.tcl diff --git a/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk_xmdf.tcl b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk_xmdf.tcl new file mode 100644 index 000000000..0abe2bb7c --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen/fifo_short_2clk_xmdf.tcl @@ -0,0 +1,251 @@ +# The package naming convention is <core_name>_xmdf +package provide fifo_short_2clk_xmdf 1.0 + +# This includes some utilities that support common XMDF operations +package require utilities_xmdf + +# Define a namespace for this package. The name of the name space +# is <core_name>_xmdf +namespace eval ::fifo_short_2clk_xmdf { +# Use this to define any statics +} + +# Function called by client to rebuild the params and port arrays +# Optional when the use context does not require the param or ports +# arrays to be available. +proc ::fifo_short_2clk_xmdf::xmdfInit { instance } { +# Variable containing name of library into which module is compiled +# Recommendation: <module_name> +# Required +utilities_xmdf::xmdfSetData $instance Module Attributes Name fifo_short_2clk +} +# ::fifo_short_2clk_xmdf::xmdfInit + +# Function called by client to fill in all the xmdf* data variables +# based on the current settings of the parameters +proc ::fifo_short_2clk_xmdf::xmdfApplyParams { instance } { + +set fcount 0 +# Array containing libraries that are assumed to exist +# Examples include unisim and xilinxcorelib +# Optional +# In this example, we assume that the unisim library will +# be available to the simulation and synthesis tool +utilities_xmdf::xmdfSetData $instance FileSet $fcount type logical_library +utilities_xmdf::xmdfSetData $instance FileSet $fcount logical_library unisim +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/doc/fifo_generator_v9_3_readme.txt +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/doc/fifo_generator_v9_3_vinfo.html +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/doc/pg057-fifo-generator.pdf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/example_design/fifo_short_2clk_exdes.ucf +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/example_design/fifo_short_2clk_exdes.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/fifo_generator_v9_3_readme.txt +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/implement/implement.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/implement/implement.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/implement/implement_synplify.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/implement/implement_synplify.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/implement/planAhead_ise.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/implement/planAhead_ise.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/implement/planAhead_ise.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/implement/xst.prj +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/implement/xst.scr +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/fifo_short_2clk_dgen.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/fifo_short_2clk_dverif.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/fifo_short_2clk_pctrl.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/fifo_short_2clk_pkg.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/fifo_short_2clk_rng.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/fifo_short_2clk_synth.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/fifo_short_2clk_tb.vhd +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/simulate_isim.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/simulate_isim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/simulate_mti.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/simulate_mti.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/simulate_mti.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/simulate_ncsim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/simulate_vcs.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/ucli_commands.key +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/vcs_session.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/wave_isim.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/wave_mti.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/functional/wave_ncsim.sv +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/simulate_isim.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/simulate_isim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/simulate_mti.bat +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/simulate_mti.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/simulate_mti.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/simulate_ncsim.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/simulate_vcs.sh +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/ucli_commands.key +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/vcs_session.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/wave_isim.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/wave_mti.do +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk/simulation/timing/wave_ncsim.sv +utilities_xmdf::xmdfSetData $instance FileSet $fcount type Ignore +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk.asy +utilities_xmdf::xmdfSetData $instance FileSet $fcount type asy +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk.ngc +utilities_xmdf::xmdfSetData $instance FileSet $fcount type ngc +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk.v +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk.veo +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog_template +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk.xco +utilities_xmdf::xmdfSetData $instance FileSet $fcount type coregen_ip +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_short_2clk_xmdf.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount associated_module fifo_short_2clk +incr fcount + +} + +# ::gen_comp_name_xmdf::xmdfApplyParams diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/.gitignore b/fpga/usrp3/top/b2xxmini/coregen_dsp/.gitignore new file mode 100644 index 000000000..f9823bca9 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/.gitignore @@ -0,0 +1,6 @@ +_xmsgs +*.log +*.ncf +*.xise +*.gise + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/Makefile.srcs b/fpga/usrp3/top/b2xxmini/coregen_dsp/Makefile.srcs new file mode 100644 index 000000000..9d679ab2d --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/Makefile.srcs @@ -0,0 +1,15 @@ +# +# Copyright 2012, 2015 Ettus Research LLC +# + +################################################## +# Coregen Sources +################################################## + +COREGEN_DSP_SRCS = $(abspath $(addprefix $(BASE_DIR)/../top/b2xxmini/coregen_dsp/, \ +hbdec1.v \ +hbdec1.xco \ +hbdec2.v \ +hbdec2.xco \ +)) + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/coregen.cgp b/fpga/usrp3/top/b2xxmini/coregen_dsp/coregen.cgp new file mode 100644 index 000000000..e849e744f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/coregen.cgp @@ -0,0 +1,9 @@ +SET busformat = BusFormatAngleBracketNotRipped +SET designentry = Verilog +SET device = xc6slx150 +SET devicefamily = spartan6 +SET flowvendor = Other +SET package = csg484 +SET speedgrade = -3 +SET verilogsim = true +SET vhdlsim = false diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/filt2.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/filt2.coe new file mode 100644 index 000000000..e18b5daa7 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/filt2.coe @@ -0,0 +1,36 @@ + Radix=10; +CoefData = 282, + -0, + -581, + 0, + 1053, + -0, + -1759, + 0, + 2814, + -0, + -4434, + 0, + 7193, + -0, + -13190, + 0, + 41478, + 65536, + 41478, + 0, + -13190, + -0, + 7193, + 0, + -4434, + -0, + 2814, + 0, + -1759, + -0, + 1053, + 0, + -581, + -0, + 282; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hb31.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb31.coe new file mode 100644 index 000000000..37f5a180e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb31.coe @@ -0,0 +1,32 @@ +Radix=10; +CoefData = -581, + 0, + 1053, + -0, + -1759, + 0, + 2814, + -0, + -4434, + 0, + 7193, + -0, + -13190, + 0, + 41478, + 65536, + 41478, + 0, + -13190, + -0, + 7193, + 0, + -4434, + -0, + 2814, + 0, + -1759, + -0, + 1053, + 0, + -581; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hb35.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb35.coe new file mode 100644 index 000000000..18078085d --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb35.coe @@ -0,0 +1,36 @@ +Radix=10; +CoefData = 282, + -0, + -581, + 0, + 1053, + -0, + -1759, + 0, + 2814, + -0, + -4434, + 0, + 7193, + -0, + -13190, + 0, + 41478, + 65536, + 41478, + 0, + -13190, + -0, + 7193, + 0, + -4434, + -0, + 2814, + 0, + -1759, + -0, + 1053, + 0, + -581, + -0, + 282; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hb39.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb39.coe new file mode 100644 index 000000000..1d99fa946 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb39.coe @@ -0,0 +1,40 @@ +Radix=10; +CoefData = -102, + 0, + 282, + -0, + -581, + 0, + 1053, + -0, + -1759, + 0, + 2814, + -0, + -4434, + 0, + 7193, + -0, + -13190, + 0, + 41478, + 65536, + 41478, + 0, + -13190, + -0, + 7193, + 0, + -4434, + -0, + 2814, + 0, + -1759, + -0, + 1053, + 0, + -581, + -0, + 282, + 0, + -102; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hb43.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb43.coe new file mode 100644 index 000000000..c56c4c928 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb43.coe @@ -0,0 +1,44 @@ +Radix=10; +CoefData = 100, +0, +-102, + 0, + 282, + -0, + -581, + 0, + 1053, + -0, + -1759, + 0, + 2814, + -0, + -4434, + 0, + 7193, + -0, + -13190, + 0, + 41478, + 65536, + 41478, + 0, + -13190, + -0, + 7193, + 0, + -4434, + -0, + 2814, + 0, + -1759, + -0, + 1053, + 0, + -581, + -0, + 282, + 0, + -102, +0, +100; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hb47.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb47.coe new file mode 100644 index 000000000..4c9a6c406 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb47.coe @@ -0,0 +1,51 @@ +; Generated with round((2^18-2)*halfgen_test(.21,12,1)) +; 83% effective BW, 64dB to 85dB rolloff +Radix=10; +CoefData = +-62, + 0, + 194, + 0, +-440, + 0, + 855, + 0, +-1505, + 0, + 2478, + 0, +-3900, + 0, + 5990, + 0, +-9187, + 0, + 14632, + 0, +-26536, + 0, + 83009, + 131071, + 83009, + 0, +-26536, + 0, + 14632, + 0, +-9187, + 0, + 5990, + 0, +-3900, + 0, + 2478, + 0, +-1505, + 0, + 855, + 0, +-440, + 0 + 194, + 0, +-62; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hb51.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb51.coe new file mode 100644 index 000000000..ebfddb7fb --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb51.coe @@ -0,0 +1,52 @@ +Radix=10; +CoefData = 300, +0, +-200, +0, +100, +0, +-102, + 0, + 282, + -0, + -581, + 0, + 1053, + -0, + -1759, + 0, + 2814, + -0, + -4434, + 0, + 7193, + -0, + -13190, + 0, + 41478, + 65536, + 41478, + 0, + -13190, + -0, + 7193, + 0, + -4434, + -0, + 2814, + 0, + -1759, + -0, + 1053, + 0, + -581, + -0, + 282, + 0, + -102, +0, +100, +0, +-200, +0, +300; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hb55.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb55.coe new file mode 100644 index 000000000..07f861818 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb55.coe @@ -0,0 +1,56 @@ +Radix=10; +CoefData = -400, +0, +300, +0, +-200, +0, +100, +0, +-102, + 0, + 282, + -0, + -581, + 0, + 1053, + -0, + -1759, + 0, + 2814, + -0, + -4434, + 0, + 7193, + -0, + -13190, + 0, + 41478, + 65536, + 41478, + 0, + -13190, + -0, + 7193, + 0, + -4434, + -0, + 2814, + 0, + -1759, + -0, + 1053, + 0, + -581, + -0, + 282, + 0, + -102, +0, +100, +0, +-200, +0, +300, +0, +-400; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hb59.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb59.coe new file mode 100644 index 000000000..79f1e362b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb59.coe @@ -0,0 +1,60 @@ +Radix=10; +CoefData = 500, +0, +-400, +0, +300, +0, +-200, +0, +100, +0, +-102, + 0, + 282, + -0, + -581, + 0, + 1053, + -0, + -1759, + 0, + 2814, + -0, + -4434, + 0, + 7193, + -0, + -13190, + 0, + 41478, + 65536, + 41478, + 0, + -13190, + -0, + 7193, + 0, + -4434, + -0, + 2814, + 0, + -1759, + -0, + 1053, + 0, + -581, + -0, + 282, + 0, + -102, +0, +100, +0, +-200, +0, +300, +0, +-400, +0 +500; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hb63.coe b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb63.coe new file mode 100644 index 000000000..3b312036d --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hb63.coe @@ -0,0 +1,67 @@ +; Generated with round((2^18-2)*halfgen_test(.22,16,1)) +; 88% effective BW, 64dB to 87dB rolloff +Radix=10; +CoefData = +-35, + 0, + 95, + 0, +-195, + 0, + 352, + 0, +-582, + 0, + 907, + 0, +-1354, + 0, + 1953, + 0, +-2751, + 0, + 3813, + 0, +-5249, + 0, + 7264, + 0, +-10296, + 0, + 15494, + 0, +-27083, + 0, + 83196, + 131071, + 83196, + 0, +-27083, + 0, + 15494, + 0, +-10296, + 0, + 7264, + 0, +-5249, + 0, + 3813, + 0, +-2751, + 0, + 1953, + 0, +-1354, + 0, + 907, + 0, +-582, + 0, + 352, + 0, + -195, + 0 + 95, + 0 +-35; diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.asy b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.asy new file mode 100644 index 000000000..7644e7bbe --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.asy @@ -0,0 +1,61 @@ +Version 4 +SymbolType BLOCK +TEXT 32 32 LEFT 4 hbdec1 +RECTANGLE Normal 32 32 544 2048 +LINE Normal 0 144 32 144 +PIN 0 144 LEFT 36 +PINATTR PinName nd +PINATTR Polarity IN +LINE Wide 0 240 32 240 +PIN 0 240 LEFT 36 +PINATTR PinName din_1[23:0] +PINATTR Polarity IN +LINE Wide 0 272 32 272 +PIN 0 272 LEFT 36 +PINATTR PinName din_2[23:0] +PINATTR Polarity IN +LINE Normal 0 848 32 848 +PIN 0 848 LEFT 36 +PINATTR PinName coef_ld +PINATTR Polarity IN +LINE Normal 0 880 32 880 +PIN 0 880 LEFT 36 +PINATTR PinName coef_we +PINATTR Polarity IN +LINE Wide 0 912 32 912 +PIN 0 912 LEFT 36 +PINATTR PinName coef_din[17:0] +PINATTR Polarity IN +LINE Normal 0 1008 32 1008 +PIN 0 1008 LEFT 36 +PINATTR PinName clk +PINATTR Polarity IN +LINE Normal 0 1040 32 1040 +PIN 0 1040 LEFT 36 +PINATTR PinName ce +PINATTR Polarity IN +LINE Normal 0 1072 32 1072 +PIN 0 1072 LEFT 36 +PINATTR PinName sclr +PINATTR Polarity IN +LINE Wide 576 240 544 240 +PIN 576 240 RIGHT 36 +PINATTR PinName dout_1[46:0] +PINATTR Polarity OUT +LINE Wide 576 272 544 272 +PIN 576 272 RIGHT 36 +PINATTR PinName dout_2[46:0] +PINATTR Polarity OUT +LINE Normal 576 1840 544 1840 +PIN 576 1840 RIGHT 36 +PINATTR PinName rfd +PINATTR Polarity OUT +LINE Normal 576 1872 544 1872 +PIN 576 1872 RIGHT 36 +PINATTR PinName rdy +PINATTR Polarity OUT +LINE Normal 576 1904 544 1904 +PIN 576 1904 RIGHT 36 +PINATTR PinName data_valid +PINATTR Polarity OUT + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.mif new file mode 100644 index 000000000..78d2dd901 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.mif @@ -0,0 +1,47 @@ +111111111111000010 +000000000000000000 +000000000011000010 +000000000000000000 +111111111001001000 +000000000000000000 +000000001101010111 +000000000000000000 +111111101000011111 +000000000000000000 +000000100110101110 +000000000000000000 +111111000011000100 +000000000000000000 +000001011101100110 +000000000000000000 +111101110000011101 +000000000000000000 +000011100100101000 +000000000000000000 +111001100001011000 +000000000000000000 +010100010001000001 +011111111111111111 +010100010001000001 +000000000000000000 +111001100001011000 +000000000000000000 +000011100100101000 +000000000000000000 +111101110000011101 +000000000000000000 +000001011101100110 +000000000000000000 +111111000011000100 +000000000000000000 +000000100110101110 +000000000000000000 +111111101000011111 +000000000000000000 +000000001101010111 +000000000000000000 +111111111001001000 +000000000000000000 +000000000011000010 +000000000000000000 +111111111111000010 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.ngc b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.ngc new file mode 100644 index 000000000..0830a9f34 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.ngc @@ -0,0 +1,3 @@ +XILINX-XDB 0.1 STUB 0.1 ASCII +XILINX-XDM V1.6e +$26b<~753-Xnzd}foo8#5+421).97 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\ No newline at end of file diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.v b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.v new file mode 100644 index 000000000..67742af64 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.v @@ -0,0 +1,45924 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. +//////////////////////////////////////////////////////////////////////////////// +// ____ ____ +// / /\/ / +// /___/ \ / Vendor: Xilinx +// \ \ \/ Version: P.20131013 +// \ \ Application: netgen +// / / Filename: hbdec1.v +// /___/ /\ Timestamp: Tue Jun 9 16:48:04 2015 +// \ \ / \ +// \___\/\___\ +// +// Command : -intstyle ise -w -sim -ofmt verilog ./tmp/_cg/hbdec1.ngc ./tmp/_cg/hbdec1.v +// Device : 6slx75fgg484-3 +// Input file : ./tmp/_cg/hbdec1.ngc +// Output file : ./tmp/_cg/hbdec1.v +// # of Modules : 1 +// Design Name : hbdec1 +// Xilinx : /opt/Xilinx/14.7/ISE_DS/ISE/ +// +// Purpose: +// This verilog netlist is a verification model and uses simulation +// primitives which may not represent the true implementation of the +// device, however the netlist is functionally correct and should not +// be modified. This file cannot be synthesized and should only be used +// with supported simulation tools. +// +// Reference: +// Command Line Tools User Guide, Chapter 23 and Synthesis and Simulation Design Guide, Chapter 6 +// +//////////////////////////////////////////////////////////////////////////////// + +`timescale 1 ns/1 ps + +module hbdec1 ( + sclr, ce, rfd, rdy, data_valid, coef_we, nd, clk, coef_ld, dout_1, dout_2, din_1, din_2, coef_din +)/* synthesis syn_black_box syn_noprune=1 */; + input sclr; + input ce; + output rfd; + output rdy; + output data_valid; + input coef_we; + input nd; + input clk; + input coef_ld; + output [46 : 0] dout_1; + output [46 : 0] dout_2; + input [23 : 0] din_1; + input [23 : 0] din_2; + input [17 : 0] coef_din; + + // synthesis translate_off + + wire NlwRenamedSig_OI_rfd; + wire \blk00000003/sig00000e8e ; + wire \blk00000003/sig00000e8d ; + wire \blk00000003/sig00000e8c ; + wire \blk00000003/sig00000e8b ; + wire \blk00000003/sig00000e8a ; + wire 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\blk00000003/blk00000745/sig000018dc ; + wire \blk00000003/blk00000745/sig000018db ; + wire \blk00000003/blk00000745/sig000018da ; + wire \blk00000003/blk00000745/sig000018d9 ; + wire \blk00000003/blk00000745/sig000018d8 ; + wire \blk00000003/blk00000745/sig000018d7 ; + wire \blk00000003/blk00000745/sig000018d6 ; + wire \blk00000003/blk00000745/sig000018d5 ; + wire \blk00000003/blk00000745/sig000018d4 ; + wire \blk00000003/blk00000758/sig000018fb ; + wire \blk00000003/blk00000758/sig000018fa ; + wire \blk00000003/blk00000758/sig000018f9 ; + wire \blk00000003/blk00000758/sig000018f8 ; + wire \blk00000003/blk00000758/sig000018f7 ; + wire \blk00000003/blk00000758/sig000018f6 ; + wire \blk00000003/blk00000758/sig000018f5 ; + wire \blk00000003/blk00000758/sig000018f4 ; + wire \blk00000003/blk00000758/sig000018f3 ; + wire \blk00000003/blk00000758/sig000018f2 ; + wire \blk00000003/blk0000076b/sig00001919 ; + wire \blk00000003/blk0000076b/sig00001918 ; + wire \blk00000003/blk0000076b/sig00001917 ; + wire \blk00000003/blk0000076b/sig00001916 ; + wire \blk00000003/blk0000076b/sig00001915 ; + wire \blk00000003/blk0000076b/sig00001914 ; + wire \blk00000003/blk0000076b/sig00001913 ; + wire \blk00000003/blk0000076b/sig00001912 ; + wire \blk00000003/blk0000076b/sig00001911 ; + wire \blk00000003/blk0000076b/sig00001910 ; + wire \blk00000003/blk0000077e/sig00001937 ; + wire \blk00000003/blk0000077e/sig00001936 ; + wire \blk00000003/blk0000077e/sig00001935 ; + wire \blk00000003/blk0000077e/sig00001934 ; + wire \blk00000003/blk0000077e/sig00001933 ; + wire \blk00000003/blk0000077e/sig00001932 ; + wire \blk00000003/blk0000077e/sig00001931 ; + wire \blk00000003/blk0000077e/sig00001930 ; + wire \blk00000003/blk0000077e/sig0000192f ; + wire \blk00000003/blk0000077e/sig0000192e ; + wire \blk00000003/blk000007c1/sig00001974 ; + wire \blk00000003/blk000007c1/sig00001973 ; + wire \blk00000003/blk000007c1/sig00001972 ; + wire \blk00000003/blk000007c1/sig00001971 ; + wire \blk00000003/blk000007c1/sig00001970 ; + wire \blk00000003/blk000007c1/sig0000196f ; + wire \blk00000003/blk000007c1/sig0000196e ; + wire \blk00000003/blk000007c1/sig0000196d ; + wire \blk00000003/blk000007c1/sig0000196c ; + wire \blk00000003/blk000007c1/sig0000196b ; + wire \blk00000003/blk000007c1/sig0000196a ; + wire \blk00000003/blk000007c1/sig00001969 ; + wire \blk00000003/blk000007c1/sig00001968 ; + wire \blk00000003/blk000007c1/sig00001967 ; + wire \blk00000003/blk000007c1/sig00001966 ; + wire \blk00000003/blk000007c1/sig00001965 ; + wire \blk00000003/blk000007c1/sig00001964 ; + wire \blk00000003/blk000007c1/sig00001963 ; + wire \blk00000003/blk000007c1/sig00001962 ; + wire \blk00000003/blk000007c1/sig00001961 ; + wire NLW_blk00000001_P_UNCONNECTED; + wire NLW_blk00000002_G_UNCONNECTED; + wire \NLW_blk00000003/blk00000cc3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cc1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cbf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cbd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cbb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cb9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cb7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cb5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cb3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cb1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000caf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000cab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ca9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ca7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ca5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ca3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ca1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c9f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c9d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c9b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c99_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c97_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c95_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c93_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c91_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c8f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c8d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c8b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c89_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c87_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c85_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c83_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c81_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c7f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c7d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c7b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c79_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c77_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c75_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c73_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c71_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c6f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c6d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c6b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c69_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c67_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c65_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c63_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c61_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c5f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c5d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c5b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c59_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c57_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c55_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c53_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c51_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c4f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c4d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c4b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c49_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c47_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c45_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c43_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c41_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c3f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c3d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c3b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c39_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c37_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c35_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c33_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c31_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c2f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c2d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c2b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c29_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c27_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c25_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c23_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c21_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c1f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c1d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c1b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c19_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c17_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c15_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c13_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c11_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c0f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c0d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c0b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c09_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c07_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c05_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c03_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000c01_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bfd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bfb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bf1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bef_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bed_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000beb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000be1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bdf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bdd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bdb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bd1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bcf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bcd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bcb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bc1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bbf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bbd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bbb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bb1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000baf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000bab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ba1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b9f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b9d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b9b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b99_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b97_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b95_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b93_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b91_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b8f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b8d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b8b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b89_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b87_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b85_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b83_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b81_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b7f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b7d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b7b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b79_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b77_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b75_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b73_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b71_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b6f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b6d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b6b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b69_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b67_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b65_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b63_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b61_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b5f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b5d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b5b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b59_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b57_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b55_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b53_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b51_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b4f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b4d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b4b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b49_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b47_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b45_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b43_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b41_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b3f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b3d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b3b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b39_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b37_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b35_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b33_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b31_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b2f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b2d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b2b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b29_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b27_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b25_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b23_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b21_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b1f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b1d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b1b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b19_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b17_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b15_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b13_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b11_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b0f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b0d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b0b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b09_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b07_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b05_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b03_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000b01_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000afd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000afb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000af1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aef_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aed_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aeb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ae1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000adf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000add_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000adb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ad1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000acf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000acd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000acb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ac1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000abf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000abd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000abb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000ab1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aaf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000aa1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a9f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a9d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a9b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a99_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a97_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a95_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a93_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a91_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a8f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a8d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a8b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a89_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a87_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a85_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a83_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a81_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a7f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a7d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a7b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a79_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a77_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a75_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a73_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a71_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a6f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a6d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a6b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a69_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a67_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a65_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a63_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a61_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a5f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a5d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a5b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a59_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a57_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a55_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a53_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a51_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a4f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a4d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a4b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a49_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a47_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a45_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a43_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a41_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a3f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a3d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a3b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a39_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a37_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a35_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a33_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a31_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a2f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a2d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a2b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a29_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a27_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a25_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a23_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a21_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a1f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a1d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a1b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a19_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a17_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a15_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a13_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a11_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a0f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a0d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a0b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a09_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a07_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a05_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a03_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000a01_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009fd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009fb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009f1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ef_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ed_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009eb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009cd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009cb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009c1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009bf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009bd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009bb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000009a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000099f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000099d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000099b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000999_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000997_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000995_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000993_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000991_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000098f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000098d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000098b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000989_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000987_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000985_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000983_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000981_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000097f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000097d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000097b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000979_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000977_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000975_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000973_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000971_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000096f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000096d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000096b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000969_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000967_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000965_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000963_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000961_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000095f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000095d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000095b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000959_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000957_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000955_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000953_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000951_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000094f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000094d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000858_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000858_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007ee_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000007ee_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000109_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000108_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000107_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000106_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000104_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000103_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000102_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000100_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ff_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fe_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fc_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fb_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fa_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f9_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f8_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f3_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f3_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f0_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000eb_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e1_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e0_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000df_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000de_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000dd_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000dc_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d8_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d6_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d5_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d4_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d3_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cc_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cc_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c9_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c9_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b5_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b3_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk000000aa_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a8_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a6_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a4_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a3_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a0_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009f_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009d_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009d_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009b_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009a_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000027_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000023_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000021_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000020_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001e_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001d_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001c_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001a_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000f_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000c_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000009_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000096_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000095_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000094_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000093_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000092_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000091_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000090_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000008f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000008e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000008d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000008c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000008b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000008a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000089_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000088_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000087_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000086_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000085_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000084_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000083_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000082_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000081_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000080_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000007f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000007e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000007d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000007c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000007b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000007a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000079_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000078_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000077_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000076_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000075_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000074_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000073_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000072_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000071_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000070_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000006f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000006e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000006d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000006c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000006b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk0000006a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000069_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000068_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000035/blk00000067_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk0000015e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk0000015d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk0000015c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk0000015b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk0000015a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000159_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000158_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000157_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000156_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000155_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000154_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000153_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000152_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000151_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk00000150_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000013d/blk0000014f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000181_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000180_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk0000017f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk0000017e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk0000017d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk0000017c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk0000017b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk0000017a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000179_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000178_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000177_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000176_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000175_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000174_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000173_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000160/blk00000172_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk000001a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk000001a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk000001a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk000001a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk000001a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk0000019f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk0000019e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk0000019d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk0000019c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk0000019b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk0000019a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk00000199_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk00000198_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk00000197_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk00000196_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000183/blk00000195_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001c7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001c6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001c5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001c4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001c3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001c2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001c1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001c0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001bf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001be_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001bd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001bc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001bb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001ba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001b9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001a6/blk000001b8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001ea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001c9/blk000001db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk0000020a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000209_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000208_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000207_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000206_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000205_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000204_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000203_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000202_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000201_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk00000200_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk000001ff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001ec/blk000001fe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000230_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk0000022f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk0000022e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk0000022d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk0000022c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk0000022b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk0000022a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000229_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000228_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000227_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000226_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000225_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000224_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000223_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000222_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000020f/blk00000221_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000253_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000252_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000251_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000250_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk0000024f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk0000024e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk0000024d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk0000024c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk0000024b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk0000024a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000249_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000248_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000247_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000246_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000245_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000232/blk00000244_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000276_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000275_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000274_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000273_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000272_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000271_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000270_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk0000026f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk0000026e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk0000026d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk0000026c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk0000026b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk0000026a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000269_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000268_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000255/blk00000267_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000299_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000298_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000297_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000296_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000295_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000294_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000293_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000292_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000291_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk00000290_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk0000028f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk0000028e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk0000028d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk0000028c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk0000028b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000278/blk0000028a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002bc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002bb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002ba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000029b/blk000002ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002be/blk000002d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk00000302_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk00000301_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk00000300_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002ff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002fe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002fd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002fc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002fb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002fa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002f9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002f8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002f7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002f6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002f5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002f4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002e1/blk000002f3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000325_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000324_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000323_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000322_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000321_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000320_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk0000031f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk0000031e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk0000031d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk0000031c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk0000031b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk0000031a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000319_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000318_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000317_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000304/blk00000316_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000348_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000347_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000346_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000345_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000344_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000343_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000342_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000341_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000340_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk0000033f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk0000033e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk0000033d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk0000033c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk0000033b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk0000033a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000327/blk00000339_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk0000036b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk0000036a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000369_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000368_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000367_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000366_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000365_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000364_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000363_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000362_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000361_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk00000360_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk0000035f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk0000035e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk0000035d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000034a/blk0000035c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk0000038e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk0000038d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk0000038c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk0000038b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk0000038a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000389_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000388_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000387_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000386_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000385_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000384_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000383_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000382_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000381_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk00000380_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000036d/blk0000037f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000390/blk000003a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003cd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003cb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003ca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003c9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003c8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003c7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003c6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003b3/blk000003c5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003f7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003f6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003f5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003f4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003f3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003f2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003f1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003f0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003ef_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003ee_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003ed_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003ec_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003eb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003ea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003e9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d6/blk000003e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk0000041a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000419_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000418_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000417_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000416_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000415_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000414_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000413_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000412_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000411_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000410_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk0000040f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk0000040e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk0000040d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk0000040c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk0000040b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk0000043d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk0000043c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk0000043b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk0000043a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000439_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000438_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000437_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000436_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000435_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000434_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000433_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000432_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000431_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk00000430_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk0000042f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041c/blk0000042e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000460_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk0000045f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk0000045e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk0000045d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk0000045c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk0000045b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk0000045a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000459_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000458_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000457_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000456_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000455_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000454_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000453_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000452_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000043f/blk00000451_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000483_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000482_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000481_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000480_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk0000047f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk0000047e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk0000047d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk0000047c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk0000047b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk0000047a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000479_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000478_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000477_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000476_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000475_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000462/blk00000474_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005c7_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005c6_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005c5_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005c4_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005c3_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005c2_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005c1_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005c0_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005bf_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005be_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005bd_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005bc_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005bb_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005ba_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005b9_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005b8_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005b7_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005a2/blk000005b6_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c9/blk000005da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c9/blk000005d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c9/blk000005d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c9/blk000005d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c9/blk000005d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c9/blk000005d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c9/blk000005d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005c9/blk000005d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005dc/blk000005ed_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005dc/blk000005ec_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005dc/blk000005eb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005dc/blk000005ea_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005dc/blk000005e9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005dc/blk000005e8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005dc/blk000005e7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005dc/blk000005e6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ef/blk00000600_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ef/blk000005ff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ef/blk000005fe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ef/blk000005fd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ef/blk000005fc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ef/blk000005fb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ef/blk000005fa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000005ef/blk000005f9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000602/blk00000613_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000602/blk00000612_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000602/blk00000611_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000602/blk00000610_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000602/blk0000060f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000602/blk0000060e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000602/blk0000060d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000602/blk0000060c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000615/blk00000626_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000615/blk00000625_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000615/blk00000624_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000615/blk00000623_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000615/blk00000622_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000615/blk00000621_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000615/blk00000620_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000615/blk0000061f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000628/blk00000639_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000628/blk00000638_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000628/blk00000637_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000628/blk00000636_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000628/blk00000635_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000628/blk00000634_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000628/blk00000633_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000628/blk00000632_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063b/blk0000064c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063b/blk0000064b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063b/blk0000064a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063b/blk00000649_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063b/blk00000648_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063b/blk00000647_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063b/blk00000646_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000063b/blk00000645_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064e/blk0000065f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064e/blk0000065e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064e/blk0000065d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064e/blk0000065c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064e/blk0000065b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064e/blk0000065a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064e/blk00000659_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000064e/blk00000658_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000661/blk00000672_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000661/blk00000671_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000661/blk00000670_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000661/blk0000066f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000661/blk0000066e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000661/blk0000066d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000661/blk0000066c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000661/blk0000066b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000674/blk00000685_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000674/blk00000684_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000674/blk00000683_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000674/blk00000682_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000674/blk00000681_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000674/blk00000680_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000674/blk0000067f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000674/blk0000067e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000687/blk00000698_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000687/blk00000697_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000687/blk00000696_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000687/blk00000695_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000687/blk00000694_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000687/blk00000693_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000687/blk00000692_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000687/blk00000691_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069a/blk000006ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069a/blk000006aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069a/blk000006a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069a/blk000006a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069a/blk000006a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069a/blk000006a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069a/blk000006a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069a/blk000006a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ad/blk000006be_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ad/blk000006bd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ad/blk000006bc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ad/blk000006bb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ad/blk000006ba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ad/blk000006b9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ad/blk000006b8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ad/blk000006b7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c0/blk000006d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c0/blk000006d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c0/blk000006cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c0/blk000006ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c0/blk000006cd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c0/blk000006cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c0/blk000006cb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c0/blk000006ca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d3/blk000006e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d3/blk000006e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d3/blk000006e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d3/blk000006e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d3/blk000006e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d3/blk000006df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d3/blk000006de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d3/blk000006dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e6/blk000006f7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e6/blk000006f6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e6/blk000006f5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e6/blk000006f4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e6/blk000006f3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e6/blk000006f2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e6/blk000006f1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e6/blk000006f0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f9/blk0000070a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f9/blk00000709_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f9/blk00000708_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f9/blk00000707_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f9/blk00000706_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f9/blk00000705_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f9/blk00000704_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f9/blk00000703_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070c/blk0000071d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070c/blk0000071c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070c/blk0000071b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070c/blk0000071a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070c/blk00000719_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070c/blk00000718_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070c/blk00000717_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070c/blk00000716_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071f/blk00000730_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071f/blk0000072f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071f/blk0000072e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071f/blk0000072d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071f/blk0000072c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071f/blk0000072b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071f/blk0000072a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071f/blk00000729_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000732/blk00000743_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000732/blk00000742_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000732/blk00000741_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000732/blk00000740_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000732/blk0000073f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000732/blk0000073e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000732/blk0000073d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000732/blk0000073c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000745/blk00000756_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000745/blk00000755_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000745/blk00000754_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000745/blk00000753_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000745/blk00000752_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000745/blk00000751_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000745/blk00000750_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000745/blk0000074f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000758/blk00000769_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000758/blk00000768_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000758/blk00000767_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000758/blk00000766_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000758/blk00000765_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000758/blk00000764_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000758/blk00000763_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000758/blk00000762_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076b/blk0000077c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076b/blk0000077b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076b/blk0000077a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076b/blk00000779_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076b/blk00000778_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076b/blk00000777_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076b/blk00000776_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076b/blk00000775_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077e/blk0000078f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077e/blk0000078e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077e/blk0000078d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077e/blk0000078c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077e/blk0000078b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077e/blk0000078a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077e/blk00000789_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077e/blk00000788_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007e6_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007e5_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007e4_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007e3_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007e2_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007e1_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007e0_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007df_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007de_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007dd_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007dc_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007db_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007da_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007d9_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007d8_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007d7_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007d6_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000007c1/blk000007d5_SPO_UNCONNECTED ; + wire [17 : 0] coef_din_0; + wire [23 : 0] din_1_1; + wire [23 : 0] din_2_2; + wire [46 : 0] NlwRenamedSig_OI_dout_1; + wire [46 : 0] NlwRenamedSig_OI_dout_2; + assign + rfd = NlwRenamedSig_OI_rfd, + dout_1[46] = NlwRenamedSig_OI_dout_1[46], + dout_1[45] = NlwRenamedSig_OI_dout_1[45], + dout_1[44] = NlwRenamedSig_OI_dout_1[44], + dout_1[43] = NlwRenamedSig_OI_dout_1[43], + dout_1[42] = NlwRenamedSig_OI_dout_1[42], + dout_1[41] = NlwRenamedSig_OI_dout_1[41], + dout_1[40] = NlwRenamedSig_OI_dout_1[40], + dout_1[39] = NlwRenamedSig_OI_dout_1[39], + dout_1[38] = NlwRenamedSig_OI_dout_1[38], + dout_1[37] = NlwRenamedSig_OI_dout_1[37], + dout_1[36] = NlwRenamedSig_OI_dout_1[36], + dout_1[35] = NlwRenamedSig_OI_dout_1[35], + dout_1[34] = NlwRenamedSig_OI_dout_1[34], + dout_1[33] = NlwRenamedSig_OI_dout_1[33], + dout_1[32] = NlwRenamedSig_OI_dout_1[32], + dout_1[31] = NlwRenamedSig_OI_dout_1[31], + dout_1[30] = NlwRenamedSig_OI_dout_1[30], + dout_1[29] = NlwRenamedSig_OI_dout_1[29], + dout_1[28] = NlwRenamedSig_OI_dout_1[28], + dout_1[27] = NlwRenamedSig_OI_dout_1[27], + dout_1[26] = NlwRenamedSig_OI_dout_1[26], + dout_1[25] = NlwRenamedSig_OI_dout_1[25], + dout_1[24] = NlwRenamedSig_OI_dout_1[24], + dout_1[23] = NlwRenamedSig_OI_dout_1[23], + dout_1[22] = NlwRenamedSig_OI_dout_1[22], + dout_1[21] = NlwRenamedSig_OI_dout_1[21], + dout_1[20] = NlwRenamedSig_OI_dout_1[20], + dout_1[19] = NlwRenamedSig_OI_dout_1[19], + dout_1[18] = NlwRenamedSig_OI_dout_1[18], + dout_1[17] = NlwRenamedSig_OI_dout_1[17], + dout_1[16] = NlwRenamedSig_OI_dout_1[16], + dout_1[15] = NlwRenamedSig_OI_dout_1[15], + dout_1[14] = NlwRenamedSig_OI_dout_1[14], + dout_1[13] = NlwRenamedSig_OI_dout_1[13], + dout_1[12] = NlwRenamedSig_OI_dout_1[12], + dout_1[11] = NlwRenamedSig_OI_dout_1[11], + dout_1[10] = NlwRenamedSig_OI_dout_1[10], + dout_1[9] = NlwRenamedSig_OI_dout_1[9], + dout_1[8] = NlwRenamedSig_OI_dout_1[8], + dout_1[7] = NlwRenamedSig_OI_dout_1[7], + dout_1[6] = NlwRenamedSig_OI_dout_1[6], + dout_1[5] = NlwRenamedSig_OI_dout_1[5], + dout_1[4] = NlwRenamedSig_OI_dout_1[4], + dout_1[3] = NlwRenamedSig_OI_dout_1[3], + dout_1[2] = NlwRenamedSig_OI_dout_1[2], + dout_1[1] = NlwRenamedSig_OI_dout_1[1], + dout_1[0] = NlwRenamedSig_OI_dout_1[0], + dout_2[46] = NlwRenamedSig_OI_dout_2[46], + dout_2[45] = NlwRenamedSig_OI_dout_2[45], + dout_2[44] = NlwRenamedSig_OI_dout_2[44], + dout_2[43] = NlwRenamedSig_OI_dout_2[43], + dout_2[42] = NlwRenamedSig_OI_dout_2[42], + dout_2[41] = NlwRenamedSig_OI_dout_2[41], + dout_2[40] = NlwRenamedSig_OI_dout_2[40], + dout_2[39] = NlwRenamedSig_OI_dout_2[39], + dout_2[38] = NlwRenamedSig_OI_dout_2[38], + dout_2[37] = NlwRenamedSig_OI_dout_2[37], + dout_2[36] = NlwRenamedSig_OI_dout_2[36], + dout_2[35] = NlwRenamedSig_OI_dout_2[35], + dout_2[34] = NlwRenamedSig_OI_dout_2[34], + dout_2[33] = NlwRenamedSig_OI_dout_2[33], + dout_2[32] = NlwRenamedSig_OI_dout_2[32], + dout_2[31] = NlwRenamedSig_OI_dout_2[31], + dout_2[30] = NlwRenamedSig_OI_dout_2[30], + dout_2[29] = NlwRenamedSig_OI_dout_2[29], + dout_2[28] = NlwRenamedSig_OI_dout_2[28], + dout_2[27] = NlwRenamedSig_OI_dout_2[27], + dout_2[26] = NlwRenamedSig_OI_dout_2[26], + dout_2[25] = NlwRenamedSig_OI_dout_2[25], + dout_2[24] = NlwRenamedSig_OI_dout_2[24], + dout_2[23] = NlwRenamedSig_OI_dout_2[23], + dout_2[22] = NlwRenamedSig_OI_dout_2[22], + dout_2[21] = NlwRenamedSig_OI_dout_2[21], + dout_2[20] = NlwRenamedSig_OI_dout_2[20], + dout_2[19] = NlwRenamedSig_OI_dout_2[19], + dout_2[18] = NlwRenamedSig_OI_dout_2[18], + dout_2[17] = NlwRenamedSig_OI_dout_2[17], + dout_2[16] = NlwRenamedSig_OI_dout_2[16], + dout_2[15] = NlwRenamedSig_OI_dout_2[15], + dout_2[14] = NlwRenamedSig_OI_dout_2[14], + dout_2[13] = NlwRenamedSig_OI_dout_2[13], + dout_2[12] = NlwRenamedSig_OI_dout_2[12], + dout_2[11] = NlwRenamedSig_OI_dout_2[11], + dout_2[10] = NlwRenamedSig_OI_dout_2[10], + dout_2[9] = NlwRenamedSig_OI_dout_2[9], + dout_2[8] = NlwRenamedSig_OI_dout_2[8], + dout_2[7] = NlwRenamedSig_OI_dout_2[7], + dout_2[6] = NlwRenamedSig_OI_dout_2[6], + dout_2[5] = NlwRenamedSig_OI_dout_2[5], + dout_2[4] = NlwRenamedSig_OI_dout_2[4], + dout_2[3] = NlwRenamedSig_OI_dout_2[3], + dout_2[2] = NlwRenamedSig_OI_dout_2[2], + dout_2[1] = NlwRenamedSig_OI_dout_2[1], + dout_2[0] = NlwRenamedSig_OI_dout_2[0], + din_1_1[23] = din_1[23], + din_1_1[22] = din_1[22], + din_1_1[21] = din_1[21], + din_1_1[20] = din_1[20], + din_1_1[19] = din_1[19], + din_1_1[18] = din_1[18], + din_1_1[17] = din_1[17], + din_1_1[16] = din_1[16], + din_1_1[15] = din_1[15], + din_1_1[14] = din_1[14], + din_1_1[13] = din_1[13], + din_1_1[12] = din_1[12], + din_1_1[11] = din_1[11], + din_1_1[10] = din_1[10], + din_1_1[9] = din_1[9], + din_1_1[8] = din_1[8], + din_1_1[7] = din_1[7], + din_1_1[6] = din_1[6], + din_1_1[5] = din_1[5], + din_1_1[4] = din_1[4], + din_1_1[3] = din_1[3], + din_1_1[2] = din_1[2], + din_1_1[1] = din_1[1], + din_1_1[0] = din_1[0], + din_2_2[23] = din_2[23], + din_2_2[22] = din_2[22], + din_2_2[21] = din_2[21], + din_2_2[20] = din_2[20], + din_2_2[19] = din_2[19], + din_2_2[18] = din_2[18], + din_2_2[17] = din_2[17], + din_2_2[16] = din_2[16], + din_2_2[15] = din_2[15], + din_2_2[14] = din_2[14], + din_2_2[13] = din_2[13], + din_2_2[12] = din_2[12], + din_2_2[11] = din_2[11], + din_2_2[10] = din_2[10], + din_2_2[9] = din_2[9], + din_2_2[8] = din_2[8], + din_2_2[7] = din_2[7], + din_2_2[6] = din_2[6], + din_2_2[5] = din_2[5], + din_2_2[4] = din_2[4], + din_2_2[3] = din_2[3], + din_2_2[2] = din_2[2], + din_2_2[1] = din_2[1], + din_2_2[0] = din_2[0], + coef_din_0[17] = coef_din[17], + coef_din_0[16] = coef_din[16], + coef_din_0[15] = coef_din[15], + coef_din_0[14] = coef_din[14], + coef_din_0[13] = coef_din[13], + coef_din_0[12] = coef_din[12], + coef_din_0[11] = coef_din[11], + coef_din_0[10] = coef_din[10], + coef_din_0[9] = coef_din[9], + coef_din_0[8] = coef_din[8], + coef_din_0[7] = coef_din[7], + coef_din_0[6] = coef_din[6], + coef_din_0[5] = coef_din[5], + coef_din_0[4] = coef_din[4], + coef_din_0[3] = coef_din[3], + coef_din_0[2] = coef_din[2], + coef_din_0[1] = coef_din[1], + coef_din_0[0] = coef_din[0]; + VCC blk00000001 ( + .P(NLW_blk00000001_P_UNCONNECTED) + ); + GND blk00000002 ( + .G(NLW_blk00000002_G_UNCONNECTED) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cc4 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e8e ), + .Q(\blk00000003/sig00000bc2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cc3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000baa ), + .Q(\blk00000003/sig00000e8e ), + .Q15(\NLW_blk00000003/blk00000cc3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cc2 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e8d ), + .Q(\blk00000003/sig00000bc1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cc1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000ba9 ), + .Q(\blk00000003/sig00000e8d ), + .Q15(\NLW_blk00000003/blk00000cc1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cc0 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e8c ), + .Q(\blk00000003/sig00000bc0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cbf ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000ba8 ), + .Q(\blk00000003/sig00000e8c ), + .Q15(\NLW_blk00000003/blk00000cbf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cbe ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e8b ), + .Q(\blk00000003/sig00000bbf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cbd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000ba7 ), + .Q(\blk00000003/sig00000e8b ), + .Q15(\NLW_blk00000003/blk00000cbd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cbc ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e8a ), + .Q(\blk00000003/sig00000bbe ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cbb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000ba6 ), + .Q(\blk00000003/sig00000e8a ), + .Q15(\NLW_blk00000003/blk00000cbb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cba ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e89 ), + .Q(\blk00000003/sig00000bbc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cb9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000ba4 ), + .Q(\blk00000003/sig00000e89 ), + .Q15(\NLW_blk00000003/blk00000cb9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cb8 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e88 ), + .Q(\blk00000003/sig00000bbb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cb7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000ba3 ), + .Q(\blk00000003/sig00000e88 ), + .Q15(\NLW_blk00000003/blk00000cb7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cb6 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e87 ), + .Q(\blk00000003/sig00000bbd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cb5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000ba5 ), + .Q(\blk00000003/sig00000e87 ), + .Q15(\NLW_blk00000003/blk00000cb5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cb4 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e86 ), + .Q(\blk00000003/sig00000bd2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cb3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000bb2 ), + .Q(\blk00000003/sig00000e86 ), + .Q15(\NLW_blk00000003/blk00000cb3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cb2 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e85 ), + .Q(\blk00000003/sig00000bd1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cb1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000bb1 ), + .Q(\blk00000003/sig00000e85 ), + .Q15(\NLW_blk00000003/blk00000cb1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cb0 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e84 ), + .Q(\blk00000003/sig00000bd0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000caf ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000bb0 ), + .Q(\blk00000003/sig00000e84 ), + .Q15(\NLW_blk00000003/blk00000caf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cae ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e83 ), + .Q(\blk00000003/sig00000bcf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cad ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000baf ), + .Q(\blk00000003/sig00000e83 ), + .Q15(\NLW_blk00000003/blk00000cad_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000cac ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e82 ), + .Q(\blk00000003/sig00000bce ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000cab ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000bae ), + .Q(\blk00000003/sig00000e82 ), + .Q15(\NLW_blk00000003/blk00000cab_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000caa ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e81 ), + .Q(\blk00000003/sig00000bcd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ca9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000bad ), + .Q(\blk00000003/sig00000e81 ), + .Q15(\NLW_blk00000003/blk00000ca9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ca8 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e80 ), + .Q(\blk00000003/sig00000bcb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ca7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000bab ), + .Q(\blk00000003/sig00000e80 ), + .Q15(\NLW_blk00000003/blk00000ca7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ca6 ( + .C(clk), + .CE(\blk00000003/sig00000ca0 ), + .D(\blk00000003/sig00000e7f ), + .Q(\blk00000003/sig00000bcc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ca5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca0 ), + .CLK(clk), + .D(\blk00000003/sig00000bac ), + .Q(\blk00000003/sig00000e7f ), + .Q15(\NLW_blk00000003/blk00000ca5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ca4 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e7e ), + .Q(\blk00000003/sig00000ad6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ca3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000aa6 ), + .Q(\blk00000003/sig00000e7e ), + .Q15(\NLW_blk00000003/blk00000ca3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ca2 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e7d ), + .Q(\blk00000003/sig00000ad5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ca1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000aa5 ), + .Q(\blk00000003/sig00000e7d ), + .Q15(\NLW_blk00000003/blk00000ca1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ca0 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e7c ), + .Q(\blk00000003/sig00000ad4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c9f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000aa4 ), + .Q(\blk00000003/sig00000e7c ), + .Q15(\NLW_blk00000003/blk00000c9f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c9e ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e7b ), + .Q(\blk00000003/sig00000ad3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c9d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000aa3 ), + .Q(\blk00000003/sig00000e7b ), + .Q15(\NLW_blk00000003/blk00000c9d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c9c ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e7a ), + .Q(\blk00000003/sig00000ad1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c9b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000aa1 ), + .Q(\blk00000003/sig00000e7a ), + .Q15(\NLW_blk00000003/blk00000c9b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c9a ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e79 ), + .Q(\blk00000003/sig00000ad0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c99 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000aa0 ), + .Q(\blk00000003/sig00000e79 ), + .Q15(\NLW_blk00000003/blk00000c99_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c98 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e78 ), + .Q(\blk00000003/sig00000ad2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c97 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000aa2 ), + .Q(\blk00000003/sig00000e78 ), + .Q15(\NLW_blk00000003/blk00000c97_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c96 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e77 ), + .Q(\blk00000003/sig00000acf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c95 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000a9f ), + .Q(\blk00000003/sig00000e77 ), + .Q15(\NLW_blk00000003/blk00000c95_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c94 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e76 ), + .Q(\blk00000003/sig00000ace ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c93 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000a9e ), + .Q(\blk00000003/sig00000e76 ), + .Q15(\NLW_blk00000003/blk00000c93_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c92 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e75 ), + .Q(\blk00000003/sig00000acd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c91 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000a9d ), + .Q(\blk00000003/sig00000e75 ), + .Q15(\NLW_blk00000003/blk00000c91_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c90 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e74 ), + .Q(\blk00000003/sig00000acc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c8f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000a9c ), + .Q(\blk00000003/sig00000e74 ), + .Q15(\NLW_blk00000003/blk00000c8f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c8e ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e73 ), + .Q(\blk00000003/sig00000aca ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c8d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000a9a ), + .Q(\blk00000003/sig00000e73 ), + .Q15(\NLW_blk00000003/blk00000c8d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c8c ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e72 ), + .Q(\blk00000003/sig00000ac9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c8b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000a99 ), + .Q(\blk00000003/sig00000e72 ), + .Q15(\NLW_blk00000003/blk00000c8b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c8a ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e71 ), + .Q(\blk00000003/sig00000acb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c89 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000a9b ), + .Q(\blk00000003/sig00000e71 ), + .Q15(\NLW_blk00000003/blk00000c89_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c88 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e70 ), + .Q(\blk00000003/sig00000ac7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c87 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000a97 ), + .Q(\blk00000003/sig00000e70 ), + .Q15(\NLW_blk00000003/blk00000c87_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c86 ( + .C(clk), + .CE(\blk00000003/sig00000c9f ), + .D(\blk00000003/sig00000e6f ), + .Q(\blk00000003/sig00000ac8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c85 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9f ), + .CLK(clk), + .D(\blk00000003/sig00000a98 ), + .Q(\blk00000003/sig00000e6f ), + .Q15(\NLW_blk00000003/blk00000c85_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c84 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e6e ), + .Q(\blk00000003/sig00000af5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c83 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000ab5 ), + .Q(\blk00000003/sig00000e6e ), + .Q15(\NLW_blk00000003/blk00000c83_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c82 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e6d ), + .Q(\blk00000003/sig00000af4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c81 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000ab4 ), + .Q(\blk00000003/sig00000e6d ), + .Q15(\NLW_blk00000003/blk00000c81_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c80 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e6c ), + .Q(\blk00000003/sig00000af6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c7f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000ab6 ), + .Q(\blk00000003/sig00000e6c ), + .Q15(\NLW_blk00000003/blk00000c7f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c7e ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e6b ), + .Q(\blk00000003/sig00000af3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c7d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000ab3 ), + .Q(\blk00000003/sig00000e6b ), + .Q15(\NLW_blk00000003/blk00000c7d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c7c ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e6a ), + .Q(\blk00000003/sig00000af2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c7b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000ab2 ), + .Q(\blk00000003/sig00000e6a ), + .Q15(\NLW_blk00000003/blk00000c7b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c7a ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e69 ), + .Q(\blk00000003/sig00000af1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c79 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000ab1 ), + .Q(\blk00000003/sig00000e69 ), + .Q15(\NLW_blk00000003/blk00000c79_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c78 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e68 ), + .Q(\blk00000003/sig00000af0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c77 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000ab0 ), + .Q(\blk00000003/sig00000e68 ), + .Q15(\NLW_blk00000003/blk00000c77_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c76 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e67 ), + .Q(\blk00000003/sig00000aee ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c75 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000aae ), + .Q(\blk00000003/sig00000e67 ), + .Q15(\NLW_blk00000003/blk00000c75_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c74 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e66 ), + .Q(\blk00000003/sig00000aed ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c73 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000aad ), + .Q(\blk00000003/sig00000e66 ), + .Q15(\NLW_blk00000003/blk00000c73_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c72 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e65 ), + .Q(\blk00000003/sig00000aef ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c71 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000aaf ), + .Q(\blk00000003/sig00000e65 ), + .Q15(\NLW_blk00000003/blk00000c71_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c70 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e64 ), + .Q(\blk00000003/sig00000aec ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c6f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000aac ), + .Q(\blk00000003/sig00000e64 ), + .Q15(\NLW_blk00000003/blk00000c6f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c6e ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e63 ), + .Q(\blk00000003/sig00000aeb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c6d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000aab ), + .Q(\blk00000003/sig00000e63 ), + .Q15(\NLW_blk00000003/blk00000c6d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c6c ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e62 ), + .Q(\blk00000003/sig00000aea ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c6b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000aaa ), + .Q(\blk00000003/sig00000e62 ), + .Q15(\NLW_blk00000003/blk00000c6b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c6a ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e61 ), + .Q(\blk00000003/sig00000ae9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c69 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000aa9 ), + .Q(\blk00000003/sig00000e61 ), + .Q15(\NLW_blk00000003/blk00000c69_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c68 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e60 ), + .Q(\blk00000003/sig00000ae7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c67 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000aa7 ), + .Q(\blk00000003/sig00000e60 ), + .Q15(\NLW_blk00000003/blk00000c67_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c66 ( + .C(clk), + .CE(\blk00000003/sig00000c6c ), + .D(\blk00000003/sig00000e5f ), + .Q(\blk00000003/sig00000ae8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c65 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6c ), + .CLK(clk), + .D(\blk00000003/sig00000aa8 ), + .Q(\blk00000003/sig00000e5f ), + .Q15(\NLW_blk00000003/blk00000c65_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c64 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e5e ), + .Q(\blk00000003/sig00000baa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c63 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b9a ), + .Q(\blk00000003/sig00000e5e ), + .Q15(\NLW_blk00000003/blk00000c63_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c62 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e5d ), + .Q(\blk00000003/sig00000ba9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c61 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b99 ), + .Q(\blk00000003/sig00000e5d ), + .Q15(\NLW_blk00000003/blk00000c61_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c60 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e5c ), + .Q(\blk00000003/sig00000ba8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c5f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b98 ), + .Q(\blk00000003/sig00000e5c ), + .Q15(\NLW_blk00000003/blk00000c5f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c5e ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e5b ), + .Q(\blk00000003/sig00000ba7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c5d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b97 ), + .Q(\blk00000003/sig00000e5b ), + .Q15(\NLW_blk00000003/blk00000c5d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c5c ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e5a ), + .Q(\blk00000003/sig00000ba5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c5b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b95 ), + .Q(\blk00000003/sig00000e5a ), + .Q15(\NLW_blk00000003/blk00000c5b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c5a ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e59 ), + .Q(\blk00000003/sig00000ba4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c59 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b94 ), + .Q(\blk00000003/sig00000e59 ), + .Q15(\NLW_blk00000003/blk00000c59_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c58 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e58 ), + .Q(\blk00000003/sig00000ba6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c57 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b96 ), + .Q(\blk00000003/sig00000e58 ), + .Q15(\NLW_blk00000003/blk00000c57_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c56 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e57 ), + .Q(\blk00000003/sig00000ba3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c55 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b93 ), + .Q(\blk00000003/sig00000e57 ), + .Q15(\NLW_blk00000003/blk00000c55_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c54 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e56 ), + .Q(\blk00000003/sig00000bb2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c53 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000ba2 ), + .Q(\blk00000003/sig00000e56 ), + .Q15(\NLW_blk00000003/blk00000c53_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c52 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e55 ), + .Q(\blk00000003/sig00000bb1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c51 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000ba1 ), + .Q(\blk00000003/sig00000e55 ), + .Q15(\NLW_blk00000003/blk00000c51_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c50 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e54 ), + .Q(\blk00000003/sig00000bb0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c4f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000ba0 ), + .Q(\blk00000003/sig00000e54 ), + .Q15(\NLW_blk00000003/blk00000c4f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c4e ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e53 ), + .Q(\blk00000003/sig00000baf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c4d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b9f ), + .Q(\blk00000003/sig00000e53 ), + .Q15(\NLW_blk00000003/blk00000c4d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c4c ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e52 ), + .Q(\blk00000003/sig00000bae ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c4b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b9e ), + .Q(\blk00000003/sig00000e52 ), + .Q15(\NLW_blk00000003/blk00000c4b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c4a ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e51 ), + .Q(\blk00000003/sig00000bac ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c49 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b9c ), + .Q(\blk00000003/sig00000e51 ), + .Q15(\NLW_blk00000003/blk00000c49_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c48 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e50 ), + .Q(\blk00000003/sig00000bab ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c47 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b9b ), + .Q(\blk00000003/sig00000e50 ), + .Q15(\NLW_blk00000003/blk00000c47_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c46 ( + .C(clk), + .CE(\blk00000003/sig00000c9e ), + .D(\blk00000003/sig00000e4f ), + .Q(\blk00000003/sig00000bad ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c45 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9e ), + .CLK(clk), + .D(\blk00000003/sig00000b9d ), + .Q(\blk00000003/sig00000e4f ), + .Q15(\NLW_blk00000003/blk00000c45_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c44 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e4e ), + .Q(\blk00000003/sig00000aa6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c43 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a86 ), + .Q(\blk00000003/sig00000e4e ), + .Q15(\NLW_blk00000003/blk00000c43_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c42 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e4d ), + .Q(\blk00000003/sig00000aa4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c41 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a84 ), + .Q(\blk00000003/sig00000e4d ), + .Q15(\NLW_blk00000003/blk00000c41_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c40 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e4c ), + .Q(\blk00000003/sig00000aa3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c3f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a83 ), + .Q(\blk00000003/sig00000e4c ), + .Q15(\NLW_blk00000003/blk00000c3f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c3e ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e4b ), + .Q(\blk00000003/sig00000aa5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c3d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a85 ), + .Q(\blk00000003/sig00000e4b ), + .Q15(\NLW_blk00000003/blk00000c3d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c3c ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e4a ), + .Q(\blk00000003/sig00000aa2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c3b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a82 ), + .Q(\blk00000003/sig00000e4a ), + .Q15(\NLW_blk00000003/blk00000c3b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c3a ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e49 ), + .Q(\blk00000003/sig00000aa1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c39 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a81 ), + .Q(\blk00000003/sig00000e49 ), + .Q15(\NLW_blk00000003/blk00000c39_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c38 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e48 ), + .Q(\blk00000003/sig00000aa0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c37 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a80 ), + .Q(\blk00000003/sig00000e48 ), + .Q15(\NLW_blk00000003/blk00000c37_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c36 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e47 ), + .Q(\blk00000003/sig00000a9f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c35 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a7f ), + .Q(\blk00000003/sig00000e47 ), + .Q15(\NLW_blk00000003/blk00000c35_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c34 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e46 ), + .Q(\blk00000003/sig00000a9d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c33 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a7d ), + .Q(\blk00000003/sig00000e46 ), + .Q15(\NLW_blk00000003/blk00000c33_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c32 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e45 ), + .Q(\blk00000003/sig00000a9c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c31 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a7c ), + .Q(\blk00000003/sig00000e45 ), + .Q15(\NLW_blk00000003/blk00000c31_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c30 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e44 ), + .Q(\blk00000003/sig00000a9e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c2f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a7e ), + .Q(\blk00000003/sig00000e44 ), + .Q15(\NLW_blk00000003/blk00000c2f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c2e ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e43 ), + .Q(\blk00000003/sig00000a9b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c2d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a7b ), + .Q(\blk00000003/sig00000e43 ), + .Q15(\NLW_blk00000003/blk00000c2d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c2c ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e42 ), + .Q(\blk00000003/sig00000a9a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c2b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a7a ), + .Q(\blk00000003/sig00000e42 ), + .Q15(\NLW_blk00000003/blk00000c2b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c2a ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e41 ), + .Q(\blk00000003/sig00000a99 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c29 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a79 ), + .Q(\blk00000003/sig00000e41 ), + .Q15(\NLW_blk00000003/blk00000c29_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c28 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e40 ), + .Q(\blk00000003/sig00000a98 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c27 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a78 ), + .Q(\blk00000003/sig00000e40 ), + .Q15(\NLW_blk00000003/blk00000c27_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c26 ( + .C(clk), + .CE(\blk00000003/sig00000c9d ), + .D(\blk00000003/sig00000e3f ), + .Q(\blk00000003/sig00000a97 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c25 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9d ), + .CLK(clk), + .D(\blk00000003/sig00000a77 ), + .Q(\blk00000003/sig00000e3f ), + .Q15(\NLW_blk00000003/blk00000c25_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c24 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e3e ), + .Q(\blk00000003/sig00000ab6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c23 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a96 ), + .Q(\blk00000003/sig00000e3e ), + .Q15(\NLW_blk00000003/blk00000c23_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c22 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e3d ), + .Q(\blk00000003/sig00000ab5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c21 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a95 ), + .Q(\blk00000003/sig00000e3d ), + .Q15(\NLW_blk00000003/blk00000c21_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c20 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e3c ), + .Q(\blk00000003/sig00000ab4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c1f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a94 ), + .Q(\blk00000003/sig00000e3c ), + .Q15(\NLW_blk00000003/blk00000c1f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c1e ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e3b ), + .Q(\blk00000003/sig00000ab3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c1d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a93 ), + .Q(\blk00000003/sig00000e3b ), + .Q15(\NLW_blk00000003/blk00000c1d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c1c ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e3a ), + .Q(\blk00000003/sig00000ab2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c1b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a92 ), + .Q(\blk00000003/sig00000e3a ), + .Q15(\NLW_blk00000003/blk00000c1b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c1a ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e39 ), + .Q(\blk00000003/sig00000ab0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c19 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a90 ), + .Q(\blk00000003/sig00000e39 ), + .Q15(\NLW_blk00000003/blk00000c19_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c18 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e38 ), + .Q(\blk00000003/sig00000aaf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c17 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a8f ), + .Q(\blk00000003/sig00000e38 ), + .Q15(\NLW_blk00000003/blk00000c17_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c16 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e37 ), + .Q(\blk00000003/sig00000ab1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c15 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a91 ), + .Q(\blk00000003/sig00000e37 ), + .Q15(\NLW_blk00000003/blk00000c15_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c14 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e36 ), + .Q(\blk00000003/sig00000aae ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c13 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a8e ), + .Q(\blk00000003/sig00000e36 ), + .Q15(\NLW_blk00000003/blk00000c13_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c12 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e35 ), + .Q(\blk00000003/sig00000aad ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c11 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a8d ), + .Q(\blk00000003/sig00000e35 ), + .Q15(\NLW_blk00000003/blk00000c11_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c10 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e34 ), + .Q(\blk00000003/sig00000aac ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c0f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a8c ), + .Q(\blk00000003/sig00000e34 ), + .Q15(\NLW_blk00000003/blk00000c0f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c0e ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e33 ), + .Q(\blk00000003/sig00000aab ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c0d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a8b ), + .Q(\blk00000003/sig00000e33 ), + .Q15(\NLW_blk00000003/blk00000c0d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c0c ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e32 ), + .Q(\blk00000003/sig00000aa9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c0b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a89 ), + .Q(\blk00000003/sig00000e32 ), + .Q15(\NLW_blk00000003/blk00000c0b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c0a ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e31 ), + .Q(\blk00000003/sig00000aa8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c09 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a88 ), + .Q(\blk00000003/sig00000e31 ), + .Q15(\NLW_blk00000003/blk00000c09_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c08 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e30 ), + .Q(\blk00000003/sig00000aaa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c07 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a8a ), + .Q(\blk00000003/sig00000e30 ), + .Q15(\NLW_blk00000003/blk00000c07_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c06 ( + .C(clk), + .CE(\blk00000003/sig00000c6b ), + .D(\blk00000003/sig00000e2f ), + .Q(\blk00000003/sig00000aa7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c05 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6b ), + .CLK(clk), + .D(\blk00000003/sig00000a87 ), + .Q(\blk00000003/sig00000e2f ), + .Q15(\NLW_blk00000003/blk00000c05_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c04 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000e2e ), + .Q(\blk00000003/sig00000c61 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c03 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a16 ), + .Q(\blk00000003/sig00000e2e ), + .Q15(\NLW_blk00000003/blk00000c03_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c02 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e2d ), + .Q(\blk00000003/sig00000b9a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000c01 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b8a ), + .Q(\blk00000003/sig00000e2d ), + .Q15(\NLW_blk00000003/blk00000c01_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000c00 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e2c ), + .Q(\blk00000003/sig00000b99 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bff ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b89 ), + .Q(\blk00000003/sig00000e2c ), + .Q15(\NLW_blk00000003/blk00000bff_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bfe ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e2b ), + .Q(\blk00000003/sig00000b97 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bfd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b87 ), + .Q(\blk00000003/sig00000e2b ), + .Q15(\NLW_blk00000003/blk00000bfd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bfc ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e2a ), + .Q(\blk00000003/sig00000b96 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bfb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b86 ), + .Q(\blk00000003/sig00000e2a ), + .Q15(\NLW_blk00000003/blk00000bfb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bfa ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e29 ), + .Q(\blk00000003/sig00000b98 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b88 ), + .Q(\blk00000003/sig00000e29 ), + .Q15(\NLW_blk00000003/blk00000bf9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf8 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e28 ), + .Q(\blk00000003/sig00000b95 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b85 ), + .Q(\blk00000003/sig00000e28 ), + .Q15(\NLW_blk00000003/blk00000bf7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf6 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e27 ), + .Q(\blk00000003/sig00000b94 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b84 ), + .Q(\blk00000003/sig00000e27 ), + .Q15(\NLW_blk00000003/blk00000bf5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf4 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e26 ), + .Q(\blk00000003/sig00000b93 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b83 ), + .Q(\blk00000003/sig00000e26 ), + .Q15(\NLW_blk00000003/blk00000bf3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf2 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e25 ), + .Q(\blk00000003/sig00000ba2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bf1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b92 ), + .Q(\blk00000003/sig00000e25 ), + .Q15(\NLW_blk00000003/blk00000bf1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bf0 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e24 ), + .Q(\blk00000003/sig00000ba1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bef ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b91 ), + .Q(\blk00000003/sig00000e24 ), + .Q15(\NLW_blk00000003/blk00000bef_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bee ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e23 ), + .Q(\blk00000003/sig00000ba0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bed ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b90 ), + .Q(\blk00000003/sig00000e23 ), + .Q15(\NLW_blk00000003/blk00000bed_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bec ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e22 ), + .Q(\blk00000003/sig00000b9f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000beb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b8f ), + .Q(\blk00000003/sig00000e22 ), + .Q15(\NLW_blk00000003/blk00000beb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bea ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e21 ), + .Q(\blk00000003/sig00000b9d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b8d ), + .Q(\blk00000003/sig00000e21 ), + .Q15(\NLW_blk00000003/blk00000be9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be8 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e20 ), + .Q(\blk00000003/sig00000b9c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b8c ), + .Q(\blk00000003/sig00000e20 ), + .Q15(\NLW_blk00000003/blk00000be7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be6 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e1f ), + .Q(\blk00000003/sig00000b9e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b8e ), + .Q(\blk00000003/sig00000e1f ), + .Q15(\NLW_blk00000003/blk00000be5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be4 ( + .C(clk), + .CE(\blk00000003/sig00000c9c ), + .D(\blk00000003/sig00000e1e ), + .Q(\blk00000003/sig00000b9b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9c ), + .CLK(clk), + .D(\blk00000003/sig00000b8b ), + .Q(\blk00000003/sig00000e1e ), + .Q15(\NLW_blk00000003/blk00000be3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be2 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e1d ), + .Q(\blk00000003/sig00000a86 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000be1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a66 ), + .Q(\blk00000003/sig00000e1d ), + .Q15(\NLW_blk00000003/blk00000be1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000be0 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e1c ), + .Q(\blk00000003/sig00000a85 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bdf ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a65 ), + .Q(\blk00000003/sig00000e1c ), + .Q15(\NLW_blk00000003/blk00000bdf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bde ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e1b ), + .Q(\blk00000003/sig00000a84 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bdd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a64 ), + .Q(\blk00000003/sig00000e1b ), + .Q15(\NLW_blk00000003/blk00000bdd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bdc ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e1a ), + .Q(\blk00000003/sig00000a83 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bdb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a63 ), + .Q(\blk00000003/sig00000e1a ), + .Q15(\NLW_blk00000003/blk00000bdb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bda ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e19 ), + .Q(\blk00000003/sig00000a82 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a62 ), + .Q(\blk00000003/sig00000e19 ), + .Q15(\NLW_blk00000003/blk00000bd9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd8 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e18 ), + .Q(\blk00000003/sig00000a81 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a61 ), + .Q(\blk00000003/sig00000e18 ), + .Q15(\NLW_blk00000003/blk00000bd7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd6 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e17 ), + .Q(\blk00000003/sig00000a7f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a5f ), + .Q(\blk00000003/sig00000e17 ), + .Q15(\NLW_blk00000003/blk00000bd5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd4 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e16 ), + .Q(\blk00000003/sig00000a7e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a5e ), + .Q(\blk00000003/sig00000e16 ), + .Q15(\NLW_blk00000003/blk00000bd3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd2 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e15 ), + .Q(\blk00000003/sig00000a80 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bd1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a60 ), + .Q(\blk00000003/sig00000e15 ), + .Q15(\NLW_blk00000003/blk00000bd1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bd0 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e14 ), + .Q(\blk00000003/sig00000a7d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bcf ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a5d ), + .Q(\blk00000003/sig00000e14 ), + .Q15(\NLW_blk00000003/blk00000bcf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bce ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e13 ), + .Q(\blk00000003/sig00000a7c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bcd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a5c ), + .Q(\blk00000003/sig00000e13 ), + .Q15(\NLW_blk00000003/blk00000bcd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bcc ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e12 ), + .Q(\blk00000003/sig00000a7b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bcb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a5b ), + .Q(\blk00000003/sig00000e12 ), + .Q15(\NLW_blk00000003/blk00000bcb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bca ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e11 ), + .Q(\blk00000003/sig00000a7a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a5a ), + .Q(\blk00000003/sig00000e11 ), + .Q15(\NLW_blk00000003/blk00000bc9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc8 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e10 ), + .Q(\blk00000003/sig00000a78 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a58 ), + .Q(\blk00000003/sig00000e10 ), + .Q15(\NLW_blk00000003/blk00000bc7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc6 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e0f ), + .Q(\blk00000003/sig00000a77 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a57 ), + .Q(\blk00000003/sig00000e0f ), + .Q15(\NLW_blk00000003/blk00000bc5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc4 ( + .C(clk), + .CE(\blk00000003/sig00000c9b ), + .D(\blk00000003/sig00000e0e ), + .Q(\blk00000003/sig00000a79 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9b ), + .CLK(clk), + .D(\blk00000003/sig00000a59 ), + .Q(\blk00000003/sig00000e0e ), + .Q15(\NLW_blk00000003/blk00000bc3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc2 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e0d ), + .Q(\blk00000003/sig00000a96 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bc1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a76 ), + .Q(\blk00000003/sig00000e0d ), + .Q15(\NLW_blk00000003/blk00000bc1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bc0 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e0c ), + .Q(\blk00000003/sig00000a95 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bbf ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a75 ), + .Q(\blk00000003/sig00000e0c ), + .Q15(\NLW_blk00000003/blk00000bbf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bbe ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e0b ), + .Q(\blk00000003/sig00000a94 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bbd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a74 ), + .Q(\blk00000003/sig00000e0b ), + .Q15(\NLW_blk00000003/blk00000bbd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bbc ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e0a ), + .Q(\blk00000003/sig00000a92 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bbb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a72 ), + .Q(\blk00000003/sig00000e0a ), + .Q15(\NLW_blk00000003/blk00000bbb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bba ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e09 ), + .Q(\blk00000003/sig00000a91 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a71 ), + .Q(\blk00000003/sig00000e09 ), + .Q15(\NLW_blk00000003/blk00000bb9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb8 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e08 ), + .Q(\blk00000003/sig00000a93 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a73 ), + .Q(\blk00000003/sig00000e08 ), + .Q15(\NLW_blk00000003/blk00000bb7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb6 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e07 ), + .Q(\blk00000003/sig00000a90 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a70 ), + .Q(\blk00000003/sig00000e07 ), + .Q15(\NLW_blk00000003/blk00000bb5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb4 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e06 ), + .Q(\blk00000003/sig00000a8f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a6f ), + .Q(\blk00000003/sig00000e06 ), + .Q15(\NLW_blk00000003/blk00000bb3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb2 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e05 ), + .Q(\blk00000003/sig00000a8e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bb1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a6e ), + .Q(\blk00000003/sig00000e05 ), + .Q15(\NLW_blk00000003/blk00000bb1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bb0 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e04 ), + .Q(\blk00000003/sig00000a8d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000baf ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a6d ), + .Q(\blk00000003/sig00000e04 ), + .Q15(\NLW_blk00000003/blk00000baf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bae ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e03 ), + .Q(\blk00000003/sig00000a8b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bad ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a6b ), + .Q(\blk00000003/sig00000e03 ), + .Q15(\NLW_blk00000003/blk00000bad_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000bac ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e02 ), + .Q(\blk00000003/sig00000a8a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000bab ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a6a ), + .Q(\blk00000003/sig00000e02 ), + .Q15(\NLW_blk00000003/blk00000bab_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000baa ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e01 ), + .Q(\blk00000003/sig00000a8c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a6c ), + .Q(\blk00000003/sig00000e01 ), + .Q15(\NLW_blk00000003/blk00000ba9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba8 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000e00 ), + .Q(\blk00000003/sig00000a88 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a68 ), + .Q(\blk00000003/sig00000e00 ), + .Q15(\NLW_blk00000003/blk00000ba7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba6 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000dff ), + .Q(\blk00000003/sig00000a87 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a67 ), + .Q(\blk00000003/sig00000dff ), + .Q15(\NLW_blk00000003/blk00000ba5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba4 ( + .C(clk), + .CE(\blk00000003/sig00000c6a ), + .D(\blk00000003/sig00000dfe ), + .Q(\blk00000003/sig00000a89 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c6a ), + .CLK(clk), + .D(\blk00000003/sig00000a69 ), + .Q(\blk00000003/sig00000dfe ), + .Q15(\NLW_blk00000003/blk00000ba3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dfd ), + .Q(\blk00000003/sig000002ad ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ba1 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000a15 ), + .Q(\blk00000003/sig00000dfd ), + .Q15(\NLW_blk00000003/blk00000ba1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ba0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dfc ), + .Q(\blk00000003/sig00000258 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b9f ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d98 ), + .Q(\blk00000003/sig00000dfc ), + .Q15(\NLW_blk00000003/blk00000b9f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b9e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dfb ), + .Q(\blk00000003/sig00000257 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b9d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d96 ), + .Q(\blk00000003/sig00000dfb ), + .Q15(\NLW_blk00000003/blk00000b9d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b9c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dfa ), + .Q(\blk00000003/sig00000259 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b9b ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d9a ), + .Q(\blk00000003/sig00000dfa ), + .Q15(\NLW_blk00000003/blk00000b9b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b9a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df9 ), + .Q(\blk00000003/sig00000255 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b99 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d8e ), + .Q(\blk00000003/sig00000df9 ), + .Q15(\NLW_blk00000003/blk00000b99_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b98 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df8 ), + .Q(\blk00000003/sig00000254 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b97 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d92 ), + .Q(\blk00000003/sig00000df8 ), + .Q15(\NLW_blk00000003/blk00000b97_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b96 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df7 ), + .Q(\blk00000003/sig00000256 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b95 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d94 ), + .Q(\blk00000003/sig00000df7 ), + .Q15(\NLW_blk00000003/blk00000b95_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b94 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df6 ), + .Q(\blk00000003/sig00000253 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b93 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d90 ), + .Q(\blk00000003/sig00000df6 ), + .Q15(\NLW_blk00000003/blk00000b93_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b92 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df5 ), + .Q(\blk00000003/sig00000252 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b91 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d8c ), + .Q(\blk00000003/sig00000df5 ), + .Q15(\NLW_blk00000003/blk00000b91_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b90 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df4 ), + .Q(\blk00000003/sig00000251 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b8f ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d8a ), + .Q(\blk00000003/sig00000df4 ), + .Q15(\NLW_blk00000003/blk00000b8f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b8e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df3 ), + .Q(\blk00000003/sig00000250 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b8d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d88 ), + .Q(\blk00000003/sig00000df3 ), + .Q15(\NLW_blk00000003/blk00000b8d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b8c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df2 ), + .Q(\blk00000003/sig0000024e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b8b ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d80 ), + .Q(\blk00000003/sig00000df2 ), + .Q15(\NLW_blk00000003/blk00000b8b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b8a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df1 ), + .Q(\blk00000003/sig0000024d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b89 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d84 ), + .Q(\blk00000003/sig00000df1 ), + .Q15(\NLW_blk00000003/blk00000b89_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b88 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000df0 ), + .Q(\blk00000003/sig0000024f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b87 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d86 ), + .Q(\blk00000003/sig00000df0 ), + .Q15(\NLW_blk00000003/blk00000b87_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b86 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000def ), + .Q(\blk00000003/sig0000024c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b85 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d82 ), + .Q(\blk00000003/sig00000def ), + .Q15(\NLW_blk00000003/blk00000b85_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b84 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dee ), + .Q(\blk00000003/sig0000024b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b83 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d7e ), + .Q(\blk00000003/sig00000dee ), + .Q15(\NLW_blk00000003/blk00000b83_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b82 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ded ), + .Q(\blk00000003/sig0000024a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b81 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d7c ), + .Q(\blk00000003/sig00000ded ), + .Q15(\NLW_blk00000003/blk00000b81_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b80 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dec ), + .Q(\blk00000003/sig00000219 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b7f ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d7a ), + .Q(\blk00000003/sig00000dec ), + .Q15(\NLW_blk00000003/blk00000b7f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b7e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000deb ), + .Q(\blk00000003/sig00000217 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b7d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d72 ), + .Q(\blk00000003/sig00000deb ), + .Q15(\NLW_blk00000003/blk00000b7d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b7c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dea ), + .Q(\blk00000003/sig00000216 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b7b ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d76 ), + .Q(\blk00000003/sig00000dea ), + .Q15(\NLW_blk00000003/blk00000b7b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b7a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de9 ), + .Q(\blk00000003/sig00000218 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b79 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d78 ), + .Q(\blk00000003/sig00000de9 ), + .Q15(\NLW_blk00000003/blk00000b79_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b78 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de8 ), + .Q(\blk00000003/sig00000215 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b77 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d74 ), + .Q(\blk00000003/sig00000de8 ), + .Q15(\NLW_blk00000003/blk00000b77_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b76 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de7 ), + .Q(\blk00000003/sig00000214 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b75 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d70 ), + .Q(\blk00000003/sig00000de7 ), + .Q15(\NLW_blk00000003/blk00000b75_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b74 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de6 ), + .Q(\blk00000003/sig00000213 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b73 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d6e ), + .Q(\blk00000003/sig00000de6 ), + .Q15(\NLW_blk00000003/blk00000b73_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b72 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de5 ), + .Q(\blk00000003/sig00000212 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b71 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d6c ), + .Q(\blk00000003/sig00000de5 ), + .Q15(\NLW_blk00000003/blk00000b71_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b70 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de4 ), + .Q(\blk00000003/sig000001d0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b6f ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d64 ), + .Q(\blk00000003/sig00000de4 ), + .Q15(\NLW_blk00000003/blk00000b6f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b6e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de3 ), + .Q(\blk00000003/sig000001cf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b6d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d68 ), + .Q(\blk00000003/sig00000de3 ), + .Q15(\NLW_blk00000003/blk00000b6d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b6c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de2 ), + .Q(\blk00000003/sig000001d1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b6b ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d6a ), + .Q(\blk00000003/sig00000de2 ), + .Q15(\NLW_blk00000003/blk00000b6b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b6a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de1 ), + .Q(\blk00000003/sig000001ce ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b69 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d66 ), + .Q(\blk00000003/sig00000de1 ), + .Q15(\NLW_blk00000003/blk00000b69_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b68 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000de0 ), + .Q(\blk00000003/sig000001cd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b67 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d62 ), + .Q(\blk00000003/sig00000de0 ), + .Q15(\NLW_blk00000003/blk00000b67_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b66 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ddf ), + .Q(\blk00000003/sig000001cc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b65 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d60 ), + .Q(\blk00000003/sig00000ddf ), + .Q15(\NLW_blk00000003/blk00000b65_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b64 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dde ), + .Q(\blk00000003/sig000001cb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b63 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d5e ), + .Q(\blk00000003/sig00000dde ), + .Q15(\NLW_blk00000003/blk00000b63_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b62 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ddd ), + .Q(\blk00000003/sig000001c9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b61 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d56 ), + .Q(\blk00000003/sig00000ddd ), + .Q15(\NLW_blk00000003/blk00000b61_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b60 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ddc ), + .Q(\blk00000003/sig000001c8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b5f ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d5a ), + .Q(\blk00000003/sig00000ddc ), + .Q15(\NLW_blk00000003/blk00000b5f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b5e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ddb ), + .Q(\blk00000003/sig000001ca ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b5d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d5c ), + .Q(\blk00000003/sig00000ddb ), + .Q15(\NLW_blk00000003/blk00000b5d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b5c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dda ), + .Q(\blk00000003/sig000001c7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b5b ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d58 ), + .Q(\blk00000003/sig00000dda ), + .Q15(\NLW_blk00000003/blk00000b5b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b5a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd9 ), + .Q(\blk00000003/sig000001c6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b59 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d54 ), + .Q(\blk00000003/sig00000dd9 ), + .Q15(\NLW_blk00000003/blk00000b59_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b58 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd8 ), + .Q(\blk00000003/sig000001c5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b57 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d52 ), + .Q(\blk00000003/sig00000dd8 ), + .Q15(\NLW_blk00000003/blk00000b57_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b56 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd7 ), + .Q(\blk00000003/sig000001c4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b55 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d50 ), + .Q(\blk00000003/sig00000dd7 ), + .Q15(\NLW_blk00000003/blk00000b55_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b54 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd6 ), + .Q(\blk00000003/sig000001c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b53 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d48 ), + .Q(\blk00000003/sig00000dd6 ), + .Q15(\NLW_blk00000003/blk00000b53_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b52 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd5 ), + .Q(\blk00000003/sig0000017f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b51 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d4c ), + .Q(\blk00000003/sig00000dd5 ), + .Q15(\NLW_blk00000003/blk00000b51_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b50 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd4 ), + .Q(\blk00000003/sig000001c3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b4f ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d4e ), + .Q(\blk00000003/sig00000dd4 ), + .Q15(\NLW_blk00000003/blk00000b4f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b4e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd3 ), + .Q(\blk00000003/sig0000017e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b4d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d4a ), + .Q(\blk00000003/sig00000dd3 ), + .Q15(\NLW_blk00000003/blk00000b4d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b4c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd2 ), + .Q(\blk00000003/sig0000017d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b4b ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d46 ), + .Q(\blk00000003/sig00000dd2 ), + .Q15(\NLW_blk00000003/blk00000b4b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b4a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd1 ), + .Q(\blk00000003/sig0000017c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b49 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d44 ), + .Q(\blk00000003/sig00000dd1 ), + .Q15(\NLW_blk00000003/blk00000b49_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b48 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dd0 ), + .Q(\blk00000003/sig0000017b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b47 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d42 ), + .Q(\blk00000003/sig00000dd0 ), + .Q15(\NLW_blk00000003/blk00000b47_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b46 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dcf ), + .Q(\blk00000003/sig00000179 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b45 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d3c ), + .Q(\blk00000003/sig00000dcf ), + .Q15(\NLW_blk00000003/blk00000b45_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b44 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dce ), + .Q(\blk00000003/sig00000178 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b43 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d3e ), + .Q(\blk00000003/sig00000dce ), + .Q15(\NLW_blk00000003/blk00000b43_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b42 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000dcd ), + .Q(\blk00000003/sig0000017a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b41 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000d40 ), + .Q(\blk00000003/sig00000dcd ), + .Q15(\NLW_blk00000003/blk00000b41_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b40 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dcc ), + .Q(\blk00000003/sig00000b8a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b3f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b7a ), + .Q(\blk00000003/sig00000dcc ), + .Q15(\NLW_blk00000003/blk00000b3f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b3e ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dcb ), + .Q(\blk00000003/sig00000b88 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b3d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b78 ), + .Q(\blk00000003/sig00000dcb ), + .Q15(\NLW_blk00000003/blk00000b3d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b3c ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dca ), + .Q(\blk00000003/sig00000b87 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b3b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b77 ), + .Q(\blk00000003/sig00000dca ), + .Q15(\NLW_blk00000003/blk00000b3b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b3a ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc9 ), + .Q(\blk00000003/sig00000b89 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b39 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b79 ), + .Q(\blk00000003/sig00000dc9 ), + .Q15(\NLW_blk00000003/blk00000b39_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b38 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc8 ), + .Q(\blk00000003/sig00000b86 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b37 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b76 ), + .Q(\blk00000003/sig00000dc8 ), + .Q15(\NLW_blk00000003/blk00000b37_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b36 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc7 ), + .Q(\blk00000003/sig00000b85 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b35 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b75 ), + .Q(\blk00000003/sig00000dc7 ), + .Q15(\NLW_blk00000003/blk00000b35_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b34 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc6 ), + .Q(\blk00000003/sig00000b84 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b33 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b74 ), + .Q(\blk00000003/sig00000dc6 ), + .Q15(\NLW_blk00000003/blk00000b33_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b32 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc5 ), + .Q(\blk00000003/sig00000b83 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b31 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b73 ), + .Q(\blk00000003/sig00000dc5 ), + .Q15(\NLW_blk00000003/blk00000b31_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b30 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc4 ), + .Q(\blk00000003/sig00000b92 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b2f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b82 ), + .Q(\blk00000003/sig00000dc4 ), + .Q15(\NLW_blk00000003/blk00000b2f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b2e ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc3 ), + .Q(\blk00000003/sig00000b91 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b2d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b81 ), + .Q(\blk00000003/sig00000dc3 ), + .Q15(\NLW_blk00000003/blk00000b2d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b2c ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc2 ), + .Q(\blk00000003/sig00000b90 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b2b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b80 ), + .Q(\blk00000003/sig00000dc2 ), + .Q15(\NLW_blk00000003/blk00000b2b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b2a ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc1 ), + .Q(\blk00000003/sig00000b8e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b29 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b7e ), + .Q(\blk00000003/sig00000dc1 ), + .Q15(\NLW_blk00000003/blk00000b29_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b28 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dc0 ), + .Q(\blk00000003/sig00000b8d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b27 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b7d ), + .Q(\blk00000003/sig00000dc0 ), + .Q15(\NLW_blk00000003/blk00000b27_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b26 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dbf ), + .Q(\blk00000003/sig00000b8f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b25 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b7f ), + .Q(\blk00000003/sig00000dbf ), + .Q15(\NLW_blk00000003/blk00000b25_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b24 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dbe ), + .Q(\blk00000003/sig00000b8c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b23 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b7c ), + .Q(\blk00000003/sig00000dbe ), + .Q15(\NLW_blk00000003/blk00000b23_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b22 ( + .C(clk), + .CE(\blk00000003/sig00000c9a ), + .D(\blk00000003/sig00000dbd ), + .Q(\blk00000003/sig00000b8b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b21 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c9a ), + .CLK(clk), + .D(\blk00000003/sig00000b7b ), + .Q(\blk00000003/sig00000dbd ), + .Q15(\NLW_blk00000003/blk00000b21_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b20 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000dbc ), + .Q(\blk00000003/sig00000a66 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b1f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a46 ), + .Q(\blk00000003/sig00000dbc ), + .Q15(\NLW_blk00000003/blk00000b1f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b1e ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000dbb ), + .Q(\blk00000003/sig00000a65 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b1d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a45 ), + .Q(\blk00000003/sig00000dbb ), + .Q15(\NLW_blk00000003/blk00000b1d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b1c ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000dba ), + .Q(\blk00000003/sig00000a64 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b1b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a44 ), + .Q(\blk00000003/sig00000dba ), + .Q15(\NLW_blk00000003/blk00000b1b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b1a ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db9 ), + .Q(\blk00000003/sig00000a63 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b19 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a43 ), + .Q(\blk00000003/sig00000db9 ), + .Q15(\NLW_blk00000003/blk00000b19_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b18 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db8 ), + .Q(\blk00000003/sig00000a61 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b17 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a41 ), + .Q(\blk00000003/sig00000db8 ), + .Q15(\NLW_blk00000003/blk00000b17_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b16 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db7 ), + .Q(\blk00000003/sig00000a60 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b15 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a40 ), + .Q(\blk00000003/sig00000db7 ), + .Q15(\NLW_blk00000003/blk00000b15_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b14 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db6 ), + .Q(\blk00000003/sig00000a62 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b13 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a42 ), + .Q(\blk00000003/sig00000db6 ), + .Q15(\NLW_blk00000003/blk00000b13_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b12 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db5 ), + .Q(\blk00000003/sig00000a5f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b11 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a3f ), + .Q(\blk00000003/sig00000db5 ), + .Q15(\NLW_blk00000003/blk00000b11_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b10 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db4 ), + .Q(\blk00000003/sig00000a5e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b0f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a3e ), + .Q(\blk00000003/sig00000db4 ), + .Q15(\NLW_blk00000003/blk00000b0f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b0e ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db3 ), + .Q(\blk00000003/sig00000a5d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b0d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a3d ), + .Q(\blk00000003/sig00000db3 ), + .Q15(\NLW_blk00000003/blk00000b0d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b0c ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db2 ), + .Q(\blk00000003/sig00000a5c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b0b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a3c ), + .Q(\blk00000003/sig00000db2 ), + .Q15(\NLW_blk00000003/blk00000b0b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b0a ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db1 ), + .Q(\blk00000003/sig00000a5a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b09 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a3a ), + .Q(\blk00000003/sig00000db1 ), + .Q15(\NLW_blk00000003/blk00000b09_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b08 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000db0 ), + .Q(\blk00000003/sig00000a59 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b07 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a39 ), + .Q(\blk00000003/sig00000db0 ), + .Q15(\NLW_blk00000003/blk00000b07_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b06 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000daf ), + .Q(\blk00000003/sig00000a5b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b05 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a3b ), + .Q(\blk00000003/sig00000daf ), + .Q15(\NLW_blk00000003/blk00000b05_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b04 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000dae ), + .Q(\blk00000003/sig00000a58 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b03 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a38 ), + .Q(\blk00000003/sig00000dae ), + .Q15(\NLW_blk00000003/blk00000b03_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b02 ( + .C(clk), + .CE(\blk00000003/sig00000c99 ), + .D(\blk00000003/sig00000dad ), + .Q(\blk00000003/sig00000a57 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000b01 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c99 ), + .CLK(clk), + .D(\blk00000003/sig00000a37 ), + .Q(\blk00000003/sig00000dad ), + .Q15(\NLW_blk00000003/blk00000b01_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000b00 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000dac ), + .Q(\blk00000003/sig00000a75 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aff ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a55 ), + .Q(\blk00000003/sig00000dac ), + .Q15(\NLW_blk00000003/blk00000aff_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000afe ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000dab ), + .Q(\blk00000003/sig00000a74 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000afd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a54 ), + .Q(\blk00000003/sig00000dab ), + .Q15(\NLW_blk00000003/blk00000afd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000afc ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000daa ), + .Q(\blk00000003/sig00000a76 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000afb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a56 ), + .Q(\blk00000003/sig00000daa ), + .Q15(\NLW_blk00000003/blk00000afb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000afa ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da9 ), + .Q(\blk00000003/sig00000a73 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a53 ), + .Q(\blk00000003/sig00000da9 ), + .Q15(\NLW_blk00000003/blk00000af9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af8 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da8 ), + .Q(\blk00000003/sig00000a72 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a52 ), + .Q(\blk00000003/sig00000da8 ), + .Q15(\NLW_blk00000003/blk00000af7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af6 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da7 ), + .Q(\blk00000003/sig00000a71 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a51 ), + .Q(\blk00000003/sig00000da7 ), + .Q15(\NLW_blk00000003/blk00000af5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af4 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da6 ), + .Q(\blk00000003/sig00000a70 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a50 ), + .Q(\blk00000003/sig00000da6 ), + .Q15(\NLW_blk00000003/blk00000af3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af2 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da5 ), + .Q(\blk00000003/sig00000a6e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000af1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a4e ), + .Q(\blk00000003/sig00000da5 ), + .Q15(\NLW_blk00000003/blk00000af1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000af0 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da4 ), + .Q(\blk00000003/sig00000a6d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aef ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a4d ), + .Q(\blk00000003/sig00000da4 ), + .Q15(\NLW_blk00000003/blk00000aef_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aee ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da3 ), + .Q(\blk00000003/sig00000a6f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aed ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a4f ), + .Q(\blk00000003/sig00000da3 ), + .Q15(\NLW_blk00000003/blk00000aed_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aec ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da2 ), + .Q(\blk00000003/sig00000a6c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aeb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a4c ), + .Q(\blk00000003/sig00000da2 ), + .Q15(\NLW_blk00000003/blk00000aeb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aea ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da1 ), + .Q(\blk00000003/sig00000a6b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a4b ), + .Q(\blk00000003/sig00000da1 ), + .Q15(\NLW_blk00000003/blk00000ae9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae8 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000da0 ), + .Q(\blk00000003/sig00000a6a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a4a ), + .Q(\blk00000003/sig00000da0 ), + .Q15(\NLW_blk00000003/blk00000ae7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae6 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000d9f ), + .Q(\blk00000003/sig00000a69 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a49 ), + .Q(\blk00000003/sig00000d9f ), + .Q15(\NLW_blk00000003/blk00000ae5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae4 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000d9e ), + .Q(\blk00000003/sig00000a67 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a47 ), + .Q(\blk00000003/sig00000d9e ), + .Q15(\NLW_blk00000003/blk00000ae3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae2 ( + .C(clk), + .CE(\blk00000003/sig00000c69 ), + .D(\blk00000003/sig00000d9d ), + .Q(\blk00000003/sig00000a68 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ae1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000a48 ), + .Q(\blk00000003/sig00000d9d ), + .Q15(\NLW_blk00000003/blk00000ae1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ae0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d9c ), + .Q(\blk00000003/sig00000a16 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000adf ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002af ), + .Q(\blk00000003/sig00000d9c ), + .Q15(\NLW_blk00000003/blk00000adf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ade ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d9b ), + .Q(\blk00000003/sig00000c62 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000add ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(NlwRenamedSig_OI_rfd), + .A3(NlwRenamedSig_OI_rfd), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000029c ), + .Q(\blk00000003/sig00000d9b ), + .Q15(\NLW_blk00000003/blk00000add_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000adc ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d99 ), + .Q(\blk00000003/sig00000d9a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000adb ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002ea ), + .Q(\blk00000003/sig00000d99 ), + .Q15(\NLW_blk00000003/blk00000adb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ada ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d97 ), + .Q(\blk00000003/sig00000d98 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad9 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e9 ), + .Q(\blk00000003/sig00000d97 ), + .Q15(\NLW_blk00000003/blk00000ad9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad8 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d95 ), + .Q(\blk00000003/sig00000d96 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad7 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e8 ), + .Q(\blk00000003/sig00000d95 ), + .Q15(\NLW_blk00000003/blk00000ad7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad6 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d93 ), + .Q(\blk00000003/sig00000d94 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad5 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e7 ), + .Q(\blk00000003/sig00000d93 ), + .Q15(\NLW_blk00000003/blk00000ad5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad4 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d91 ), + .Q(\blk00000003/sig00000d92 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad3 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e5 ), + .Q(\blk00000003/sig00000d91 ), + .Q15(\NLW_blk00000003/blk00000ad3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad2 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d8f ), + .Q(\blk00000003/sig00000d90 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ad1 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e4 ), + .Q(\blk00000003/sig00000d8f ), + .Q15(\NLW_blk00000003/blk00000ad1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ad0 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d8d ), + .Q(\blk00000003/sig00000d8e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000acf ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e6 ), + .Q(\blk00000003/sig00000d8d ), + .Q15(\NLW_blk00000003/blk00000acf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ace ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d8b ), + .Q(\blk00000003/sig00000d8c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000acd ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e3 ), + .Q(\blk00000003/sig00000d8b ), + .Q15(\NLW_blk00000003/blk00000acd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000acc ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d89 ), + .Q(\blk00000003/sig00000d8a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000acb ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e2 ), + .Q(\blk00000003/sig00000d89 ), + .Q15(\NLW_blk00000003/blk00000acb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aca ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d87 ), + .Q(\blk00000003/sig00000d88 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac9 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e1 ), + .Q(\blk00000003/sig00000d87 ), + .Q15(\NLW_blk00000003/blk00000ac9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac8 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d85 ), + .Q(\blk00000003/sig00000d86 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac7 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002e0 ), + .Q(\blk00000003/sig00000d85 ), + .Q15(\NLW_blk00000003/blk00000ac7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac6 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d83 ), + .Q(\blk00000003/sig00000d84 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac5 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002de ), + .Q(\blk00000003/sig00000d83 ), + .Q15(\NLW_blk00000003/blk00000ac5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac4 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d81 ), + .Q(\blk00000003/sig00000d82 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac3 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002dd ), + .Q(\blk00000003/sig00000d81 ), + .Q15(\NLW_blk00000003/blk00000ac3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac2 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d7f ), + .Q(\blk00000003/sig00000d80 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ac1 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002df ), + .Q(\blk00000003/sig00000d7f ), + .Q15(\NLW_blk00000003/blk00000ac1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ac0 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d7d ), + .Q(\blk00000003/sig00000d7e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000abf ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002dc ), + .Q(\blk00000003/sig00000d7d ), + .Q15(\NLW_blk00000003/blk00000abf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000abe ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d7b ), + .Q(\blk00000003/sig00000d7c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000abd ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002db ), + .Q(\blk00000003/sig00000d7b ), + .Q15(\NLW_blk00000003/blk00000abd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000abc ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d79 ), + .Q(\blk00000003/sig00000d7a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000abb ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002da ), + .Q(\blk00000003/sig00000d79 ), + .Q15(\NLW_blk00000003/blk00000abb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aba ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d77 ), + .Q(\blk00000003/sig00000d78 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab9 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d9 ), + .Q(\blk00000003/sig00000d77 ), + .Q15(\NLW_blk00000003/blk00000ab9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab8 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d75 ), + .Q(\blk00000003/sig00000d76 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab7 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d7 ), + .Q(\blk00000003/sig00000d75 ), + .Q15(\NLW_blk00000003/blk00000ab7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab6 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d73 ), + .Q(\blk00000003/sig00000d74 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab5 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d6 ), + .Q(\blk00000003/sig00000d73 ), + .Q15(\NLW_blk00000003/blk00000ab5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab4 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d71 ), + .Q(\blk00000003/sig00000d72 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab3 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d8 ), + .Q(\blk00000003/sig00000d71 ), + .Q15(\NLW_blk00000003/blk00000ab3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab2 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d6f ), + .Q(\blk00000003/sig00000d70 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000ab1 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d5 ), + .Q(\blk00000003/sig00000d6f ), + .Q15(\NLW_blk00000003/blk00000ab1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000ab0 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d6d ), + .Q(\blk00000003/sig00000d6e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aaf ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d4 ), + .Q(\blk00000003/sig00000d6d ), + .Q15(\NLW_blk00000003/blk00000aaf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aae ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d6b ), + .Q(\blk00000003/sig00000d6c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aad ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d3 ), + .Q(\blk00000003/sig00000d6b ), + .Q15(\NLW_blk00000003/blk00000aad_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aac ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d69 ), + .Q(\blk00000003/sig00000d6a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aab ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d2 ), + .Q(\blk00000003/sig00000d69 ), + .Q15(\NLW_blk00000003/blk00000aab_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aaa ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d67 ), + .Q(\blk00000003/sig00000d68 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa9 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d0 ), + .Q(\blk00000003/sig00000d67 ), + .Q15(\NLW_blk00000003/blk00000aa9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa8 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d65 ), + .Q(\blk00000003/sig00000d66 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa7 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002cf ), + .Q(\blk00000003/sig00000d65 ), + .Q15(\NLW_blk00000003/blk00000aa7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa6 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d63 ), + .Q(\blk00000003/sig00000d64 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa5 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002d1 ), + .Q(\blk00000003/sig00000d63 ), + .Q15(\NLW_blk00000003/blk00000aa5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa4 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d61 ), + .Q(\blk00000003/sig00000d62 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa3 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002ce ), + .Q(\blk00000003/sig00000d61 ), + .Q15(\NLW_blk00000003/blk00000aa3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa2 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d5f ), + .Q(\blk00000003/sig00000d60 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000aa1 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002cd ), + .Q(\blk00000003/sig00000d5f ), + .Q15(\NLW_blk00000003/blk00000aa1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000aa0 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d5d ), + .Q(\blk00000003/sig00000d5e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a9f ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002cc ), + .Q(\blk00000003/sig00000d5d ), + .Q15(\NLW_blk00000003/blk00000a9f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a9e ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d5b ), + .Q(\blk00000003/sig00000d5c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a9d ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002cb ), + .Q(\blk00000003/sig00000d5b ), + .Q15(\NLW_blk00000003/blk00000a9d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a9c ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d59 ), + .Q(\blk00000003/sig00000d5a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a9b ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c9 ), + .Q(\blk00000003/sig00000d59 ), + .Q15(\NLW_blk00000003/blk00000a9b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a9a ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d57 ), + .Q(\blk00000003/sig00000d58 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a99 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c8 ), + .Q(\blk00000003/sig00000d57 ), + .Q15(\NLW_blk00000003/blk00000a99_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a98 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d55 ), + .Q(\blk00000003/sig00000d56 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a97 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002ca ), + .Q(\blk00000003/sig00000d55 ), + .Q15(\NLW_blk00000003/blk00000a97_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a96 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d53 ), + .Q(\blk00000003/sig00000d54 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a95 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c7 ), + .Q(\blk00000003/sig00000d53 ), + .Q15(\NLW_blk00000003/blk00000a95_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a94 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d51 ), + .Q(\blk00000003/sig00000d52 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a93 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c6 ), + .Q(\blk00000003/sig00000d51 ), + .Q15(\NLW_blk00000003/blk00000a93_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a92 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d4f ), + .Q(\blk00000003/sig00000d50 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a91 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c5 ), + .Q(\blk00000003/sig00000d4f ), + .Q15(\NLW_blk00000003/blk00000a91_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a90 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d4d ), + .Q(\blk00000003/sig00000d4e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a8f ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c4 ), + .Q(\blk00000003/sig00000d4d ), + .Q15(\NLW_blk00000003/blk00000a8f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a8e ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d4b ), + .Q(\blk00000003/sig00000d4c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a8d ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c2 ), + .Q(\blk00000003/sig00000d4b ), + .Q15(\NLW_blk00000003/blk00000a8d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a8c ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d49 ), + .Q(\blk00000003/sig00000d4a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a8b ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c1 ), + .Q(\blk00000003/sig00000d49 ), + .Q15(\NLW_blk00000003/blk00000a8b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a8a ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d47 ), + .Q(\blk00000003/sig00000d48 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a89 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c3 ), + .Q(\blk00000003/sig00000d47 ), + .Q15(\NLW_blk00000003/blk00000a89_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a88 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d45 ), + .Q(\blk00000003/sig00000d46 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a87 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002c0 ), + .Q(\blk00000003/sig00000d45 ), + .Q15(\NLW_blk00000003/blk00000a87_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a86 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d43 ), + .Q(\blk00000003/sig00000d44 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a85 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002bf ), + .Q(\blk00000003/sig00000d43 ), + .Q15(\NLW_blk00000003/blk00000a85_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a84 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d41 ), + .Q(\blk00000003/sig00000d42 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a83 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002be ), + .Q(\blk00000003/sig00000d41 ), + .Q15(\NLW_blk00000003/blk00000a83_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a82 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d3f ), + .Q(\blk00000003/sig00000d40 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a81 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002bd ), + .Q(\blk00000003/sig00000d3f ), + .Q15(\NLW_blk00000003/blk00000a81_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a80 ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d3d ), + .Q(\blk00000003/sig00000d3e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a7f ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002bb ), + .Q(\blk00000003/sig00000d3d ), + .Q15(\NLW_blk00000003/blk00000a7f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a7e ( + .C(clk), + .CE(\blk00000003/sig00000c6d ), + .D(\blk00000003/sig00000d3b ), + .Q(\blk00000003/sig00000d3c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a7d ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(NlwRenamedSig_OI_rfd), + .CE(\blk00000003/sig00000c6d ), + .CLK(clk), + .D(\blk00000003/sig000002bc ), + .Q(\blk00000003/sig00000d3b ), + .Q15(\NLW_blk00000003/blk00000a7d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a7c ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d3a ), + .Q(\blk00000003/sig00000b79 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a7b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b69 ), + .Q(\blk00000003/sig00000d3a ), + .Q15(\NLW_blk00000003/blk00000a7b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a7a ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d39 ), + .Q(\blk00000003/sig00000b78 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a79 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b68 ), + .Q(\blk00000003/sig00000d39 ), + .Q15(\NLW_blk00000003/blk00000a79_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a78 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d38 ), + .Q(\blk00000003/sig00000b7a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a77 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b6a ), + .Q(\blk00000003/sig00000d38 ), + .Q15(\NLW_blk00000003/blk00000a77_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a76 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d37 ), + .Q(\blk00000003/sig00000b77 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a75 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b67 ), + .Q(\blk00000003/sig00000d37 ), + .Q15(\NLW_blk00000003/blk00000a75_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a74 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d36 ), + .Q(\blk00000003/sig00000b76 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a73 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b66 ), + .Q(\blk00000003/sig00000d36 ), + .Q15(\NLW_blk00000003/blk00000a73_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a72 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d35 ), + .Q(\blk00000003/sig00000b75 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a71 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b65 ), + .Q(\blk00000003/sig00000d35 ), + .Q15(\NLW_blk00000003/blk00000a71_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a70 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d34 ), + .Q(\blk00000003/sig00000b74 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a6f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b64 ), + .Q(\blk00000003/sig00000d34 ), + .Q15(\NLW_blk00000003/blk00000a6f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a6e ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d33 ), + .Q(\blk00000003/sig00000b73 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a6d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b63 ), + .Q(\blk00000003/sig00000d33 ), + .Q15(\NLW_blk00000003/blk00000a6d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a6c ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d32 ), + .Q(\blk00000003/sig00000b82 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a6b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b72 ), + .Q(\blk00000003/sig00000d32 ), + .Q15(\NLW_blk00000003/blk00000a6b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a6a ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d31 ), + .Q(\blk00000003/sig00000b81 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a69 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b71 ), + .Q(\blk00000003/sig00000d31 ), + .Q15(\NLW_blk00000003/blk00000a69_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a68 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d30 ), + .Q(\blk00000003/sig00000b7f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a67 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b6f ), + .Q(\blk00000003/sig00000d30 ), + .Q15(\NLW_blk00000003/blk00000a67_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a66 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d2f ), + .Q(\blk00000003/sig00000b7e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a65 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b6e ), + .Q(\blk00000003/sig00000d2f ), + .Q15(\NLW_blk00000003/blk00000a65_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a64 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d2e ), + .Q(\blk00000003/sig00000b80 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a63 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b70 ), + .Q(\blk00000003/sig00000d2e ), + .Q15(\NLW_blk00000003/blk00000a63_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a62 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d2d ), + .Q(\blk00000003/sig00000b7d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a61 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b6d ), + .Q(\blk00000003/sig00000d2d ), + .Q15(\NLW_blk00000003/blk00000a61_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a60 ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d2c ), + .Q(\blk00000003/sig00000b7c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a5f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b6c ), + .Q(\blk00000003/sig00000d2c ), + .Q15(\NLW_blk00000003/blk00000a5f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a5e ( + .C(clk), + .CE(\blk00000003/sig00000ca2 ), + .D(\blk00000003/sig00000d2b ), + .Q(\blk00000003/sig00000b7b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a5d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca2 ), + .CLK(clk), + .D(\blk00000003/sig00000b6b ), + .Q(\blk00000003/sig00000d2b ), + .Q15(\NLW_blk00000003/blk00000a5d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a5c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d2a ), + .Q(\blk00000003/sig00000c6e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a5b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000299 ), + .Q(\blk00000003/sig00000d2a ), + .Q15(\NLW_blk00000003/blk00000a5b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a5a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d29 ), + .Q(\blk00000003/sig00000c6f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a59 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000297 ), + .Q(\blk00000003/sig00000d29 ), + .Q15(\NLW_blk00000003/blk00000a59_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a58 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d28 ), + .Q(\blk00000003/sig00000c71 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a57 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000296 ), + .Q(\blk00000003/sig00000d28 ), + .Q15(\NLW_blk00000003/blk00000a57_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a56 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d27 ), + .Q(\blk00000003/sig00000c70 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a55 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000298 ), + .Q(\blk00000003/sig00000d27 ), + .Q15(\NLW_blk00000003/blk00000a55_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a54 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d26 ), + .Q(\blk00000003/sig00000c73 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a53 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000295 ), + .Q(\blk00000003/sig00000d26 ), + .Q15(\NLW_blk00000003/blk00000a53_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a52 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d25 ), + .Q(\blk00000003/sig00000c72 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a51 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000294 ), + .Q(\blk00000003/sig00000d25 ), + .Q15(\NLW_blk00000003/blk00000a51_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a50 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d24 ), + .Q(\blk00000003/sig00000c74 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a4f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000293 ), + .Q(\blk00000003/sig00000d24 ), + .Q15(\NLW_blk00000003/blk00000a4f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a4e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d23 ), + .Q(\blk00000003/sig00000c76 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a4d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000292 ), + .Q(\blk00000003/sig00000d23 ), + .Q15(\NLW_blk00000003/blk00000a4d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a4c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d22 ), + .Q(\blk00000003/sig00000c77 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a4b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000290 ), + .Q(\blk00000003/sig00000d22 ), + .Q15(\NLW_blk00000003/blk00000a4b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a4a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d21 ), + .Q(\blk00000003/sig00000c79 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a49 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028f ), + .Q(\blk00000003/sig00000d21 ), + .Q15(\NLW_blk00000003/blk00000a49_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a48 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d20 ), + .Q(\blk00000003/sig00000c75 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a47 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000291 ), + .Q(\blk00000003/sig00000d20 ), + .Q15(\NLW_blk00000003/blk00000a47_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a46 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d1f ), + .Q(\blk00000003/sig00000c78 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a45 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028e ), + .Q(\blk00000003/sig00000d1f ), + .Q15(\NLW_blk00000003/blk00000a45_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a44 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d1e ), + .Q(\blk00000003/sig00000c7a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a43 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028d ), + .Q(\blk00000003/sig00000d1e ), + .Q15(\NLW_blk00000003/blk00000a43_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a42 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d1d ), + .Q(\blk00000003/sig00000c7c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a41 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028c ), + .Q(\blk00000003/sig00000d1d ), + .Q15(\NLW_blk00000003/blk00000a41_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a40 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d1c ), + .Q(\blk00000003/sig00000c7b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a3f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028b ), + .Q(\blk00000003/sig00000d1c ), + .Q15(\NLW_blk00000003/blk00000a3f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a3e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d1b ), + .Q(\blk00000003/sig00000c7e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a3d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000211 ), + .Q(\blk00000003/sig00000d1b ), + .Q15(\NLW_blk00000003/blk00000a3d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a3c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d1a ), + .Q(\blk00000003/sig00000c7f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a3b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000210 ), + .Q(\blk00000003/sig00000d1a ), + .Q15(\NLW_blk00000003/blk00000a3b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a3a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d19 ), + .Q(\blk00000003/sig00000c7d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a39 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028a ), + .Q(\blk00000003/sig00000d19 ), + .Q15(\NLW_blk00000003/blk00000a39_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a38 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d18 ), + .Q(\blk00000003/sig00000c80 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a37 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020f ), + .Q(\blk00000003/sig00000d18 ), + .Q15(\NLW_blk00000003/blk00000a37_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a36 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d17 ), + .Q(\blk00000003/sig00000c82 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a35 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020e ), + .Q(\blk00000003/sig00000d17 ), + .Q15(\NLW_blk00000003/blk00000a35_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a34 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d16 ), + .Q(\blk00000003/sig00000c81 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a33 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020d ), + .Q(\blk00000003/sig00000d16 ), + .Q15(\NLW_blk00000003/blk00000a33_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a32 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d15 ), + .Q(\blk00000003/sig00000c83 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a31 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020c ), + .Q(\blk00000003/sig00000d15 ), + .Q15(\NLW_blk00000003/blk00000a31_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a30 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d14 ), + .Q(\blk00000003/sig00000c84 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a2f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020a ), + .Q(\blk00000003/sig00000d14 ), + .Q15(\NLW_blk00000003/blk00000a2f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a2e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d13 ), + .Q(\blk00000003/sig00000c86 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a2d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000209 ), + .Q(\blk00000003/sig00000d13 ), + .Q15(\NLW_blk00000003/blk00000a2d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a2c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d12 ), + .Q(\blk00000003/sig00000c85 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a2b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000020b ), + .Q(\blk00000003/sig00000d12 ), + .Q15(\NLW_blk00000003/blk00000a2b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a2a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d11 ), + .Q(\blk00000003/sig00000c88 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a29 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000208 ), + .Q(\blk00000003/sig00000d11 ), + .Q15(\NLW_blk00000003/blk00000a29_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a28 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d10 ), + .Q(\blk00000003/sig00000c87 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a27 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000207 ), + .Q(\blk00000003/sig00000d10 ), + .Q15(\NLW_blk00000003/blk00000a27_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a26 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d0f ), + .Q(\blk00000003/sig00000c89 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a25 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000206 ), + .Q(\blk00000003/sig00000d0f ), + .Q15(\NLW_blk00000003/blk00000a25_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a24 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d0e ), + .Q(\blk00000003/sig00000c8b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a23 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000205 ), + .Q(\blk00000003/sig00000d0e ), + .Q15(\NLW_blk00000003/blk00000a23_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a22 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d0d ), + .Q(\blk00000003/sig00000c8c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a21 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000203 ), + .Q(\blk00000003/sig00000d0d ), + .Q15(\NLW_blk00000003/blk00000a21_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a20 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d0c ), + .Q(\blk00000003/sig00000c8d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a1f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000202 ), + .Q(\blk00000003/sig00000d0c ), + .Q15(\NLW_blk00000003/blk00000a1f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a1e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000d0b ), + .Q(\blk00000003/sig00000c8a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a1d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000204 ), + .Q(\blk00000003/sig00000d0b ), + .Q15(\NLW_blk00000003/blk00000a1d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a1c ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d0a ), + .Q(\blk00000003/sig00000a46 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a1b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a26 ), + .Q(\blk00000003/sig00000d0a ), + .Q15(\NLW_blk00000003/blk00000a1b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a1a ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d09 ), + .Q(\blk00000003/sig00000a45 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a19 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a25 ), + .Q(\blk00000003/sig00000d09 ), + .Q15(\NLW_blk00000003/blk00000a19_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a18 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d08 ), + .Q(\blk00000003/sig00000a43 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a17 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a23 ), + .Q(\blk00000003/sig00000d08 ), + .Q15(\NLW_blk00000003/blk00000a17_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a16 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d07 ), + .Q(\blk00000003/sig00000a42 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a15 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a22 ), + .Q(\blk00000003/sig00000d07 ), + .Q15(\NLW_blk00000003/blk00000a15_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a14 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d06 ), + .Q(\blk00000003/sig00000a44 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a13 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a24 ), + .Q(\blk00000003/sig00000d06 ), + .Q15(\NLW_blk00000003/blk00000a13_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a12 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d05 ), + .Q(\blk00000003/sig00000a41 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a11 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a21 ), + .Q(\blk00000003/sig00000d05 ), + .Q15(\NLW_blk00000003/blk00000a11_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a10 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d04 ), + .Q(\blk00000003/sig00000a40 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a0f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a20 ), + .Q(\blk00000003/sig00000d04 ), + .Q15(\NLW_blk00000003/blk00000a0f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a0e ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d03 ), + .Q(\blk00000003/sig00000a3f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a0d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a1f ), + .Q(\blk00000003/sig00000d03 ), + .Q15(\NLW_blk00000003/blk00000a0d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a0c ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d02 ), + .Q(\blk00000003/sig00000a3e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a0b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a1e ), + .Q(\blk00000003/sig00000d02 ), + .Q15(\NLW_blk00000003/blk00000a0b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a0a ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d01 ), + .Q(\blk00000003/sig00000a3c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a09 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a1c ), + .Q(\blk00000003/sig00000d01 ), + .Q15(\NLW_blk00000003/blk00000a09_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a08 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000d00 ), + .Q(\blk00000003/sig00000a3b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a07 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a1b ), + .Q(\blk00000003/sig00000d00 ), + .Q15(\NLW_blk00000003/blk00000a07_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a06 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000cff ), + .Q(\blk00000003/sig00000a3d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a05 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a1d ), + .Q(\blk00000003/sig00000cff ), + .Q15(\NLW_blk00000003/blk00000a05_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a04 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000cfe ), + .Q(\blk00000003/sig00000a3a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a03 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a1a ), + .Q(\blk00000003/sig00000cfe ), + .Q15(\NLW_blk00000003/blk00000a03_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a02 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000cfd ), + .Q(\blk00000003/sig00000a39 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000a01 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a19 ), + .Q(\blk00000003/sig00000cfd ), + .Q15(\NLW_blk00000003/blk00000a01_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000a00 ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000cfc ), + .Q(\blk00000003/sig00000a38 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ff ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a18 ), + .Q(\blk00000003/sig00000cfc ), + .Q15(\NLW_blk00000003/blk000009ff_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009fe ( + .C(clk), + .CE(\blk00000003/sig00000ca1 ), + .D(\blk00000003/sig00000cfb ), + .Q(\blk00000003/sig00000a37 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009fd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000ca1 ), + .CLK(clk), + .D(\blk00000003/sig00000a17 ), + .Q(\blk00000003/sig00000cfb ), + .Q15(\NLW_blk00000003/blk000009fd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009fc ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cfa ), + .Q(\blk00000003/sig00000a56 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009fb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a36 ), + .Q(\blk00000003/sig00000cfa ), + .Q15(\NLW_blk00000003/blk000009fb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009fa ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf9 ), + .Q(\blk00000003/sig00000a55 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a35 ), + .Q(\blk00000003/sig00000cf9 ), + .Q15(\NLW_blk00000003/blk000009f9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f8 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf8 ), + .Q(\blk00000003/sig00000a54 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a34 ), + .Q(\blk00000003/sig00000cf8 ), + .Q15(\NLW_blk00000003/blk000009f7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f6 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf7 ), + .Q(\blk00000003/sig00000a53 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a33 ), + .Q(\blk00000003/sig00000cf7 ), + .Q15(\NLW_blk00000003/blk000009f5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f4 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf6 ), + .Q(\blk00000003/sig00000a52 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a32 ), + .Q(\blk00000003/sig00000cf6 ), + .Q15(\NLW_blk00000003/blk000009f3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f2 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf5 ), + .Q(\blk00000003/sig00000a50 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009f1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a30 ), + .Q(\blk00000003/sig00000cf5 ), + .Q15(\NLW_blk00000003/blk000009f1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009f0 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf4 ), + .Q(\blk00000003/sig00000a4f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ef ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a2f ), + .Q(\blk00000003/sig00000cf4 ), + .Q15(\NLW_blk00000003/blk000009ef_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ee ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf3 ), + .Q(\blk00000003/sig00000a51 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ed ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a31 ), + .Q(\blk00000003/sig00000cf3 ), + .Q15(\NLW_blk00000003/blk000009ed_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ec ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf2 ), + .Q(\blk00000003/sig00000a4e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009eb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a2e ), + .Q(\blk00000003/sig00000cf2 ), + .Q15(\NLW_blk00000003/blk000009eb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ea ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf1 ), + .Q(\blk00000003/sig00000a4d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a2d ), + .Q(\blk00000003/sig00000cf1 ), + .Q15(\NLW_blk00000003/blk000009e9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e8 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cf0 ), + .Q(\blk00000003/sig00000a4c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a2c ), + .Q(\blk00000003/sig00000cf0 ), + .Q15(\NLW_blk00000003/blk000009e7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e6 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cef ), + .Q(\blk00000003/sig00000a4b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a2b ), + .Q(\blk00000003/sig00000cef ), + .Q15(\NLW_blk00000003/blk000009e5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e4 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cee ), + .Q(\blk00000003/sig00000a49 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a29 ), + .Q(\blk00000003/sig00000cee ), + .Q15(\NLW_blk00000003/blk000009e3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e2 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000ced ), + .Q(\blk00000003/sig00000a48 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009e1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a28 ), + .Q(\blk00000003/sig00000ced ), + .Q15(\NLW_blk00000003/blk000009e1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009e0 ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000cec ), + .Q(\blk00000003/sig00000a4a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009df ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a2a ), + .Q(\blk00000003/sig00000cec ), + .Q15(\NLW_blk00000003/blk000009df_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009de ( + .C(clk), + .CE(\blk00000003/sig00000c68 ), + .D(\blk00000003/sig00000ceb ), + .Q(\blk00000003/sig00000a47 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009dd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(\blk00000003/sig00000c68 ), + .CLK(clk), + .D(\blk00000003/sig00000a27 ), + .Q(\blk00000003/sig00000ceb ), + .Q15(\NLW_blk00000003/blk000009dd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cea ), + .Q(\blk00000003/sig00000ac6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009db ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002ea ), + .Q(\blk00000003/sig00000cea ), + .Q15(\NLW_blk00000003/blk000009db_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009da ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce9 ), + .Q(\blk00000003/sig00000ac5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d9 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e9 ), + .Q(\blk00000003/sig00000ce9 ), + .Q15(\NLW_blk00000003/blk000009d9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce8 ), + .Q(\blk00000003/sig00000ac4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d7 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e8 ), + .Q(\blk00000003/sig00000ce8 ), + .Q15(\NLW_blk00000003/blk000009d7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce7 ), + .Q(\blk00000003/sig00000ac2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d5 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e6 ), + .Q(\blk00000003/sig00000ce7 ), + .Q15(\NLW_blk00000003/blk000009d5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce6 ), + .Q(\blk00000003/sig00000ac1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d3 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e5 ), + .Q(\blk00000003/sig00000ce6 ), + .Q15(\NLW_blk00000003/blk000009d3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce5 ), + .Q(\blk00000003/sig00000ac3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009d1 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e7 ), + .Q(\blk00000003/sig00000ce5 ), + .Q15(\NLW_blk00000003/blk000009d1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce4 ), + .Q(\blk00000003/sig00000ac0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009cf ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e4 ), + .Q(\blk00000003/sig00000ce4 ), + .Q15(\NLW_blk00000003/blk000009cf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce3 ), + .Q(\blk00000003/sig00000abf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009cd ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e3 ), + .Q(\blk00000003/sig00000ce3 ), + .Q15(\NLW_blk00000003/blk000009cd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce2 ), + .Q(\blk00000003/sig00000abe ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009cb ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e2 ), + .Q(\blk00000003/sig00000ce2 ), + .Q15(\NLW_blk00000003/blk000009cb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce1 ), + .Q(\blk00000003/sig00000abd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c9 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e1 ), + .Q(\blk00000003/sig00000ce1 ), + .Q15(\NLW_blk00000003/blk000009c9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ce0 ), + .Q(\blk00000003/sig00000abb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c7 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002df ), + .Q(\blk00000003/sig00000ce0 ), + .Q15(\NLW_blk00000003/blk000009c7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cdf ), + .Q(\blk00000003/sig00000aba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c5 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002de ), + .Q(\blk00000003/sig00000cdf ), + .Q15(\NLW_blk00000003/blk000009c5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cde ), + .Q(\blk00000003/sig00000abc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c3 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e0 ), + .Q(\blk00000003/sig00000cde ), + .Q15(\NLW_blk00000003/blk000009c3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cdd ), + .Q(\blk00000003/sig00000ab9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009c1 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002dd ), + .Q(\blk00000003/sig00000cdd ), + .Q15(\NLW_blk00000003/blk000009c1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cdc ), + .Q(\blk00000003/sig00000ab8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009bf ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002dc ), + .Q(\blk00000003/sig00000cdc ), + .Q15(\NLW_blk00000003/blk000009bf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009be ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cdb ), + .Q(\blk00000003/sig00000ab7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009bd ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002db ), + .Q(\blk00000003/sig00000cdb ), + .Q15(\NLW_blk00000003/blk000009bd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cda ), + .Q(\blk00000003/sig00000bba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009bb ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002da ), + .Q(\blk00000003/sig00000cda ), + .Q15(\NLW_blk00000003/blk000009bb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd9 ), + .Q(\blk00000003/sig00000bb8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b9 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d8 ), + .Q(\blk00000003/sig00000cd9 ), + .Q15(\NLW_blk00000003/blk000009b9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd8 ), + .Q(\blk00000003/sig00000bb7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b7 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d7 ), + .Q(\blk00000003/sig00000cd8 ), + .Q15(\NLW_blk00000003/blk000009b7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd7 ), + .Q(\blk00000003/sig00000bb9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b5 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d9 ), + .Q(\blk00000003/sig00000cd7 ), + .Q15(\NLW_blk00000003/blk000009b5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd6 ), + .Q(\blk00000003/sig00000bb6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b3 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d6 ), + .Q(\blk00000003/sig00000cd6 ), + .Q15(\NLW_blk00000003/blk000009b3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd5 ), + .Q(\blk00000003/sig00000bb5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009b1 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d5 ), + .Q(\blk00000003/sig00000cd5 ), + .Q15(\NLW_blk00000003/blk000009b1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd4 ), + .Q(\blk00000003/sig00000bb4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009af ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d4 ), + .Q(\blk00000003/sig00000cd4 ), + .Q15(\NLW_blk00000003/blk000009af_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd3 ), + .Q(\blk00000003/sig00000bb3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ad ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d3 ), + .Q(\blk00000003/sig00000cd3 ), + .Q15(\NLW_blk00000003/blk000009ad_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd2 ), + .Q(\blk00000003/sig00000ae5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009ab ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d1 ), + .Q(\blk00000003/sig00000cd2 ), + .Q15(\NLW_blk00000003/blk000009ab_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd1 ), + .Q(\blk00000003/sig00000ae4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a9 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d0 ), + .Q(\blk00000003/sig00000cd1 ), + .Q15(\NLW_blk00000003/blk000009a9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cd0 ), + .Q(\blk00000003/sig00000ae6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a7 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d2 ), + .Q(\blk00000003/sig00000cd0 ), + .Q15(\NLW_blk00000003/blk000009a7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ccf ), + .Q(\blk00000003/sig00000ae3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a5 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002cf ), + .Q(\blk00000003/sig00000ccf ), + .Q15(\NLW_blk00000003/blk000009a5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cce ), + .Q(\blk00000003/sig00000ae2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a3 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002ce ), + .Q(\blk00000003/sig00000cce ), + .Q15(\NLW_blk00000003/blk000009a3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ccd ), + .Q(\blk00000003/sig00000ae1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000009a1 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002cd ), + .Q(\blk00000003/sig00000ccd ), + .Q15(\NLW_blk00000003/blk000009a1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000009a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ccc ), + .Q(\blk00000003/sig00000ae0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000099f ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002cc ), + .Q(\blk00000003/sig00000ccc ), + .Q15(\NLW_blk00000003/blk0000099f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000099e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ccb ), + .Q(\blk00000003/sig00000ade ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000099d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002ca ), + .Q(\blk00000003/sig00000ccb ), + .Q15(\NLW_blk00000003/blk0000099d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000099c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cca ), + .Q(\blk00000003/sig00000add ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000099b ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c9 ), + .Q(\blk00000003/sig00000cca ), + .Q15(\NLW_blk00000003/blk0000099b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000099a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc9 ), + .Q(\blk00000003/sig00000adf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000999 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002cb ), + .Q(\blk00000003/sig00000cc9 ), + .Q15(\NLW_blk00000003/blk00000999_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000998 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc8 ), + .Q(\blk00000003/sig00000adc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000997 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c8 ), + .Q(\blk00000003/sig00000cc8 ), + .Q15(\NLW_blk00000003/blk00000997_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000996 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc7 ), + .Q(\blk00000003/sig00000adb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000995 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c7 ), + .Q(\blk00000003/sig00000cc7 ), + .Q15(\NLW_blk00000003/blk00000995_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000994 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc6 ), + .Q(\blk00000003/sig00000ada ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000993 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c6 ), + .Q(\blk00000003/sig00000cc6 ), + .Q15(\NLW_blk00000003/blk00000993_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000992 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc5 ), + .Q(\blk00000003/sig00000ad9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000991 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c5 ), + .Q(\blk00000003/sig00000cc5 ), + .Q15(\NLW_blk00000003/blk00000991_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000990 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc4 ), + .Q(\blk00000003/sig00000ad7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000098f ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c3 ), + .Q(\blk00000003/sig00000cc4 ), + .Q15(\NLW_blk00000003/blk0000098f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000098e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc3 ), + .Q(\blk00000003/sig00000bca ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000098d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c2 ), + .Q(\blk00000003/sig00000cc3 ), + .Q15(\NLW_blk00000003/blk0000098d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000098c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc2 ), + .Q(\blk00000003/sig00000ad8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000098b ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c4 ), + .Q(\blk00000003/sig00000cc2 ), + .Q15(\NLW_blk00000003/blk0000098b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000098a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc1 ), + .Q(\blk00000003/sig00000bc9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000989 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c1 ), + .Q(\blk00000003/sig00000cc1 ), + .Q15(\NLW_blk00000003/blk00000989_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000988 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cc0 ), + .Q(\blk00000003/sig00000bc8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000987 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c0 ), + .Q(\blk00000003/sig00000cc0 ), + .Q15(\NLW_blk00000003/blk00000987_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000986 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cbf ), + .Q(\blk00000003/sig00000bc7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000985 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002bf ), + .Q(\blk00000003/sig00000cbf ), + .Q15(\NLW_blk00000003/blk00000985_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000984 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cbe ), + .Q(\blk00000003/sig00000bc6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000983 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002be ), + .Q(\blk00000003/sig00000cbe ), + .Q15(\NLW_blk00000003/blk00000983_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000982 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cbd ), + .Q(\blk00000003/sig00000bc4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000981 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002bc ), + .Q(\blk00000003/sig00000cbd ), + .Q15(\NLW_blk00000003/blk00000981_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000980 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cbc ), + .Q(\blk00000003/sig00000bc3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000097f ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002bb ), + .Q(\blk00000003/sig00000cbc ), + .Q15(\NLW_blk00000003/blk0000097f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000097e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cbb ), + .Q(\blk00000003/sig00000bc5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000097d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002bd ), + .Q(\blk00000003/sig00000cbb ), + .Q15(\NLW_blk00000003/blk0000097d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000097c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cba ), + .Q(\blk00000003/sig00000378 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000097b ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002a6 ), + .Q(\blk00000003/sig00000cba ), + .Q15(\NLW_blk00000003/blk0000097b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000097a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb9 ), + .Q(\blk00000003/sig00000379 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000979 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000373 ), + .Q(\blk00000003/sig00000cb9 ), + .Q15(\NLW_blk00000003/blk00000979_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000978 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb8 ), + .Q(\blk00000003/sig00000c66 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000977 ( + .A0(\blk00000003/sig00000049 ), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002a2 ), + .Q(\blk00000003/sig00000cb8 ), + .Q15(\NLW_blk00000003/blk00000977_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000976 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb7 ), + .Q(\blk00000003/sig00000b08 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000975 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[0]), + .Q(\blk00000003/sig00000cb7 ), + .Q15(\NLW_blk00000003/blk00000975_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000974 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb6 ), + .Q(\blk00000003/sig00000b06 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000973 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[2]), + .Q(\blk00000003/sig00000cb6 ), + .Q15(\NLW_blk00000003/blk00000973_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000972 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb5 ), + .Q(\blk00000003/sig00000b05 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000971 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[3]), + .Q(\blk00000003/sig00000cb5 ), + .Q15(\NLW_blk00000003/blk00000971_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000970 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb4 ), + .Q(\blk00000003/sig00000b07 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000096f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[1]), + .Q(\blk00000003/sig00000cb4 ), + .Q15(\NLW_blk00000003/blk0000096f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000096e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb3 ), + .Q(\blk00000003/sig00000b04 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000096d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[4]), + .Q(\blk00000003/sig00000cb3 ), + .Q15(\NLW_blk00000003/blk0000096d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000096c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb2 ), + .Q(\blk00000003/sig00000b03 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000096b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[5]), + .Q(\blk00000003/sig00000cb2 ), + .Q15(\NLW_blk00000003/blk0000096b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000096a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb1 ), + .Q(\blk00000003/sig00000b02 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000969 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[6]), + .Q(\blk00000003/sig00000cb1 ), + .Q15(\NLW_blk00000003/blk00000969_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000968 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cb0 ), + .Q(\blk00000003/sig00000b01 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000967 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[7]), + .Q(\blk00000003/sig00000cb0 ), + .Q15(\NLW_blk00000003/blk00000967_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000966 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000caf ), + .Q(\blk00000003/sig00000aff ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000965 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[9]), + .Q(\blk00000003/sig00000caf ), + .Q15(\NLW_blk00000003/blk00000965_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000964 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cae ), + .Q(\blk00000003/sig00000afe ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000963 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[10]), + .Q(\blk00000003/sig00000cae ), + .Q15(\NLW_blk00000003/blk00000963_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000962 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cad ), + .Q(\blk00000003/sig00000b00 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000961 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[8]), + .Q(\blk00000003/sig00000cad ), + .Q15(\NLW_blk00000003/blk00000961_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000960 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cac ), + .Q(\blk00000003/sig00000afd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000095f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[11]), + .Q(\blk00000003/sig00000cac ), + .Q15(\NLW_blk00000003/blk0000095f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000095e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000cab ), + .Q(\blk00000003/sig00000afc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000095d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[12]), + .Q(\blk00000003/sig00000cab ), + .Q15(\NLW_blk00000003/blk0000095d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000095c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000caa ), + .Q(\blk00000003/sig00000afb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000095b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[13]), + .Q(\blk00000003/sig00000caa ), + .Q15(\NLW_blk00000003/blk0000095b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000095a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ca9 ), + .Q(\blk00000003/sig00000afa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000959 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[14]), + .Q(\blk00000003/sig00000ca9 ), + .Q15(\NLW_blk00000003/blk00000959_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000958 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ca8 ), + .Q(\blk00000003/sig00000af8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000957 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[16]), + .Q(\blk00000003/sig00000ca8 ), + .Q15(\NLW_blk00000003/blk00000957_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000956 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ca7 ), + .Q(\blk00000003/sig00000af7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000955 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[17]), + .Q(\blk00000003/sig00000ca7 ), + .Q15(\NLW_blk00000003/blk00000955_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000954 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ca6 ), + .Q(\blk00000003/sig00000af9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000953 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[15]), + .Q(\blk00000003/sig00000ca6 ), + .Q15(\NLW_blk00000003/blk00000953_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000952 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ca5 ), + .Q(\blk00000003/sig000002af ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000951 ( + .A0(NlwRenamedSig_OI_rfd), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002b1 ), + .Q(\blk00000003/sig00000ca5 ), + .Q15(\NLW_blk00000003/blk00000951_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000950 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ca4 ), + .Q(\blk00000003/sig00000a15 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000094f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(NlwRenamedSig_OI_rfd), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002a8 ), + .Q(\blk00000003/sig00000ca4 ), + .Q15(\NLW_blk00000003/blk0000094f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000094e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000ca3 ), + .Q(\blk00000003/sig00000bd5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000094d ( + .A0(NlwRenamedSig_OI_rfd), + .A1(NlwRenamedSig_OI_rfd), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002a0 ), + .Q(\blk00000003/sig00000ca3 ), + .Q15(\NLW_blk00000003/blk0000094d_Q15_UNCONNECTED ) + ); + INV \blk00000003/blk0000094c ( + .I(\blk00000003/sig00000318 ), + .O(\blk00000003/sig0000034a ) + ); + INV \blk00000003/blk0000094b ( + .I(\blk00000003/sig000002f4 ), + .O(\blk00000003/sig00000306 ) + ); + INV \blk00000003/blk0000094a ( + .I(\blk00000003/sig00000353 ), + .O(\blk00000003/sig00000343 ) + ); + INV \blk00000003/blk00000949 ( + .I(\blk00000003/sig0000035a ), + .O(\blk00000003/sig00000349 ) + ); + INV \blk00000003/blk00000948 ( + .I(\blk00000003/sig000002a0 ), + .O(\blk00000003/sig00000358 ) + ); + INV \blk00000003/blk00000947 ( + .I(\blk00000003/sig00000be7 ), + .O(\blk00000003/sig00000c60 ) + ); + INV \blk00000003/blk00000946 ( + .I(\blk00000003/sig0000031c ), + .O(\blk00000003/sig0000035b ) + ); + INV \blk00000003/blk00000945 ( + .I(\blk00000003/sig00000318 ), + .O(\blk00000003/sig00000344 ) + ); + INV \blk00000003/blk00000944 ( + .I(\blk00000003/sig000002ee ), + .O(\blk00000003/sig0000031d ) + ); + INV \blk00000003/blk00000943 ( + .I(\blk00000003/sig000002f4 ), + .O(\blk00000003/sig00000304 ) + ); + INV \blk00000003/blk00000942 ( + .I(\blk00000003/sig0000029e ), + .O(\blk00000003/sig0000016e ) + ); + INV \blk00000003/blk00000941 ( + .I(\blk00000003/sig00000161 ), + .O(\blk00000003/sig0000029d ) + ); + INV \blk00000003/blk00000940 ( + .I(\blk00000003/sig0000016b ), + .O(\blk00000003/sig0000016c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000093f ( + .I0(ce), + .I1(\blk00000003/sig000009f8 ), + .O(\blk00000003/sig00000bd3 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000093e ( + .I0(ce), + .I1(\blk00000003/sig000009f8 ), + .O(\blk00000003/sig00000bd4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000093d ( + .I0(ce), + .I1(\blk00000003/sig000009f8 ), + .O(\blk00000003/sig00000ca2 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000093c ( + .I0(ce), + .I1(\blk00000003/sig000009f8 ), + .O(\blk00000003/sig00000ca1 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000093b ( + .I0(ce), + .I1(\blk00000003/sig00000a0f ), + .O(\blk00000003/sig00000ca0 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000093a ( + .I0(ce), + .I1(\blk00000003/sig00000a0f ), + .O(\blk00000003/sig00000c9f ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000939 ( + .I0(ce), + .I1(\blk00000003/sig00000a0a ), + .O(\blk00000003/sig00000c9e ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000938 ( + .I0(ce), + .I1(\blk00000003/sig00000a0a ), + .O(\blk00000003/sig00000c9d ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000937 ( + .I0(ce), + .I1(\blk00000003/sig00000a03 ), + .O(\blk00000003/sig00000c9c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000936 ( + .I0(ce), + .I1(\blk00000003/sig00000a03 ), + .O(\blk00000003/sig00000c9b ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000935 ( + .I0(ce), + .I1(\blk00000003/sig000009f7 ), + .O(\blk00000003/sig00000c9a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000934 ( + .I0(ce), + .I1(\blk00000003/sig000009f7 ), + .O(\blk00000003/sig00000c99 ) + ); + LUT3 #( + .INIT ( 8'h20 )) + \blk00000003/blk00000933 ( + .I0(\blk00000003/sig0000030e ), + .I1(\blk00000003/sig00000325 ), + .I2(coef_ld), + .O(\blk00000003/sig00000321 ) + ); + LUT5 #( + .INIT ( 32'h4F444444 )) + \blk00000003/blk00000932 ( + .I0(\blk00000003/sig00000322 ), + .I1(\blk00000003/sig00000316 ), + .I2(\blk00000003/sig00000325 ), + .I3(coef_ld), + .I4(\blk00000003/sig0000030e ), + .O(\blk00000003/sig00000319 ) + ); + LUT4 #( + .INIT ( 16'h1000 )) + \blk00000003/blk00000931 ( + .I0(coef_ld), + .I1(\blk00000003/sig00000310 ), + .I2(coef_we), + .I3(\blk00000003/sig0000030e ), + .O(\blk00000003/sig00000320 ) + ); + LUT5 #( + .INIT ( 32'h20AA2020 )) + \blk00000003/blk00000930 ( + .I0(\blk00000003/sig0000030e ), + .I1(\blk00000003/sig00000310 ), + .I2(coef_we), + .I3(\blk00000003/sig00000325 ), + .I4(coef_ld), + .O(\blk00000003/sig0000031f ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk0000092f ( + .I0(ce), + .I1(sclr), + .I2(\blk00000003/sig00000c67 ), + .O(\blk00000003/sig00000c90 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk0000092e ( + .I0(\blk00000003/sig00000353 ), + .I1(ce), + .I2(\blk00000003/sig00000316 ), + .I3(\blk00000003/sig000002ec ), + .O(\blk00000003/sig00000c98 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk0000092d ( + .I0(\blk00000003/sig0000035a ), + .I1(ce), + .I2(\blk00000003/sig00000314 ), + .I3(\blk00000003/sig0000034b ), + .O(\blk00000003/sig00000c97 ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk0000092c ( + .I0(\blk00000003/sig00000c64 ), + .I1(ce), + .I2(\blk00000003/sig000002a6 ), + .I3(\blk00000003/sig000002a8 ), + .O(\blk00000003/sig00000c92 ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk0000092b ( + .I0(ce), + .I1(\blk00000003/sig00000325 ), + .I2(\blk00000003/sig00000c65 ), + .O(\blk00000003/sig00000c8f ) + ); + LUT4 #( + .INIT ( 16'h6AAA )) + \blk00000003/blk0000092a ( + .I0(\blk00000003/sig000002b3 ), + .I1(\blk00000003/sig000002a8 ), + .I2(\blk00000003/sig00000c94 ), + .I3(ce), + .O(\blk00000003/sig00000c96 ) + ); + LUT5 #( + .INIT ( 32'h7FFF8000 )) + \blk00000003/blk00000929 ( + .I0(nd), + .I1(ce), + .I2(\blk00000003/sig00000159 ), + .I3(\blk00000003/sig00000c63 ), + .I4(\blk00000003/sig000002b8 ), + .O(\blk00000003/sig00000c95 ) + ); + LUT3 #( + .INIT ( 8'h6C )) + \blk00000003/blk00000928 ( + .I0(\blk00000003/sig000002a8 ), + .I1(\blk00000003/sig00000c94 ), + .I2(ce), + .O(\blk00000003/sig00000c93 ) + ); + LUT4 #( + .INIT ( 16'h6AAA )) + \blk00000003/blk00000927 ( + .I0(\blk00000003/sig00000c63 ), + .I1(\blk00000003/sig00000159 ), + .I2(ce), + .I3(nd), + .O(\blk00000003/sig00000c91 ) + ); + LUT4 #( + .INIT ( 16'hEAAA )) + \blk00000003/blk00000926 ( + .I0(\blk00000003/sig00000330 ), + .I1(\blk00000003/sig000002f8 ), + .I2(coef_we), + .I3(\blk00000003/sig00000302 ), + .O(\blk00000003/sig0000032a ) + ); + LUT4 #( + .INIT ( 16'hEAAA )) + \blk00000003/blk00000925 ( + .I0(\blk00000003/sig00000331 ), + .I1(\blk00000003/sig000002f8 ), + .I2(coef_we), + .I3(\blk00000003/sig00000302 ), + .O(\blk00000003/sig0000032d ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk00000924 ( + .C(clk), + .D(\blk00000003/sig00000c98 ), + .Q(\blk00000003/sig00000353 ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk00000923 ( + .C(clk), + .D(\blk00000003/sig00000c97 ), + .Q(\blk00000003/sig0000035a ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk00000922 ( + .C(clk), + .D(\blk00000003/sig00000c96 ), + .R(sclr), + .Q(\blk00000003/sig000002b3 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk00000921 ( + .C(clk), + .D(\blk00000003/sig00000c95 ), + .R(sclr), + .Q(\blk00000003/sig000002b8 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk00000920 ( + .C(clk), + .D(\blk00000003/sig00000c93 ), + .R(sclr), + .Q(\blk00000003/sig00000c94 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk0000091f ( + .C(clk), + .D(\blk00000003/sig00000c92 ), + .R(sclr), + .Q(\blk00000003/sig00000c64 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk0000091e ( + .C(clk), + .D(\blk00000003/sig00000c91 ), + .R(sclr), + .Q(\blk00000003/sig00000c63 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000091d ( + .I0(\blk00000003/sig00000beb ), + .O(\blk00000003/sig00000be5 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000091c ( + .I0(\blk00000003/sig00000bea ), + .O(\blk00000003/sig00000be2 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000091b ( + .I0(\blk00000003/sig00000be9 ), + .O(\blk00000003/sig00000bdf ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000091a ( + .I0(\blk00000003/sig00000be8 ), + .O(\blk00000003/sig00000bdc ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000919 ( + .I0(\blk00000003/sig00000be7 ), + .O(\blk00000003/sig00000bd9 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000918 ( + .I0(\blk00000003/sig00000375 ), + .O(\blk00000003/sig00000376 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000917 ( + .I0(\blk00000003/sig00000369 ), + .O(\blk00000003/sig00000363 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000916 ( + .I0(\blk00000003/sig00000334 ), + .O(\blk00000003/sig00000335 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000915 ( + .I0(\blk00000003/sig0000029e ), + .O(\blk00000003/sig0000016f ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000914 ( + .I0(\blk00000003/sig00000c63 ), + .O(\blk00000003/sig00000160 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000913 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c5a ), + .R(sclr), + .Q(\blk00000003/sig00000c5f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000912 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c57 ), + .R(sclr), + .Q(\blk00000003/sig00000c5e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000911 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c54 ), + .R(sclr), + .Q(\blk00000003/sig00000c5d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000910 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c51 ), + .R(sclr), + .Q(\blk00000003/sig00000c5c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000090f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c4e ), + .R(sclr), + .Q(\blk00000003/sig00000c5b ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000090e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bd7 ), + .S(sclr), + .Q(\blk00000003/sig00000bec ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000090d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000be6 ), + .R(sclr), + .Q(\blk00000003/sig00000beb ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000090c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000be3 ), + .S(sclr), + .Q(\blk00000003/sig00000bea ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000090b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000be0 ), + .S(sclr), + .Q(\blk00000003/sig00000be9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000090a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bdd ), + .R(sclr), + .Q(\blk00000003/sig00000be8 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000909 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bda ), + .S(sclr), + .Q(\blk00000003/sig00000be7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000908 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000377 ), + .R(\blk00000003/sig0000037a ), + .Q(\blk00000003/sig00000375 ) + ); + FDR \blk00000003/blk00000907 ( + .C(clk), + .D(\blk00000003/sig00000c90 ), + .R(ce), + .Q(\blk00000003/sig00000c67 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000906 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000371 ), + .R(\blk00000003/sig00000379 ), + .Q(\blk00000003/sig0000036f ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000905 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000036c ), + .S(\blk00000003/sig00000379 ), + .Q(\blk00000003/sig0000036a ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000904 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000364 ), + .S(sclr), + .Q(\blk00000003/sig00000369 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000903 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000367 ), + .R(sclr), + .Q(\blk00000003/sig00000368 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000902 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000035e ), + .R(sclr), + .Q(\blk00000003/sig000002ba ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000901 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000361 ), + .R(sclr), + .Q(\blk00000003/sig000002b9 ) + ); + FDR \blk00000003/blk00000900 ( + .C(clk), + .D(\blk00000003/sig00000c8f ), + .R(ce), + .Q(\blk00000003/sig00000c65 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000336 ), + .R(\blk00000003/sig00000339 ), + .Q(\blk00000003/sig00000334 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000328 ), + .R(coef_ld), + .Q(\blk00000003/sig00000332 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000032e ), + .R(coef_ld), + .Q(\blk00000003/sig00000331 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000032b ), + .R(coef_ld), + .Q(\blk00000003/sig00000330 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002f6 ), + .R(coef_ld), + .Q(\blk00000003/sig000002f4 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk000008fa ( + .I0(\blk00000003/sig0000016b ), + .I1(sclr), + .O(\blk00000003/sig00000c8e ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk000008f9 ( + .C(clk), + .D(\blk00000003/sig00000c8e ), + .Q(\blk00000003/sig0000016b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000008f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000163 ), + .R(sclr), + .Q(\blk00000003/sig00000161 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000008f7 ( + .I0(\blk00000003/sig00000c5b ), + .I1(\blk00000003/sig00000be7 ), + .O(\blk00000003/sig00000c4d ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000008f6 ( + .I0(\blk00000003/sig00000c5c ), + .I1(\blk00000003/sig00000be7 ), + .O(\blk00000003/sig00000c50 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000008f5 ( + .I0(\blk00000003/sig00000c5d ), + .I1(\blk00000003/sig00000be7 ), + .O(\blk00000003/sig00000c53 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000008f4 ( + .I0(\blk00000003/sig00000c5e ), + .I1(\blk00000003/sig00000be7 ), + .O(\blk00000003/sig00000c56 ) + ); + LUT3 #( + .INIT ( 8'hDE )) + \blk00000003/blk000008f3 ( + .I0(\blk00000003/sig00000c5f ), + .I1(\blk00000003/sig00000be7 ), + .I2(\blk00000003/sig000002ad ), + .O(\blk00000003/sig00000c59 ) + ); + LUT3 #( + .INIT ( 8'h04 )) + \blk00000003/blk000008f2 ( + .I0(\blk00000003/sig000002ad ), + .I1(\blk00000003/sig0000004a ), + .I2(\blk00000003/sig00000be7 ), + .O(\blk00000003/sig00000c4b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008f1 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000de ), + .I3(NlwRenamedSig_OI_dout_2[45]), + .O(\blk00000003/sig00000c49 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008f0 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000dd ), + .I3(NlwRenamedSig_OI_dout_2[46]), + .O(\blk00000003/sig00000c4a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ef ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000df ), + .I3(NlwRenamedSig_OI_dout_2[44]), + .O(\blk00000003/sig00000c48 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ee ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e1 ), + .I3(NlwRenamedSig_OI_dout_2[42]), + .O(\blk00000003/sig00000c46 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ed ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e0 ), + .I3(NlwRenamedSig_OI_dout_2[43]), + .O(\blk00000003/sig00000c47 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ec ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e2 ), + .I3(NlwRenamedSig_OI_dout_2[41]), + .O(\blk00000003/sig00000c45 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008eb ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e4 ), + .I3(NlwRenamedSig_OI_dout_2[39]), + .O(\blk00000003/sig00000c43 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ea ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e3 ), + .I3(NlwRenamedSig_OI_dout_2[40]), + .O(\blk00000003/sig00000c44 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e9 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e5 ), + .I3(NlwRenamedSig_OI_dout_2[38]), + .O(\blk00000003/sig00000c42 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e8 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e7 ), + .I3(NlwRenamedSig_OI_dout_2[36]), + .O(\blk00000003/sig00000c40 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e7 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e6 ), + .I3(NlwRenamedSig_OI_dout_2[37]), + .O(\blk00000003/sig00000c41 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e6 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e8 ), + .I3(NlwRenamedSig_OI_dout_2[35]), + .O(\blk00000003/sig00000c3f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e5 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000ea ), + .I3(NlwRenamedSig_OI_dout_2[33]), + .O(\blk00000003/sig00000c3d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e4 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000e9 ), + .I3(NlwRenamedSig_OI_dout_2[34]), + .O(\blk00000003/sig00000c3e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e3 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000eb ), + .I3(NlwRenamedSig_OI_dout_2[32]), + .O(\blk00000003/sig00000c3c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e2 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000ed ), + .I3(NlwRenamedSig_OI_dout_2[30]), + .O(\blk00000003/sig00000c3a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e1 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000ec ), + .I3(NlwRenamedSig_OI_dout_2[31]), + .O(\blk00000003/sig00000c3b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008e0 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000ee ), + .I3(NlwRenamedSig_OI_dout_2[29]), + .O(\blk00000003/sig00000c39 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008df ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f0 ), + .I3(NlwRenamedSig_OI_dout_2[27]), + .O(\blk00000003/sig00000c37 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008de ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000ef ), + .I3(NlwRenamedSig_OI_dout_2[28]), + .O(\blk00000003/sig00000c38 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008dd ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f1 ), + .I3(NlwRenamedSig_OI_dout_2[26]), + .O(\blk00000003/sig00000c36 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008dc ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f3 ), + .I3(NlwRenamedSig_OI_dout_2[24]), + .O(\blk00000003/sig00000c34 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008db ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f2 ), + .I3(NlwRenamedSig_OI_dout_2[25]), + .O(\blk00000003/sig00000c35 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008da ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f4 ), + .I3(NlwRenamedSig_OI_dout_2[23]), + .O(\blk00000003/sig00000c33 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d9 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f6 ), + .I3(NlwRenamedSig_OI_dout_2[21]), + .O(\blk00000003/sig00000c31 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d8 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f5 ), + .I3(NlwRenamedSig_OI_dout_2[22]), + .O(\blk00000003/sig00000c32 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d7 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f7 ), + .I3(NlwRenamedSig_OI_dout_2[20]), + .O(\blk00000003/sig00000c30 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d6 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f9 ), + .I3(NlwRenamedSig_OI_dout_2[18]), + .O(\blk00000003/sig00000c2e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d5 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000f8 ), + .I3(NlwRenamedSig_OI_dout_2[19]), + .O(\blk00000003/sig00000c2f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d4 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000fa ), + .I3(NlwRenamedSig_OI_dout_2[17]), + .O(\blk00000003/sig00000c2d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d3 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c8d ), + .I3(NlwRenamedSig_OI_dout_2[15]), + .O(\blk00000003/sig00000c2b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d2 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig000000fb ), + .I3(NlwRenamedSig_OI_dout_2[16]), + .O(\blk00000003/sig00000c2c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d1 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c8c ), + .I3(NlwRenamedSig_OI_dout_2[14]), + .O(\blk00000003/sig00000c2a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008d0 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c8b ), + .I3(NlwRenamedSig_OI_dout_2[12]), + .O(\blk00000003/sig00000c28 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008cf ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c8a ), + .I3(NlwRenamedSig_OI_dout_2[13]), + .O(\blk00000003/sig00000c29 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ce ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c89 ), + .I3(NlwRenamedSig_OI_dout_2[11]), + .O(\blk00000003/sig00000c27 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008cd ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c88 ), + .I3(NlwRenamedSig_OI_dout_2[9]), + .O(\blk00000003/sig00000c25 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008cc ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c87 ), + .I3(NlwRenamedSig_OI_dout_2[10]), + .O(\blk00000003/sig00000c26 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008cb ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c86 ), + .I3(NlwRenamedSig_OI_dout_2[8]), + .O(\blk00000003/sig00000c24 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ca ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c85 ), + .I3(NlwRenamedSig_OI_dout_2[6]), + .O(\blk00000003/sig00000c22 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c9 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c84 ), + .I3(NlwRenamedSig_OI_dout_2[7]), + .O(\blk00000003/sig00000c23 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c8 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c83 ), + .I3(NlwRenamedSig_OI_dout_2[5]), + .O(\blk00000003/sig00000c21 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c7 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c82 ), + .I3(NlwRenamedSig_OI_dout_2[3]), + .O(\blk00000003/sig00000c1f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c6 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c81 ), + .I3(NlwRenamedSig_OI_dout_2[4]), + .O(\blk00000003/sig00000c20 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c5 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c80 ), + .I3(NlwRenamedSig_OI_dout_2[2]), + .O(\blk00000003/sig00000c1e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c4 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c7f ), + .I3(NlwRenamedSig_OI_dout_2[1]), + .O(\blk00000003/sig00000c1d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c3 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000133 ), + .I3(NlwRenamedSig_OI_dout_1[46]), + .O(\blk00000003/sig00000c1b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c2 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c7e ), + .I3(NlwRenamedSig_OI_dout_2[0]), + .O(\blk00000003/sig00000c1c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c1 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000134 ), + .I3(NlwRenamedSig_OI_dout_1[45]), + .O(\blk00000003/sig00000c1a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008c0 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000136 ), + .I3(NlwRenamedSig_OI_dout_1[43]), + .O(\blk00000003/sig00000c18 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008bf ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000135 ), + .I3(NlwRenamedSig_OI_dout_1[44]), + .O(\blk00000003/sig00000c19 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008be ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000137 ), + .I3(NlwRenamedSig_OI_dout_1[42]), + .O(\blk00000003/sig00000c17 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008bd ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000139 ), + .I3(NlwRenamedSig_OI_dout_1[40]), + .O(\blk00000003/sig00000c15 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008bc ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000138 ), + .I3(NlwRenamedSig_OI_dout_1[41]), + .O(\blk00000003/sig00000c16 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008bb ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000013a ), + .I3(NlwRenamedSig_OI_dout_1[39]), + .O(\blk00000003/sig00000c14 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ba ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000013c ), + .I3(NlwRenamedSig_OI_dout_1[37]), + .O(\blk00000003/sig00000c12 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b9 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000013b ), + .I3(NlwRenamedSig_OI_dout_1[38]), + .O(\blk00000003/sig00000c13 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b8 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000013d ), + .I3(NlwRenamedSig_OI_dout_1[36]), + .O(\blk00000003/sig00000c11 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b7 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000013f ), + .I3(NlwRenamedSig_OI_dout_1[34]), + .O(\blk00000003/sig00000c0f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b6 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000013e ), + .I3(NlwRenamedSig_OI_dout_1[35]), + .O(\blk00000003/sig00000c10 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b5 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000140 ), + .I3(NlwRenamedSig_OI_dout_1[33]), + .O(\blk00000003/sig00000c0e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b4 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000142 ), + .I3(NlwRenamedSig_OI_dout_1[31]), + .O(\blk00000003/sig00000c0c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b3 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000141 ), + .I3(NlwRenamedSig_OI_dout_1[32]), + .O(\blk00000003/sig00000c0d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b2 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000143 ), + .I3(NlwRenamedSig_OI_dout_1[30]), + .O(\blk00000003/sig00000c0b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b1 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000145 ), + .I3(NlwRenamedSig_OI_dout_1[28]), + .O(\blk00000003/sig00000c09 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008b0 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000144 ), + .I3(NlwRenamedSig_OI_dout_1[29]), + .O(\blk00000003/sig00000c0a ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008af ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000146 ), + .I3(NlwRenamedSig_OI_dout_1[27]), + .O(\blk00000003/sig00000c08 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ae ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000148 ), + .I3(NlwRenamedSig_OI_dout_1[25]), + .O(\blk00000003/sig00000c06 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ad ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000147 ), + .I3(NlwRenamedSig_OI_dout_1[26]), + .O(\blk00000003/sig00000c07 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ac ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000149 ), + .I3(NlwRenamedSig_OI_dout_1[24]), + .O(\blk00000003/sig00000c05 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008ab ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000014b ), + .I3(NlwRenamedSig_OI_dout_1[22]), + .O(\blk00000003/sig00000c03 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008aa ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000014a ), + .I3(NlwRenamedSig_OI_dout_1[23]), + .O(\blk00000003/sig00000c04 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a9 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000014c ), + .I3(NlwRenamedSig_OI_dout_1[21]), + .O(\blk00000003/sig00000c02 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a8 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000014e ), + .I3(NlwRenamedSig_OI_dout_1[19]), + .O(\blk00000003/sig00000c00 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a7 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000014d ), + .I3(NlwRenamedSig_OI_dout_1[20]), + .O(\blk00000003/sig00000c01 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a6 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig0000014f ), + .I3(NlwRenamedSig_OI_dout_1[18]), + .O(\blk00000003/sig00000bff ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a5 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000151 ), + .I3(NlwRenamedSig_OI_dout_1[16]), + .O(\blk00000003/sig00000bfd ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a4 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000150 ), + .I3(NlwRenamedSig_OI_dout_1[17]), + .O(\blk00000003/sig00000bfe ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a3 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c7d ), + .I3(NlwRenamedSig_OI_dout_1[15]), + .O(\blk00000003/sig00000bfc ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a2 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c7c ), + .I3(NlwRenamedSig_OI_dout_1[13]), + .O(\blk00000003/sig00000bfa ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a1 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c7b ), + .I3(NlwRenamedSig_OI_dout_1[14]), + .O(\blk00000003/sig00000bfb ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000008a0 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c7a ), + .I3(NlwRenamedSig_OI_dout_1[12]), + .O(\blk00000003/sig00000bf9 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000089f ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c79 ), + .I3(NlwRenamedSig_OI_dout_1[10]), + .O(\blk00000003/sig00000bf7 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000089e ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c78 ), + .I3(NlwRenamedSig_OI_dout_1[11]), + .O(\blk00000003/sig00000bf8 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000089d ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c77 ), + .I3(NlwRenamedSig_OI_dout_1[9]), + .O(\blk00000003/sig00000bf6 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000089c ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c76 ), + .I3(NlwRenamedSig_OI_dout_1[7]), + .O(\blk00000003/sig00000bf4 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000089b ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c75 ), + .I3(NlwRenamedSig_OI_dout_1[8]), + .O(\blk00000003/sig00000bf5 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000089a ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c74 ), + .I3(NlwRenamedSig_OI_dout_1[6]), + .O(\blk00000003/sig00000bf3 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000899 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c73 ), + .I3(NlwRenamedSig_OI_dout_1[4]), + .O(\blk00000003/sig00000bf1 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000898 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c72 ), + .I3(NlwRenamedSig_OI_dout_1[5]), + .O(\blk00000003/sig00000bf2 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000897 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c71 ), + .I3(NlwRenamedSig_OI_dout_1[3]), + .O(\blk00000003/sig00000bf0 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000896 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c70 ), + .I3(NlwRenamedSig_OI_dout_1[1]), + .O(\blk00000003/sig00000bee ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000895 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c6f ), + .I3(NlwRenamedSig_OI_dout_1[2]), + .O(\blk00000003/sig00000bef ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000894 ( + .I0(\blk00000003/sig0000029e ), + .I1(\blk00000003/sig000002ad ), + .I2(\blk00000003/sig00000c6e ), + .I3(NlwRenamedSig_OI_dout_1[0]), + .O(\blk00000003/sig00000bed ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000893 ( + .I0(\blk00000003/sig00000bec ), + .I1(\blk00000003/sig00000be7 ), + .O(\blk00000003/sig00000bd6 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000892 ( + .I0(ce), + .I1(\blk00000003/sig000002af ), + .O(\blk00000003/sig00000c6d ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000891 ( + .I0(ce), + .I1(\blk00000003/sig00000a0f ), + .O(\blk00000003/sig00000c6c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000890 ( + .I0(ce), + .I1(\blk00000003/sig00000a0a ), + .O(\blk00000003/sig00000c6b ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000088f ( + .I0(ce), + .I1(\blk00000003/sig00000a03 ), + .O(\blk00000003/sig00000c6a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000088e ( + .I0(ce), + .I1(\blk00000003/sig000009f7 ), + .O(\blk00000003/sig00000c69 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000088d ( + .I0(ce), + .I1(\blk00000003/sig000009f8 ), + .O(\blk00000003/sig00000c68 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk0000088c ( + .I0(sclr), + .I1(\blk00000003/sig00000c67 ), + .O(\blk00000003/sig00000372 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000088b ( + .I0(\blk00000003/sig00000378 ), + .I1(\blk00000003/sig00000c66 ), + .O(\blk00000003/sig0000036d ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk0000088a ( + .I0(\blk00000003/sig0000036a ), + .I1(\blk00000003/sig00000378 ), + .O(\blk00000003/sig0000036b ) + ); + LUT3 #( + .INIT ( 8'hDA )) + \blk00000003/blk00000889 ( + .I0(\blk00000003/sig00000378 ), + .I1(\blk00000003/sig00000c66 ), + .I2(\blk00000003/sig0000036f ), + .O(\blk00000003/sig00000370 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000888 ( + .I0(\blk00000003/sig00000368 ), + .I1(\blk00000003/sig000002a8 ), + .O(\blk00000003/sig00000366 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000887 ( + .I0(nd), + .I1(\blk00000003/sig0000015f ), + .O(\blk00000003/sig00000362 ) + ); + LUT3 #( + .INIT ( 8'hF8 )) + \blk00000003/blk00000886 ( + .I0(nd), + .I1(\blk00000003/sig0000015f ), + .I2(\blk00000003/sig000002b9 ), + .O(\blk00000003/sig00000360 ) + ); + LUT3 #( + .INIT ( 8'hDA )) + \blk00000003/blk00000885 ( + .I0(nd), + .I1(\blk00000003/sig0000015f ), + .I2(\blk00000003/sig000002ba ), + .O(\blk00000003/sig0000035d ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000884 ( + .I0(\blk00000003/sig0000031c ), + .I1(\blk00000003/sig00000315 ), + .O(\blk00000003/sig00000359 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000883 ( + .I0(\blk00000003/sig0000031c ), + .I1(\blk00000003/sig00000314 ), + .O(\blk00000003/sig00000356 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk00000882 ( + .I0(\blk00000003/sig0000031c ), + .I1(\blk00000003/sig00000318 ), + .O(\blk00000003/sig00000354 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000881 ( + .I0(\blk00000003/sig0000031c ), + .I1(\blk00000003/sig0000031a ), + .I2(\blk00000003/sig00000322 ), + .O(\blk00000003/sig0000034f ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000880 ( + .I0(\blk00000003/sig0000031a ), + .I1(\blk00000003/sig00000318 ), + .I2(\blk00000003/sig0000031c ), + .O(\blk00000003/sig00000351 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000087f ( + .I0(\blk00000003/sig00000318 ), + .I1(\blk00000003/sig00000315 ), + .O(\blk00000003/sig00000348 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000087e ( + .I0(\blk00000003/sig00000318 ), + .I1(\blk00000003/sig00000314 ), + .O(\blk00000003/sig00000346 ) + ); + LUT3 #( + .INIT ( 8'hBF )) + \blk00000003/blk0000087d ( + .I0(\blk00000003/sig0000031c ), + .I1(\blk00000003/sig00000318 ), + .I2(\blk00000003/sig00000312 ), + .O(\blk00000003/sig00000341 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000087c ( + .I0(\blk00000003/sig00000317 ), + .I1(\blk00000003/sig00000318 ), + .O(\blk00000003/sig0000033d ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk0000087b ( + .I0(\blk00000003/sig00000316 ), + .I1(\blk00000003/sig00000318 ), + .I2(\blk00000003/sig00000322 ), + .O(\blk00000003/sig0000033f ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk0000087a ( + .I0(\blk00000003/sig00000325 ), + .I1(\blk00000003/sig00000c65 ), + .O(\blk00000003/sig00000338 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk00000879 ( + .I0(\blk00000003/sig000002f8 ), + .I1(coef_we), + .I2(\blk00000003/sig00000302 ), + .O(\blk00000003/sig0000032f ) + ); + LUT4 #( + .INIT ( 16'hDAAA )) + \blk00000003/blk00000878 ( + .I0(\blk00000003/sig00000332 ), + .I1(\blk00000003/sig000002f8 ), + .I2(\blk00000003/sig00000302 ), + .I3(coef_we), + .O(\blk00000003/sig00000327 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000877 ( + .I0(coef_ld), + .I1(\blk00000003/sig00000325 ), + .O(\blk00000003/sig0000031b ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000876 ( + .I0(coef_we), + .I1(\blk00000003/sig00000302 ), + .O(\blk00000003/sig000002f9 ) + ); + LUT3 #( + .INIT ( 8'h20 )) + \blk00000003/blk00000875 ( + .I0(coef_we), + .I1(coef_ld), + .I2(\blk00000003/sig00000310 ), + .O(\blk00000003/sig00000323 ) + ); + LUT3 #( + .INIT ( 8'h20 )) + \blk00000003/blk00000874 ( + .I0(\blk00000003/sig00000330 ), + .I1(\blk00000003/sig00000331 ), + .I2(\blk00000003/sig00000332 ), + .O(\blk00000003/sig000002fe ) + ); + LUT3 #( + .INIT ( 8'h04 )) + \blk00000003/blk00000873 ( + .I0(\blk00000003/sig00000331 ), + .I1(\blk00000003/sig00000330 ), + .I2(\blk00000003/sig00000332 ), + .O(\blk00000003/sig000002fc ) + ); + LUT3 #( + .INIT ( 8'hBF )) + \blk00000003/blk00000872 ( + .I0(\blk00000003/sig00000325 ), + .I1(\blk00000003/sig0000030e ), + .I2(coef_ld), + .O(\blk00000003/sig000002f3 ) + ); + LUT3 #( + .INIT ( 8'hBF )) + \blk00000003/blk00000871 ( + .I0(\blk00000003/sig00000310 ), + .I1(coef_we), + .I2(\blk00000003/sig0000030e ), + .O(\blk00000003/sig000002f0 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000870 ( + .I0(\blk00000003/sig000002f4 ), + .I1(coef_we), + .O(\blk00000003/sig000002f5 ) + ); + LUT5 #( + .INIT ( 32'hFFFF2AAA )) + \blk00000003/blk0000086f ( + .I0(\blk00000003/sig00000310 ), + .I1(coef_we), + .I2(\blk00000003/sig00000302 ), + .I3(\blk00000003/sig000002f8 ), + .I4(coef_ld), + .O(\blk00000003/sig0000030f ) + ); + LUT4 #( + .INIT ( 16'hFF8A )) + \blk00000003/blk0000086e ( + .I0(\blk00000003/sig0000030e ), + .I1(\blk00000003/sig00000310 ), + .I2(coef_we), + .I3(coef_ld), + .O(\blk00000003/sig0000030d ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000086d ( + .I0(\blk00000003/sig00000159 ), + .I1(nd), + .O(\blk00000003/sig000002b7 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000086c ( + .I0(\blk00000003/sig00000173 ), + .I1(\blk00000003/sig000002ad ), + .O(\blk00000003/sig000002b5 ) + ); + LUT3 #( + .INIT ( 8'h10 )) + \blk00000003/blk0000086b ( + .I0(\blk00000003/sig00000173 ), + .I1(\blk00000003/sig00000be7 ), + .I2(\blk00000003/sig000002ad ), + .O(\blk00000003/sig00000174 ) + ); + LUT3 #( + .INIT ( 8'hEA )) + \blk00000003/blk0000086a ( + .I0(sclr), + .I1(ce), + .I2(\blk00000003/sig00000be7 ), + .O(\blk00000003/sig000002ae ) + ); + LUT5 #( + .INIT ( 32'h00002000 )) + \blk00000003/blk00000869 ( + .I0(\blk00000003/sig00000c5b ), + .I1(\blk00000003/sig00000c5c ), + .I2(\blk00000003/sig00000c5d ), + .I3(\blk00000003/sig00000c5e ), + .I4(\blk00000003/sig00000c5f ), + .O(\blk00000003/sig00000177 ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk00000868 ( + .I0(\blk00000003/sig000002a8 ), + .I1(\blk00000003/sig0000029c ), + .I2(\blk00000003/sig000002b6 ), + .O(\blk00000003/sig000002a7 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000867 ( + .I0(\blk00000003/sig00000369 ), + .I1(\blk00000003/sig000002b2 ), + .O(\blk00000003/sig000002a9 ) + ); + LUT3 #( + .INIT ( 8'hD8 )) + \blk00000003/blk00000866 ( + .I0(ce), + .I1(\blk00000003/sig00000c61 ), + .I2(\blk00000003/sig00000169 ), + .O(\blk00000003/sig00000168 ) + ); + LUT3 #( + .INIT ( 8'h72 )) + \blk00000003/blk00000865 ( + .I0(ce), + .I1(\blk00000003/sig00000c61 ), + .I2(\blk00000003/sig00000167 ), + .O(\blk00000003/sig00000166 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000864 ( + .I0(\blk00000003/sig00000161 ), + .I1(\blk00000003/sig0000029c ), + .O(\blk00000003/sig00000162 ) + ); + LUT5 #( + .INIT ( 32'hCEEE8AAA )) + \blk00000003/blk00000863 ( + .I0(\blk00000003/sig0000029c ), + .I1(\blk00000003/sig000002b6 ), + .I2(\blk00000003/sig000002a6 ), + .I3(\blk00000003/sig000002a8 ), + .I4(\blk00000003/sig000002a4 ), + .O(\blk00000003/sig000002a5 ) + ); + LUT4 #( + .INIT ( 16'h8808 )) + \blk00000003/blk00000862 ( + .I0(\blk00000003/sig000002a6 ), + .I1(\blk00000003/sig00000c64 ), + .I2(\blk00000003/sig000002a8 ), + .I3(\blk00000003/sig000002b6 ), + .O(\blk00000003/sig000002a1 ) + ); + LUT3 #( + .INIT ( 8'h09 )) + \blk00000003/blk00000861 ( + .I0(\blk00000003/sig00000c63 ), + .I1(\blk00000003/sig000002b9 ), + .I2(\blk00000003/sig000002ba ), + .O(\blk00000003/sig0000015d ) + ); + LUT4 #( + .INIT ( 16'h5540 )) + \blk00000003/blk00000860 ( + .I0(\blk00000003/sig000002b6 ), + .I1(\blk00000003/sig000002a6 ), + .I2(\blk00000003/sig000002a8 ), + .I3(\blk00000003/sig000002a4 ), + .O(\blk00000003/sig000002a3 ) + ); + LUT3 #( + .INIT ( 8'h9A )) + \blk00000003/blk0000085f ( + .I0(\blk00000003/sig00000368 ), + .I1(\blk00000003/sig00000369 ), + .I2(\blk00000003/sig000002b2 ), + .O(\blk00000003/sig000002ab ) + ); + LUT4 #( + .INIT ( 16'hFDA8 )) + \blk00000003/blk0000085e ( + .I0(ce), + .I1(\blk00000003/sig00000c61 ), + .I2(\blk00000003/sig00000c62 ), + .I3(\blk00000003/sig00000165 ), + .O(\blk00000003/sig00000164 ) + ); + MUXCY \blk00000003/blk0000085d ( + .CI(\blk00000003/sig00000049 ), + .DI(NlwRenamedSig_OI_rfd), + .S(\blk00000003/sig00000c60 ), + .O(\blk00000003/sig00000c58 ) + ); + MUXCY_L \blk00000003/blk0000085c ( + .CI(\blk00000003/sig00000c58 ), + .DI(\blk00000003/sig00000c5f ), + .S(\blk00000003/sig00000c59 ), + .LO(\blk00000003/sig00000c55 ) + ); + MUXCY_L \blk00000003/blk0000085b ( + .CI(\blk00000003/sig00000c55 ), + .DI(\blk00000003/sig00000c5e ), + .S(\blk00000003/sig00000c56 ), + .LO(\blk00000003/sig00000c52 ) + ); + MUXCY_L \blk00000003/blk0000085a ( + .CI(\blk00000003/sig00000c52 ), + .DI(\blk00000003/sig00000c5d ), + .S(\blk00000003/sig00000c53 ), + .LO(\blk00000003/sig00000c4f ) + ); + MUXCY_L \blk00000003/blk00000859 ( + .CI(\blk00000003/sig00000c4f ), + .DI(\blk00000003/sig00000c5c ), + .S(\blk00000003/sig00000c50 ), + .LO(\blk00000003/sig00000c4c ) + ); + MUXCY_D \blk00000003/blk00000858 ( + .CI(\blk00000003/sig00000c4c ), + .DI(\blk00000003/sig00000c5b ), + .S(\blk00000003/sig00000c4d ), + .O(\NLW_blk00000003/blk00000858_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk00000858_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000857 ( + .CI(\blk00000003/sig00000c58 ), + .LI(\blk00000003/sig00000c59 ), + .O(\blk00000003/sig00000c5a ) + ); + XORCY \blk00000003/blk00000856 ( + .CI(\blk00000003/sig00000c55 ), + .LI(\blk00000003/sig00000c56 ), + .O(\blk00000003/sig00000c57 ) + ); + XORCY \blk00000003/blk00000855 ( + .CI(\blk00000003/sig00000c52 ), + .LI(\blk00000003/sig00000c53 ), + .O(\blk00000003/sig00000c54 ) + ); + XORCY \blk00000003/blk00000854 ( + .CI(\blk00000003/sig00000c4f ), + .LI(\blk00000003/sig00000c50 ), + .O(\blk00000003/sig00000c51 ) + ); + XORCY \blk00000003/blk00000853 ( + .CI(\blk00000003/sig00000c4c ), + .LI(\blk00000003/sig00000c4d ), + .O(\blk00000003/sig00000c4e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000852 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c4b ), + .R(sclr), + .Q(\blk00000003/sig0000004a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000851 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c4a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000850 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c49 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000084f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c48 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000084e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c47 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000084d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c46 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000084c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c45 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000084b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c44 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000084a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c43 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000849 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c42 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000848 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c41 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000847 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c40 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000846 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c3f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000845 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c3e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000844 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c3d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000843 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c3c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000842 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c3b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000841 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c3a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000840 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c39 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000083f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c38 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000083e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c37 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000083d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c36 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000083c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c35 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000083b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c34 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000083a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c33 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000839 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c32 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000838 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c31 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000837 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c30 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000836 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c2f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000835 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c2e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000834 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c2d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000833 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c2c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000832 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c2b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000831 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c2a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000830 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c29 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000082f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c28 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000082e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c27 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000082d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c26 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000082c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c25 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000082b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c24 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000082a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c23 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000829 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c22 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000828 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c21 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000827 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c20 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000826 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c1f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000825 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c1e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000824 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c1d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000823 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c1c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[0]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000822 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c1b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000821 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c1a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000820 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c19 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000081f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c18 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000081e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c17 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000081d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c16 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000081c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c15 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000081b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c14 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000081a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c13 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000819 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c12 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000818 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c11 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000817 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c10 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000816 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c0f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000815 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c0e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000814 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c0d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000813 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c0c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000812 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c0b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000811 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c0a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000810 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c09 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000080f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c08 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000080e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c07 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000080d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c06 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000080c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c05 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000080b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c04 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000080a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c03 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000809 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c02 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000808 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c01 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000807 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000c00 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000806 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bff ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000805 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bfe ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000804 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bfd ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000803 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bfc ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000802 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bfb ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000801 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bfa ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000800 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf9 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf8 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf7 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf6 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf5 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf4 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf3 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf2 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf1 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bf0 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bef ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bee ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000bed ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[0]) + ); + MUXCY_L \blk00000003/blk000007f3 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000bec ), + .S(\blk00000003/sig00000bd6 ), + .LO(\blk00000003/sig00000be4 ) + ); + MUXCY_L \blk00000003/blk000007f2 ( + .CI(\blk00000003/sig00000be4 ), + .DI(\blk00000003/sig00000beb ), + .S(\blk00000003/sig00000be5 ), + .LO(\blk00000003/sig00000be1 ) + ); + MUXCY_L \blk00000003/blk000007f1 ( + .CI(\blk00000003/sig00000be1 ), + .DI(\blk00000003/sig00000bea ), + .S(\blk00000003/sig00000be2 ), + .LO(\blk00000003/sig00000bde ) + ); + MUXCY_L \blk00000003/blk000007f0 ( + .CI(\blk00000003/sig00000bde ), + .DI(\blk00000003/sig00000be9 ), + .S(\blk00000003/sig00000bdf ), + .LO(\blk00000003/sig00000bdb ) + ); + MUXCY_L \blk00000003/blk000007ef ( + .CI(\blk00000003/sig00000bdb ), + .DI(\blk00000003/sig00000be8 ), + .S(\blk00000003/sig00000bdc ), + .LO(\blk00000003/sig00000bd8 ) + ); + MUXCY_D \blk00000003/blk000007ee ( + .CI(\blk00000003/sig00000bd8 ), + .DI(\blk00000003/sig00000be7 ), + .S(\blk00000003/sig00000bd9 ), + .O(\NLW_blk00000003/blk000007ee_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000007ee_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000007ed ( + .CI(\blk00000003/sig00000be4 ), + .LI(\blk00000003/sig00000be5 ), + .O(\blk00000003/sig00000be6 ) + ); + XORCY \blk00000003/blk000007ec ( + .CI(\blk00000003/sig00000be1 ), + .LI(\blk00000003/sig00000be2 ), + .O(\blk00000003/sig00000be3 ) + ); + XORCY \blk00000003/blk000007eb ( + .CI(\blk00000003/sig00000bde ), + .LI(\blk00000003/sig00000bdf ), + .O(\blk00000003/sig00000be0 ) + ); + XORCY \blk00000003/blk000007ea ( + .CI(\blk00000003/sig00000bdb ), + .LI(\blk00000003/sig00000bdc ), + .O(\blk00000003/sig00000bdd ) + ); + XORCY \blk00000003/blk000007e9 ( + .CI(\blk00000003/sig00000bd8 ), + .LI(\blk00000003/sig00000bd9 ), + .O(\blk00000003/sig00000bda ) + ); + XORCY \blk00000003/blk000007e8 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000bd6 ), + .O(\blk00000003/sig00000bd7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c0 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000777 ), + .R(sclr), + .Q(\blk00000003/sig00000a26 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007bf ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000776 ), + .R(sclr), + .Q(\blk00000003/sig00000a25 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007be ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000775 ), + .R(sclr), + .Q(\blk00000003/sig00000a24 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007bd ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000774 ), + .R(sclr), + .Q(\blk00000003/sig00000a23 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007bc ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000773 ), + .R(sclr), + .Q(\blk00000003/sig00000a22 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007bb ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000772 ), + .R(sclr), + .Q(\blk00000003/sig00000a21 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ba ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000771 ), + .R(sclr), + .Q(\blk00000003/sig00000a20 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b9 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000770 ), + .R(sclr), + .Q(\blk00000003/sig00000a1f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b8 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig0000076f ), + .R(sclr), + .Q(\blk00000003/sig00000a1e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b7 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig0000076e ), + .R(sclr), + .Q(\blk00000003/sig00000a1d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b6 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig0000076d ), + .R(sclr), + .Q(\blk00000003/sig00000a1c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b5 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig0000076c ), + .R(sclr), + .Q(\blk00000003/sig00000a1b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b4 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig0000076b ), + .R(sclr), + .Q(\blk00000003/sig00000a1a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b3 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig0000076a ), + .R(sclr), + .Q(\blk00000003/sig00000a19 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b2 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000769 ), + .R(sclr), + .Q(\blk00000003/sig00000a18 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b1 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig00000768 ), + .R(sclr), + .Q(\blk00000003/sig00000a17 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b0 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000004ed ), + .R(sclr), + .Q(\blk00000003/sig00000b6a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007af ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000004ec ), + .R(sclr), + .Q(\blk00000003/sig00000b69 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ae ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000004eb ), + .R(sclr), + .Q(\blk00000003/sig00000b68 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ad ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000004ea ), + .R(sclr), + .Q(\blk00000003/sig00000b67 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ac ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000004e9 ), + .R(sclr), + .Q(\blk00000003/sig00000b66 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ab ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000004e8 ), + .R(sclr), + .Q(\blk00000003/sig00000b65 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007aa ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000004e7 ), + .R(sclr), + .Q(\blk00000003/sig00000b64 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a9 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000004e6 ), + .R(sclr), + .Q(\blk00000003/sig00000b63 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a8 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000007c7 ), + .R(sclr), + .Q(\blk00000003/sig00000a36 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a7 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000007c6 ), + .R(sclr), + .Q(\blk00000003/sig00000a35 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a6 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000007c5 ), + .R(sclr), + .Q(\blk00000003/sig00000a34 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a5 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000007c4 ), + .R(sclr), + .Q(\blk00000003/sig00000a33 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a4 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000007c3 ), + .R(sclr), + .Q(\blk00000003/sig00000a32 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a3 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000007c2 ), + .R(sclr), + .Q(\blk00000003/sig00000a31 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a2 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000007c1 ), + .R(sclr), + .Q(\blk00000003/sig00000a30 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a1 ( + .C(clk), + .CE(\blk00000003/sig00000bd4 ), + .D(\blk00000003/sig000007c0 ), + .R(sclr), + .Q(\blk00000003/sig00000a2f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a0 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig000007bf ), + .R(sclr), + .Q(\blk00000003/sig00000a2e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079f ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig000007be ), + .R(sclr), + .Q(\blk00000003/sig00000a2d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079e ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig000007bd ), + .R(sclr), + .Q(\blk00000003/sig00000a2c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079d ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig000007bc ), + .R(sclr), + .Q(\blk00000003/sig00000a2b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079c ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig000007bb ), + .R(sclr), + .Q(\blk00000003/sig00000a2a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079b ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig000007ba ), + .R(sclr), + .Q(\blk00000003/sig00000a29 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079a ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig000007b9 ), + .R(sclr), + .Q(\blk00000003/sig00000a28 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000799 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig000007b8 ), + .R(sclr), + .Q(\blk00000003/sig00000a27 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000798 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig0000053f ), + .R(sclr), + .Q(\blk00000003/sig00000b72 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000797 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig0000053e ), + .R(sclr), + .Q(\blk00000003/sig00000b71 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000796 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig0000053d ), + .R(sclr), + .Q(\blk00000003/sig00000b70 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000795 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig0000053c ), + .R(sclr), + .Q(\blk00000003/sig00000b6f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000794 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig0000053b ), + .R(sclr), + .Q(\blk00000003/sig00000b6e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000793 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig0000053a ), + .R(sclr), + .Q(\blk00000003/sig00000b6d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000792 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig00000539 ), + .R(sclr), + .Q(\blk00000003/sig00000b6c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000791 ( + .C(clk), + .CE(\blk00000003/sig00000bd3 ), + .D(\blk00000003/sig00000538 ), + .R(sclr), + .Q(\blk00000003/sig00000b6b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000375 ), + .R(sclr), + .Q(\blk00000003/sig00000a12 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000037b ), + .R(sclr), + .Q(\blk00000003/sig00000a11 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000036a ), + .R(sclr), + .Q(\blk00000003/sig00000a14 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000139 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a16 ), + .R(sclr), + .Q(\blk00000003/sig00000a10 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000138 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a15 ), + .R(sclr), + .Q(\blk00000003/sig00000a0f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000137 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000036f ), + .R(sclr), + .Q(\blk00000003/sig00000a13 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000136 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a14 ), + .R(sclr), + .Q(\blk00000003/sig00000a0d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000135 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a13 ), + .R(sclr), + .Q(\blk00000003/sig00000a0e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000134 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a12 ), + .R(sclr), + .Q(\blk00000003/sig00000a0c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000133 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a11 ), + .R(sclr), + .Q(\blk00000003/sig00000a0b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000132 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a10 ), + .R(sclr), + .Q(\blk00000003/sig00000a09 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000131 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a0f ), + .R(sclr), + .Q(\blk00000003/sig00000a0a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a0e ), + .R(sclr), + .Q(\blk00000003/sig00000a08 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a0d ), + .R(sclr), + .Q(\blk00000003/sig00000a07 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a0c ), + .R(sclr), + .Q(\blk00000003/sig00000a05 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a0b ), + .R(sclr), + .Q(\blk00000003/sig00000a04 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a0a ), + .R(sclr), + .Q(\blk00000003/sig00000a03 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a09 ), + .R(sclr), + .Q(\blk00000003/sig00000a06 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a08 ), + .R(sclr), + .Q(\blk00000003/sig00000a01 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000129 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a07 ), + .R(sclr), + .Q(\blk00000003/sig000009ff ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000128 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a06 ), + .R(sclr), + .Q(\blk00000003/sig000009f9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000127 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a05 ), + .R(sclr), + .Q(\blk00000003/sig000009fd ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000126 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a04 ), + .R(sclr), + .Q(\blk00000003/sig000009fb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000125 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a03 ), + .R(sclr), + .Q(\blk00000003/sig000009f7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000124 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000a01 ), + .R(sclr), + .Q(\blk00000003/sig00000a02 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000123 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ff ), + .R(sclr), + .Q(\blk00000003/sig00000a00 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000122 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009fd ), + .R(sclr), + .Q(\blk00000003/sig000009fe ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000121 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009fb ), + .R(sclr), + .Q(\blk00000003/sig000009fc ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f9 ), + .R(sclr), + .Q(\blk00000003/sig000009fa ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f7 ), + .R(sclr), + .Q(\blk00000003/sig000009f8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f5 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009f6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f4 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009f5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f3 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009f4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009f2 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009f3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000030c ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009f2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ef ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009f1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000118 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ee ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009f0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ed ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009ef ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000116 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ec ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009ee ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000115 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009eb ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009ed ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000114 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009ea ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009ec ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000113 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e9 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009eb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000112 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000009e8 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009ea ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000111 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000337 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009e9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000110 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000334 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000009e8 ) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000010f ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000010f_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010f_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000009c8 , \blk00000003/sig000009c9 , \blk00000003/sig000009ca , +\blk00000003/sig000009cb , \blk00000003/sig000009cc , \blk00000003/sig000009cd , \blk00000003/sig000009ce , \blk00000003/sig000009cf , +\blk00000003/sig000009d0 , \blk00000003/sig000009d1 , \blk00000003/sig000009d2 , \blk00000003/sig000009d3 , \blk00000003/sig000009d4 , +\blk00000003/sig000009d5 , \blk00000003/sig000009d6 , \blk00000003/sig000009d7 }), + .BCOUT({\NLW_blk00000003/blk0000010f_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000998 , \blk00000003/sig00000999 , \blk00000003/sig0000099a , \blk00000003/sig0000099b , \blk00000003/sig0000099c , +\blk00000003/sig0000099d , \blk00000003/sig0000099e , \blk00000003/sig0000099f , \blk00000003/sig000009a0 , \blk00000003/sig000009a1 , +\blk00000003/sig000009a2 , \blk00000003/sig000009a3 , \blk00000003/sig000009a4 , \blk00000003/sig000009a5 , \blk00000003/sig000009a6 , +\blk00000003/sig000009a7 , \blk00000003/sig000009a8 , \blk00000003/sig000009a9 , \blk00000003/sig000009aa , \blk00000003/sig000009ab , +\blk00000003/sig000009ac , \blk00000003/sig000009ad , \blk00000003/sig000009ae , \blk00000003/sig000009af , \blk00000003/sig000009b0 , +\blk00000003/sig000009b1 , \blk00000003/sig000009b2 , \blk00000003/sig000009b3 , \blk00000003/sig000009b4 , \blk00000003/sig000009b5 , +\blk00000003/sig000009b6 , \blk00000003/sig000009b7 , \blk00000003/sig000009b8 , \blk00000003/sig000009b9 , \blk00000003/sig000009ba , +\blk00000003/sig000009bb , \blk00000003/sig000009bc , \blk00000003/sig000009bd , \blk00000003/sig000009be , \blk00000003/sig000009bf , +\blk00000003/sig000009c0 , \blk00000003/sig000009c1 , \blk00000003/sig000009c2 , \blk00000003/sig000009c3 , \blk00000003/sig000009c4 , +\blk00000003/sig000009c5 , \blk00000003/sig000009c6 , \blk00000003/sig000009c7 }), + .C({\NLW_blk00000003/blk0000010f_C<47>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<45>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<44>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<42>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<41>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<39>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<38>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<36>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<35>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<33>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<32>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<30>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<29>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<27>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<26>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<24>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<23>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010f_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<39>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<38>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<36>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<35>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<33>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<32>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<30>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<29>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<27>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<26>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<24>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<23>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000009d8 , \blk00000003/sig000009d9 , \blk00000003/sig000009da , +\blk00000003/sig000009db , \blk00000003/sig000009dc , \blk00000003/sig000009dd , \blk00000003/sig000009de , \blk00000003/sig000009df , +\blk00000003/sig000009e0 , \blk00000003/sig000009e1 , \blk00000003/sig000009e2 , \blk00000003/sig000009e3 , \blk00000003/sig000009e4 , +\blk00000003/sig000009e5 , \blk00000003/sig000009e6 , \blk00000003/sig000009e7 }), + .PCOUT({\blk00000003/sig00000788 , \blk00000003/sig00000789 , \blk00000003/sig0000078a , \blk00000003/sig0000078b , \blk00000003/sig0000078c , +\blk00000003/sig0000078d , \blk00000003/sig0000078e , \blk00000003/sig0000078f , \blk00000003/sig00000790 , \blk00000003/sig00000791 , +\blk00000003/sig00000792 , \blk00000003/sig00000793 , \blk00000003/sig00000794 , \blk00000003/sig00000795 , \blk00000003/sig00000796 , +\blk00000003/sig00000797 , \blk00000003/sig00000798 , \blk00000003/sig00000799 , \blk00000003/sig0000079a , \blk00000003/sig0000079b , +\blk00000003/sig0000079c , \blk00000003/sig0000079d , \blk00000003/sig0000079e , \blk00000003/sig0000079f , \blk00000003/sig000007a0 , +\blk00000003/sig000007a1 , \blk00000003/sig000007a2 , \blk00000003/sig000007a3 , \blk00000003/sig000007a4 , \blk00000003/sig000007a5 , +\blk00000003/sig000007a6 , \blk00000003/sig000007a7 , \blk00000003/sig000007a8 , \blk00000003/sig000007a9 , \blk00000003/sig000007aa , +\blk00000003/sig000007ab , \blk00000003/sig000007ac , \blk00000003/sig000007ad , \blk00000003/sig000007ae , \blk00000003/sig000007af , +\blk00000003/sig000007b0 , \blk00000003/sig000007b1 , \blk00000003/sig000007b2 , \blk00000003/sig000007b3 , \blk00000003/sig000007b4 , +\blk00000003/sig000007b5 , \blk00000003/sig000007b6 , \blk00000003/sig000007b7 }), + .A({\blk00000003/sig00000646 , \blk00000003/sig00000647 , \blk00000003/sig00000648 , \blk00000003/sig00000649 , \blk00000003/sig0000064a , +\blk00000003/sig0000064b , \blk00000003/sig0000064c , \blk00000003/sig0000064d , \blk00000003/sig0000064e , \blk00000003/sig0000064f , +\blk00000003/sig00000650 , \blk00000003/sig00000651 , \blk00000003/sig00000652 , \blk00000003/sig00000653 , \blk00000003/sig00000654 , +\blk00000003/sig00000655 , \blk00000003/sig00000656 , \blk00000003/sig00000657 }), + .M({\NLW_blk00000003/blk0000010f_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000010e ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000010e_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010e_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000978 , \blk00000003/sig00000979 , \blk00000003/sig0000097a , +\blk00000003/sig0000097b , \blk00000003/sig0000097c , \blk00000003/sig0000097d , \blk00000003/sig0000097e , \blk00000003/sig0000097f , +\blk00000003/sig00000980 , \blk00000003/sig00000981 , \blk00000003/sig00000982 , \blk00000003/sig00000983 , \blk00000003/sig00000984 , +\blk00000003/sig00000985 , \blk00000003/sig00000986 , \blk00000003/sig00000987 }), + .BCOUT({\NLW_blk00000003/blk0000010e_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000010e_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000010e_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000010e_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000010e_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000010e_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000010e_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000010e_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000010e_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000010e_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000948 , \blk00000003/sig00000949 , \blk00000003/sig0000094a , \blk00000003/sig0000094b , \blk00000003/sig0000094c , +\blk00000003/sig0000094d , \blk00000003/sig0000094e , \blk00000003/sig0000094f , \blk00000003/sig00000950 , \blk00000003/sig00000951 , +\blk00000003/sig00000952 , \blk00000003/sig00000953 , \blk00000003/sig00000954 , \blk00000003/sig00000955 , \blk00000003/sig00000956 , +\blk00000003/sig00000957 , \blk00000003/sig00000958 , \blk00000003/sig00000959 , \blk00000003/sig0000095a , \blk00000003/sig0000095b , +\blk00000003/sig0000095c , \blk00000003/sig0000095d , \blk00000003/sig0000095e , \blk00000003/sig0000095f , \blk00000003/sig00000960 , +\blk00000003/sig00000961 , \blk00000003/sig00000962 , \blk00000003/sig00000963 , \blk00000003/sig00000964 , \blk00000003/sig00000965 , +\blk00000003/sig00000966 , \blk00000003/sig00000967 , \blk00000003/sig00000968 , \blk00000003/sig00000969 , \blk00000003/sig0000096a , +\blk00000003/sig0000096b , \blk00000003/sig0000096c , \blk00000003/sig0000096d , \blk00000003/sig0000096e , \blk00000003/sig0000096f , +\blk00000003/sig00000970 , \blk00000003/sig00000971 , \blk00000003/sig00000972 , \blk00000003/sig00000973 , \blk00000003/sig00000974 , +\blk00000003/sig00000975 , \blk00000003/sig00000976 , \blk00000003/sig00000977 }), + .C({\NLW_blk00000003/blk0000010e_C<47>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<45>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<44>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<42>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<41>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<39>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<38>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<36>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<35>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<33>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<32>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<30>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<29>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<27>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<26>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<24>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<23>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010e_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<39>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<38>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<36>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<35>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<33>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<32>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<30>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<29>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<27>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<26>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<24>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<23>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000988 , \blk00000003/sig00000989 , \blk00000003/sig0000098a , +\blk00000003/sig0000098b , \blk00000003/sig0000098c , \blk00000003/sig0000098d , \blk00000003/sig0000098e , \blk00000003/sig0000098f , +\blk00000003/sig00000990 , \blk00000003/sig00000991 , \blk00000003/sig00000992 , \blk00000003/sig00000993 , \blk00000003/sig00000994 , +\blk00000003/sig00000995 , \blk00000003/sig00000996 , \blk00000003/sig00000997 }), + .PCOUT({\blk00000003/sig00000998 , \blk00000003/sig00000999 , \blk00000003/sig0000099a , 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\blk00000003/sig000009bf , +\blk00000003/sig000009c0 , \blk00000003/sig000009c1 , \blk00000003/sig000009c2 , \blk00000003/sig000009c3 , \blk00000003/sig000009c4 , +\blk00000003/sig000009c5 , \blk00000003/sig000009c6 , \blk00000003/sig000009c7 }), + .A({\blk00000003/sig00000624 , \blk00000003/sig00000625 , \blk00000003/sig00000626 , \blk00000003/sig00000627 , \blk00000003/sig00000628 , +\blk00000003/sig00000629 , \blk00000003/sig0000062a , \blk00000003/sig0000062b , \blk00000003/sig0000062c , \blk00000003/sig0000062d , +\blk00000003/sig0000062e , \blk00000003/sig0000062f , \blk00000003/sig00000630 , \blk00000003/sig00000631 , \blk00000003/sig00000632 , +\blk00000003/sig00000633 , \blk00000003/sig00000634 , \blk00000003/sig00000635 }), + .M({\NLW_blk00000003/blk0000010e_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000010d ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000010d_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010d_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000928 , \blk00000003/sig00000929 , \blk00000003/sig0000092a , +\blk00000003/sig0000092b , \blk00000003/sig0000092c , \blk00000003/sig0000092d , \blk00000003/sig0000092e , \blk00000003/sig0000092f , +\blk00000003/sig00000930 , \blk00000003/sig00000931 , \blk00000003/sig00000932 , \blk00000003/sig00000933 , \blk00000003/sig00000934 , +\blk00000003/sig00000935 , \blk00000003/sig00000936 , \blk00000003/sig00000937 }), + .BCOUT({\NLW_blk00000003/blk0000010d_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000008f8 , \blk00000003/sig000008f9 , \blk00000003/sig000008fa , \blk00000003/sig000008fb , \blk00000003/sig000008fc , +\blk00000003/sig000008fd , \blk00000003/sig000008fe , \blk00000003/sig000008ff , \blk00000003/sig00000900 , \blk00000003/sig00000901 , +\blk00000003/sig00000902 , \blk00000003/sig00000903 , \blk00000003/sig00000904 , \blk00000003/sig00000905 , \blk00000003/sig00000906 , +\blk00000003/sig00000907 , \blk00000003/sig00000908 , \blk00000003/sig00000909 , \blk00000003/sig0000090a , \blk00000003/sig0000090b , +\blk00000003/sig0000090c , \blk00000003/sig0000090d , \blk00000003/sig0000090e , \blk00000003/sig0000090f , \blk00000003/sig00000910 , +\blk00000003/sig00000911 , \blk00000003/sig00000912 , \blk00000003/sig00000913 , \blk00000003/sig00000914 , \blk00000003/sig00000915 , +\blk00000003/sig00000916 , \blk00000003/sig00000917 , \blk00000003/sig00000918 , \blk00000003/sig00000919 , \blk00000003/sig0000091a , +\blk00000003/sig0000091b , \blk00000003/sig0000091c , \blk00000003/sig0000091d , \blk00000003/sig0000091e , \blk00000003/sig0000091f , +\blk00000003/sig00000920 , \blk00000003/sig00000921 , \blk00000003/sig00000922 , \blk00000003/sig00000923 , \blk00000003/sig00000924 , +\blk00000003/sig00000925 , \blk00000003/sig00000926 , \blk00000003/sig00000927 }), + .C({\NLW_blk00000003/blk0000010d_C<47>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<45>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<44>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<42>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<41>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<39>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<38>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<36>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<35>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<33>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<32>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<30>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<29>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<27>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<26>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<24>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<23>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010d_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<39>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<38>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<36>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<35>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<33>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<32>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<30>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<29>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<27>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<26>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<24>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<23>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000938 , \blk00000003/sig00000939 , \blk00000003/sig0000093a , +\blk00000003/sig0000093b , \blk00000003/sig0000093c , \blk00000003/sig0000093d , \blk00000003/sig0000093e , \blk00000003/sig0000093f , +\blk00000003/sig00000940 , \blk00000003/sig00000941 , \blk00000003/sig00000942 , \blk00000003/sig00000943 , \blk00000003/sig00000944 , +\blk00000003/sig00000945 , \blk00000003/sig00000946 , \blk00000003/sig00000947 }), + .PCOUT({\blk00000003/sig00000948 , \blk00000003/sig00000949 , \blk00000003/sig0000094a , \blk00000003/sig0000094b , \blk00000003/sig0000094c , +\blk00000003/sig0000094d , \blk00000003/sig0000094e , \blk00000003/sig0000094f , \blk00000003/sig00000950 , \blk00000003/sig00000951 , +\blk00000003/sig00000952 , \blk00000003/sig00000953 , \blk00000003/sig00000954 , \blk00000003/sig00000955 , \blk00000003/sig00000956 , +\blk00000003/sig00000957 , \blk00000003/sig00000958 , \blk00000003/sig00000959 , \blk00000003/sig0000095a , \blk00000003/sig0000095b , +\blk00000003/sig0000095c , \blk00000003/sig0000095d , \blk00000003/sig0000095e , \blk00000003/sig0000095f , \blk00000003/sig00000960 , +\blk00000003/sig00000961 , \blk00000003/sig00000962 , \blk00000003/sig00000963 , \blk00000003/sig00000964 , \blk00000003/sig00000965 , +\blk00000003/sig00000966 , \blk00000003/sig00000967 , \blk00000003/sig00000968 , \blk00000003/sig00000969 , \blk00000003/sig0000096a , +\blk00000003/sig0000096b , \blk00000003/sig0000096c , \blk00000003/sig0000096d , \blk00000003/sig0000096e , \blk00000003/sig0000096f , +\blk00000003/sig00000970 , \blk00000003/sig00000971 , \blk00000003/sig00000972 , \blk00000003/sig00000973 , \blk00000003/sig00000974 , +\blk00000003/sig00000975 , \blk00000003/sig00000976 , \blk00000003/sig00000977 }), + .A({\blk00000003/sig000005d2 , \blk00000003/sig000005d3 , \blk00000003/sig000005d4 , \blk00000003/sig000005d5 , \blk00000003/sig000005d6 , +\blk00000003/sig000005d7 , \blk00000003/sig000005d8 , \blk00000003/sig000005d9 , \blk00000003/sig000005da , \blk00000003/sig000005db , +\blk00000003/sig000005dc , \blk00000003/sig000005dd , \blk00000003/sig000005de , \blk00000003/sig000005df , \blk00000003/sig000005e0 , +\blk00000003/sig000005e1 , \blk00000003/sig000005e2 , \blk00000003/sig000005e3 }), + .M({\NLW_blk00000003/blk0000010d_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000010c ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000010c_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010c_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000008d8 , \blk00000003/sig000008d9 , \blk00000003/sig000008da , +\blk00000003/sig000008db , \blk00000003/sig000008dc , \blk00000003/sig000008dd , \blk00000003/sig000008de , \blk00000003/sig000008df , +\blk00000003/sig000008e0 , \blk00000003/sig000008e1 , \blk00000003/sig000008e2 , \blk00000003/sig000008e3 , \blk00000003/sig000008e4 , +\blk00000003/sig000008e5 , \blk00000003/sig000008e6 , \blk00000003/sig000008e7 }), + .BCOUT({\NLW_blk00000003/blk0000010c_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig0000047e , \blk00000003/sig0000047f , \blk00000003/sig00000480 , \blk00000003/sig00000481 , \blk00000003/sig00000482 , +\blk00000003/sig00000483 , \blk00000003/sig00000484 , \blk00000003/sig00000485 , \blk00000003/sig00000486 , \blk00000003/sig00000487 , +\blk00000003/sig00000488 , \blk00000003/sig00000489 , \blk00000003/sig0000048a , \blk00000003/sig0000048b , \blk00000003/sig0000048c , +\blk00000003/sig0000048d , \blk00000003/sig0000048e , \blk00000003/sig0000048f , \blk00000003/sig00000490 , \blk00000003/sig00000491 , +\blk00000003/sig00000492 , \blk00000003/sig00000493 , \blk00000003/sig00000494 , \blk00000003/sig00000495 , \blk00000003/sig00000496 , +\blk00000003/sig00000497 , \blk00000003/sig00000498 , \blk00000003/sig00000499 , \blk00000003/sig0000049a , \blk00000003/sig0000049b , +\blk00000003/sig0000049c , \blk00000003/sig0000049d , \blk00000003/sig0000049e , \blk00000003/sig0000049f , \blk00000003/sig000004a0 , +\blk00000003/sig000004a1 , \blk00000003/sig000004a2 , \blk00000003/sig000004a3 , \blk00000003/sig000004a4 , \blk00000003/sig000004a5 , +\blk00000003/sig000004a6 , \blk00000003/sig000004a7 , \blk00000003/sig000004a8 , \blk00000003/sig000004a9 , \blk00000003/sig000004aa , +\blk00000003/sig000004ab , \blk00000003/sig000004ac , \blk00000003/sig000004ad }), + .C({\NLW_blk00000003/blk0000010c_C<47>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<45>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<44>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<42>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<41>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<39>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<38>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<36>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<35>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<33>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<32>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<30>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<29>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<27>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<26>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<24>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<23>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010c_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<39>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<38>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<36>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<35>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<33>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<32>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<30>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<29>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<27>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<26>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<24>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<23>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000008e8 , \blk00000003/sig000008e9 , \blk00000003/sig000008ea , +\blk00000003/sig000008eb , \blk00000003/sig000008ec , \blk00000003/sig000008ed , \blk00000003/sig000008ee , \blk00000003/sig000008ef , +\blk00000003/sig000008f0 , \blk00000003/sig000008f1 , \blk00000003/sig000008f2 , \blk00000003/sig000008f3 , \blk00000003/sig000008f4 , +\blk00000003/sig000008f5 , \blk00000003/sig000008f6 , \blk00000003/sig000008f7 }), + .PCOUT({\blk00000003/sig000008f8 , \blk00000003/sig000008f9 , \blk00000003/sig000008fa , \blk00000003/sig000008fb , \blk00000003/sig000008fc , +\blk00000003/sig000008fd , \blk00000003/sig000008fe , \blk00000003/sig000008ff , \blk00000003/sig00000900 , \blk00000003/sig00000901 , +\blk00000003/sig00000902 , \blk00000003/sig00000903 , \blk00000003/sig00000904 , \blk00000003/sig00000905 , \blk00000003/sig00000906 , +\blk00000003/sig00000907 , \blk00000003/sig00000908 , \blk00000003/sig00000909 , \blk00000003/sig0000090a , \blk00000003/sig0000090b , +\blk00000003/sig0000090c , \blk00000003/sig0000090d , \blk00000003/sig0000090e , \blk00000003/sig0000090f , \blk00000003/sig00000910 , +\blk00000003/sig00000911 , \blk00000003/sig00000912 , \blk00000003/sig00000913 , \blk00000003/sig00000914 , \blk00000003/sig00000915 , +\blk00000003/sig00000916 , \blk00000003/sig00000917 , \blk00000003/sig00000918 , \blk00000003/sig00000919 , \blk00000003/sig0000091a , +\blk00000003/sig0000091b , \blk00000003/sig0000091c , \blk00000003/sig0000091d , \blk00000003/sig0000091e , \blk00000003/sig0000091f , +\blk00000003/sig00000920 , \blk00000003/sig00000921 , \blk00000003/sig00000922 , \blk00000003/sig00000923 , \blk00000003/sig00000924 , +\blk00000003/sig00000925 , \blk00000003/sig00000926 , \blk00000003/sig00000927 }), + .A({\blk00000003/sig00000580 , \blk00000003/sig00000581 , \blk00000003/sig00000582 , \blk00000003/sig00000583 , \blk00000003/sig00000584 , +\blk00000003/sig00000585 , \blk00000003/sig00000586 , \blk00000003/sig00000587 , \blk00000003/sig00000588 , \blk00000003/sig00000589 , +\blk00000003/sig0000058a , \blk00000003/sig0000058b , \blk00000003/sig0000058c , \blk00000003/sig0000058d , \blk00000003/sig0000058e , +\blk00000003/sig0000058f , \blk00000003/sig00000590 , \blk00000003/sig00000591 }), + .M({\NLW_blk00000003/blk0000010c_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000010b ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000010b_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010b_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000008b8 , \blk00000003/sig000008b9 , \blk00000003/sig000008ba , +\blk00000003/sig000008bb , \blk00000003/sig000008bc , \blk00000003/sig000008bd , \blk00000003/sig000008be , \blk00000003/sig000008bf , +\blk00000003/sig000008c0 , \blk00000003/sig000008c1 , \blk00000003/sig000008c2 , \blk00000003/sig000008c3 , \blk00000003/sig000008c4 , +\blk00000003/sig000008c5 , \blk00000003/sig000008c6 , \blk00000003/sig000008c7 }), + .BCOUT({\NLW_blk00000003/blk0000010b_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000888 , \blk00000003/sig00000889 , \blk00000003/sig0000088a , \blk00000003/sig0000088b , \blk00000003/sig0000088c , +\blk00000003/sig0000088d , \blk00000003/sig0000088e , \blk00000003/sig0000088f , \blk00000003/sig00000890 , \blk00000003/sig00000891 , +\blk00000003/sig00000892 , \blk00000003/sig00000893 , \blk00000003/sig00000894 , \blk00000003/sig00000895 , \blk00000003/sig00000896 , +\blk00000003/sig00000897 , \blk00000003/sig00000898 , \blk00000003/sig00000899 , \blk00000003/sig0000089a , \blk00000003/sig0000089b , +\blk00000003/sig0000089c , \blk00000003/sig0000089d , \blk00000003/sig0000089e , \blk00000003/sig0000089f , \blk00000003/sig000008a0 , +\blk00000003/sig000008a1 , \blk00000003/sig000008a2 , \blk00000003/sig000008a3 , \blk00000003/sig000008a4 , \blk00000003/sig000008a5 , +\blk00000003/sig000008a6 , \blk00000003/sig000008a7 , \blk00000003/sig000008a8 , \blk00000003/sig000008a9 , \blk00000003/sig000008aa , +\blk00000003/sig000008ab , \blk00000003/sig000008ac , \blk00000003/sig000008ad , \blk00000003/sig000008ae , \blk00000003/sig000008af , +\blk00000003/sig000008b0 , \blk00000003/sig000008b1 , \blk00000003/sig000008b2 , \blk00000003/sig000008b3 , \blk00000003/sig000008b4 , +\blk00000003/sig000008b5 , \blk00000003/sig000008b6 , \blk00000003/sig000008b7 }), + .C({\NLW_blk00000003/blk0000010b_C<47>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<45>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<44>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<42>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<41>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<39>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<38>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<36>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<35>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<33>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<32>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<30>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<29>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<27>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<26>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<24>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<23>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010b_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<39>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<38>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<36>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<35>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<33>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<32>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<30>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<29>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<27>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<26>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<24>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<23>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000008c8 , \blk00000003/sig000008c9 , \blk00000003/sig000008ca , +\blk00000003/sig000008cb , \blk00000003/sig000008cc , \blk00000003/sig000008cd , \blk00000003/sig000008ce , \blk00000003/sig000008cf , +\blk00000003/sig000008d0 , \blk00000003/sig000008d1 , \blk00000003/sig000008d2 , \blk00000003/sig000008d3 , \blk00000003/sig000008d4 , +\blk00000003/sig000008d5 , \blk00000003/sig000008d6 , \blk00000003/sig000008d7 }), + .PCOUT({\blk00000003/sig00000738 , \blk00000003/sig00000739 , \blk00000003/sig0000073a , \blk00000003/sig0000073b , \blk00000003/sig0000073c , +\blk00000003/sig0000073d , \blk00000003/sig0000073e , \blk00000003/sig0000073f , \blk00000003/sig00000740 , \blk00000003/sig00000741 , +\blk00000003/sig00000742 , \blk00000003/sig00000743 , \blk00000003/sig00000744 , \blk00000003/sig00000745 , \blk00000003/sig00000746 , +\blk00000003/sig00000747 , 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\blk00000003/sig0000064a , +\blk00000003/sig0000064b , \blk00000003/sig0000064c , \blk00000003/sig0000064d , \blk00000003/sig0000064e , \blk00000003/sig0000064f , +\blk00000003/sig00000650 , \blk00000003/sig00000651 , \blk00000003/sig00000652 , \blk00000003/sig00000653 , \blk00000003/sig00000654 , +\blk00000003/sig00000655 , \blk00000003/sig00000656 , \blk00000003/sig00000657 }), + .M({\NLW_blk00000003/blk0000010b_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000010b_M<4>_UNCONNECTED , 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.RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000868 , \blk00000003/sig00000869 , \blk00000003/sig0000086a , +\blk00000003/sig0000086b , \blk00000003/sig0000086c , \blk00000003/sig0000086d , \blk00000003/sig0000086e , \blk00000003/sig0000086f , +\blk00000003/sig00000870 , \blk00000003/sig00000871 , \blk00000003/sig00000872 , \blk00000003/sig00000873 , \blk00000003/sig00000874 , +\blk00000003/sig00000875 , \blk00000003/sig00000876 , \blk00000003/sig00000877 }), + .BCOUT({\NLW_blk00000003/blk0000010a_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000010a_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000010a_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000010a_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_BCOUT<11>_UNCONNECTED , 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+\NLW_blk00000003/blk00000109_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000109_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000109_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000109_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000109_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000109_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000109_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000828 , \blk00000003/sig00000829 , \blk00000003/sig0000082a , +\blk00000003/sig0000082b , \blk00000003/sig0000082c , \blk00000003/sig0000082d , \blk00000003/sig0000082e , \blk00000003/sig0000082f , +\blk00000003/sig00000830 , \blk00000003/sig00000831 , \blk00000003/sig00000832 , \blk00000003/sig00000833 , \blk00000003/sig00000834 , +\blk00000003/sig00000835 , \blk00000003/sig00000836 , \blk00000003/sig00000837 }), + .PCOUT({\blk00000003/sig00000838 , \blk00000003/sig00000839 , \blk00000003/sig0000083a , \blk00000003/sig0000083b , \blk00000003/sig0000083c , +\blk00000003/sig0000083d , \blk00000003/sig0000083e , \blk00000003/sig0000083f , \blk00000003/sig00000840 , \blk00000003/sig00000841 , +\blk00000003/sig00000842 , \blk00000003/sig00000843 , \blk00000003/sig00000844 , \blk00000003/sig00000845 , \blk00000003/sig00000846 , +\blk00000003/sig00000847 , \blk00000003/sig00000848 , \blk00000003/sig00000849 , \blk00000003/sig0000084a , \blk00000003/sig0000084b , +\blk00000003/sig0000084c , \blk00000003/sig0000084d , \blk00000003/sig0000084e , \blk00000003/sig0000084f , \blk00000003/sig00000850 , +\blk00000003/sig00000851 , \blk00000003/sig00000852 , \blk00000003/sig00000853 , \blk00000003/sig00000854 , \blk00000003/sig00000855 , +\blk00000003/sig00000856 , \blk00000003/sig00000857 , \blk00000003/sig00000858 , \blk00000003/sig00000859 , \blk00000003/sig0000085a , +\blk00000003/sig0000085b , \blk00000003/sig0000085c , \blk00000003/sig0000085d , \blk00000003/sig0000085e , \blk00000003/sig0000085f , +\blk00000003/sig00000860 , \blk00000003/sig00000861 , \blk00000003/sig00000862 , \blk00000003/sig00000863 , \blk00000003/sig00000864 , +\blk00000003/sig00000865 , \blk00000003/sig00000866 , \blk00000003/sig00000867 }), + .A({\blk00000003/sig000005d2 , \blk00000003/sig000005d3 , \blk00000003/sig000005d4 , \blk00000003/sig000005d5 , \blk00000003/sig000005d6 , +\blk00000003/sig000005d7 , \blk00000003/sig000005d8 , \blk00000003/sig000005d9 , \blk00000003/sig000005da , \blk00000003/sig000005db , +\blk00000003/sig000005dc , \blk00000003/sig000005dd , \blk00000003/sig000005de , \blk00000003/sig000005df , \blk00000003/sig000005e0 , +\blk00000003/sig000005e1 , \blk00000003/sig000005e2 , \blk00000003/sig000005e3 }), + .M({\NLW_blk00000003/blk00000109_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000109_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000109_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000108 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000108_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000108_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000007c8 , \blk00000003/sig000007c9 , \blk00000003/sig000007ca , +\blk00000003/sig000007cb , \blk00000003/sig000007cc , \blk00000003/sig000007cd , \blk00000003/sig000007ce , \blk00000003/sig000007cf , +\blk00000003/sig000007d0 , \blk00000003/sig000007d1 , \blk00000003/sig000007d2 , \blk00000003/sig000007d3 , \blk00000003/sig000007d4 , +\blk00000003/sig000007d5 , \blk00000003/sig000007d6 , \blk00000003/sig000007d7 }), + .BCOUT({\NLW_blk00000003/blk00000108_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000108_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000108_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000108_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000108_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000108_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000108_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000108_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000108_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000108_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000108_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000108_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000108_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000108_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000108_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000108_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000108_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000108_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig0000042e , \blk00000003/sig0000042f , \blk00000003/sig00000430 , \blk00000003/sig00000431 , \blk00000003/sig00000432 , +\blk00000003/sig00000433 , \blk00000003/sig00000434 , \blk00000003/sig00000435 , \blk00000003/sig00000436 , \blk00000003/sig00000437 , +\blk00000003/sig00000438 , \blk00000003/sig00000439 , \blk00000003/sig0000043a , \blk00000003/sig0000043b , \blk00000003/sig0000043c , +\blk00000003/sig0000043d , \blk00000003/sig0000043e , \blk00000003/sig0000043f , \blk00000003/sig00000440 , \blk00000003/sig00000441 , +\blk00000003/sig00000442 , \blk00000003/sig00000443 , \blk00000003/sig00000444 , \blk00000003/sig00000445 , \blk00000003/sig00000446 , +\blk00000003/sig00000447 , \blk00000003/sig00000448 , \blk00000003/sig00000449 , \blk00000003/sig0000044a , \blk00000003/sig0000044b , +\blk00000003/sig0000044c , \blk00000003/sig0000044d , \blk00000003/sig0000044e , \blk00000003/sig0000044f , \blk00000003/sig00000450 , +\blk00000003/sig00000451 , \blk00000003/sig00000452 , \blk00000003/sig00000453 , \blk00000003/sig00000454 , \blk00000003/sig00000455 , +\blk00000003/sig00000456 , \blk00000003/sig00000457 , \blk00000003/sig00000458 , \blk00000003/sig00000459 , \blk00000003/sig0000045a , +\blk00000003/sig0000045b , \blk00000003/sig0000045c , \blk00000003/sig0000045d }), + .C({\NLW_blk00000003/blk00000108_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000108_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000108_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000108_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000108_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000108_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000007d8 , \blk00000003/sig000007d9 , \blk00000003/sig000007da , +\blk00000003/sig000007db , \blk00000003/sig000007dc , \blk00000003/sig000007dd , \blk00000003/sig000007de , \blk00000003/sig000007df , +\blk00000003/sig000007e0 , \blk00000003/sig000007e1 , \blk00000003/sig000007e2 , \blk00000003/sig000007e3 , \blk00000003/sig000007e4 , +\blk00000003/sig000007e5 , \blk00000003/sig000007e6 , \blk00000003/sig000007e7 }), + .PCOUT({\blk00000003/sig000007e8 , \blk00000003/sig000007e9 , \blk00000003/sig000007ea , \blk00000003/sig000007eb , \blk00000003/sig000007ec , +\blk00000003/sig000007ed , \blk00000003/sig000007ee , \blk00000003/sig000007ef , \blk00000003/sig000007f0 , \blk00000003/sig000007f1 , +\blk00000003/sig000007f2 , \blk00000003/sig000007f3 , \blk00000003/sig000007f4 , \blk00000003/sig000007f5 , \blk00000003/sig000007f6 , +\blk00000003/sig000007f7 , \blk00000003/sig000007f8 , \blk00000003/sig000007f9 , \blk00000003/sig000007fa , \blk00000003/sig000007fb , +\blk00000003/sig000007fc , \blk00000003/sig000007fd , \blk00000003/sig000007fe , \blk00000003/sig000007ff , \blk00000003/sig00000800 , +\blk00000003/sig00000801 , \blk00000003/sig00000802 , \blk00000003/sig00000803 , \blk00000003/sig00000804 , \blk00000003/sig00000805 , +\blk00000003/sig00000806 , \blk00000003/sig00000807 , \blk00000003/sig00000808 , \blk00000003/sig00000809 , \blk00000003/sig0000080a , +\blk00000003/sig0000080b , \blk00000003/sig0000080c , \blk00000003/sig0000080d , \blk00000003/sig0000080e , \blk00000003/sig0000080f , +\blk00000003/sig00000810 , \blk00000003/sig00000811 , \blk00000003/sig00000812 , \blk00000003/sig00000813 , \blk00000003/sig00000814 , +\blk00000003/sig00000815 , \blk00000003/sig00000816 , \blk00000003/sig00000817 }), + .A({\blk00000003/sig00000580 , \blk00000003/sig00000581 , \blk00000003/sig00000582 , \blk00000003/sig00000583 , \blk00000003/sig00000584 , +\blk00000003/sig00000585 , \blk00000003/sig00000586 , \blk00000003/sig00000587 , \blk00000003/sig00000588 , \blk00000003/sig00000589 , +\blk00000003/sig0000058a , \blk00000003/sig0000058b , \blk00000003/sig0000058c , \blk00000003/sig0000058d , \blk00000003/sig0000058e , +\blk00000003/sig0000058f , \blk00000003/sig00000590 , \blk00000003/sig00000591 }), + .M({\NLW_blk00000003/blk00000108_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000108_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000108_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000107 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000107_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000107_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000778 , \blk00000003/sig00000779 , \blk00000003/sig0000077a , +\blk00000003/sig0000077b , \blk00000003/sig0000077c , \blk00000003/sig0000077d , \blk00000003/sig0000077e , \blk00000003/sig0000077f , +\blk00000003/sig00000780 , \blk00000003/sig00000781 , \blk00000003/sig00000782 , \blk00000003/sig00000783 , \blk00000003/sig00000784 , +\blk00000003/sig00000785 , \blk00000003/sig00000786 , \blk00000003/sig00000787 }), + .BCOUT({\NLW_blk00000003/blk00000107_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000107_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000107_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000788 , \blk00000003/sig00000789 , \blk00000003/sig0000078a , \blk00000003/sig0000078b , \blk00000003/sig0000078c , +\blk00000003/sig0000078d , \blk00000003/sig0000078e , \blk00000003/sig0000078f , \blk00000003/sig00000790 , \blk00000003/sig00000791 , +\blk00000003/sig00000792 , \blk00000003/sig00000793 , \blk00000003/sig00000794 , \blk00000003/sig00000795 , \blk00000003/sig00000796 , +\blk00000003/sig00000797 , \blk00000003/sig00000798 , \blk00000003/sig00000799 , \blk00000003/sig0000079a , \blk00000003/sig0000079b , +\blk00000003/sig0000079c , \blk00000003/sig0000079d , \blk00000003/sig0000079e , \blk00000003/sig0000079f , \blk00000003/sig000007a0 , +\blk00000003/sig000007a1 , \blk00000003/sig000007a2 , \blk00000003/sig000007a3 , \blk00000003/sig000007a4 , \blk00000003/sig000007a5 , +\blk00000003/sig000007a6 , \blk00000003/sig000007a7 , \blk00000003/sig000007a8 , \blk00000003/sig000007a9 , \blk00000003/sig000007aa , +\blk00000003/sig000007ab , \blk00000003/sig000007ac , \blk00000003/sig000007ad , \blk00000003/sig000007ae , \blk00000003/sig000007af , +\blk00000003/sig000007b0 , \blk00000003/sig000007b1 , \blk00000003/sig000007b2 , \blk00000003/sig000007b3 , \blk00000003/sig000007b4 , +\blk00000003/sig000007b5 , \blk00000003/sig000007b6 , \blk00000003/sig000007b7 }), + .C({\NLW_blk00000003/blk00000107_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000107_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000107_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000107_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000107_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000107_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000007b8 , \blk00000003/sig000007b9 , \blk00000003/sig000007ba , +\blk00000003/sig000007bb , \blk00000003/sig000007bc , \blk00000003/sig000007bd , \blk00000003/sig000007be , \blk00000003/sig000007bf , +\blk00000003/sig000007c0 , \blk00000003/sig000007c1 , \blk00000003/sig000007c2 , \blk00000003/sig000007c3 , \blk00000003/sig000007c4 , +\blk00000003/sig000007c5 , \blk00000003/sig000007c6 , \blk00000003/sig000007c7 }), + .PCOUT({\blk00000003/sig000001d2 , \blk00000003/sig000001d3 , \blk00000003/sig000001d4 , \blk00000003/sig000001d5 , \blk00000003/sig000001d6 , +\blk00000003/sig000001d7 , \blk00000003/sig000001d8 , \blk00000003/sig000001d9 , \blk00000003/sig000001da , \blk00000003/sig000001db , +\blk00000003/sig000001dc , \blk00000003/sig000001dd , \blk00000003/sig000001de , \blk00000003/sig000001df , \blk00000003/sig000001e0 , +\blk00000003/sig000001e1 , \blk00000003/sig000001e2 , \blk00000003/sig000001e3 , \blk00000003/sig000001e4 , \blk00000003/sig000001e5 , +\blk00000003/sig000001e6 , \blk00000003/sig000001e7 , \blk00000003/sig000001e8 , \blk00000003/sig000001e9 , \blk00000003/sig000001ea , +\blk00000003/sig000001eb , \blk00000003/sig000001ec , \blk00000003/sig000001ed , \blk00000003/sig000001ee , \blk00000003/sig000001ef , +\blk00000003/sig000001f0 , \blk00000003/sig000001f1 , \blk00000003/sig000001f2 , \blk00000003/sig000001f3 , \blk00000003/sig000001f4 , +\blk00000003/sig000001f5 , \blk00000003/sig000001f6 , \blk00000003/sig000001f7 , \blk00000003/sig000001f8 , \blk00000003/sig000001f9 , +\blk00000003/sig000001fa , \blk00000003/sig000001fb , \blk00000003/sig000001fc , \blk00000003/sig000001fd , \blk00000003/sig000001fe , +\blk00000003/sig000001ff , \blk00000003/sig00000200 , \blk00000003/sig00000201 }), + .A({\blk00000003/sig000004ee , \blk00000003/sig000004ef , \blk00000003/sig000004f0 , \blk00000003/sig000004f1 , \blk00000003/sig000004f2 , +\blk00000003/sig000004f3 , \blk00000003/sig000004f4 , \blk00000003/sig000004f5 , \blk00000003/sig000004f6 , \blk00000003/sig000004f7 , +\blk00000003/sig000004f8 , \blk00000003/sig000004f9 , \blk00000003/sig000004fa , \blk00000003/sig000004fb , \blk00000003/sig000004fc , +\blk00000003/sig000004fd , \blk00000003/sig000004fe , \blk00000003/sig000004ff }), + .M({\NLW_blk00000003/blk00000107_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000107_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000107_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000106 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000106_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000106_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000728 , \blk00000003/sig00000729 , \blk00000003/sig0000072a , +\blk00000003/sig0000072b , \blk00000003/sig0000072c , \blk00000003/sig0000072d , \blk00000003/sig0000072e , \blk00000003/sig0000072f , +\blk00000003/sig00000730 , \blk00000003/sig00000731 , \blk00000003/sig00000732 , \blk00000003/sig00000733 , \blk00000003/sig00000734 , +\blk00000003/sig00000735 , \blk00000003/sig00000736 , \blk00000003/sig00000737 }), + .BCOUT({\NLW_blk00000003/blk00000106_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000106_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000106_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000738 , \blk00000003/sig00000739 , \blk00000003/sig0000073a , \blk00000003/sig0000073b , \blk00000003/sig0000073c , +\blk00000003/sig0000073d , \blk00000003/sig0000073e , \blk00000003/sig0000073f , \blk00000003/sig00000740 , \blk00000003/sig00000741 , +\blk00000003/sig00000742 , \blk00000003/sig00000743 , \blk00000003/sig00000744 , \blk00000003/sig00000745 , \blk00000003/sig00000746 , +\blk00000003/sig00000747 , \blk00000003/sig00000748 , \blk00000003/sig00000749 , \blk00000003/sig0000074a , \blk00000003/sig0000074b , +\blk00000003/sig0000074c , \blk00000003/sig0000074d , \blk00000003/sig0000074e , \blk00000003/sig0000074f , \blk00000003/sig00000750 , +\blk00000003/sig00000751 , \blk00000003/sig00000752 , \blk00000003/sig00000753 , \blk00000003/sig00000754 , \blk00000003/sig00000755 , +\blk00000003/sig00000756 , \blk00000003/sig00000757 , \blk00000003/sig00000758 , \blk00000003/sig00000759 , \blk00000003/sig0000075a , +\blk00000003/sig0000075b , \blk00000003/sig0000075c , \blk00000003/sig0000075d , \blk00000003/sig0000075e , \blk00000003/sig0000075f , +\blk00000003/sig00000760 , \blk00000003/sig00000761 , \blk00000003/sig00000762 , \blk00000003/sig00000763 , \blk00000003/sig00000764 , +\blk00000003/sig00000765 , \blk00000003/sig00000766 , \blk00000003/sig00000767 }), + .C({\NLW_blk00000003/blk00000106_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000106_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000106_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000106_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000106_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000106_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000768 , \blk00000003/sig00000769 , \blk00000003/sig0000076a , +\blk00000003/sig0000076b , \blk00000003/sig0000076c , \blk00000003/sig0000076d , \blk00000003/sig0000076e , \blk00000003/sig0000076f , +\blk00000003/sig00000770 , \blk00000003/sig00000771 , \blk00000003/sig00000772 , \blk00000003/sig00000773 , \blk00000003/sig00000774 , +\blk00000003/sig00000775 , \blk00000003/sig00000776 , \blk00000003/sig00000777 }), + .PCOUT({\blk00000003/sig0000025a , \blk00000003/sig0000025b , \blk00000003/sig0000025c , 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+\NLW_blk00000003/blk00000106_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000106_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000106_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000105 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000105_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000105_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000718 , \blk00000003/sig00000718 , \blk00000003/sig00000718 , \blk00000003/sig00000718 , \blk00000003/sig00000718 , +\blk00000003/sig00000718 , \blk00000003/sig00000718 , \blk00000003/sig00000718 , \blk00000003/sig00000718 , \blk00000003/sig00000718 , +\blk00000003/sig00000718 , \blk00000003/sig00000719 , \blk00000003/sig0000071a , \blk00000003/sig0000071b , \blk00000003/sig0000071c , +\blk00000003/sig0000071d , \blk00000003/sig0000071e , \blk00000003/sig0000071f }), + .BCOUT({\NLW_blk00000003/blk00000105_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000105_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000105_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000006e8 , \blk00000003/sig000006e9 , \blk00000003/sig000006ea , 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\blk00000003/sig0000070f , +\blk00000003/sig00000710 , \blk00000003/sig00000711 , \blk00000003/sig00000712 , \blk00000003/sig00000713 , \blk00000003/sig00000714 , +\blk00000003/sig00000715 , \blk00000003/sig00000716 , \blk00000003/sig00000717 }), + .C({\NLW_blk00000003/blk00000105_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000105_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000105_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000105_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000105_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000105_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000720 , \blk00000003/sig00000720 , \blk00000003/sig00000720 , \blk00000003/sig00000720 , \blk00000003/sig00000720 , +\blk00000003/sig00000720 , \blk00000003/sig00000720 , \blk00000003/sig00000720 , \blk00000003/sig00000720 , \blk00000003/sig00000720 , +\blk00000003/sig00000720 , \blk00000003/sig00000721 , \blk00000003/sig00000722 , \blk00000003/sig00000723 , \blk00000003/sig00000724 , +\blk00000003/sig00000725 , \blk00000003/sig00000726 , \blk00000003/sig00000727 }), + .PCOUT({\blk00000003/sig00000508 , \blk00000003/sig00000509 , \blk00000003/sig0000050a , \blk00000003/sig0000050b , \blk00000003/sig0000050c , +\blk00000003/sig0000050d , \blk00000003/sig0000050e , \blk00000003/sig0000050f , \blk00000003/sig00000510 , \blk00000003/sig00000511 , +\blk00000003/sig00000512 , \blk00000003/sig00000513 , \blk00000003/sig00000514 , \blk00000003/sig00000515 , \blk00000003/sig00000516 , +\blk00000003/sig00000517 , \blk00000003/sig00000518 , \blk00000003/sig00000519 , \blk00000003/sig0000051a , \blk00000003/sig0000051b , +\blk00000003/sig0000051c , \blk00000003/sig0000051d , \blk00000003/sig0000051e , \blk00000003/sig0000051f , \blk00000003/sig00000520 , +\blk00000003/sig00000521 , \blk00000003/sig00000522 , \blk00000003/sig00000523 , \blk00000003/sig00000524 , \blk00000003/sig00000525 , +\blk00000003/sig00000526 , \blk00000003/sig00000527 , \blk00000003/sig00000528 , \blk00000003/sig00000529 , \blk00000003/sig0000052a , +\blk00000003/sig0000052b , \blk00000003/sig0000052c , \blk00000003/sig0000052d , \blk00000003/sig0000052e , \blk00000003/sig0000052f , +\blk00000003/sig00000530 , \blk00000003/sig00000531 , \blk00000003/sig00000532 , \blk00000003/sig00000533 , \blk00000003/sig00000534 , +\blk00000003/sig00000535 , \blk00000003/sig00000536 , \blk00000003/sig00000537 }), + .A({\blk00000003/sig00000646 , \blk00000003/sig00000647 , \blk00000003/sig00000648 , \blk00000003/sig00000649 , \blk00000003/sig0000064a , +\blk00000003/sig0000064b , \blk00000003/sig0000064c , \blk00000003/sig0000064d , \blk00000003/sig0000064e , \blk00000003/sig0000064f , +\blk00000003/sig00000650 , \blk00000003/sig00000651 , \blk00000003/sig00000652 , \blk00000003/sig00000653 , \blk00000003/sig00000654 , +\blk00000003/sig00000655 , \blk00000003/sig00000656 , \blk00000003/sig00000657 }), + .M({\NLW_blk00000003/blk00000105_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000105_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000105_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000104 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000104_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000104_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig000006d8 , \blk00000003/sig000006d8 , \blk00000003/sig000006d8 , \blk00000003/sig000006d8 , \blk00000003/sig000006d8 , +\blk00000003/sig000006d8 , \blk00000003/sig000006d8 , \blk00000003/sig000006d8 , \blk00000003/sig000006d8 , \blk00000003/sig000006d8 , +\blk00000003/sig000006d8 , \blk00000003/sig000006d9 , \blk00000003/sig000006da , \blk00000003/sig000006db , \blk00000003/sig000006dc , +\blk00000003/sig000006dd , \blk00000003/sig000006de , \blk00000003/sig000006df }), + .BCOUT({\NLW_blk00000003/blk00000104_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000104_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000104_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000006a8 , \blk00000003/sig000006a9 , \blk00000003/sig000006aa , \blk00000003/sig000006ab , \blk00000003/sig000006ac , +\blk00000003/sig000006ad , \blk00000003/sig000006ae , \blk00000003/sig000006af , \blk00000003/sig000006b0 , \blk00000003/sig000006b1 , +\blk00000003/sig000006b2 , \blk00000003/sig000006b3 , \blk00000003/sig000006b4 , \blk00000003/sig000006b5 , \blk00000003/sig000006b6 , +\blk00000003/sig000006b7 , \blk00000003/sig000006b8 , \blk00000003/sig000006b9 , \blk00000003/sig000006ba , \blk00000003/sig000006bb , +\blk00000003/sig000006bc , \blk00000003/sig000006bd , \blk00000003/sig000006be , \blk00000003/sig000006bf , \blk00000003/sig000006c0 , +\blk00000003/sig000006c1 , \blk00000003/sig000006c2 , \blk00000003/sig000006c3 , \blk00000003/sig000006c4 , \blk00000003/sig000006c5 , +\blk00000003/sig000006c6 , \blk00000003/sig000006c7 , \blk00000003/sig000006c8 , \blk00000003/sig000006c9 , \blk00000003/sig000006ca , +\blk00000003/sig000006cb , \blk00000003/sig000006cc , \blk00000003/sig000006cd , \blk00000003/sig000006ce , \blk00000003/sig000006cf , +\blk00000003/sig000006d0 , \blk00000003/sig000006d1 , \blk00000003/sig000006d2 , \blk00000003/sig000006d3 , \blk00000003/sig000006d4 , +\blk00000003/sig000006d5 , \blk00000003/sig000006d6 , \blk00000003/sig000006d7 }), + .C({\NLW_blk00000003/blk00000104_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000104_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000104_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000104_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000104_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000104_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig000006e0 , \blk00000003/sig000006e0 , \blk00000003/sig000006e0 , \blk00000003/sig000006e0 , \blk00000003/sig000006e0 , +\blk00000003/sig000006e0 , \blk00000003/sig000006e0 , \blk00000003/sig000006e0 , \blk00000003/sig000006e0 , \blk00000003/sig000006e0 , +\blk00000003/sig000006e0 , \blk00000003/sig000006e1 , \blk00000003/sig000006e2 , \blk00000003/sig000006e3 , \blk00000003/sig000006e4 , +\blk00000003/sig000006e5 , \blk00000003/sig000006e6 , \blk00000003/sig000006e7 }), + .PCOUT({\blk00000003/sig000006e8 , \blk00000003/sig000006e9 , \blk00000003/sig000006ea , \blk00000003/sig000006eb , \blk00000003/sig000006ec , +\blk00000003/sig000006ed , \blk00000003/sig000006ee , \blk00000003/sig000006ef , \blk00000003/sig000006f0 , \blk00000003/sig000006f1 , +\blk00000003/sig000006f2 , \blk00000003/sig000006f3 , \blk00000003/sig000006f4 , \blk00000003/sig000006f5 , \blk00000003/sig000006f6 , +\blk00000003/sig000006f7 , \blk00000003/sig000006f8 , \blk00000003/sig000006f9 , \blk00000003/sig000006fa , \blk00000003/sig000006fb , +\blk00000003/sig000006fc , \blk00000003/sig000006fd , \blk00000003/sig000006fe , \blk00000003/sig000006ff , \blk00000003/sig00000700 , +\blk00000003/sig00000701 , \blk00000003/sig00000702 , \blk00000003/sig00000703 , \blk00000003/sig00000704 , \blk00000003/sig00000705 , +\blk00000003/sig00000706 , \blk00000003/sig00000707 , \blk00000003/sig00000708 , \blk00000003/sig00000709 , \blk00000003/sig0000070a , +\blk00000003/sig0000070b , \blk00000003/sig0000070c , \blk00000003/sig0000070d , \blk00000003/sig0000070e , \blk00000003/sig0000070f , +\blk00000003/sig00000710 , \blk00000003/sig00000711 , \blk00000003/sig00000712 , \blk00000003/sig00000713 , \blk00000003/sig00000714 , +\blk00000003/sig00000715 , \blk00000003/sig00000716 , \blk00000003/sig00000717 }), + .A({\blk00000003/sig00000624 , \blk00000003/sig00000625 , \blk00000003/sig00000626 , \blk00000003/sig00000627 , \blk00000003/sig00000628 , +\blk00000003/sig00000629 , \blk00000003/sig0000062a , \blk00000003/sig0000062b , \blk00000003/sig0000062c , \blk00000003/sig0000062d , +\blk00000003/sig0000062e , \blk00000003/sig0000062f , \blk00000003/sig00000630 , \blk00000003/sig00000631 , \blk00000003/sig00000632 , +\blk00000003/sig00000633 , \blk00000003/sig00000634 , \blk00000003/sig00000635 }), + .M({\NLW_blk00000003/blk00000104_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000104_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000104_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000103 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000103_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000103_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000698 , \blk00000003/sig00000698 , \blk00000003/sig00000698 , \blk00000003/sig00000698 , \blk00000003/sig00000698 , +\blk00000003/sig00000698 , \blk00000003/sig00000698 , \blk00000003/sig00000698 , \blk00000003/sig00000698 , \blk00000003/sig00000698 , +\blk00000003/sig00000698 , \blk00000003/sig00000699 , \blk00000003/sig0000069a , \blk00000003/sig0000069b , \blk00000003/sig0000069c , +\blk00000003/sig0000069d , \blk00000003/sig0000069e , \blk00000003/sig0000069f }), + .BCOUT({\NLW_blk00000003/blk00000103_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000103_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000103_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000103_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000103_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000103_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000103_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000103_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000103_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000103_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000103_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000103_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000103_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000103_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000103_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000103_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000103_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000103_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000668 , \blk00000003/sig00000669 , \blk00000003/sig0000066a , \blk00000003/sig0000066b , \blk00000003/sig0000066c , +\blk00000003/sig0000066d , \blk00000003/sig0000066e , \blk00000003/sig0000066f , \blk00000003/sig00000670 , \blk00000003/sig00000671 , +\blk00000003/sig00000672 , \blk00000003/sig00000673 , \blk00000003/sig00000674 , \blk00000003/sig00000675 , \blk00000003/sig00000676 , +\blk00000003/sig00000677 , \blk00000003/sig00000678 , \blk00000003/sig00000679 , \blk00000003/sig0000067a , \blk00000003/sig0000067b , +\blk00000003/sig0000067c , \blk00000003/sig0000067d , \blk00000003/sig0000067e , \blk00000003/sig0000067f , \blk00000003/sig00000680 , +\blk00000003/sig00000681 , \blk00000003/sig00000682 , \blk00000003/sig00000683 , \blk00000003/sig00000684 , \blk00000003/sig00000685 , +\blk00000003/sig00000686 , \blk00000003/sig00000687 , \blk00000003/sig00000688 , \blk00000003/sig00000689 , \blk00000003/sig0000068a , +\blk00000003/sig0000068b , \blk00000003/sig0000068c , \blk00000003/sig0000068d , \blk00000003/sig0000068e , \blk00000003/sig0000068f , +\blk00000003/sig00000690 , \blk00000003/sig00000691 , \blk00000003/sig00000692 , \blk00000003/sig00000693 , \blk00000003/sig00000694 , +\blk00000003/sig00000695 , \blk00000003/sig00000696 , \blk00000003/sig00000697 }), + .C({\NLW_blk00000003/blk00000103_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000103_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000103_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000103_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000103_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000103_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig000006a0 , \blk00000003/sig000006a0 , \blk00000003/sig000006a0 , \blk00000003/sig000006a0 , \blk00000003/sig000006a0 , +\blk00000003/sig000006a0 , \blk00000003/sig000006a0 , \blk00000003/sig000006a0 , \blk00000003/sig000006a0 , \blk00000003/sig000006a0 , +\blk00000003/sig000006a0 , \blk00000003/sig000006a1 , \blk00000003/sig000006a2 , \blk00000003/sig000006a3 , \blk00000003/sig000006a4 , +\blk00000003/sig000006a5 , \blk00000003/sig000006a6 , \blk00000003/sig000006a7 }), + .PCOUT({\blk00000003/sig000006a8 , \blk00000003/sig000006a9 , \blk00000003/sig000006aa , \blk00000003/sig000006ab , \blk00000003/sig000006ac , +\blk00000003/sig000006ad , \blk00000003/sig000006ae , \blk00000003/sig000006af , \blk00000003/sig000006b0 , \blk00000003/sig000006b1 , +\blk00000003/sig000006b2 , \blk00000003/sig000006b3 , \blk00000003/sig000006b4 , \blk00000003/sig000006b5 , \blk00000003/sig000006b6 , +\blk00000003/sig000006b7 , \blk00000003/sig000006b8 , \blk00000003/sig000006b9 , \blk00000003/sig000006ba , \blk00000003/sig000006bb , +\blk00000003/sig000006bc , \blk00000003/sig000006bd , \blk00000003/sig000006be , \blk00000003/sig000006bf , \blk00000003/sig000006c0 , +\blk00000003/sig000006c1 , \blk00000003/sig000006c2 , \blk00000003/sig000006c3 , \blk00000003/sig000006c4 , \blk00000003/sig000006c5 , +\blk00000003/sig000006c6 , \blk00000003/sig000006c7 , \blk00000003/sig000006c8 , \blk00000003/sig000006c9 , \blk00000003/sig000006ca , +\blk00000003/sig000006cb , \blk00000003/sig000006cc , \blk00000003/sig000006cd , \blk00000003/sig000006ce , \blk00000003/sig000006cf , +\blk00000003/sig000006d0 , \blk00000003/sig000006d1 , \blk00000003/sig000006d2 , \blk00000003/sig000006d3 , \blk00000003/sig000006d4 , +\blk00000003/sig000006d5 , \blk00000003/sig000006d6 , \blk00000003/sig000006d7 }), + .A({\blk00000003/sig000005d2 , \blk00000003/sig000005d3 , \blk00000003/sig000005d4 , \blk00000003/sig000005d5 , \blk00000003/sig000005d6 , +\blk00000003/sig000005d7 , \blk00000003/sig000005d8 , \blk00000003/sig000005d9 , \blk00000003/sig000005da , \blk00000003/sig000005db , +\blk00000003/sig000005dc , \blk00000003/sig000005dd , \blk00000003/sig000005de , \blk00000003/sig000005df , \blk00000003/sig000005e0 , +\blk00000003/sig000005e1 , \blk00000003/sig000005e2 , \blk00000003/sig000005e3 }), + .M({\NLW_blk00000003/blk00000103_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000103_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000103_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000102 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000102_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000102_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000658 , \blk00000003/sig00000658 , \blk00000003/sig00000658 , \blk00000003/sig00000658 , \blk00000003/sig00000658 , +\blk00000003/sig00000658 , \blk00000003/sig00000658 , \blk00000003/sig00000658 , \blk00000003/sig00000658 , \blk00000003/sig00000658 , +\blk00000003/sig00000658 , \blk00000003/sig00000659 , \blk00000003/sig0000065a , \blk00000003/sig0000065b , \blk00000003/sig0000065c , +\blk00000003/sig0000065d , \blk00000003/sig0000065e , \blk00000003/sig0000065f }), + .BCOUT({\NLW_blk00000003/blk00000102_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000102_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000102_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000102_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000102_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000102_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000102_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000102_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000102_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000102_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000102_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000102_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000102_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000102_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000102_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000102_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000102_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000102_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000003de , \blk00000003/sig000003df , \blk00000003/sig000003e0 , \blk00000003/sig000003e1 , \blk00000003/sig000003e2 , +\blk00000003/sig000003e3 , \blk00000003/sig000003e4 , \blk00000003/sig000003e5 , \blk00000003/sig000003e6 , \blk00000003/sig000003e7 , +\blk00000003/sig000003e8 , \blk00000003/sig000003e9 , \blk00000003/sig000003ea , \blk00000003/sig000003eb , \blk00000003/sig000003ec , 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\NLW_blk00000003/blk00000102_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000102_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000101 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000101_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000101_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + 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\NLW_blk00000003/blk00000101_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000101_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000101_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig0000063e , \blk00000003/sig0000063e , \blk00000003/sig0000063e , \blk00000003/sig0000063e , \blk00000003/sig0000063e , +\blk00000003/sig0000063e , \blk00000003/sig0000063e , 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\blk00000003/sig00000653 , \blk00000003/sig00000654 , +\blk00000003/sig00000655 , \blk00000003/sig00000656 , \blk00000003/sig00000657 }), + .M({\NLW_blk00000003/blk00000101_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000101_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000101_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000100 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000100_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000100_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig000005e4 , \blk00000003/sig000005e4 , \blk00000003/sig000005e4 , \blk00000003/sig000005e4 , \blk00000003/sig000005e4 , +\blk00000003/sig000005e4 , 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+\NLW_blk00000003/blk00000100_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000100_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000100_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000100_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000100_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000100_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000005a2 , \blk00000003/sig000005a3 , \blk00000003/sig000005a4 , \blk00000003/sig000005a5 , \blk00000003/sig000005a6 , +\blk00000003/sig000005a7 , \blk00000003/sig000005a8 , \blk00000003/sig000005a9 , \blk00000003/sig000005aa , \blk00000003/sig000005ab , +\blk00000003/sig000005ac , \blk00000003/sig000005ad , \blk00000003/sig000005ae , \blk00000003/sig000005af , \blk00000003/sig000005b0 , +\blk00000003/sig000005b1 , \blk00000003/sig000005b2 , \blk00000003/sig000005b3 , \blk00000003/sig000005b4 , \blk00000003/sig000005b5 , +\blk00000003/sig000005b6 , \blk00000003/sig000005b7 , \blk00000003/sig000005b8 , \blk00000003/sig000005b9 , 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\NLW_blk00000003/blk00000100_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000100_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000100_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000100_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000100_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000100_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000100_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000100_C<22>_UNCONNECTED , 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\NLW_blk00000003/blk00000100_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000100_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000100_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000100_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000100_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig000005ec , \blk00000003/sig000005ec , \blk00000003/sig000005ec , \blk00000003/sig000005ec , \blk00000003/sig000005ec , +\blk00000003/sig000005ec , \blk00000003/sig000005ec , \blk00000003/sig000005ec , \blk00000003/sig000005ec , \blk00000003/sig000005ec , +\blk00000003/sig000005ec , \blk00000003/sig000005ed , \blk00000003/sig000005ee , \blk00000003/sig000005ef , \blk00000003/sig000005f0 , +\blk00000003/sig000005f1 , \blk00000003/sig000005f2 , \blk00000003/sig000005f3 }), + .PCOUT({\blk00000003/sig000005f4 , \blk00000003/sig000005f5 , \blk00000003/sig000005f6 , \blk00000003/sig000005f7 , \blk00000003/sig000005f8 , +\blk00000003/sig000005f9 , \blk00000003/sig000005fa , \blk00000003/sig000005fb , \blk00000003/sig000005fc , \blk00000003/sig000005fd , +\blk00000003/sig000005fe , \blk00000003/sig000005ff , \blk00000003/sig00000600 , \blk00000003/sig00000601 , \blk00000003/sig00000602 , +\blk00000003/sig00000603 , \blk00000003/sig00000604 , \blk00000003/sig00000605 , \blk00000003/sig00000606 , \blk00000003/sig00000607 , +\blk00000003/sig00000608 , \blk00000003/sig00000609 , \blk00000003/sig0000060a , \blk00000003/sig0000060b , \blk00000003/sig0000060c , +\blk00000003/sig0000060d , \blk00000003/sig0000060e , \blk00000003/sig0000060f , \blk00000003/sig00000610 , \blk00000003/sig00000611 , +\blk00000003/sig00000612 , \blk00000003/sig00000613 , \blk00000003/sig00000614 , \blk00000003/sig00000615 , \blk00000003/sig00000616 , +\blk00000003/sig00000617 , \blk00000003/sig00000618 , \blk00000003/sig00000619 , \blk00000003/sig0000061a , \blk00000003/sig0000061b , +\blk00000003/sig0000061c , \blk00000003/sig0000061d , \blk00000003/sig0000061e , \blk00000003/sig0000061f , \blk00000003/sig00000620 , +\blk00000003/sig00000621 , \blk00000003/sig00000622 , \blk00000003/sig00000623 }), + .A({\blk00000003/sig00000624 , \blk00000003/sig00000625 , \blk00000003/sig00000626 , \blk00000003/sig00000627 , \blk00000003/sig00000628 , +\blk00000003/sig00000629 , \blk00000003/sig0000062a , \blk00000003/sig0000062b , \blk00000003/sig0000062c , \blk00000003/sig0000062d , +\blk00000003/sig0000062e , \blk00000003/sig0000062f , \blk00000003/sig00000630 , \blk00000003/sig00000631 , \blk00000003/sig00000632 , +\blk00000003/sig00000633 , \blk00000003/sig00000634 , \blk00000003/sig00000635 }), + .M({\NLW_blk00000003/blk00000100_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000100_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000100_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk000000ff ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk000000ff_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk000000ff_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000592 , \blk00000003/sig00000592 , \blk00000003/sig00000592 , \blk00000003/sig00000592 , \blk00000003/sig00000592 , +\blk00000003/sig00000592 , \blk00000003/sig00000592 , \blk00000003/sig00000592 , \blk00000003/sig00000592 , \blk00000003/sig00000592 , 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+\NLW_blk00000003/blk000000ff_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000ff_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000ff_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000550 , \blk00000003/sig00000551 , \blk00000003/sig00000552 , \blk00000003/sig00000553 , \blk00000003/sig00000554 , +\blk00000003/sig00000555 , \blk00000003/sig00000556 , \blk00000003/sig00000557 , \blk00000003/sig00000558 , \blk00000003/sig00000559 , +\blk00000003/sig0000055a , \blk00000003/sig0000055b , \blk00000003/sig0000055c , \blk00000003/sig0000055d , \blk00000003/sig0000055e , +\blk00000003/sig0000055f , \blk00000003/sig00000560 , \blk00000003/sig00000561 , \blk00000003/sig00000562 , \blk00000003/sig00000563 , +\blk00000003/sig00000564 , \blk00000003/sig00000565 , \blk00000003/sig00000566 , \blk00000003/sig00000567 , \blk00000003/sig00000568 , +\blk00000003/sig00000569 , \blk00000003/sig0000056a , \blk00000003/sig0000056b , \blk00000003/sig0000056c , \blk00000003/sig0000056d , +\blk00000003/sig0000056e , \blk00000003/sig0000056f , \blk00000003/sig00000570 , \blk00000003/sig00000571 , \blk00000003/sig00000572 , +\blk00000003/sig00000573 , \blk00000003/sig00000574 , \blk00000003/sig00000575 , \blk00000003/sig00000576 , \blk00000003/sig00000577 , +\blk00000003/sig00000578 , \blk00000003/sig00000579 , \blk00000003/sig0000057a , \blk00000003/sig0000057b , \blk00000003/sig0000057c , +\blk00000003/sig0000057d , \blk00000003/sig0000057e , \blk00000003/sig0000057f }), + .C({\NLW_blk00000003/blk000000ff_C<47>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<46>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_C<45>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<44>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<43>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_C<42>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<41>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<40>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_C<39>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<38>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<37>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_C<36>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<35>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<34>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_C<33>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<32>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<31>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_C<30>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<29>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<28>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_C<27>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<26>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<25>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_C<24>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<23>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_C<21>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<20>_UNCONNECTED , \NLW_blk00000003/blk000000ff_C<19>_UNCONNECTED , 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\NLW_blk00000003/blk000000ff_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000ff_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig0000059a , \blk00000003/sig0000059a , \blk00000003/sig0000059a , \blk00000003/sig0000059a , \blk00000003/sig0000059a , +\blk00000003/sig0000059a , \blk00000003/sig0000059a , \blk00000003/sig0000059a , \blk00000003/sig0000059a , \blk00000003/sig0000059a , +\blk00000003/sig0000059a , \blk00000003/sig0000059b , \blk00000003/sig0000059c , \blk00000003/sig0000059d , \blk00000003/sig0000059e , +\blk00000003/sig0000059f , \blk00000003/sig000005a0 , \blk00000003/sig000005a1 }), + .PCOUT({\blk00000003/sig000005a2 , \blk00000003/sig000005a3 , \blk00000003/sig000005a4 , \blk00000003/sig000005a5 , \blk00000003/sig000005a6 , +\blk00000003/sig000005a7 , \blk00000003/sig000005a8 , \blk00000003/sig000005a9 , \blk00000003/sig000005aa , \blk00000003/sig000005ab , +\blk00000003/sig000005ac , \blk00000003/sig000005ad , \blk00000003/sig000005ae , \blk00000003/sig000005af , \blk00000003/sig000005b0 , +\blk00000003/sig000005b1 , \blk00000003/sig000005b2 , \blk00000003/sig000005b3 , \blk00000003/sig000005b4 , \blk00000003/sig000005b5 , +\blk00000003/sig000005b6 , \blk00000003/sig000005b7 , \blk00000003/sig000005b8 , \blk00000003/sig000005b9 , \blk00000003/sig000005ba , +\blk00000003/sig000005bb , \blk00000003/sig000005bc , \blk00000003/sig000005bd , \blk00000003/sig000005be , \blk00000003/sig000005bf , +\blk00000003/sig000005c0 , \blk00000003/sig000005c1 , \blk00000003/sig000005c2 , \blk00000003/sig000005c3 , \blk00000003/sig000005c4 , +\blk00000003/sig000005c5 , \blk00000003/sig000005c6 , \blk00000003/sig000005c7 , \blk00000003/sig000005c8 , \blk00000003/sig000005c9 , +\blk00000003/sig000005ca , \blk00000003/sig000005cb , \blk00000003/sig000005cc , \blk00000003/sig000005cd , \blk00000003/sig000005ce , +\blk00000003/sig000005cf , \blk00000003/sig000005d0 , \blk00000003/sig000005d1 }), + .A({\blk00000003/sig000005d2 , \blk00000003/sig000005d3 , \blk00000003/sig000005d4 , \blk00000003/sig000005d5 , \blk00000003/sig000005d6 , +\blk00000003/sig000005d7 , \blk00000003/sig000005d8 , \blk00000003/sig000005d9 , \blk00000003/sig000005da , \blk00000003/sig000005db , +\blk00000003/sig000005dc , \blk00000003/sig000005dd , \blk00000003/sig000005de , \blk00000003/sig000005df , \blk00000003/sig000005e0 , +\blk00000003/sig000005e1 , \blk00000003/sig000005e2 , \blk00000003/sig000005e3 }), + .M({\NLW_blk00000003/blk000000ff_M<35>_UNCONNECTED , \NLW_blk00000003/blk000000ff_M<34>_UNCONNECTED , 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\NLW_blk00000003/blk000000ff_M<13>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_M<12>_UNCONNECTED , \NLW_blk00000003/blk000000ff_M<11>_UNCONNECTED , \NLW_blk00000003/blk000000ff_M<10>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_M<9>_UNCONNECTED , \NLW_blk00000003/blk000000ff_M<8>_UNCONNECTED , \NLW_blk00000003/blk000000ff_M<7>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_M<6>_UNCONNECTED , \NLW_blk00000003/blk000000ff_M<5>_UNCONNECTED , \NLW_blk00000003/blk000000ff_M<4>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_M<3>_UNCONNECTED , \NLW_blk00000003/blk000000ff_M<2>_UNCONNECTED , \NLW_blk00000003/blk000000ff_M<1>_UNCONNECTED , +\NLW_blk00000003/blk000000ff_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk000000fe ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk000000fe_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk000000fe_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000540 , \blk00000003/sig00000540 , \blk00000003/sig00000540 , \blk00000003/sig00000540 , \blk00000003/sig00000540 , +\blk00000003/sig00000540 , \blk00000003/sig00000540 , \blk00000003/sig00000540 , \blk00000003/sig00000540 , \blk00000003/sig00000540 , +\blk00000003/sig00000540 , \blk00000003/sig00000541 , \blk00000003/sig00000542 , \blk00000003/sig00000543 , \blk00000003/sig00000544 , +\blk00000003/sig00000545 , \blk00000003/sig00000546 , \blk00000003/sig00000547 }), + .BCOUT({\NLW_blk00000003/blk000000fe_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000fe_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000fe_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000fe_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000fe_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000fe_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000fe_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000fe_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fe_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fe_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig0000038c , \blk00000003/sig0000038d , \blk00000003/sig0000038e , \blk00000003/sig0000038f , \blk00000003/sig00000390 , +\blk00000003/sig00000391 , \blk00000003/sig00000392 , \blk00000003/sig00000393 , \blk00000003/sig00000394 , \blk00000003/sig00000395 , +\blk00000003/sig00000396 , \blk00000003/sig00000397 , \blk00000003/sig00000398 , \blk00000003/sig00000399 , \blk00000003/sig0000039a , +\blk00000003/sig0000039b , \blk00000003/sig0000039c , \blk00000003/sig0000039d , \blk00000003/sig0000039e , \blk00000003/sig0000039f , +\blk00000003/sig000003a0 , \blk00000003/sig000003a1 , \blk00000003/sig000003a2 , \blk00000003/sig000003a3 , \blk00000003/sig000003a4 , +\blk00000003/sig000003a5 , \blk00000003/sig000003a6 , \blk00000003/sig000003a7 , \blk00000003/sig000003a8 , \blk00000003/sig000003a9 , +\blk00000003/sig000003aa , \blk00000003/sig000003ab , \blk00000003/sig000003ac , \blk00000003/sig000003ad , \blk00000003/sig000003ae , +\blk00000003/sig000003af , \blk00000003/sig000003b0 , \blk00000003/sig000003b1 , \blk00000003/sig000003b2 , \blk00000003/sig000003b3 , +\blk00000003/sig000003b4 , \blk00000003/sig000003b5 , \blk00000003/sig000003b6 , \blk00000003/sig000003b7 , \blk00000003/sig000003b8 , +\blk00000003/sig000003b9 , \blk00000003/sig000003ba , \blk00000003/sig000003bb }), + .C({\NLW_blk00000003/blk000000fe_C<47>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<46>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<45>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<44>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<43>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<42>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<41>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<40>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<39>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<38>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<37>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<36>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<35>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<33>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<32>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<30>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<29>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<27>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<26>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<24>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<23>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<21>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<20>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fe_C<18>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<17>_UNCONNECTED , \NLW_blk00000003/blk000000fe_C<16>_UNCONNECTED , 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.CARRYOUTF(\NLW_blk00000003/blk000000fd_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk000000fd_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000500 , \blk00000003/sig00000500 , \blk00000003/sig00000500 , \blk00000003/sig00000500 , \blk00000003/sig00000500 , +\blk00000003/sig00000500 , \blk00000003/sig00000500 , \blk00000003/sig00000500 , \blk00000003/sig00000500 , \blk00000003/sig00000500 , +\blk00000003/sig00000500 , \blk00000003/sig00000501 , \blk00000003/sig00000502 , \blk00000003/sig00000503 , \blk00000003/sig00000504 , +\blk00000003/sig00000505 , \blk00000003/sig00000506 , \blk00000003/sig00000507 }), + .BCOUT({\NLW_blk00000003/blk000000fd_BCOUT<17>_UNCONNECTED , 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\NLW_blk00000003/blk000000fd_C<32>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<30>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<29>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<27>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<26>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<24>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<23>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<21>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<20>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<18>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<17>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<15>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<14>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<13>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<12>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<11>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<9>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<8>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<6>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<5>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<3>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<2>_UNCONNECTED , \NLW_blk00000003/blk000000fd_C<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk000000fd_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000fd_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000538 , \blk00000003/sig00000538 , \blk00000003/sig00000538 , \blk00000003/sig00000538 , \blk00000003/sig00000538 , +\blk00000003/sig00000538 , \blk00000003/sig00000538 , \blk00000003/sig00000538 , \blk00000003/sig00000538 , \blk00000003/sig00000538 , +\blk00000003/sig00000538 , \blk00000003/sig00000539 , \blk00000003/sig0000053a , \blk00000003/sig0000053b , \blk00000003/sig0000053c , +\blk00000003/sig0000053d , \blk00000003/sig0000053e , \blk00000003/sig0000053f }), + .PCOUT({\blk00000003/sig00000180 , \blk00000003/sig00000181 , \blk00000003/sig00000182 , \blk00000003/sig00000183 , \blk00000003/sig00000184 , +\blk00000003/sig00000185 , \blk00000003/sig00000186 , \blk00000003/sig00000187 , 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\blk00000003/sig000001ac , +\blk00000003/sig000001ad , \blk00000003/sig000001ae , \blk00000003/sig000001af }), + .A({\blk00000003/sig000004ee , \blk00000003/sig000004ef , \blk00000003/sig000004f0 , \blk00000003/sig000004f1 , \blk00000003/sig000004f2 , +\blk00000003/sig000004f3 , \blk00000003/sig000004f4 , \blk00000003/sig000004f5 , \blk00000003/sig000004f6 , \blk00000003/sig000004f7 , +\blk00000003/sig000004f8 , \blk00000003/sig000004f9 , \blk00000003/sig000004fa , \blk00000003/sig000004fb , \blk00000003/sig000004fc , +\blk00000003/sig000004fd , \blk00000003/sig000004fe , \blk00000003/sig000004ff }), + .M({\NLW_blk00000003/blk000000fd_M<35>_UNCONNECTED , \NLW_blk00000003/blk000000fd_M<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_M<33>_UNCONNECTED , \NLW_blk00000003/blk000000fd_M<32>_UNCONNECTED , \NLW_blk00000003/blk000000fd_M<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_M<30>_UNCONNECTED , \NLW_blk00000003/blk000000fd_M<29>_UNCONNECTED , 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\NLW_blk00000003/blk000000fd_M<8>_UNCONNECTED , \NLW_blk00000003/blk000000fd_M<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_M<6>_UNCONNECTED , \NLW_blk00000003/blk000000fd_M<5>_UNCONNECTED , \NLW_blk00000003/blk000000fd_M<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_M<3>_UNCONNECTED , \NLW_blk00000003/blk000000fd_M<2>_UNCONNECTED , \NLW_blk00000003/blk000000fd_M<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fd_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk000000fc ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk000000fc_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk000000fc_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig000004ae , \blk00000003/sig000004ae , \blk00000003/sig000004ae , \blk00000003/sig000004ae , \blk00000003/sig000004ae , +\blk00000003/sig000004ae , \blk00000003/sig000004ae , \blk00000003/sig000004ae , \blk00000003/sig000004ae , \blk00000003/sig000004ae , +\blk00000003/sig000004ae , \blk00000003/sig000004af , \blk00000003/sig000004b0 , \blk00000003/sig000004b1 , \blk00000003/sig000004b2 , +\blk00000003/sig000004b3 , \blk00000003/sig000004b4 , \blk00000003/sig000004b5 }), + .BCOUT({\NLW_blk00000003/blk000000fc_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000fc_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_BCOUT<15>_UNCONNECTED , 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\blk00000003/sig000004e1 , \blk00000003/sig000004e2 , +\blk00000003/sig000004e3 , \blk00000003/sig000004e4 , \blk00000003/sig000004e5 }), + .C({\NLW_blk00000003/blk000000fc_C<47>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<46>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_C<45>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<44>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<43>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_C<42>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<41>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<40>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_C<39>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<38>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<37>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_C<36>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<35>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_C<33>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<32>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<31>_UNCONNECTED , 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\NLW_blk00000003/blk000000fc_C<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_C<9>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<8>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_C<6>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<5>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_C<3>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<2>_UNCONNECTED , \NLW_blk00000003/blk000000fc_C<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk000000fc_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000fc_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig000004e6 , \blk00000003/sig000004e6 , \blk00000003/sig000004e6 , \blk00000003/sig000004e6 , \blk00000003/sig000004e6 , +\blk00000003/sig000004e6 , \blk00000003/sig000004e6 , \blk00000003/sig000004e6 , \blk00000003/sig000004e6 , \blk00000003/sig000004e6 , +\blk00000003/sig000004e6 , \blk00000003/sig000004e7 , \blk00000003/sig000004e8 , \blk00000003/sig000004e9 , \blk00000003/sig000004ea , +\blk00000003/sig000004eb , \blk00000003/sig000004ec , \blk00000003/sig000004ed }), + .PCOUT({\blk00000003/sig0000021a , \blk00000003/sig0000021b , \blk00000003/sig0000021c , \blk00000003/sig0000021d , \blk00000003/sig0000021e , +\blk00000003/sig0000021f , \blk00000003/sig00000220 , \blk00000003/sig00000221 , \blk00000003/sig00000222 , \blk00000003/sig00000223 , +\blk00000003/sig00000224 , \blk00000003/sig00000225 , \blk00000003/sig00000226 , \blk00000003/sig00000227 , \blk00000003/sig00000228 , +\blk00000003/sig00000229 , \blk00000003/sig0000022a , \blk00000003/sig0000022b , \blk00000003/sig0000022c , \blk00000003/sig0000022d , +\blk00000003/sig0000022e , \blk00000003/sig0000022f , \blk00000003/sig00000230 , \blk00000003/sig00000231 , \blk00000003/sig00000232 , +\blk00000003/sig00000233 , \blk00000003/sig00000234 , \blk00000003/sig00000235 , \blk00000003/sig00000236 , \blk00000003/sig00000237 , +\blk00000003/sig00000238 , \blk00000003/sig00000239 , \blk00000003/sig0000023a , \blk00000003/sig0000023b , \blk00000003/sig0000023c , +\blk00000003/sig0000023d , \blk00000003/sig0000023e , \blk00000003/sig0000023f , \blk00000003/sig00000240 , \blk00000003/sig00000241 , +\blk00000003/sig00000242 , \blk00000003/sig00000243 , \blk00000003/sig00000244 , \blk00000003/sig00000245 , \blk00000003/sig00000246 , +\blk00000003/sig00000247 , \blk00000003/sig00000248 , \blk00000003/sig00000249 }), + .A({\blk00000003/sig000004ee , \blk00000003/sig000004ef , \blk00000003/sig000004f0 , \blk00000003/sig000004f1 , \blk00000003/sig000004f2 , +\blk00000003/sig000004f3 , \blk00000003/sig000004f4 , \blk00000003/sig000004f5 , \blk00000003/sig000004f6 , \blk00000003/sig000004f7 , +\blk00000003/sig000004f8 , \blk00000003/sig000004f9 , \blk00000003/sig000004fa , \blk00000003/sig000004fb , \blk00000003/sig000004fc , +\blk00000003/sig000004fd , \blk00000003/sig000004fe , \blk00000003/sig000004ff }), + .M({\NLW_blk00000003/blk000000fc_M<35>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<33>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<32>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<30>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<29>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<27>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<26>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<24>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<23>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<21>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<20>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<18>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<17>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<15>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<14>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<13>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<12>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<11>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<9>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<8>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<6>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<5>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<3>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<2>_UNCONNECTED , \NLW_blk00000003/blk000000fc_M<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fc_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk000000fb ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk000000fb_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk000000fb_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig0000045e , \blk00000003/sig0000045f , \blk00000003/sig00000460 , +\blk00000003/sig00000461 , \blk00000003/sig00000462 , \blk00000003/sig00000463 , \blk00000003/sig00000464 , \blk00000003/sig00000465 , +\blk00000003/sig00000466 , \blk00000003/sig00000467 , \blk00000003/sig00000468 , \blk00000003/sig00000469 , \blk00000003/sig0000046a , +\blk00000003/sig0000046b , \blk00000003/sig0000046c , \blk00000003/sig0000046d }), + .BCOUT({\NLW_blk00000003/blk000000fb_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk000000fb_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\NLW_blk00000003/blk000000fb_C<47>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<46>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<45>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<44>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<43>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<42>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<41>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<40>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<39>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<38>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<37>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<36>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<35>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<33>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<32>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<30>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<29>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<27>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<26>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<24>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<23>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<21>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<20>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<18>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<17>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<15>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<14>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<13>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<12>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<11>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<9>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<8>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<6>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<5>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<3>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<2>_UNCONNECTED , \NLW_blk00000003/blk000000fb_C<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk000000fb_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000fb_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000fb_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig0000046e , \blk00000003/sig0000046f , \blk00000003/sig00000470 , +\blk00000003/sig00000471 , \blk00000003/sig00000472 , \blk00000003/sig00000473 , \blk00000003/sig00000474 , \blk00000003/sig00000475 , +\blk00000003/sig00000476 , \blk00000003/sig00000477 , \blk00000003/sig00000478 , \blk00000003/sig00000479 , \blk00000003/sig0000047a , +\blk00000003/sig0000047b , \blk00000003/sig0000047c , \blk00000003/sig0000047d }), + .PCOUT({\blk00000003/sig0000047e , \blk00000003/sig0000047f , \blk00000003/sig00000480 , \blk00000003/sig00000481 , \blk00000003/sig00000482 , +\blk00000003/sig00000483 , \blk00000003/sig00000484 , \blk00000003/sig00000485 , \blk00000003/sig00000486 , \blk00000003/sig00000487 , +\blk00000003/sig00000488 , \blk00000003/sig00000489 , \blk00000003/sig0000048a , \blk00000003/sig0000048b , \blk00000003/sig0000048c , +\blk00000003/sig0000048d , \blk00000003/sig0000048e , \blk00000003/sig0000048f , \blk00000003/sig00000490 , \blk00000003/sig00000491 , +\blk00000003/sig00000492 , \blk00000003/sig00000493 , \blk00000003/sig00000494 , \blk00000003/sig00000495 , \blk00000003/sig00000496 , +\blk00000003/sig00000497 , \blk00000003/sig00000498 , \blk00000003/sig00000499 , \blk00000003/sig0000049a , \blk00000003/sig0000049b , +\blk00000003/sig0000049c , \blk00000003/sig0000049d , \blk00000003/sig0000049e , \blk00000003/sig0000049f , \blk00000003/sig000004a0 , +\blk00000003/sig000004a1 , \blk00000003/sig000004a2 , \blk00000003/sig000004a3 , \blk00000003/sig000004a4 , \blk00000003/sig000004a5 , +\blk00000003/sig000004a6 , \blk00000003/sig000004a7 , \blk00000003/sig000004a8 , \blk00000003/sig000004a9 , \blk00000003/sig000004aa , +\blk00000003/sig000004ab , \blk00000003/sig000004ac , \blk00000003/sig000004ad }), + .A({\blk00000003/sig000003bc , \blk00000003/sig000003bd , \blk00000003/sig000003be , \blk00000003/sig000003bf , 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\NLW_blk00000003/blk000000f9_C<43>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<42>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<41>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<40>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<39>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<38>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<37>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<36>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<35>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<33>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<32>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<30>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<29>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<27>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<26>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<24>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<23>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<21>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<20>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<18>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<17>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<15>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<14>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<12>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<11>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<9>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<8>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<6>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<5>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<3>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<2>_UNCONNECTED , \NLW_blk00000003/blk000000f9_C<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk000000f9_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000f9_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig000003d6 , \blk00000003/sig000003d6 , \blk00000003/sig000003d6 , \blk00000003/sig000003d6 , \blk00000003/sig000003d6 , +\blk00000003/sig000003d6 , \blk00000003/sig000003d6 , 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\blk00000003/sig000003c9 , \blk00000003/sig000003ca , +\blk00000003/sig000003cb , \blk00000003/sig000003cc , \blk00000003/sig000003cd }), + .M({\NLW_blk00000003/blk000000f9_M<35>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_M<33>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<32>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_M<30>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<29>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_M<27>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<26>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_M<24>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<23>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f9_M<21>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<20>_UNCONNECTED , \NLW_blk00000003/blk000000f9_M<19>_UNCONNECTED , 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.B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk000000f8 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk000000f8_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk000000f8_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig0000037c , \blk00000003/sig0000037c , \blk00000003/sig0000037c , \blk00000003/sig0000037c , \blk00000003/sig0000037c , +\blk00000003/sig0000037c , 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\NLW_blk00000003/blk000000f8_C<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk000000f8_P<47>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<46>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<45>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<44>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<43>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<42>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<41>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<40>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<39>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<38>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<37>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<36>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<35>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<33>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<32>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<30>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<29>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<27>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<26>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<24>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<23>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<21>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<20>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<18>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<17>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<15>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<14>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<12>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<11>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<9>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<8>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<6>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<5>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<3>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<2>_UNCONNECTED , \NLW_blk00000003/blk000000f8_P<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000384 , \blk00000003/sig00000384 , \blk00000003/sig00000384 , \blk00000003/sig00000384 , \blk00000003/sig00000384 , +\blk00000003/sig00000384 , \blk00000003/sig00000384 , \blk00000003/sig00000384 , \blk00000003/sig00000384 , \blk00000003/sig00000384 , +\blk00000003/sig00000384 , \blk00000003/sig00000385 , \blk00000003/sig00000386 , \blk00000003/sig00000387 , \blk00000003/sig00000388 , +\blk00000003/sig00000389 , \blk00000003/sig0000038a , \blk00000003/sig0000038b }), + .PCOUT({\blk00000003/sig0000038c , \blk00000003/sig0000038d , \blk00000003/sig0000038e , \blk00000003/sig0000038f , \blk00000003/sig00000390 , +\blk00000003/sig00000391 , \blk00000003/sig00000392 , \blk00000003/sig00000393 , \blk00000003/sig00000394 , \blk00000003/sig00000395 , +\blk00000003/sig00000396 , \blk00000003/sig00000397 , \blk00000003/sig00000398 , \blk00000003/sig00000399 , \blk00000003/sig0000039a , +\blk00000003/sig0000039b , \blk00000003/sig0000039c , \blk00000003/sig0000039d , \blk00000003/sig0000039e , \blk00000003/sig0000039f , +\blk00000003/sig000003a0 , \blk00000003/sig000003a1 , \blk00000003/sig000003a2 , \blk00000003/sig000003a3 , \blk00000003/sig000003a4 , +\blk00000003/sig000003a5 , \blk00000003/sig000003a6 , \blk00000003/sig000003a7 , \blk00000003/sig000003a8 , \blk00000003/sig000003a9 , +\blk00000003/sig000003aa , \blk00000003/sig000003ab , \blk00000003/sig000003ac , \blk00000003/sig000003ad , \blk00000003/sig000003ae , +\blk00000003/sig000003af , \blk00000003/sig000003b0 , \blk00000003/sig000003b1 , \blk00000003/sig000003b2 , \blk00000003/sig000003b3 , +\blk00000003/sig000003b4 , \blk00000003/sig000003b5 , \blk00000003/sig000003b6 , \blk00000003/sig000003b7 , \blk00000003/sig000003b8 , +\blk00000003/sig000003b9 , \blk00000003/sig000003ba , \blk00000003/sig000003bb }), + .A({\blk00000003/sig000003bc , \blk00000003/sig000003bd , \blk00000003/sig000003be , \blk00000003/sig000003bf , \blk00000003/sig000003c0 , +\blk00000003/sig000003c1 , \blk00000003/sig000003c2 , \blk00000003/sig000003c3 , \blk00000003/sig000003c4 , \blk00000003/sig000003c5 , +\blk00000003/sig000003c6 , \blk00000003/sig000003c7 , \blk00000003/sig000003c8 , \blk00000003/sig000003c9 , \blk00000003/sig000003ca , +\blk00000003/sig000003cb , \blk00000003/sig000003cc , \blk00000003/sig000003cd }), + .M({\NLW_blk00000003/blk000000f8_M<35>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<34>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<33>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<32>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<31>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<30>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<29>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<28>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<27>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<26>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<25>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<24>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<23>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<22>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<21>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<20>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<19>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<18>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<17>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<16>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<15>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<14>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<13>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<12>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<11>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<10>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<9>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<8>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<7>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<6>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<5>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<4>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<3>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<2>_UNCONNECTED , \NLW_blk00000003/blk000000f8_M<1>_UNCONNECTED , +\NLW_blk00000003/blk000000f8_M<0>_UNCONNECTED }) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029f ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000037b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000379 ), + .Q(\blk00000003/sig0000037a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000378 ), + .Q(\blk00000003/sig00000374 ) + ); + XORCY \blk00000003/blk000000f4 ( + .CI(\blk00000003/sig00000374 ), + .LI(\blk00000003/sig00000376 ), + .O(\blk00000003/sig00000377 ) + ); + MUXCY_D \blk00000003/blk000000f3 ( + .CI(\blk00000003/sig00000374 ), + .DI(\blk00000003/sig00000375 ), + .S(\blk00000003/sig00000376 ), + .O(\NLW_blk00000003/blk000000f3_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000f3_LO_UNCONNECTED ) + ); + FDE \blk00000003/blk000000f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000372 ), + .Q(\blk00000003/sig00000373 ) + ); + XORCY \blk00000003/blk000000f1 ( + .CI(\blk00000003/sig0000036e ), + .LI(\blk00000003/sig00000370 ), + .O(\blk00000003/sig00000371 ) + ); + MUXCY_D \blk00000003/blk000000f0 ( + .CI(\blk00000003/sig0000036e ), + .DI(\blk00000003/sig0000036f ), + .S(\blk00000003/sig00000370 ), + .O(\NLW_blk00000003/blk000000f0_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000f0_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000ef ( + .CI(\blk00000003/sig00000049 ), + .DI(NlwRenamedSig_OI_rfd), + .S(\blk00000003/sig0000036d ), + .O(\blk00000003/sig0000036e ) + ); + XORCY \blk00000003/blk000000ee ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig0000036b ), + .O(\blk00000003/sig0000036c ) + ); + MUXCY_D \blk00000003/blk000000ed ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig0000036a ), + .S(\blk00000003/sig0000036b ), + .O(\NLW_blk00000003/blk000000ed_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000ed_LO_UNCONNECTED ) + ); + MUXCY_L \blk00000003/blk000000ec ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000369 ), + .S(\blk00000003/sig00000363 ), + .LO(\blk00000003/sig00000365 ) + ); + MUXCY_D \blk00000003/blk000000eb ( + .CI(\blk00000003/sig00000365 ), + .DI(\blk00000003/sig00000368 ), + .S(\blk00000003/sig00000366 ), + .O(\NLW_blk00000003/blk000000eb_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000eb_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000ea ( + .CI(\blk00000003/sig00000365 ), + .LI(\blk00000003/sig00000366 ), + .O(\blk00000003/sig00000367 ) + ); + XORCY \blk00000003/blk000000e9 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000363 ), + .O(\blk00000003/sig00000364 ) + ); + MUXCY_L \blk00000003/blk000000e8 ( + .CI(\blk00000003/sig0000035c ), + .DI(\blk00000003/sig000002ba ), + .S(\blk00000003/sig0000035d ), + .LO(\blk00000003/sig0000035f ) + ); + MUXCY_D \blk00000003/blk000000e7 ( + .CI(\blk00000003/sig0000035f ), + .DI(\blk00000003/sig000002b9 ), + .S(\blk00000003/sig00000360 ), + .O(\NLW_blk00000003/blk000000e7_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000e7_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000e6 ( + .CI(\blk00000003/sig00000049 ), + .DI(NlwRenamedSig_OI_rfd), + .S(\blk00000003/sig00000362 ), + .O(\blk00000003/sig0000035c ) + ); + XORCY \blk00000003/blk000000e5 ( + .CI(\blk00000003/sig0000035f ), + .LI(\blk00000003/sig00000360 ), + .O(\blk00000003/sig00000361 ) + ); + XORCY \blk00000003/blk000000e4 ( + .CI(\blk00000003/sig0000035c ), + .LI(\blk00000003/sig0000035d ), + .O(\blk00000003/sig0000035e ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000034d ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002f2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000034c ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002ef ) + ); + MUXCY_D \blk00000003/blk000000e1 ( + .CI(\blk00000003/sig000002ef ), + .DI(\blk00000003/sig0000035a ), + .S(\blk00000003/sig0000035b ), + .O(\blk00000003/sig00000357 ), + .LO(\NLW_blk00000003/blk000000e1_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000e0 ( + .CI(\blk00000003/sig00000357 ), + .DI(\blk00000003/sig00000358 ), + .S(\blk00000003/sig00000359 ), + .O(\blk00000003/sig00000355 ), + .LO(\NLW_blk00000003/blk000000e0_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000df ( + .CI(\blk00000003/sig00000355 ), + .DI(\blk00000003/sig0000034b ), + .S(\blk00000003/sig00000356 ), + .O(\blk00000003/sig00000352 ), + .LO(\NLW_blk00000003/blk000000df_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000de ( + .CI(\blk00000003/sig00000352 ), + .DI(\blk00000003/sig00000353 ), + .S(\blk00000003/sig00000354 ), + .O(\blk00000003/sig00000350 ), + .LO(\NLW_blk00000003/blk000000de_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000dd ( + .CI(\blk00000003/sig00000350 ), + .DI(\blk00000003/sig0000031e ), + .S(\blk00000003/sig00000351 ), + .O(\blk00000003/sig0000034e ), + .LO(\NLW_blk00000003/blk000000dd_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000dc ( + .CI(\blk00000003/sig0000034e ), + .DI(\blk00000003/sig000002ec ), + .S(\blk00000003/sig0000034f ), + .O(\NLW_blk00000003/blk000000dc_O_UNCONNECTED ), + .LO(\blk00000003/sig0000034c ) + ); + XORCY \blk00000003/blk000000db ( + .CI(\blk00000003/sig0000034c ), + .LI(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig0000034d ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000da ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000033b ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000034b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000033a ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000029f ) + ); + MUXCY_D \blk00000003/blk000000d8 ( + .CI(\blk00000003/sig0000029f ), + .DI(\blk00000003/sig00000349 ), + .S(\blk00000003/sig0000034a ), + .O(\blk00000003/sig00000347 ), + .LO(\NLW_blk00000003/blk000000d8_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d7 ( + .CI(\blk00000003/sig00000347 ), + .DI(\blk00000003/sig000002a0 ), + .S(\blk00000003/sig00000348 ), + .O(\blk00000003/sig00000345 ), + .LO(\NLW_blk00000003/blk000000d7_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d6 ( + .CI(\blk00000003/sig00000345 ), + .DI(\blk00000003/sig0000029f ), + .S(\blk00000003/sig00000346 ), + .O(\blk00000003/sig00000342 ), + .LO(\NLW_blk00000003/blk000000d6_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d5 ( + .CI(\blk00000003/sig00000342 ), + .DI(\blk00000003/sig00000343 ), + .S(\blk00000003/sig00000344 ), + .O(\blk00000003/sig00000340 ), + .LO(\NLW_blk00000003/blk000000d5_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d4 ( + .CI(\blk00000003/sig00000340 ), + .DI(\blk00000003/sig000002f2 ), + .S(\blk00000003/sig00000341 ), + .O(\blk00000003/sig0000033c ), + .LO(\NLW_blk00000003/blk000000d4_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d3 ( + .CI(\blk00000003/sig0000033e ), + .DI(\blk00000003/sig000002f2 ), + .S(\blk00000003/sig0000033f ), + .O(\NLW_blk00000003/blk000000d3_O_UNCONNECTED ), + .LO(\blk00000003/sig0000033a ) + ); + MUXCY_D \blk00000003/blk000000d2 ( + .CI(\blk00000003/sig0000033c ), + .DI(\blk00000003/sig00000313 ), + .S(\blk00000003/sig0000033d ), + .O(\blk00000003/sig0000033e ), + .LO(\NLW_blk00000003/blk000000d2_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000d1 ( + .CI(\blk00000003/sig0000033a ), + .LI(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig0000033b ) + ); + FDE \blk00000003/blk000000d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000338 ), + .Q(\blk00000003/sig00000339 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ef ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000337 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000324 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000333 ) + ); + XORCY \blk00000003/blk000000cd ( + .CI(\blk00000003/sig00000333 ), + .LI(\blk00000003/sig00000335 ), + .O(\blk00000003/sig00000336 ) + ); + MUXCY_D \blk00000003/blk000000cc ( + .CI(\blk00000003/sig00000333 ), + .DI(\blk00000003/sig00000334 ), + .S(\blk00000003/sig00000335 ), + .O(\NLW_blk00000003/blk000000cc_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000cc_LO_UNCONNECTED ) + ); + MUXCY_L \blk00000003/blk000000cb ( + .CI(\blk00000003/sig00000326 ), + .DI(\blk00000003/sig00000332 ), + .S(\blk00000003/sig00000327 ), + .LO(\blk00000003/sig0000032c ) + ); + MUXCY_L \blk00000003/blk000000ca ( + .CI(\blk00000003/sig0000032c ), + .DI(\blk00000003/sig00000331 ), + .S(\blk00000003/sig0000032d ), + .LO(\blk00000003/sig00000329 ) + ); + MUXCY_D \blk00000003/blk000000c9 ( + .CI(\blk00000003/sig00000329 ), + .DI(\blk00000003/sig00000330 ), + .S(\blk00000003/sig0000032a ), + .O(\NLW_blk00000003/blk000000c9_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000c9_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000c8 ( + .CI(\blk00000003/sig00000049 ), + .DI(NlwRenamedSig_OI_rfd), + .S(\blk00000003/sig0000032f ), + .O(\blk00000003/sig00000326 ) + ); + XORCY \blk00000003/blk000000c7 ( + .CI(\blk00000003/sig0000032c ), + .LI(\blk00000003/sig0000032d ), + .O(\blk00000003/sig0000032e ) + ); + XORCY \blk00000003/blk000000c6 ( + .CI(\blk00000003/sig00000329 ), + .LI(\blk00000003/sig0000032a ), + .O(\blk00000003/sig0000032b ) + ); + XORCY \blk00000003/blk000000c5 ( + .CI(\blk00000003/sig00000326 ), + .LI(\blk00000003/sig00000327 ), + .O(\blk00000003/sig00000328 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c4 ( + .C(clk), + .CE(ce), + .D(coef_ld), + .Q(\blk00000003/sig00000325 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c3 ( + .C(clk), + .CE(ce), + .D(coef_we), + .Q(\blk00000003/sig00000324 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b0 ), + .Q(\blk00000003/sig00000318 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000323 ), + .Q(\blk00000003/sig0000030b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000321 ), + .Q(\blk00000003/sig00000322 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000320 ), + .Q(\blk00000003/sig00000309 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000be ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000031f ), + .Q(\blk00000003/sig00000316 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000031d ), + .Q(\blk00000003/sig0000031e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000031b ), + .Q(\blk00000003/sig0000031c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000319 ), + .Q(\blk00000003/sig0000031a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000318 ), + .Q(\blk00000003/sig00000314 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000316 ), + .Q(\blk00000003/sig00000317 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000314 ), + .Q(\blk00000003/sig00000315 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ee ), + .Q(\blk00000003/sig00000313 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000030e ), + .Q(\blk00000003/sig00000312 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000308 ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk000000b5_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000305 ), + .R(coef_ld), + .Q(\blk00000003/sig00000302 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000300 ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk000000b3_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002fb ), + .R(coef_ld), + .Q(\blk00000003/sig000002f8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ef ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000311 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000030f ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000310 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000af ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000030d ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000030e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000030b ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000030c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000309 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000030a ) + ); + XORCY \blk00000003/blk000000ac ( + .CI(\blk00000003/sig00000307 ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig00000308 ) + ); + MUXCY \blk00000003/blk000000ab ( + .CI(\blk00000003/sig00000307 ), + .DI(\blk00000003/sig00000049 ), + .S(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig000002fd ) + ); + MUXCY_D \blk00000003/blk000000aa ( + .CI(coef_we), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000306 ), + .O(\blk00000003/sig00000307 ), + .LO(\NLW_blk00000003/blk000000aa_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000a9 ( + .CI(\blk00000003/sig00000303 ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig00000305 ) + ); + MUXCY \blk00000003/blk000000a8 ( + .CI(\blk00000003/sig00000303 ), + .DI(\blk00000003/sig00000049 ), + .S(NlwRenamedSig_OI_rfd), + .O(\NLW_blk00000003/blk000000a8_O_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000a7 ( + .CI(NlwRenamedSig_OI_rfd), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000304 ), + .O(\blk00000003/sig00000301 ), + .LO(\NLW_blk00000003/blk000000a7_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000a6 ( + .CI(\blk00000003/sig00000301 ), + .DI(\blk00000003/sig00000302 ), + .S(coef_we), + .O(\blk00000003/sig00000303 ), + .LO(\NLW_blk00000003/blk000000a6_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000a5 ( + .CI(\blk00000003/sig000002ff ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig00000300 ) + ); + MUXCY \blk00000003/blk000000a4 ( + .CI(\blk00000003/sig000002ff ), + .DI(\blk00000003/sig00000049 ), + .S(NlwRenamedSig_OI_rfd), + .O(\NLW_blk00000003/blk000000a4_O_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000a3 ( + .CI(\blk00000003/sig000002fd ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000002fe ), + .O(\blk00000003/sig000002ff ), + .LO(\NLW_blk00000003/blk000000a3_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000a2 ( + .CI(NlwRenamedSig_OI_rfd), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000002fc ), + .O(\blk00000003/sig000002f7 ), + .LO(\NLW_blk00000003/blk000000a2_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000a1 ( + .CI(\blk00000003/sig000002fa ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig000002fb ) + ); + MUXCY \blk00000003/blk000000a0 ( + .CI(\blk00000003/sig000002fa ), + .DI(\blk00000003/sig00000049 ), + .S(NlwRenamedSig_OI_rfd), + .O(\NLW_blk00000003/blk000000a0_O_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk0000009f ( + .CI(\blk00000003/sig000002f7 ), + .DI(\blk00000003/sig000002f8 ), + .S(\blk00000003/sig000002f9 ), + .O(\blk00000003/sig000002fa ), + .LO(\NLW_blk00000003/blk0000009f_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk0000009e ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig000002f5 ), + .O(\blk00000003/sig000002f6 ) + ); + MUXCY_D \blk00000003/blk0000009d ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000002f4 ), + .S(\blk00000003/sig000002f5 ), + .O(\NLW_blk00000003/blk0000009d_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk0000009d_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk0000009c ( + .CI(\blk00000003/sig000002ed ), + .LI(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig000002eb ) + ); + MUXCY_D \blk00000003/blk0000009b ( + .CI(\blk00000003/sig000002f1 ), + .DI(\blk00000003/sig000002f2 ), + .S(\blk00000003/sig000002f3 ), + .O(\NLW_blk00000003/blk0000009b_O_UNCONNECTED ), + .LO(\blk00000003/sig000002ed ) + ); + MUXCY_D \blk00000003/blk0000009a ( + .CI(\blk00000003/sig000002ee ), + .DI(\blk00000003/sig000002ef ), + .S(\blk00000003/sig000002f0 ), + .O(\blk00000003/sig000002f1 ), + .LO(\NLW_blk00000003/blk0000009a_LO_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000099 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ed ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002ee ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000098 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002eb ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002ec ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b7 ), + .R(sclr), + .Q(\blk00000003/sig000002b6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000033 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b6 ), + .R(sclr), + .Q(\blk00000003/sig000002b1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000032 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b5 ), + .R(\blk00000003/sig000002ae ), + .Q(data_valid) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000031 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b3 ), + .R(sclr), + .Q(\blk00000003/sig000002b4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000030 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b1 ), + .R(sclr), + .Q(\blk00000003/sig000002b2 ) + ); + FDRE \blk00000003/blk0000002f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002af ), + .R(sclr), + .Q(\blk00000003/sig000002b0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ad ), + .R(\blk00000003/sig000002ae ), + .Q(rdy) + ); + FDRE \blk00000003/blk0000002d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ab ), + .R(sclr), + .Q(\blk00000003/sig000002ac ) + ); + FDSE \blk00000003/blk0000002c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a9 ), + .S(sclr), + .Q(\blk00000003/sig000002aa ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029b ), + .R(sclr), + .Q(\blk00000003/sig000002a8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a7 ), + .R(sclr), + .Q(\blk00000003/sig0000029c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000029 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a5 ), + .R(sclr), + .Q(\blk00000003/sig000002a6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000028 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a3 ), + .R(sclr), + .Q(\blk00000003/sig000002a4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000027 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a1 ), + .R(sclr), + .Q(\NLW_blk00000003/blk00000027_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000026 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a1 ), + .R(sclr), + .Q(\blk00000003/sig000002a2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000025 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029f ), + .Q(\blk00000003/sig000002a0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000024 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000176 ), + .R(sclr), + .Q(\blk00000003/sig00000173 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000023 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000170 ), + .R(sclr), + .Q(\NLW_blk00000003/blk00000023_Q_UNCONNECTED ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000022 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000171 ), + .S(sclr), + .Q(\blk00000003/sig0000029e ) + ); + MUXCY_D \blk00000003/blk00000021 ( + .CI(\blk00000003/sig0000029c ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000029d ), + .O(\blk00000003/sig0000029a ), + .LO(\NLW_blk00000003/blk00000021_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk00000020 ( + .CI(\blk00000003/sig0000029a ), + .DI(\blk00000003/sig00000049 ), + .S(NlwRenamedSig_OI_rfd), + .O(\NLW_blk00000003/blk00000020_O_UNCONNECTED ) + ); + XORCY \blk00000003/blk0000001f ( + .CI(\blk00000003/sig0000029a ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig0000029b ) + ); + DSP48A1 #( + .A0REG ( 1 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000001e ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000001e_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000001e_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig0000024a , \blk00000003/sig0000024b , \blk00000003/sig0000024c , +\blk00000003/sig0000024d , \blk00000003/sig0000024e , \blk00000003/sig0000024f , \blk00000003/sig00000250 , \blk00000003/sig00000251 , +\blk00000003/sig00000252 , \blk00000003/sig00000253 , \blk00000003/sig00000254 , \blk00000003/sig00000255 , \blk00000003/sig00000256 , +\blk00000003/sig00000257 , \blk00000003/sig00000258 , \blk00000003/sig00000259 }), + .BCOUT({\NLW_blk00000003/blk0000001e_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000001e_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000001e_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000001e_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000001e_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000001e_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000001e_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000001e_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000001e_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000001e_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig0000025a , \blk00000003/sig0000025b , \blk00000003/sig0000025c , \blk00000003/sig0000025d , \blk00000003/sig0000025e , +\blk00000003/sig0000025f , \blk00000003/sig00000260 , \blk00000003/sig00000261 , \blk00000003/sig00000262 , \blk00000003/sig00000263 , +\blk00000003/sig00000264 , \blk00000003/sig00000265 , \blk00000003/sig00000266 , \blk00000003/sig00000267 , \blk00000003/sig00000268 , +\blk00000003/sig00000269 , \blk00000003/sig0000026a , \blk00000003/sig0000026b , \blk00000003/sig0000026c , \blk00000003/sig0000026d , +\blk00000003/sig0000026e , \blk00000003/sig0000026f , \blk00000003/sig00000270 , \blk00000003/sig00000271 , \blk00000003/sig00000272 , +\blk00000003/sig00000273 , \blk00000003/sig00000274 , \blk00000003/sig00000275 , \blk00000003/sig00000276 , \blk00000003/sig00000277 , +\blk00000003/sig00000278 , \blk00000003/sig00000279 , \blk00000003/sig0000027a , \blk00000003/sig0000027b , \blk00000003/sig0000027c , +\blk00000003/sig0000027d , \blk00000003/sig0000027e , \blk00000003/sig0000027f , \blk00000003/sig00000280 , \blk00000003/sig00000281 , +\blk00000003/sig00000282 , \blk00000003/sig00000283 , \blk00000003/sig00000284 , \blk00000003/sig00000285 , \blk00000003/sig00000286 , +\blk00000003/sig00000287 , \blk00000003/sig00000288 , \blk00000003/sig00000289 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\NLW_blk00000003/blk0000001e_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000001e_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000001e_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000001e_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000001e_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000001e_P<40>_UNCONNECTED , +\blk00000003/sig00000152 , \blk00000003/sig00000153 , \blk00000003/sig00000154 , \blk00000003/sig00000155 , \blk00000003/sig00000156 , +\blk00000003/sig00000157 , \blk00000003/sig00000102 , \blk00000003/sig00000103 , \blk00000003/sig00000104 , \blk00000003/sig00000105 , +\blk00000003/sig00000106 , \blk00000003/sig00000107 , \blk00000003/sig00000108 , \blk00000003/sig00000109 , \blk00000003/sig0000010a , +\blk00000003/sig0000010b , \blk00000003/sig0000010c , \blk00000003/sig0000010d , \blk00000003/sig0000010e , \blk00000003/sig0000010f , +\blk00000003/sig00000110 , \blk00000003/sig00000111 , \blk00000003/sig00000112 , \blk00000003/sig00000113 , \blk00000003/sig0000028a , +\blk00000003/sig0000028b , \blk00000003/sig0000028c , \blk00000003/sig0000028d , \blk00000003/sig0000028e , \blk00000003/sig0000028f , +\blk00000003/sig00000290 , \blk00000003/sig00000291 , \blk00000003/sig00000292 , \blk00000003/sig00000293 , \blk00000003/sig00000294 , +\blk00000003/sig00000295 , \blk00000003/sig00000296 , \blk00000003/sig00000297 , \blk00000003/sig00000298 , \blk00000003/sig00000299 }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000165 , \blk00000003/sig00000167 , \blk00000003/sig00000169 }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .PCOUT({\NLW_blk00000003/blk0000001e_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000001e_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_PCOUT<15>_UNCONNECTED , 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\NLW_blk00000003/blk0000001e_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000001e_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 1 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000001d ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000001d_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000001d_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + 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\NLW_blk00000003/blk0000001d_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000001d_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000001d_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000001d_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000001d_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000001d_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000001d_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000001d_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000001d_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000001d_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000001d_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000001d_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 1 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000001c ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000001c_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000001c_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000001c2 , \blk00000003/sig000001c3 , \blk00000003/sig000001c4 , +\blk00000003/sig000001c5 , \blk00000003/sig000001c6 , \blk00000003/sig000001c7 , \blk00000003/sig000001c8 , \blk00000003/sig000001c9 , +\blk00000003/sig000001ca , \blk00000003/sig000001cb , \blk00000003/sig000001cc , \blk00000003/sig000001cd , \blk00000003/sig000001ce , +\blk00000003/sig000001cf , \blk00000003/sig000001d0 , \blk00000003/sig000001d1 }), + .BCOUT({\NLW_blk00000003/blk0000001c_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000001c_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000001c_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000001c_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000001c_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000001c_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000001c_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000001c_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000001c_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000001c_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000001d2 , \blk00000003/sig000001d3 , \blk00000003/sig000001d4 , \blk00000003/sig000001d5 , \blk00000003/sig000001d6 , +\blk00000003/sig000001d7 , \blk00000003/sig000001d8 , \blk00000003/sig000001d9 , \blk00000003/sig000001da , \blk00000003/sig000001db , +\blk00000003/sig000001dc , \blk00000003/sig000001dd , \blk00000003/sig000001de , \blk00000003/sig000001df , \blk00000003/sig000001e0 , +\blk00000003/sig000001e1 , \blk00000003/sig000001e2 , \blk00000003/sig000001e3 , \blk00000003/sig000001e4 , \blk00000003/sig000001e5 , +\blk00000003/sig000001e6 , \blk00000003/sig000001e7 , \blk00000003/sig000001e8 , \blk00000003/sig000001e9 , \blk00000003/sig000001ea , +\blk00000003/sig000001eb , \blk00000003/sig000001ec , \blk00000003/sig000001ed , \blk00000003/sig000001ee , \blk00000003/sig000001ef , +\blk00000003/sig000001f0 , \blk00000003/sig000001f1 , \blk00000003/sig000001f2 , \blk00000003/sig000001f3 , \blk00000003/sig000001f4 , +\blk00000003/sig000001f5 , \blk00000003/sig000001f6 , \blk00000003/sig000001f7 , \blk00000003/sig000001f8 , \blk00000003/sig000001f9 , +\blk00000003/sig000001fa , \blk00000003/sig000001fb , \blk00000003/sig000001fc , \blk00000003/sig000001fd , \blk00000003/sig000001fe , +\blk00000003/sig000001ff , \blk00000003/sig00000200 , \blk00000003/sig00000201 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\NLW_blk00000003/blk0000001c_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000001c_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000001c_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000001c_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000001c_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000001c_P<40>_UNCONNECTED , +\blk00000003/sig000000fc , \blk00000003/sig000000fd , \blk00000003/sig000000fe , \blk00000003/sig000000ff , \blk00000003/sig00000100 , +\blk00000003/sig00000101 , \blk00000003/sig000000ac , \blk00000003/sig000000ad , \blk00000003/sig000000ae , \blk00000003/sig000000af , +\blk00000003/sig000000b0 , \blk00000003/sig000000b1 , \blk00000003/sig000000b2 , \blk00000003/sig000000b3 , \blk00000003/sig000000b4 , +\blk00000003/sig000000b5 , \blk00000003/sig000000b6 , \blk00000003/sig000000b7 , \blk00000003/sig000000b8 , \blk00000003/sig000000b9 , +\blk00000003/sig000000ba , \blk00000003/sig000000bb , \blk00000003/sig000000bc , \blk00000003/sig000000bd , \blk00000003/sig00000202 , +\blk00000003/sig00000203 , \blk00000003/sig00000204 , \blk00000003/sig00000205 , \blk00000003/sig00000206 , \blk00000003/sig00000207 , +\blk00000003/sig00000208 , \blk00000003/sig00000209 , \blk00000003/sig0000020a , \blk00000003/sig0000020b , \blk00000003/sig0000020c , +\blk00000003/sig0000020d , \blk00000003/sig0000020e , \blk00000003/sig0000020f , \blk00000003/sig00000210 , \blk00000003/sig00000211 }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000165 , \blk00000003/sig00000167 , \blk00000003/sig00000169 }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .PCOUT({\NLW_blk00000003/blk0000001c_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000001c_PCOUT<0>_UNCONNECTED }), + .A({\blk00000003/sig000001b0 , \blk00000003/sig000001b1 , \blk00000003/sig000001b2 , \blk00000003/sig000001b3 , \blk00000003/sig000001b4 , +\blk00000003/sig000001b5 , \blk00000003/sig000001b6 , \blk00000003/sig000001b7 , \blk00000003/sig000001b8 , \blk00000003/sig000001b9 , +\blk00000003/sig000001ba , \blk00000003/sig000001bb , \blk00000003/sig000001bc , \blk00000003/sig000001bd , \blk00000003/sig000001be , +\blk00000003/sig000001bf , \blk00000003/sig000001c0 , \blk00000003/sig000001c1 }), + .M({\NLW_blk00000003/blk0000001c_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000001c_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000001c_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 1 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000001b ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000001b_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000001b_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000178 , \blk00000003/sig00000178 , \blk00000003/sig00000178 , \blk00000003/sig00000178 , \blk00000003/sig00000178 , +\blk00000003/sig00000178 , \blk00000003/sig00000178 , \blk00000003/sig00000178 , \blk00000003/sig00000178 , \blk00000003/sig00000178 , +\blk00000003/sig00000178 , \blk00000003/sig00000179 , \blk00000003/sig0000017a , \blk00000003/sig0000017b , \blk00000003/sig0000017c , +\blk00000003/sig0000017d , \blk00000003/sig0000017e , \blk00000003/sig0000017f }), + .BCOUT({\NLW_blk00000003/blk0000001b_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000001b_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000001b_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000001b_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000001b_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000001b_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000001b_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000001b_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000001b_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000001b_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000180 , \blk00000003/sig00000181 , \blk00000003/sig00000182 , \blk00000003/sig00000183 , \blk00000003/sig00000184 , +\blk00000003/sig00000185 , \blk00000003/sig00000186 , \blk00000003/sig00000187 , \blk00000003/sig00000188 , \blk00000003/sig00000189 , +\blk00000003/sig0000018a , \blk00000003/sig0000018b , \blk00000003/sig0000018c , \blk00000003/sig0000018d , \blk00000003/sig0000018e , +\blk00000003/sig0000018f , \blk00000003/sig00000190 , \blk00000003/sig00000191 , \blk00000003/sig00000192 , \blk00000003/sig00000193 , +\blk00000003/sig00000194 , \blk00000003/sig00000195 , \blk00000003/sig00000196 , \blk00000003/sig00000197 , \blk00000003/sig00000198 , +\blk00000003/sig00000199 , \blk00000003/sig0000019a , \blk00000003/sig0000019b , \blk00000003/sig0000019c , \blk00000003/sig0000019d , +\blk00000003/sig0000019e , \blk00000003/sig0000019f , \blk00000003/sig000001a0 , \blk00000003/sig000001a1 , \blk00000003/sig000001a2 , +\blk00000003/sig000001a3 , \blk00000003/sig000001a4 , \blk00000003/sig000001a5 , \blk00000003/sig000001a6 , \blk00000003/sig000001a7 , +\blk00000003/sig000001a8 , \blk00000003/sig000001a9 , \blk00000003/sig000001aa , \blk00000003/sig000001ab , \blk00000003/sig000001ac , +\blk00000003/sig000001ad , \blk00000003/sig000001ae , \blk00000003/sig000001af }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\NLW_blk00000003/blk0000001b_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<40>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_P<39>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<38>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<37>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_P<36>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<35>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<34>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_P<33>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<32>_UNCONNECTED , \NLW_blk00000003/blk0000001b_P<31>_UNCONNECTED , +\blk00000003/sig000000be , \blk00000003/sig000000bf , \blk00000003/sig000000c0 , \blk00000003/sig000000c1 , \blk00000003/sig000000c2 , +\blk00000003/sig000000c3 , \blk00000003/sig000000c4 , \blk00000003/sig000000c5 , \blk00000003/sig000000c6 , \blk00000003/sig000000c7 , +\blk00000003/sig000000c8 , \blk00000003/sig000000c9 , \blk00000003/sig000000ca , \blk00000003/sig000000cb , \blk00000003/sig000000cc , +\blk00000003/sig000000cd , \blk00000003/sig000000ce , \blk00000003/sig000000cf , \blk00000003/sig000000d0 , \blk00000003/sig000000d1 , +\blk00000003/sig000000d2 , \blk00000003/sig000000d3 , \blk00000003/sig000000d4 , \blk00000003/sig000000d5 , \blk00000003/sig000000d6 , +\blk00000003/sig000000d7 , \blk00000003/sig000000d8 , \blk00000003/sig000000d9 , \blk00000003/sig000000da , \blk00000003/sig000000db , +\blk00000003/sig000000dc }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000165 , \blk00000003/sig00000167 , \blk00000003/sig00000169 }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .PCOUT({\NLW_blk00000003/blk0000001b_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000001b_PCOUT<0>_UNCONNECTED }), + .A({\blk00000003/sig000001b0 , \blk00000003/sig000001b1 , \blk00000003/sig000001b2 , \blk00000003/sig000001b3 , \blk00000003/sig000001b4 , +\blk00000003/sig000001b5 , \blk00000003/sig000001b6 , \blk00000003/sig000001b7 , \blk00000003/sig000001b8 , \blk00000003/sig000001b9 , +\blk00000003/sig000001ba , \blk00000003/sig000001bb , \blk00000003/sig000001bc , \blk00000003/sig000001bd , \blk00000003/sig000001be , +\blk00000003/sig000001bf , \blk00000003/sig000001c0 , \blk00000003/sig000001c1 }), + .M({\NLW_blk00000003/blk0000001b_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000001b_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000001b_M<0>_UNCONNECTED }) + ); + MUXCY_D \blk00000003/blk0000001a ( + .CI(NlwRenamedSig_OI_rfd), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000177 ), + .O(\blk00000003/sig00000172 ), + .LO(\NLW_blk00000003/blk0000001a_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000019 ( + .CI(\blk00000003/sig00000175 ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig00000176 ) + ); + MUXCY \blk00000003/blk00000018 ( + .CI(\blk00000003/sig00000175 ), + .DI(\blk00000003/sig00000049 ), + .S(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig0000016a ) + ); + MUXCY_D \blk00000003/blk00000017 ( + .CI(\blk00000003/sig00000172 ), + .DI(\blk00000003/sig00000173 ), + .S(\blk00000003/sig00000174 ), + .O(\blk00000003/sig00000175 ), + .LO(\NLW_blk00000003/blk00000017_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000016 ( + .CI(\blk00000003/sig00000170 ), + .LI(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig00000171 ) + ); + MUXCY_D \blk00000003/blk00000015 ( + .CI(\blk00000003/sig0000016d ), + .DI(\blk00000003/sig0000016e ), + .S(\blk00000003/sig0000016f ), + .O(\NLW_blk00000003/blk00000015_O_UNCONNECTED ), + .LO(\blk00000003/sig00000170 ) + ); + MUXCY_D \blk00000003/blk00000014 ( + .CI(\blk00000003/sig0000016a ), + .DI(\blk00000003/sig0000016b ), + .S(\blk00000003/sig0000016c ), + .O(\blk00000003/sig0000016d ), + .LO(\NLW_blk00000003/blk00000014_LO_UNCONNECTED ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk00000013 ( + .C(clk), + .D(\blk00000003/sig00000168 ), + .Q(\blk00000003/sig00000169 ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk00000012 ( + .C(clk), + .D(\blk00000003/sig00000166 ), + .Q(\blk00000003/sig00000167 ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk00000011 ( + .C(clk), + .D(\blk00000003/sig00000164 ), + .Q(\blk00000003/sig00000165 ) + ); + XORCY \blk00000003/blk00000010 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000162 ), + .O(\blk00000003/sig00000163 ) + ); + MUXCY_D \blk00000003/blk0000000f ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000161 ), + .S(\blk00000003/sig00000162 ), + .O(\NLW_blk00000003/blk0000000f_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk0000000f_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk0000000e ( + .CI(\blk00000003/sig0000015c ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000160 ), + .O(\NLW_blk00000003/blk0000000e_O_UNCONNECTED ), + .LO(\blk00000003/sig0000015e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000000d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000015e ), + .R(sclr), + .Q(\blk00000003/sig0000015f ) + ); + MUXCY_D \blk00000003/blk0000000c ( + .CI(NlwRenamedSig_OI_rfd), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000015d ), + .O(\blk00000003/sig0000015a ), + .LO(\NLW_blk00000003/blk0000000c_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk0000000b ( + .CI(\blk00000003/sig0000015b ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig00000158 ) + ); + MUXCY \blk00000003/blk0000000a ( + .CI(\blk00000003/sig0000015b ), + .DI(\blk00000003/sig00000049 ), + .S(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig0000015c ) + ); + MUXCY_D \blk00000003/blk00000009 ( + .CI(\blk00000003/sig0000015a ), + .DI(\blk00000003/sig00000159 ), + .S(nd), + .O(\blk00000003/sig0000015b ), + .LO(\NLW_blk00000003/blk00000009_LO_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000008 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000158 ), + .R(sclr), + .Q(\blk00000003/sig00000159 ) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 0 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000007 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000007_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000007_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000102 , \blk00000003/sig00000103 , \blk00000003/sig00000104 , \blk00000003/sig00000105 , \blk00000003/sig00000106 , +\blk00000003/sig00000107 , \blk00000003/sig00000108 , \blk00000003/sig00000109 , \blk00000003/sig0000010a , \blk00000003/sig0000010b , +\blk00000003/sig0000010c , \blk00000003/sig0000010d , \blk00000003/sig0000010e , \blk00000003/sig0000010f , \blk00000003/sig00000110 , +\blk00000003/sig00000111 , \blk00000003/sig00000112 , \blk00000003/sig00000113 }), + .BCOUT({\NLW_blk00000003/blk00000007_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000007_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000007_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000007_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000007_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000007_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000007_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000007_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000007_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , +\blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , +\blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , +\blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000114 , \blk00000003/sig00000115 , \blk00000003/sig00000116 , +\blk00000003/sig00000117 , \blk00000003/sig00000118 , \blk00000003/sig00000119 , \blk00000003/sig0000011a , \blk00000003/sig0000011b , +\blk00000003/sig0000011c , \blk00000003/sig0000011d , \blk00000003/sig0000011e , \blk00000003/sig0000011f , \blk00000003/sig00000120 , +\blk00000003/sig00000121 , \blk00000003/sig00000122 , \blk00000003/sig00000123 , \blk00000003/sig00000124 , \blk00000003/sig00000125 , +\blk00000003/sig00000126 , \blk00000003/sig00000127 , \blk00000003/sig00000128 , \blk00000003/sig00000129 , \blk00000003/sig0000012a , +\blk00000003/sig0000012b , \blk00000003/sig0000012c , \blk00000003/sig0000012d , \blk00000003/sig0000012e , \blk00000003/sig0000012f , +\blk00000003/sig00000130 , \blk00000003/sig00000131 , \blk00000003/sig00000132 }), + .P({\NLW_blk00000003/blk00000007_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000007_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000007_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000007_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000007_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000007_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<31>_UNCONNECTED , +\blk00000003/sig00000133 , \blk00000003/sig00000134 , \blk00000003/sig00000135 , \blk00000003/sig00000136 , \blk00000003/sig00000137 , +\blk00000003/sig00000138 , \blk00000003/sig00000139 , \blk00000003/sig0000013a , \blk00000003/sig0000013b , \blk00000003/sig0000013c , +\blk00000003/sig0000013d , \blk00000003/sig0000013e , \blk00000003/sig0000013f , \blk00000003/sig00000140 , \blk00000003/sig00000141 , +\blk00000003/sig00000142 , \blk00000003/sig00000143 , \blk00000003/sig00000144 , \blk00000003/sig00000145 , \blk00000003/sig00000146 , +\blk00000003/sig00000147 , \blk00000003/sig00000148 , \blk00000003/sig00000149 , \blk00000003/sig0000014a , \blk00000003/sig0000014b , +\blk00000003/sig0000014c , \blk00000003/sig0000014d , \blk00000003/sig0000014e , \blk00000003/sig0000014f , \blk00000003/sig00000150 , +\blk00000003/sig00000151 }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +NlwRenamedSig_OI_rfd, NlwRenamedSig_OI_rfd, NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 , +\blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 , +\blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 , +\blk00000003/sig00000152 , \blk00000003/sig00000152 , \blk00000003/sig00000152 }), + .PCOUT({\NLW_blk00000003/blk00000007_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000007_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<16>_UNCONNECTED , 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, \NLW_blk00000003/blk00000007_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000007_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000007_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000007_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000007_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000007_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000007_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000007_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000007_M<3>_UNCONNECTED , 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.RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig000000ac , \blk00000003/sig000000ad , \blk00000003/sig000000ae , \blk00000003/sig000000af , \blk00000003/sig000000b0 , +\blk00000003/sig000000b1 , \blk00000003/sig000000b2 , \blk00000003/sig000000b3 , \blk00000003/sig000000b4 , \blk00000003/sig000000b5 , +\blk00000003/sig000000b6 , \blk00000003/sig000000b7 , \blk00000003/sig000000b8 , \blk00000003/sig000000b9 , \blk00000003/sig000000ba , +\blk00000003/sig000000bb , \blk00000003/sig000000bc , \blk00000003/sig000000bd }), + .BCOUT({\NLW_blk00000003/blk00000006_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000006_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000006_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000006_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000006_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000006_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000006_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000006_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000006_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , 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\blk00000003/sig000000d6 , \blk00000003/sig000000d7 , \blk00000003/sig000000d8 , \blk00000003/sig000000d9 , +\blk00000003/sig000000da , \blk00000003/sig000000db , \blk00000003/sig000000dc }), + .P({\NLW_blk00000003/blk00000006_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000006_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000006_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000006_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000006_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000006_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<31>_UNCONNECTED , +\blk00000003/sig000000dd , \blk00000003/sig000000de , \blk00000003/sig000000df , \blk00000003/sig000000e0 , \blk00000003/sig000000e1 , +\blk00000003/sig000000e2 , \blk00000003/sig000000e3 , \blk00000003/sig000000e4 , \blk00000003/sig000000e5 , \blk00000003/sig000000e6 , +\blk00000003/sig000000e7 , \blk00000003/sig000000e8 , \blk00000003/sig000000e9 , \blk00000003/sig000000ea , \blk00000003/sig000000eb , +\blk00000003/sig000000ec , \blk00000003/sig000000ed , \blk00000003/sig000000ee , \blk00000003/sig000000ef , \blk00000003/sig000000f0 , +\blk00000003/sig000000f1 , \blk00000003/sig000000f2 , \blk00000003/sig000000f3 , \blk00000003/sig000000f4 , \blk00000003/sig000000f5 , +\blk00000003/sig000000f6 , \blk00000003/sig000000f7 , \blk00000003/sig000000f8 , \blk00000003/sig000000f9 , \blk00000003/sig000000fa , +\blk00000003/sig000000fb }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , NlwRenamedSig_OI_rfd, +NlwRenamedSig_OI_rfd, NlwRenamedSig_OI_rfd, NlwRenamedSig_OI_rfd}), + .D({\blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , +\blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , +\blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , +\blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc }), + .PCOUT({\NLW_blk00000003/blk00000006_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<41>_UNCONNECTED , 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\NLW_blk00000003/blk00000006_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<0>_UNCONNECTED }), + .A({\blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , +\blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , +\blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fc , \blk00000003/sig000000fd , \blk00000003/sig000000fe , +\blk00000003/sig000000ff , \blk00000003/sig00000100 , \blk00000003/sig00000101 }), + .M({\NLW_blk00000003/blk00000006_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<32>_UNCONNECTED , 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.A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[22]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000096_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f27 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000095 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[21]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000095_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f26 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000094 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[23]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000094_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f28 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000093 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[19]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000093_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f24 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000092 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[18]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000092_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f23 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000091 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[20]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000091_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f25 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000090 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[16]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000090_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f21 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000008f ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[15]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000008f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f20 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000008e ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[17]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000008e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f22 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000008d ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[13]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000008d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f1e ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000008c ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[12]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000008c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f1d ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000008b ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[14]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000008b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f1f ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000008a ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[10]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000008a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f1b ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000089 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[9]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000089_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f1a ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000088 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[11]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000088_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f1c ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000087 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[7]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000087_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f18 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000086 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[6]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000086_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f17 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000085 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[8]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000085_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f19 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000084 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[4]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000084_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f15 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000083 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[3]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000083_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f14 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000082 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[5]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000082_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f16 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000081 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[1]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000081_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f12 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000080 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[0]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000080_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f11 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000007f ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_2_2[2]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000007f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f13 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000007e ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[22]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000007e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f0f ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000007d ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[21]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000007d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f0e ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000007c ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[23]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000007c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f10 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000007b ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[19]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000007b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f0c ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000007a ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[18]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000007a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f0b ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000079 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[20]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000079_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f0d ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000078 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[16]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000078_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f09 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000077 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[15]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000077_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f08 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000076 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[17]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000076_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f0a ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000075 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[13]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000075_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f06 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000074 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[12]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000074_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f05 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000073 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[14]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000073_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f07 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000072 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[10]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000072_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f03 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000071 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[9]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000071_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f02 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000070 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[11]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000070_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f04 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000006f ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[7]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000006f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f00 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000006e ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[6]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000006e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000eff ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000006d ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[8]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000006d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000f01 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000006c ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[4]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000006c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000efd ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000006b ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[3]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000006b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000efc ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk0000006a ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[5]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk0000006a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000efe ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000069 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[1]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000069_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000efa ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000068 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[0]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000068_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000ef9 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000035/blk00000067 ( + .A0(\blk00000003/sig000002ba ), + .A1(\blk00000003/sig000002b9 ), + .A2(\blk00000003/sig000002b8 ), + .A3(\blk00000003/blk00000035/sig00000ef8 ), + .D(din_1_1[2]), + .DPRA0(\blk00000003/sig000002aa ), + .DPRA1(\blk00000003/sig000002ac ), + .DPRA2(\blk00000003/sig000002b4 ), + .DPRA3(\blk00000003/blk00000035/sig00000ef8 ), + .WCLK(clk), + .WE(\blk00000003/blk00000035/sig00000f29 ), + .SPO(\NLW_blk00000003/blk00000035/blk00000067_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000035/sig00000efb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000066 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f28 ), + .Q(\blk00000003/sig000002bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000065 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f27 ), + .Q(\blk00000003/sig000002bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000064 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f26 ), + .Q(\blk00000003/sig000002bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000063 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f25 ), + .Q(\blk00000003/sig000002be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000062 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f24 ), + .Q(\blk00000003/sig000002bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000061 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f23 ), + .Q(\blk00000003/sig000002c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000060 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f22 ), + .Q(\blk00000003/sig000002c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000005f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f21 ), + .Q(\blk00000003/sig000002c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000005e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f20 ), + .Q(\blk00000003/sig000002c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000005d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f1f ), + .Q(\blk00000003/sig000002c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000005c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f1e ), + .Q(\blk00000003/sig000002c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000005b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f1d ), + .Q(\blk00000003/sig000002c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000005a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f1c ), + .Q(\blk00000003/sig000002c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000059 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f1b ), + .Q(\blk00000003/sig000002c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000058 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f1a ), + .Q(\blk00000003/sig000002c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000057 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f19 ), + .Q(\blk00000003/sig000002ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000056 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f18 ), + .Q(\blk00000003/sig000002cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000055 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f17 ), + .Q(\blk00000003/sig000002cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000054 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f16 ), + .Q(\blk00000003/sig000002cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000053 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f15 ), + .Q(\blk00000003/sig000002ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000052 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f14 ), + .Q(\blk00000003/sig000002cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000051 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f13 ), + .Q(\blk00000003/sig000002d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000050 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f12 ), + .Q(\blk00000003/sig000002d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000004f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f11 ), + .Q(\blk00000003/sig000002d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000004e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f10 ), + .Q(\blk00000003/sig000002d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000004d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f0f ), + .Q(\blk00000003/sig000002d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000004c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f0e ), + .Q(\blk00000003/sig000002d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000004b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f0d ), + .Q(\blk00000003/sig000002d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000004a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f0c ), + .Q(\blk00000003/sig000002d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000049 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f0b ), + .Q(\blk00000003/sig000002d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000048 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f0a ), + .Q(\blk00000003/sig000002d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000047 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f09 ), + .Q(\blk00000003/sig000002da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000046 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f08 ), + .Q(\blk00000003/sig000002db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000045 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f07 ), + .Q(\blk00000003/sig000002dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000044 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f06 ), + .Q(\blk00000003/sig000002dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000043 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f05 ), + .Q(\blk00000003/sig000002de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000042 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f04 ), + .Q(\blk00000003/sig000002df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000041 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f03 ), + .Q(\blk00000003/sig000002e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000040 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f02 ), + .Q(\blk00000003/sig000002e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000003f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f01 ), + .Q(\blk00000003/sig000002e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000003e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000f00 ), + .Q(\blk00000003/sig000002e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000003d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000eff ), + .Q(\blk00000003/sig000002e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000003c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000efe ), + .Q(\blk00000003/sig000002e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000003b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000efd ), + .Q(\blk00000003/sig000002e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk0000003a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000efc ), + .Q(\blk00000003/sig000002e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000039 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000efb ), + .Q(\blk00000003/sig000002e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000038 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000efa ), + .Q(\blk00000003/sig000002e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000035/blk00000037 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000035/sig00000ef9 ), + .Q(\blk00000003/sig000002ea ) + ); + GND \blk00000003/blk00000035/blk00000036 ( + .G(\blk00000003/blk00000035/sig00000ef8 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000013d/blk0000015f ( + .I0(\blk00000003/sig000009fa ), + .I1(ce), + .O(\blk00000003/blk0000013d/sig00000f5f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk0000015e ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008c8 ), + .Q(\blk00000003/blk0000013d/sig00000f5e ), + .Q15(\NLW_blk00000003/blk0000013d/blk0000015e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk0000015d ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008c9 ), + .Q(\blk00000003/blk0000013d/sig00000f5d ), + .Q15(\NLW_blk00000003/blk0000013d/blk0000015d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk0000015c ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008ca ), + .Q(\blk00000003/blk0000013d/sig00000f5c ), + .Q15(\NLW_blk00000003/blk0000013d/blk0000015c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk0000015b ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008cb ), + .Q(\blk00000003/blk0000013d/sig00000f5b ), + .Q15(\NLW_blk00000003/blk0000013d/blk0000015b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk0000015a ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008cc ), + .Q(\blk00000003/blk0000013d/sig00000f5a ), + .Q15(\NLW_blk00000003/blk0000013d/blk0000015a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000159 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008cd ), + .Q(\blk00000003/blk0000013d/sig00000f59 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000159_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000158 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008ce ), + .Q(\blk00000003/blk0000013d/sig00000f58 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000158_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000157 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008cf ), + .Q(\blk00000003/blk0000013d/sig00000f57 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000157_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000156 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008d0 ), + .Q(\blk00000003/blk0000013d/sig00000f56 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000156_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000155 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008d1 ), + .Q(\blk00000003/blk0000013d/sig00000f55 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000155_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000154 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008d2 ), + .Q(\blk00000003/blk0000013d/sig00000f54 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000154_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000153 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008d3 ), + .Q(\blk00000003/blk0000013d/sig00000f53 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000153_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000152 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008d4 ), + .Q(\blk00000003/blk0000013d/sig00000f52 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000152_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000151 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008d5 ), + .Q(\blk00000003/blk0000013d/sig00000f51 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000151_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk00000150 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008d6 ), + .Q(\blk00000003/blk0000013d/sig00000f50 ), + .Q15(\NLW_blk00000003/blk0000013d/blk00000150_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000013d/blk0000014f ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk0000013d/sig00000f4e ), + .A2(\blk00000003/blk0000013d/sig00000f4e ), + .A3(\blk00000003/blk0000013d/sig00000f4e ), + .CE(\blk00000003/blk0000013d/sig00000f5f ), + .CLK(clk), + .D(\blk00000003/sig000008d7 ), + .Q(\blk00000003/blk0000013d/sig00000f4f ), + .Q15(\NLW_blk00000003/blk0000013d/blk0000014f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk0000014e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f5e ), + .Q(\blk00000003/sig00000768 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk0000014d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f5d ), + .Q(\blk00000003/sig00000769 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk0000014c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f5c ), + .Q(\blk00000003/sig0000076a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk0000014b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f5b ), + .Q(\blk00000003/sig0000076b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk0000014a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f5a ), + .Q(\blk00000003/sig0000076c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000149 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f59 ), + .Q(\blk00000003/sig0000076d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000148 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f58 ), + .Q(\blk00000003/sig0000076e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000147 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f57 ), + .Q(\blk00000003/sig0000076f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000146 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f56 ), + .Q(\blk00000003/sig00000770 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000145 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f55 ), + .Q(\blk00000003/sig00000771 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000144 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f54 ), + .Q(\blk00000003/sig00000772 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000143 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f53 ), + .Q(\blk00000003/sig00000773 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000142 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f52 ), + .Q(\blk00000003/sig00000774 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000141 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f51 ), + .Q(\blk00000003/sig00000775 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk00000140 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f50 ), + .Q(\blk00000003/sig00000776 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000013d/blk0000013f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000013d/sig00000f4f ), + .Q(\blk00000003/sig00000777 ) + ); + GND \blk00000003/blk0000013d/blk0000013e ( + .G(\blk00000003/blk0000013d/sig00000f4e ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000160/blk00000182 ( + .I0(\blk00000003/sig000009f8 ), + .I1(ce), + .O(\blk00000003/blk00000160/sig00000f95 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000181 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a17 ), + .Q(\blk00000003/blk00000160/sig00000f94 ), + .Q15(\NLW_blk00000003/blk00000160/blk00000181_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000180 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a18 ), + .Q(\blk00000003/blk00000160/sig00000f93 ), + .Q15(\NLW_blk00000003/blk00000160/blk00000180_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk0000017f ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a19 ), + .Q(\blk00000003/blk00000160/sig00000f92 ), + .Q15(\NLW_blk00000003/blk00000160/blk0000017f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk0000017e ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a1a ), + .Q(\blk00000003/blk00000160/sig00000f91 ), + .Q15(\NLW_blk00000003/blk00000160/blk0000017e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk0000017d ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a1b ), + .Q(\blk00000003/blk00000160/sig00000f90 ), + .Q15(\NLW_blk00000003/blk00000160/blk0000017d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk0000017c ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a1c ), + .Q(\blk00000003/blk00000160/sig00000f8f ), + .Q15(\NLW_blk00000003/blk00000160/blk0000017c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk0000017b ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a1d ), + .Q(\blk00000003/blk00000160/sig00000f8e ), + .Q15(\NLW_blk00000003/blk00000160/blk0000017b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk0000017a ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a1e ), + .Q(\blk00000003/blk00000160/sig00000f8d ), + .Q15(\NLW_blk00000003/blk00000160/blk0000017a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000179 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a1f ), + .Q(\blk00000003/blk00000160/sig00000f8c ), + .Q15(\NLW_blk00000003/blk00000160/blk00000179_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000178 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a20 ), + .Q(\blk00000003/blk00000160/sig00000f8b ), + .Q15(\NLW_blk00000003/blk00000160/blk00000178_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000177 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a21 ), + .Q(\blk00000003/blk00000160/sig00000f8a ), + .Q15(\NLW_blk00000003/blk00000160/blk00000177_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000176 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a22 ), + .Q(\blk00000003/blk00000160/sig00000f89 ), + .Q15(\NLW_blk00000003/blk00000160/blk00000176_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000175 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a23 ), + .Q(\blk00000003/blk00000160/sig00000f88 ), + .Q15(\NLW_blk00000003/blk00000160/blk00000175_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000174 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a24 ), + .Q(\blk00000003/blk00000160/sig00000f87 ), + .Q15(\NLW_blk00000003/blk00000160/blk00000174_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000173 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a25 ), + .Q(\blk00000003/blk00000160/sig00000f86 ), + .Q15(\NLW_blk00000003/blk00000160/blk00000173_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000160/blk00000172 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000160/sig00000f84 ), + .A2(\blk00000003/blk00000160/sig00000f84 ), + .A3(\blk00000003/blk00000160/sig00000f84 ), + .CE(\blk00000003/blk00000160/sig00000f95 ), + .CLK(clk), + .D(\blk00000003/sig00000a26 ), + .Q(\blk00000003/blk00000160/sig00000f85 ), + .Q15(\NLW_blk00000003/blk00000160/blk00000172_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000171 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f94 ), + .Q(\blk00000003/sig00000728 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000170 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f93 ), + .Q(\blk00000003/sig00000729 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk0000016f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f92 ), + .Q(\blk00000003/sig0000072a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk0000016e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f91 ), + .Q(\blk00000003/sig0000072b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk0000016d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f90 ), + .Q(\blk00000003/sig0000072c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk0000016c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f8f ), + .Q(\blk00000003/sig0000072d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk0000016b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f8e ), + .Q(\blk00000003/sig0000072e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk0000016a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f8d ), + .Q(\blk00000003/sig0000072f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000169 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f8c ), + .Q(\blk00000003/sig00000730 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000168 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f8b ), + .Q(\blk00000003/sig00000731 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000167 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f8a ), + .Q(\blk00000003/sig00000732 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000166 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f89 ), + .Q(\blk00000003/sig00000733 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000165 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f88 ), + .Q(\blk00000003/sig00000734 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000164 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f87 ), + .Q(\blk00000003/sig00000735 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000163 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f86 ), + .Q(\blk00000003/sig00000736 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000160/blk00000162 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000160/sig00000f85 ), + .Q(\blk00000003/sig00000737 ) + ); + GND \blk00000003/blk00000160/blk00000161 ( + .G(\blk00000003/blk00000160/sig00000f84 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000183/blk000001a5 ( + .I0(\blk00000003/sig000009fa ), + .I1(ce), + .O(\blk00000003/blk00000183/sig00000fcb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk000001a4 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009d8 ), + .Q(\blk00000003/blk00000183/sig00000fca ), + .Q15(\NLW_blk00000003/blk00000183/blk000001a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk000001a3 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009d9 ), + .Q(\blk00000003/blk00000183/sig00000fc9 ), + .Q15(\NLW_blk00000003/blk00000183/blk000001a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk000001a2 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009da ), + .Q(\blk00000003/blk00000183/sig00000fc8 ), + .Q15(\NLW_blk00000003/blk00000183/blk000001a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk000001a1 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009db ), + .Q(\blk00000003/blk00000183/sig00000fc7 ), + .Q15(\NLW_blk00000003/blk00000183/blk000001a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk000001a0 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009dc ), + .Q(\blk00000003/blk00000183/sig00000fc6 ), + .Q15(\NLW_blk00000003/blk00000183/blk000001a0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk0000019f ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009dd ), + .Q(\blk00000003/blk00000183/sig00000fc5 ), + .Q15(\NLW_blk00000003/blk00000183/blk0000019f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk0000019e ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009de ), + .Q(\blk00000003/blk00000183/sig00000fc4 ), + .Q15(\NLW_blk00000003/blk00000183/blk0000019e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk0000019d ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009df ), + .Q(\blk00000003/blk00000183/sig00000fc3 ), + .Q15(\NLW_blk00000003/blk00000183/blk0000019d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk0000019c ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009e0 ), + .Q(\blk00000003/blk00000183/sig00000fc2 ), + .Q15(\NLW_blk00000003/blk00000183/blk0000019c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk0000019b ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009e1 ), + .Q(\blk00000003/blk00000183/sig00000fc1 ), + .Q15(\NLW_blk00000003/blk00000183/blk0000019b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk0000019a ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009e2 ), + .Q(\blk00000003/blk00000183/sig00000fc0 ), + .Q15(\NLW_blk00000003/blk00000183/blk0000019a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk00000199 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009e3 ), + .Q(\blk00000003/blk00000183/sig00000fbf ), + .Q15(\NLW_blk00000003/blk00000183/blk00000199_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk00000198 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009e4 ), + .Q(\blk00000003/blk00000183/sig00000fbe ), + .Q15(\NLW_blk00000003/blk00000183/blk00000198_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk00000197 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009e5 ), + .Q(\blk00000003/blk00000183/sig00000fbd ), + .Q15(\NLW_blk00000003/blk00000183/blk00000197_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk00000196 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009e6 ), + .Q(\blk00000003/blk00000183/sig00000fbc ), + .Q15(\NLW_blk00000003/blk00000183/blk00000196_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000183/blk00000195 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk00000183/sig00000fba ), + .A2(\blk00000003/blk00000183/sig00000fba ), + .A3(\blk00000003/blk00000183/sig00000fba ), + .CE(\blk00000003/blk00000183/sig00000fcb ), + .CLK(clk), + .D(\blk00000003/sig000009e7 ), + .Q(\blk00000003/blk00000183/sig00000fbb ), + .Q15(\NLW_blk00000003/blk00000183/blk00000195_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000194 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fca ), + .Q(\blk00000003/sig000007b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000193 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc9 ), + .Q(\blk00000003/sig000007b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000192 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc8 ), + .Q(\blk00000003/sig000007ba ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000191 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc7 ), + .Q(\blk00000003/sig000007bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000190 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc6 ), + .Q(\blk00000003/sig000007bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk0000018f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc5 ), + .Q(\blk00000003/sig000007bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk0000018e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc4 ), + .Q(\blk00000003/sig000007be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk0000018d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc3 ), + .Q(\blk00000003/sig000007bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk0000018c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc2 ), + .Q(\blk00000003/sig000007c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk0000018b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc1 ), + .Q(\blk00000003/sig000007c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk0000018a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fc0 ), + .Q(\blk00000003/sig000007c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000189 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fbf ), + .Q(\blk00000003/sig000007c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000188 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fbe ), + .Q(\blk00000003/sig000007c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000187 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fbd ), + .Q(\blk00000003/sig000007c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000186 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fbc ), + .Q(\blk00000003/sig000007c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000183/blk00000185 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000183/sig00000fbb ), + .Q(\blk00000003/sig000007c7 ) + ); + GND \blk00000003/blk00000183/blk00000184 ( + .G(\blk00000003/blk00000183/sig00000fba ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001a6/blk000001c8 ( + .I0(\blk00000003/sig000009f8 ), + .I1(ce), + .O(\blk00000003/blk000001a6/sig00001001 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001c7 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a27 ), + .Q(\blk00000003/blk000001a6/sig00001000 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001c7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001c6 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a28 ), + .Q(\blk00000003/blk000001a6/sig00000fff ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001c6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001c5 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a29 ), + .Q(\blk00000003/blk000001a6/sig00000ffe ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001c5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001c4 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a2a ), + .Q(\blk00000003/blk000001a6/sig00000ffd ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001c4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001c3 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a2b ), + .Q(\blk00000003/blk000001a6/sig00000ffc ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001c3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001c2 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a2c ), + .Q(\blk00000003/blk000001a6/sig00000ffb ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001c2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001c1 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a2d ), + .Q(\blk00000003/blk000001a6/sig00000ffa ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001c1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001c0 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a2e ), + .Q(\blk00000003/blk000001a6/sig00000ff9 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001c0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001bf ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a2f ), + .Q(\blk00000003/blk000001a6/sig00000ff8 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001bf_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001be ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a30 ), + .Q(\blk00000003/blk000001a6/sig00000ff7 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001be_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001bd ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a31 ), + .Q(\blk00000003/blk000001a6/sig00000ff6 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001bd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001bc ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a32 ), + .Q(\blk00000003/blk000001a6/sig00000ff5 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001bc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001bb ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a33 ), + .Q(\blk00000003/blk000001a6/sig00000ff4 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001bb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001ba ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a34 ), + .Q(\blk00000003/blk000001a6/sig00000ff3 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001ba_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001b9 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a35 ), + .Q(\blk00000003/blk000001a6/sig00000ff2 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001b9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001a6/blk000001b8 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000001a6/sig00000ff0 ), + .A2(\blk00000003/blk000001a6/sig00000ff0 ), + .A3(\blk00000003/blk000001a6/sig00000ff0 ), + .CE(\blk00000003/blk000001a6/sig00001001 ), + .CLK(clk), + .D(\blk00000003/sig00000a36 ), + .Q(\blk00000003/blk000001a6/sig00000ff1 ), + .Q15(\NLW_blk00000003/blk000001a6/blk000001b8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00001000 ), + .Q(\blk00000003/sig00000778 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000fff ), + .Q(\blk00000003/sig00000779 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ffe ), + .Q(\blk00000003/sig0000077a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ffd ), + .Q(\blk00000003/sig0000077b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ffc ), + .Q(\blk00000003/sig0000077c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ffb ), + .Q(\blk00000003/sig0000077d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ffa ), + .Q(\blk00000003/sig0000077e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ff9 ), + .Q(\blk00000003/sig0000077f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001af ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ff8 ), + .Q(\blk00000003/sig00000780 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ff7 ), + .Q(\blk00000003/sig00000781 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ff6 ), + .Q(\blk00000003/sig00000782 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ff5 ), + .Q(\blk00000003/sig00000783 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ff4 ), + .Q(\blk00000003/sig00000784 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ff3 ), + .Q(\blk00000003/sig00000785 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ff2 ), + .Q(\blk00000003/sig00000786 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001a6/blk000001a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001a6/sig00000ff1 ), + .Q(\blk00000003/sig00000787 ) + ); + GND \blk00000003/blk000001a6/blk000001a7 ( + .G(\blk00000003/blk000001a6/sig00000ff0 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001c9/blk000001eb ( + .I0(\blk00000003/sig000009f9 ), + .I1(ce), + .O(\blk00000003/blk000001c9/sig00001037 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001ea ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000878 ), + .Q(\blk00000003/blk000001c9/sig00001036 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001ea_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e9 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000879 ), + .Q(\blk00000003/blk000001c9/sig00001035 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e8 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig0000087a ), + .Q(\blk00000003/blk000001c9/sig00001034 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e7 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig0000087b ), + .Q(\blk00000003/blk000001c9/sig00001033 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e6 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig0000087c ), + .Q(\blk00000003/blk000001c9/sig00001032 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e5 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig0000087d ), + .Q(\blk00000003/blk000001c9/sig00001031 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e4 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig0000087e ), + .Q(\blk00000003/blk000001c9/sig00001030 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e3 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig0000087f ), + .Q(\blk00000003/blk000001c9/sig0000102f ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e2 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000880 ), + .Q(\blk00000003/blk000001c9/sig0000102e ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e1 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000881 ), + .Q(\blk00000003/blk000001c9/sig0000102d ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001e0 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000882 ), + .Q(\blk00000003/blk000001c9/sig0000102c ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001df ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000883 ), + .Q(\blk00000003/blk000001c9/sig0000102b ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001de ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000884 ), + .Q(\blk00000003/blk000001c9/sig0000102a ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001dd ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000885 ), + .Q(\blk00000003/blk000001c9/sig00001029 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001dc ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000886 ), + .Q(\blk00000003/blk000001c9/sig00001028 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001c9/blk000001db ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk000001c9/sig00001026 ), + .A2(\blk00000003/blk000001c9/sig00001026 ), + .A3(\blk00000003/blk000001c9/sig00001026 ), + .CE(\blk00000003/blk000001c9/sig00001037 ), + .CLK(clk), + .D(\blk00000003/sig00000887 ), + .Q(\blk00000003/blk000001c9/sig00001027 ), + .Q15(\NLW_blk00000003/blk000001c9/blk000001db_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001da ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001036 ), + .Q(\blk00000003/sig000008c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001035 ), + .Q(\blk00000003/sig000008c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001034 ), + .Q(\blk00000003/sig000008ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001033 ), + .Q(\blk00000003/sig000008cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001032 ), + .Q(\blk00000003/sig000008cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001031 ), + .Q(\blk00000003/sig000008cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001030 ), + .Q(\blk00000003/sig000008ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig0000102f ), + .Q(\blk00000003/sig000008cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig0000102e ), + .Q(\blk00000003/sig000008d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig0000102d ), + .Q(\blk00000003/sig000008d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig0000102c ), + .Q(\blk00000003/sig000008d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig0000102b ), + .Q(\blk00000003/sig000008d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig0000102a ), + .Q(\blk00000003/sig000008d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001029 ), + .Q(\blk00000003/sig000008d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001028 ), + .Q(\blk00000003/sig000008d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001c9/blk000001cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001c9/sig00001027 ), + .Q(\blk00000003/sig000008d7 ) + ); + GND \blk00000003/blk000001c9/blk000001ca ( + .G(\blk00000003/blk000001c9/sig00001026 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001ec/blk0000020e ( + .I0(\blk00000003/sig000009f7 ), + .I1(ce), + .O(\blk00000003/blk000001ec/sig0000106d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020d ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a37 ), + .Q(\blk00000003/blk000001ec/sig0000106c ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020c ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a38 ), + .Q(\blk00000003/blk000001ec/sig0000106b ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020b ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a39 ), + .Q(\blk00000003/blk000001ec/sig0000106a ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk0000020a ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a3a ), + .Q(\blk00000003/blk000001ec/sig00001069 ), + .Q15(\NLW_blk00000003/blk000001ec/blk0000020a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000209 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a3b ), + .Q(\blk00000003/blk000001ec/sig00001068 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000209_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000208 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a3c ), + .Q(\blk00000003/blk000001ec/sig00001067 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000208_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000207 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a3d ), + .Q(\blk00000003/blk000001ec/sig00001066 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000207_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000206 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a3e ), + .Q(\blk00000003/blk000001ec/sig00001065 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000206_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000205 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a3f ), + .Q(\blk00000003/blk000001ec/sig00001064 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000205_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000204 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a40 ), + .Q(\blk00000003/blk000001ec/sig00001063 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000204_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000203 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a41 ), + .Q(\blk00000003/blk000001ec/sig00001062 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000203_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000202 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a42 ), + .Q(\blk00000003/blk000001ec/sig00001061 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000202_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000201 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a43 ), + .Q(\blk00000003/blk000001ec/sig00001060 ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000201_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk00000200 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a44 ), + .Q(\blk00000003/blk000001ec/sig0000105f ), + .Q15(\NLW_blk00000003/blk000001ec/blk00000200_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk000001ff ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a45 ), + .Q(\blk00000003/blk000001ec/sig0000105e ), + .Q15(\NLW_blk00000003/blk000001ec/blk000001ff_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001ec/blk000001fe ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk000001ec/sig0000105c ), + .A2(\blk00000003/blk000001ec/sig0000105c ), + .A3(\blk00000003/blk000001ec/sig0000105c ), + .CE(\blk00000003/blk000001ec/sig0000106d ), + .CLK(clk), + .D(\blk00000003/sig00000a46 ), + .Q(\blk00000003/blk000001ec/sig0000105d ), + .Q15(\NLW_blk00000003/blk000001ec/blk000001fe_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig0000106c ), + .Q(\blk00000003/sig000008b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig0000106b ), + .Q(\blk00000003/sig000008b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig0000106a ), + .Q(\blk00000003/sig000008ba ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001069 ), + .Q(\blk00000003/sig000008bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001068 ), + .Q(\blk00000003/sig000008bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001067 ), + .Q(\blk00000003/sig000008bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001066 ), + .Q(\blk00000003/sig000008be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001065 ), + .Q(\blk00000003/sig000008bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001064 ), + .Q(\blk00000003/sig000008c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001063 ), + .Q(\blk00000003/sig000008c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001062 ), + .Q(\blk00000003/sig000008c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001061 ), + .Q(\blk00000003/sig000008c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig00001060 ), + .Q(\blk00000003/sig000008c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig0000105f ), + .Q(\blk00000003/sig000008c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig0000105e ), + .Q(\blk00000003/sig000008c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001ec/blk000001ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001ec/sig0000105d ), + .Q(\blk00000003/sig000008c7 ) + ); + GND \blk00000003/blk000001ec/blk000001ed ( + .G(\blk00000003/blk000001ec/sig0000105c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000020f/blk00000231 ( + .I0(\blk00000003/sig000009f9 ), + .I1(ce), + .O(\blk00000003/blk0000020f/sig000010a3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000230 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000988 ), + .Q(\blk00000003/blk0000020f/sig000010a2 ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000230_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk0000022f ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000989 ), + .Q(\blk00000003/blk0000020f/sig000010a1 ), + .Q15(\NLW_blk00000003/blk0000020f/blk0000022f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk0000022e ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig0000098a ), + .Q(\blk00000003/blk0000020f/sig000010a0 ), + .Q15(\NLW_blk00000003/blk0000020f/blk0000022e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk0000022d ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig0000098b ), + .Q(\blk00000003/blk0000020f/sig0000109f ), + .Q15(\NLW_blk00000003/blk0000020f/blk0000022d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk0000022c ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig0000098c ), + .Q(\blk00000003/blk0000020f/sig0000109e ), + .Q15(\NLW_blk00000003/blk0000020f/blk0000022c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk0000022b ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig0000098d ), + .Q(\blk00000003/blk0000020f/sig0000109d ), + .Q15(\NLW_blk00000003/blk0000020f/blk0000022b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk0000022a ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig0000098e ), + .Q(\blk00000003/blk0000020f/sig0000109c ), + .Q15(\NLW_blk00000003/blk0000020f/blk0000022a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000229 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig0000098f ), + .Q(\blk00000003/blk0000020f/sig0000109b ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000229_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000228 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000990 ), + .Q(\blk00000003/blk0000020f/sig0000109a ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000228_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000227 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000991 ), + .Q(\blk00000003/blk0000020f/sig00001099 ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000227_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000226 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000992 ), + .Q(\blk00000003/blk0000020f/sig00001098 ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000226_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000225 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000993 ), + .Q(\blk00000003/blk0000020f/sig00001097 ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000225_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000224 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000994 ), + .Q(\blk00000003/blk0000020f/sig00001096 ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000224_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000223 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000995 ), + .Q(\blk00000003/blk0000020f/sig00001095 ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000223_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000222 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000996 ), + .Q(\blk00000003/blk0000020f/sig00001094 ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000222_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000020f/blk00000221 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000020f/sig00001092 ), + .A2(\blk00000003/blk0000020f/sig00001092 ), + .A3(\blk00000003/blk0000020f/sig00001092 ), + .CE(\blk00000003/blk0000020f/sig000010a3 ), + .CLK(clk), + .D(\blk00000003/sig00000997 ), + .Q(\blk00000003/blk0000020f/sig00001093 ), + .Q15(\NLW_blk00000003/blk0000020f/blk00000221_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000220 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig000010a2 ), + .Q(\blk00000003/sig000009d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk0000021f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig000010a1 ), + .Q(\blk00000003/sig000009d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk0000021e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig000010a0 ), + .Q(\blk00000003/sig000009da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk0000021d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig0000109f ), + .Q(\blk00000003/sig000009db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk0000021c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig0000109e ), + .Q(\blk00000003/sig000009dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk0000021b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig0000109d ), + .Q(\blk00000003/sig000009dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk0000021a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig0000109c ), + .Q(\blk00000003/sig000009de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000219 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig0000109b ), + .Q(\blk00000003/sig000009df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000218 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig0000109a ), + .Q(\blk00000003/sig000009e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000217 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig00001099 ), + .Q(\blk00000003/sig000009e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000216 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig00001098 ), + .Q(\blk00000003/sig000009e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000215 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig00001097 ), + .Q(\blk00000003/sig000009e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000214 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig00001096 ), + .Q(\blk00000003/sig000009e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000213 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig00001095 ), + .Q(\blk00000003/sig000009e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000212 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig00001094 ), + .Q(\blk00000003/sig000009e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000020f/blk00000211 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000020f/sig00001093 ), + .Q(\blk00000003/sig000009e7 ) + ); + GND \blk00000003/blk0000020f/blk00000210 ( + .G(\blk00000003/blk0000020f/sig00001092 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000232/blk00000254 ( + .I0(\blk00000003/sig000009f7 ), + .I1(ce), + .O(\blk00000003/blk00000232/sig000010d9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000253 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a47 ), + .Q(\blk00000003/blk00000232/sig000010d8 ), + .Q15(\NLW_blk00000003/blk00000232/blk00000253_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000252 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a48 ), + .Q(\blk00000003/blk00000232/sig000010d7 ), + .Q15(\NLW_blk00000003/blk00000232/blk00000252_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000251 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a49 ), + .Q(\blk00000003/blk00000232/sig000010d6 ), + .Q15(\NLW_blk00000003/blk00000232/blk00000251_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000250 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a4a ), + .Q(\blk00000003/blk00000232/sig000010d5 ), + .Q15(\NLW_blk00000003/blk00000232/blk00000250_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk0000024f ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a4b ), + .Q(\blk00000003/blk00000232/sig000010d4 ), + .Q15(\NLW_blk00000003/blk00000232/blk0000024f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk0000024e ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a4c ), + .Q(\blk00000003/blk00000232/sig000010d3 ), + .Q15(\NLW_blk00000003/blk00000232/blk0000024e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk0000024d ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a4d ), + .Q(\blk00000003/blk00000232/sig000010d2 ), + .Q15(\NLW_blk00000003/blk00000232/blk0000024d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk0000024c ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a4e ), + .Q(\blk00000003/blk00000232/sig000010d1 ), + .Q15(\NLW_blk00000003/blk00000232/blk0000024c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk0000024b ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a4f ), + .Q(\blk00000003/blk00000232/sig000010d0 ), + .Q15(\NLW_blk00000003/blk00000232/blk0000024b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk0000024a ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a50 ), + .Q(\blk00000003/blk00000232/sig000010cf ), + .Q15(\NLW_blk00000003/blk00000232/blk0000024a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000249 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a51 ), + .Q(\blk00000003/blk00000232/sig000010ce ), + .Q15(\NLW_blk00000003/blk00000232/blk00000249_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000248 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a52 ), + .Q(\blk00000003/blk00000232/sig000010cd ), + .Q15(\NLW_blk00000003/blk00000232/blk00000248_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000247 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a53 ), + .Q(\blk00000003/blk00000232/sig000010cc ), + .Q15(\NLW_blk00000003/blk00000232/blk00000247_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000246 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a54 ), + .Q(\blk00000003/blk00000232/sig000010cb ), + .Q15(\NLW_blk00000003/blk00000232/blk00000246_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000245 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a55 ), + .Q(\blk00000003/blk00000232/sig000010ca ), + .Q15(\NLW_blk00000003/blk00000232/blk00000245_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000232/blk00000244 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000232/sig000010c8 ), + .A2(\blk00000003/blk00000232/sig000010c8 ), + .A3(\blk00000003/blk00000232/sig000010c8 ), + .CE(\blk00000003/blk00000232/sig000010d9 ), + .CLK(clk), + .D(\blk00000003/sig00000a56 ), + .Q(\blk00000003/blk00000232/sig000010c9 ), + .Q15(\NLW_blk00000003/blk00000232/blk00000244_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000243 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010d8 ), + .Q(\blk00000003/sig000009c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000242 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010d7 ), + .Q(\blk00000003/sig000009c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000241 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010d6 ), + .Q(\blk00000003/sig000009ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000240 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010d5 ), + .Q(\blk00000003/sig000009cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk0000023f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010d4 ), + .Q(\blk00000003/sig000009cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk0000023e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010d3 ), + .Q(\blk00000003/sig000009cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk0000023d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010d2 ), + .Q(\blk00000003/sig000009ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk0000023c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010d1 ), + .Q(\blk00000003/sig000009cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk0000023b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010d0 ), + .Q(\blk00000003/sig000009d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk0000023a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010cf ), + .Q(\blk00000003/sig000009d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000239 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010ce ), + .Q(\blk00000003/sig000009d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000238 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010cd ), + .Q(\blk00000003/sig000009d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000237 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010cc ), + .Q(\blk00000003/sig000009d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000236 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010cb ), + .Q(\blk00000003/sig000009d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000235 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010ca ), + .Q(\blk00000003/sig000009d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000232/blk00000234 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000232/sig000010c9 ), + .Q(\blk00000003/sig000009d7 ) + ); + GND \blk00000003/blk00000232/blk00000233 ( + .G(\blk00000003/blk00000232/sig000010c8 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000255/blk00000277 ( + .I0(\blk00000003/sig00000a06 ), + .I1(ce), + .O(\blk00000003/blk00000255/sig0000110f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000276 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000828 ), + .Q(\blk00000003/blk00000255/sig0000110e ), + .Q15(\NLW_blk00000003/blk00000255/blk00000276_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000275 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000829 ), + .Q(\blk00000003/blk00000255/sig0000110d ), + .Q15(\NLW_blk00000003/blk00000255/blk00000275_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000274 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig0000082a ), + .Q(\blk00000003/blk00000255/sig0000110c ), + .Q15(\NLW_blk00000003/blk00000255/blk00000274_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000273 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig0000082b ), + .Q(\blk00000003/blk00000255/sig0000110b ), + .Q15(\NLW_blk00000003/blk00000255/blk00000273_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000272 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig0000082c ), + .Q(\blk00000003/blk00000255/sig0000110a ), + .Q15(\NLW_blk00000003/blk00000255/blk00000272_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000271 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig0000082d ), + .Q(\blk00000003/blk00000255/sig00001109 ), + .Q15(\NLW_blk00000003/blk00000255/blk00000271_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000270 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig0000082e ), + .Q(\blk00000003/blk00000255/sig00001108 ), + .Q15(\NLW_blk00000003/blk00000255/blk00000270_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk0000026f ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig0000082f ), + .Q(\blk00000003/blk00000255/sig00001107 ), + .Q15(\NLW_blk00000003/blk00000255/blk0000026f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk0000026e ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000830 ), + .Q(\blk00000003/blk00000255/sig00001106 ), + .Q15(\NLW_blk00000003/blk00000255/blk0000026e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk0000026d ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000831 ), + .Q(\blk00000003/blk00000255/sig00001105 ), + .Q15(\NLW_blk00000003/blk00000255/blk0000026d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk0000026c ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000832 ), + .Q(\blk00000003/blk00000255/sig00001104 ), + .Q15(\NLW_blk00000003/blk00000255/blk0000026c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk0000026b ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000833 ), + .Q(\blk00000003/blk00000255/sig00001103 ), + .Q15(\NLW_blk00000003/blk00000255/blk0000026b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk0000026a ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000834 ), + .Q(\blk00000003/blk00000255/sig00001102 ), + .Q15(\NLW_blk00000003/blk00000255/blk0000026a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000269 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000835 ), + .Q(\blk00000003/blk00000255/sig00001101 ), + .Q15(\NLW_blk00000003/blk00000255/blk00000269_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000268 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000836 ), + .Q(\blk00000003/blk00000255/sig00001100 ), + .Q15(\NLW_blk00000003/blk00000255/blk00000268_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000255/blk00000267 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000255/sig000010fe ), + .A2(\blk00000003/blk00000255/sig000010fe ), + .A3(\blk00000003/blk00000255/sig000010fe ), + .CE(\blk00000003/blk00000255/sig0000110f ), + .CLK(clk), + .D(\blk00000003/sig00000837 ), + .Q(\blk00000003/blk00000255/sig000010ff ), + .Q15(\NLW_blk00000003/blk00000255/blk00000267_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000266 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig0000110e ), + .Q(\blk00000003/sig00000878 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000265 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig0000110d ), + .Q(\blk00000003/sig00000879 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000264 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig0000110c ), + .Q(\blk00000003/sig0000087a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000263 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig0000110b ), + .Q(\blk00000003/sig0000087b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000262 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig0000110a ), + .Q(\blk00000003/sig0000087c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000261 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001109 ), + .Q(\blk00000003/sig0000087d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000260 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001108 ), + .Q(\blk00000003/sig0000087e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk0000025f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001107 ), + .Q(\blk00000003/sig0000087f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk0000025e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001106 ), + .Q(\blk00000003/sig00000880 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk0000025d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001105 ), + .Q(\blk00000003/sig00000881 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk0000025c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001104 ), + .Q(\blk00000003/sig00000882 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk0000025b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001103 ), + .Q(\blk00000003/sig00000883 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk0000025a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001102 ), + .Q(\blk00000003/sig00000884 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000259 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001101 ), + .Q(\blk00000003/sig00000885 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000258 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig00001100 ), + .Q(\blk00000003/sig00000886 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000255/blk00000257 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000255/sig000010ff ), + .Q(\blk00000003/sig00000887 ) + ); + GND \blk00000003/blk00000255/blk00000256 ( + .G(\blk00000003/blk00000255/sig000010fe ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000278/blk0000029a ( + .I0(\blk00000003/sig00000a03 ), + .I1(ce), + .O(\blk00000003/blk00000278/sig00001145 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000299 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a57 ), + .Q(\blk00000003/blk00000278/sig00001144 ), + .Q15(\NLW_blk00000003/blk00000278/blk00000299_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000298 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a58 ), + .Q(\blk00000003/blk00000278/sig00001143 ), + .Q15(\NLW_blk00000003/blk00000278/blk00000298_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000297 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a59 ), + .Q(\blk00000003/blk00000278/sig00001142 ), + .Q15(\NLW_blk00000003/blk00000278/blk00000297_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000296 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a5a ), + .Q(\blk00000003/blk00000278/sig00001141 ), + .Q15(\NLW_blk00000003/blk00000278/blk00000296_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000295 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a5b ), + .Q(\blk00000003/blk00000278/sig00001140 ), + .Q15(\NLW_blk00000003/blk00000278/blk00000295_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000294 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a5c ), + .Q(\blk00000003/blk00000278/sig0000113f ), + .Q15(\NLW_blk00000003/blk00000278/blk00000294_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000293 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a5d ), + .Q(\blk00000003/blk00000278/sig0000113e ), + .Q15(\NLW_blk00000003/blk00000278/blk00000293_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000292 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a5e ), + .Q(\blk00000003/blk00000278/sig0000113d ), + .Q15(\NLW_blk00000003/blk00000278/blk00000292_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000291 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a5f ), + .Q(\blk00000003/blk00000278/sig0000113c ), + .Q15(\NLW_blk00000003/blk00000278/blk00000291_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk00000290 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a60 ), + .Q(\blk00000003/blk00000278/sig0000113b ), + .Q15(\NLW_blk00000003/blk00000278/blk00000290_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk0000028f ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a61 ), + .Q(\blk00000003/blk00000278/sig0000113a ), + .Q15(\NLW_blk00000003/blk00000278/blk0000028f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk0000028e ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a62 ), + .Q(\blk00000003/blk00000278/sig00001139 ), + .Q15(\NLW_blk00000003/blk00000278/blk0000028e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk0000028d ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a63 ), + .Q(\blk00000003/blk00000278/sig00001138 ), + .Q15(\NLW_blk00000003/blk00000278/blk0000028d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk0000028c ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a64 ), + .Q(\blk00000003/blk00000278/sig00001137 ), + .Q15(\NLW_blk00000003/blk00000278/blk0000028c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk0000028b ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a65 ), + .Q(\blk00000003/blk00000278/sig00001136 ), + .Q15(\NLW_blk00000003/blk00000278/blk0000028b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000278/blk0000028a ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000278/sig00001134 ), + .A2(\blk00000003/blk00000278/sig00001134 ), + .A3(\blk00000003/blk00000278/sig00001134 ), + .CE(\blk00000003/blk00000278/sig00001145 ), + .CLK(clk), + .D(\blk00000003/sig00000a66 ), + .Q(\blk00000003/blk00000278/sig00001135 ), + .Q15(\NLW_blk00000003/blk00000278/blk0000028a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000289 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001144 ), + .Q(\blk00000003/sig00000868 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000288 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001143 ), + .Q(\blk00000003/sig00000869 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000287 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001142 ), + .Q(\blk00000003/sig0000086a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000286 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001141 ), + .Q(\blk00000003/sig0000086b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000285 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001140 ), + .Q(\blk00000003/sig0000086c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000284 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig0000113f ), + .Q(\blk00000003/sig0000086d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000283 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig0000113e ), + .Q(\blk00000003/sig0000086e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000282 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig0000113d ), + .Q(\blk00000003/sig0000086f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000281 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig0000113c ), + .Q(\blk00000003/sig00000870 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk00000280 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig0000113b ), + .Q(\blk00000003/sig00000871 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk0000027f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig0000113a ), + .Q(\blk00000003/sig00000872 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk0000027e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001139 ), + .Q(\blk00000003/sig00000873 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk0000027d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001138 ), + .Q(\blk00000003/sig00000874 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk0000027c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001137 ), + .Q(\blk00000003/sig00000875 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk0000027b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001136 ), + .Q(\blk00000003/sig00000876 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000278/blk0000027a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000278/sig00001135 ), + .Q(\blk00000003/sig00000877 ) + ); + GND \blk00000003/blk00000278/blk00000279 ( + .G(\blk00000003/blk00000278/sig00001134 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000029b/blk000002bd ( + .I0(\blk00000003/sig00000a06 ), + .I1(ce), + .O(\blk00000003/blk0000029b/sig0000117b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002bc ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000938 ), + .Q(\blk00000003/blk0000029b/sig0000117a ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002bc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002bb ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000939 ), + .Q(\blk00000003/blk0000029b/sig00001179 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002bb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002ba ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig0000093a ), + .Q(\blk00000003/blk0000029b/sig00001178 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002ba_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b9 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig0000093b ), + .Q(\blk00000003/blk0000029b/sig00001177 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b8 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig0000093c ), + .Q(\blk00000003/blk0000029b/sig00001176 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b7 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig0000093d ), + .Q(\blk00000003/blk0000029b/sig00001175 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b6 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig0000093e ), + .Q(\blk00000003/blk0000029b/sig00001174 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b5 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig0000093f ), + .Q(\blk00000003/blk0000029b/sig00001173 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b4 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000940 ), + .Q(\blk00000003/blk0000029b/sig00001172 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b3 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000941 ), + .Q(\blk00000003/blk0000029b/sig00001171 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b2 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000942 ), + .Q(\blk00000003/blk0000029b/sig00001170 ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b1 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000943 ), + .Q(\blk00000003/blk0000029b/sig0000116f ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002b0 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000944 ), + .Q(\blk00000003/blk0000029b/sig0000116e ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002b0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002af ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000945 ), + .Q(\blk00000003/blk0000029b/sig0000116d ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002ae ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000946 ), + .Q(\blk00000003/blk0000029b/sig0000116c ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000029b/blk000002ad ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk0000029b/sig0000116a ), + .A2(\blk00000003/blk0000029b/sig0000116a ), + .A3(\blk00000003/blk0000029b/sig0000116a ), + .CE(\blk00000003/blk0000029b/sig0000117b ), + .CLK(clk), + .D(\blk00000003/sig00000947 ), + .Q(\blk00000003/blk0000029b/sig0000116b ), + .Q15(\NLW_blk00000003/blk0000029b/blk000002ad_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig0000117a ), + .Q(\blk00000003/sig00000988 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001179 ), + .Q(\blk00000003/sig00000989 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001178 ), + .Q(\blk00000003/sig0000098a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001177 ), + .Q(\blk00000003/sig0000098b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001176 ), + .Q(\blk00000003/sig0000098c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001175 ), + .Q(\blk00000003/sig0000098d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001174 ), + .Q(\blk00000003/sig0000098e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001173 ), + .Q(\blk00000003/sig0000098f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001172 ), + .Q(\blk00000003/sig00000990 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001171 ), + .Q(\blk00000003/sig00000991 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig00001170 ), + .Q(\blk00000003/sig00000992 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig0000116f ), + .Q(\blk00000003/sig00000993 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk000002a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig0000116e ), + .Q(\blk00000003/sig00000994 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk0000029f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig0000116d ), + .Q(\blk00000003/sig00000995 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk0000029e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig0000116c ), + .Q(\blk00000003/sig00000996 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000029b/blk0000029d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000029b/sig0000116b ), + .Q(\blk00000003/sig00000997 ) + ); + GND \blk00000003/blk0000029b/blk0000029c ( + .G(\blk00000003/blk0000029b/sig0000116a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002be/blk000002e0 ( + .I0(\blk00000003/sig00000a03 ), + .I1(ce), + .O(\blk00000003/blk000002be/sig000011b1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002df ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a67 ), + .Q(\blk00000003/blk000002be/sig000011b0 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002de ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a68 ), + .Q(\blk00000003/blk000002be/sig000011af ), + .Q15(\NLW_blk00000003/blk000002be/blk000002de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002dd ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a69 ), + .Q(\blk00000003/blk000002be/sig000011ae ), + .Q15(\NLW_blk00000003/blk000002be/blk000002dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002dc ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a6a ), + .Q(\blk00000003/blk000002be/sig000011ad ), + .Q15(\NLW_blk00000003/blk000002be/blk000002dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002db ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a6b ), + .Q(\blk00000003/blk000002be/sig000011ac ), + .Q15(\NLW_blk00000003/blk000002be/blk000002db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002da ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a6c ), + .Q(\blk00000003/blk000002be/sig000011ab ), + .Q15(\NLW_blk00000003/blk000002be/blk000002da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d9 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a6d ), + .Q(\blk00000003/blk000002be/sig000011aa ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d8 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a6e ), + .Q(\blk00000003/blk000002be/sig000011a9 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d7 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a6f ), + .Q(\blk00000003/blk000002be/sig000011a8 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d6 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a70 ), + .Q(\blk00000003/blk000002be/sig000011a7 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d5 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a71 ), + .Q(\blk00000003/blk000002be/sig000011a6 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d4 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a72 ), + .Q(\blk00000003/blk000002be/sig000011a5 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d3 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a73 ), + .Q(\blk00000003/blk000002be/sig000011a4 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d2 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a74 ), + .Q(\blk00000003/blk000002be/sig000011a3 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d1 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a75 ), + .Q(\blk00000003/blk000002be/sig000011a2 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002be/blk000002d0 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk000002be/sig000011a0 ), + .A2(\blk00000003/blk000002be/sig000011a0 ), + .A3(\blk00000003/blk000002be/sig000011a0 ), + .CE(\blk00000003/blk000002be/sig000011b1 ), + .CLK(clk), + .D(\blk00000003/sig00000a76 ), + .Q(\blk00000003/blk000002be/sig000011a1 ), + .Q15(\NLW_blk00000003/blk000002be/blk000002d0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011b0 ), + .Q(\blk00000003/sig00000978 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011af ), + .Q(\blk00000003/sig00000979 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011ae ), + .Q(\blk00000003/sig0000097a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011ad ), + .Q(\blk00000003/sig0000097b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011ac ), + .Q(\blk00000003/sig0000097c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011ab ), + .Q(\blk00000003/sig0000097d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011aa ), + .Q(\blk00000003/sig0000097e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011a9 ), + .Q(\blk00000003/sig0000097f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011a8 ), + .Q(\blk00000003/sig00000980 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011a7 ), + .Q(\blk00000003/sig00000981 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011a6 ), + .Q(\blk00000003/sig00000982 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011a5 ), + .Q(\blk00000003/sig00000983 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011a4 ), + .Q(\blk00000003/sig00000984 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011a3 ), + .Q(\blk00000003/sig00000985 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011a2 ), + .Q(\blk00000003/sig00000986 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002be/blk000002c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002be/sig000011a1 ), + .Q(\blk00000003/sig00000987 ) + ); + GND \blk00000003/blk000002be/blk000002bf ( + .G(\blk00000003/blk000002be/sig000011a0 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002e1/blk00000303 ( + .I0(\blk00000003/sig00000a09 ), + .I1(ce), + .O(\blk00000003/blk000002e1/sig000011e7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk00000302 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007d8 ), + .Q(\blk00000003/blk000002e1/sig000011e6 ), + .Q15(\NLW_blk00000003/blk000002e1/blk00000302_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk00000301 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007d9 ), + .Q(\blk00000003/blk000002e1/sig000011e5 ), + .Q15(\NLW_blk00000003/blk000002e1/blk00000301_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk00000300 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007da ), + .Q(\blk00000003/blk000002e1/sig000011e4 ), + .Q15(\NLW_blk00000003/blk000002e1/blk00000300_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002ff ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007db ), + .Q(\blk00000003/blk000002e1/sig000011e3 ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002ff_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002fe ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007dc ), + .Q(\blk00000003/blk000002e1/sig000011e2 ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002fe_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002fd ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007dd ), + .Q(\blk00000003/blk000002e1/sig000011e1 ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002fd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002fc ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007de ), + .Q(\blk00000003/blk000002e1/sig000011e0 ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002fc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002fb ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007df ), + .Q(\blk00000003/blk000002e1/sig000011df ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002fb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002fa ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007e0 ), + .Q(\blk00000003/blk000002e1/sig000011de ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002fa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002f9 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007e1 ), + .Q(\blk00000003/blk000002e1/sig000011dd ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002f9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002f8 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007e2 ), + .Q(\blk00000003/blk000002e1/sig000011dc ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002f8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002f7 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007e3 ), + .Q(\blk00000003/blk000002e1/sig000011db ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002f7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002f6 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007e4 ), + .Q(\blk00000003/blk000002e1/sig000011da ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002f6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002f5 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007e5 ), + .Q(\blk00000003/blk000002e1/sig000011d9 ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002f5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002f4 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007e6 ), + .Q(\blk00000003/blk000002e1/sig000011d8 ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002f4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002e1/blk000002f3 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000002e1/sig000011d6 ), + .A2(\blk00000003/blk000002e1/sig000011d6 ), + .A3(\blk00000003/blk000002e1/sig000011d6 ), + .CE(\blk00000003/blk000002e1/sig000011e7 ), + .CLK(clk), + .D(\blk00000003/sig000007e7 ), + .Q(\blk00000003/blk000002e1/sig000011d7 ), + .Q15(\NLW_blk00000003/blk000002e1/blk000002f3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011e6 ), + .Q(\blk00000003/sig00000828 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011e5 ), + .Q(\blk00000003/sig00000829 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011e4 ), + .Q(\blk00000003/sig0000082a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011e3 ), + .Q(\blk00000003/sig0000082b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011e2 ), + .Q(\blk00000003/sig0000082c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011e1 ), + .Q(\blk00000003/sig0000082d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011e0 ), + .Q(\blk00000003/sig0000082e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011df ), + .Q(\blk00000003/sig0000082f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011de ), + .Q(\blk00000003/sig00000830 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011dd ), + .Q(\blk00000003/sig00000831 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011dc ), + .Q(\blk00000003/sig00000832 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011db ), + .Q(\blk00000003/sig00000833 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011da ), + .Q(\blk00000003/sig00000834 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011d9 ), + .Q(\blk00000003/sig00000835 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011d8 ), + .Q(\blk00000003/sig00000836 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002e1/blk000002e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002e1/sig000011d7 ), + .Q(\blk00000003/sig00000837 ) + ); + GND \blk00000003/blk000002e1/blk000002e2 ( + .G(\blk00000003/blk000002e1/sig000011d6 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000304/blk00000326 ( + .I0(\blk00000003/sig00000a0a ), + .I1(ce), + .O(\blk00000003/blk00000304/sig0000121d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000325 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a77 ), + .Q(\blk00000003/blk00000304/sig0000121c ), + .Q15(\NLW_blk00000003/blk00000304/blk00000325_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000324 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a78 ), + .Q(\blk00000003/blk00000304/sig0000121b ), + .Q15(\NLW_blk00000003/blk00000304/blk00000324_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000323 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a79 ), + .Q(\blk00000003/blk00000304/sig0000121a ), + .Q15(\NLW_blk00000003/blk00000304/blk00000323_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000322 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a7a ), + .Q(\blk00000003/blk00000304/sig00001219 ), + .Q15(\NLW_blk00000003/blk00000304/blk00000322_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000321 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a7b ), + .Q(\blk00000003/blk00000304/sig00001218 ), + .Q15(\NLW_blk00000003/blk00000304/blk00000321_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000320 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a7c ), + .Q(\blk00000003/blk00000304/sig00001217 ), + .Q15(\NLW_blk00000003/blk00000304/blk00000320_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk0000031f ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a7d ), + .Q(\blk00000003/blk00000304/sig00001216 ), + .Q15(\NLW_blk00000003/blk00000304/blk0000031f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk0000031e ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a7e ), + .Q(\blk00000003/blk00000304/sig00001215 ), + .Q15(\NLW_blk00000003/blk00000304/blk0000031e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk0000031d ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a7f ), + .Q(\blk00000003/blk00000304/sig00001214 ), + .Q15(\NLW_blk00000003/blk00000304/blk0000031d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk0000031c ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a80 ), + .Q(\blk00000003/blk00000304/sig00001213 ), + .Q15(\NLW_blk00000003/blk00000304/blk0000031c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk0000031b ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a81 ), + .Q(\blk00000003/blk00000304/sig00001212 ), + .Q15(\NLW_blk00000003/blk00000304/blk0000031b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk0000031a ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a82 ), + .Q(\blk00000003/blk00000304/sig00001211 ), + .Q15(\NLW_blk00000003/blk00000304/blk0000031a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000319 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a83 ), + .Q(\blk00000003/blk00000304/sig00001210 ), + .Q15(\NLW_blk00000003/blk00000304/blk00000319_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000318 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a84 ), + .Q(\blk00000003/blk00000304/sig0000120f ), + .Q15(\NLW_blk00000003/blk00000304/blk00000318_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000317 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a85 ), + .Q(\blk00000003/blk00000304/sig0000120e ), + .Q15(\NLW_blk00000003/blk00000304/blk00000317_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000304/blk00000316 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk00000304/sig0000120c ), + .A2(\blk00000003/blk00000304/sig0000120c ), + .A3(\blk00000003/blk00000304/sig0000120c ), + .CE(\blk00000003/blk00000304/sig0000121d ), + .CLK(clk), + .D(\blk00000003/sig00000a86 ), + .Q(\blk00000003/blk00000304/sig0000120d ), + .Q15(\NLW_blk00000003/blk00000304/blk00000316_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000315 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig0000121c ), + .Q(\blk00000003/sig00000818 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000314 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig0000121b ), + .Q(\blk00000003/sig00000819 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000313 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig0000121a ), + .Q(\blk00000003/sig0000081a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000312 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001219 ), + .Q(\blk00000003/sig0000081b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000311 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001218 ), + .Q(\blk00000003/sig0000081c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000310 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001217 ), + .Q(\blk00000003/sig0000081d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk0000030f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001216 ), + .Q(\blk00000003/sig0000081e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk0000030e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001215 ), + .Q(\blk00000003/sig0000081f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk0000030d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001214 ), + .Q(\blk00000003/sig00000820 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk0000030c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001213 ), + .Q(\blk00000003/sig00000821 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk0000030b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001212 ), + .Q(\blk00000003/sig00000822 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk0000030a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001211 ), + .Q(\blk00000003/sig00000823 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000309 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig00001210 ), + .Q(\blk00000003/sig00000824 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000308 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig0000120f ), + .Q(\blk00000003/sig00000825 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000307 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig0000120e ), + .Q(\blk00000003/sig00000826 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000304/blk00000306 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000304/sig0000120d ), + .Q(\blk00000003/sig00000827 ) + ); + GND \blk00000003/blk00000304/blk00000305 ( + .G(\blk00000003/blk00000304/sig0000120c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000327/blk00000349 ( + .I0(\blk00000003/sig00000a09 ), + .I1(ce), + .O(\blk00000003/blk00000327/sig00001253 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000348 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008e8 ), + .Q(\blk00000003/blk00000327/sig00001252 ), + .Q15(\NLW_blk00000003/blk00000327/blk00000348_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000347 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008e9 ), + .Q(\blk00000003/blk00000327/sig00001251 ), + .Q15(\NLW_blk00000003/blk00000327/blk00000347_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000346 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008ea ), + .Q(\blk00000003/blk00000327/sig00001250 ), + .Q15(\NLW_blk00000003/blk00000327/blk00000346_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000345 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008eb ), + .Q(\blk00000003/blk00000327/sig0000124f ), + .Q15(\NLW_blk00000003/blk00000327/blk00000345_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000344 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008ec ), + .Q(\blk00000003/blk00000327/sig0000124e ), + .Q15(\NLW_blk00000003/blk00000327/blk00000344_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000343 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008ed ), + .Q(\blk00000003/blk00000327/sig0000124d ), + .Q15(\NLW_blk00000003/blk00000327/blk00000343_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000342 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008ee ), + .Q(\blk00000003/blk00000327/sig0000124c ), + .Q15(\NLW_blk00000003/blk00000327/blk00000342_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000341 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008ef ), + .Q(\blk00000003/blk00000327/sig0000124b ), + .Q15(\NLW_blk00000003/blk00000327/blk00000341_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000340 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008f0 ), + .Q(\blk00000003/blk00000327/sig0000124a ), + .Q15(\NLW_blk00000003/blk00000327/blk00000340_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk0000033f ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008f1 ), + .Q(\blk00000003/blk00000327/sig00001249 ), + .Q15(\NLW_blk00000003/blk00000327/blk0000033f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk0000033e ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008f2 ), + .Q(\blk00000003/blk00000327/sig00001248 ), + .Q15(\NLW_blk00000003/blk00000327/blk0000033e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk0000033d ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008f3 ), + .Q(\blk00000003/blk00000327/sig00001247 ), + .Q15(\NLW_blk00000003/blk00000327/blk0000033d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk0000033c ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008f4 ), + .Q(\blk00000003/blk00000327/sig00001246 ), + .Q15(\NLW_blk00000003/blk00000327/blk0000033c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk0000033b ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008f5 ), + .Q(\blk00000003/blk00000327/sig00001245 ), + .Q15(\NLW_blk00000003/blk00000327/blk0000033b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk0000033a ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008f6 ), + .Q(\blk00000003/blk00000327/sig00001244 ), + .Q15(\NLW_blk00000003/blk00000327/blk0000033a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000327/blk00000339 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk00000327/sig00001242 ), + .A2(\blk00000003/blk00000327/sig00001242 ), + .A3(\blk00000003/blk00000327/sig00001242 ), + .CE(\blk00000003/blk00000327/sig00001253 ), + .CLK(clk), + .D(\blk00000003/sig000008f7 ), + .Q(\blk00000003/blk00000327/sig00001243 ), + .Q15(\NLW_blk00000003/blk00000327/blk00000339_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000338 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001252 ), + .Q(\blk00000003/sig00000938 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000337 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001251 ), + .Q(\blk00000003/sig00000939 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000336 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001250 ), + .Q(\blk00000003/sig0000093a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000335 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig0000124f ), + .Q(\blk00000003/sig0000093b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000334 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig0000124e ), + .Q(\blk00000003/sig0000093c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000333 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig0000124d ), + .Q(\blk00000003/sig0000093d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000332 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig0000124c ), + .Q(\blk00000003/sig0000093e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000331 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig0000124b ), + .Q(\blk00000003/sig0000093f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000330 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig0000124a ), + .Q(\blk00000003/sig00000940 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk0000032f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001249 ), + .Q(\blk00000003/sig00000941 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk0000032e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001248 ), + .Q(\blk00000003/sig00000942 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk0000032d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001247 ), + .Q(\blk00000003/sig00000943 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk0000032c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001246 ), + .Q(\blk00000003/sig00000944 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk0000032b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001245 ), + .Q(\blk00000003/sig00000945 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk0000032a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001244 ), + .Q(\blk00000003/sig00000946 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000327/blk00000329 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000327/sig00001243 ), + .Q(\blk00000003/sig00000947 ) + ); + GND \blk00000003/blk00000327/blk00000328 ( + .G(\blk00000003/blk00000327/sig00001242 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000034a/blk0000036c ( + .I0(\blk00000003/sig00000a0a ), + .I1(ce), + .O(\blk00000003/blk0000034a/sig00001289 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk0000036b ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a87 ), + .Q(\blk00000003/blk0000034a/sig00001288 ), + .Q15(\NLW_blk00000003/blk0000034a/blk0000036b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk0000036a ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a88 ), + .Q(\blk00000003/blk0000034a/sig00001287 ), + .Q15(\NLW_blk00000003/blk0000034a/blk0000036a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000369 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a89 ), + .Q(\blk00000003/blk0000034a/sig00001286 ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000369_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000368 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a8a ), + .Q(\blk00000003/blk0000034a/sig00001285 ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000368_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000367 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a8b ), + .Q(\blk00000003/blk0000034a/sig00001284 ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000367_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000366 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a8c ), + .Q(\blk00000003/blk0000034a/sig00001283 ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000366_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000365 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a8d ), + .Q(\blk00000003/blk0000034a/sig00001282 ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000365_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000364 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a8e ), + .Q(\blk00000003/blk0000034a/sig00001281 ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000364_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000363 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a8f ), + .Q(\blk00000003/blk0000034a/sig00001280 ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000363_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000362 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a90 ), + .Q(\blk00000003/blk0000034a/sig0000127f ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000362_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000361 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a91 ), + .Q(\blk00000003/blk0000034a/sig0000127e ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000361_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk00000360 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a92 ), + .Q(\blk00000003/blk0000034a/sig0000127d ), + .Q15(\NLW_blk00000003/blk0000034a/blk00000360_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk0000035f ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a93 ), + .Q(\blk00000003/blk0000034a/sig0000127c ), + .Q15(\NLW_blk00000003/blk0000034a/blk0000035f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk0000035e ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a94 ), + .Q(\blk00000003/blk0000034a/sig0000127b ), + .Q15(\NLW_blk00000003/blk0000034a/blk0000035e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk0000035d ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a95 ), + .Q(\blk00000003/blk0000034a/sig0000127a ), + .Q15(\NLW_blk00000003/blk0000034a/blk0000035d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000034a/blk0000035c ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk0000034a/sig00001278 ), + .A2(\blk00000003/blk0000034a/sig00001278 ), + .A3(\blk00000003/blk0000034a/sig00001278 ), + .CE(\blk00000003/blk0000034a/sig00001289 ), + .CLK(clk), + .D(\blk00000003/sig00000a96 ), + .Q(\blk00000003/blk0000034a/sig00001279 ), + .Q15(\NLW_blk00000003/blk0000034a/blk0000035c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk0000035b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001288 ), + .Q(\blk00000003/sig00000928 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk0000035a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001287 ), + .Q(\blk00000003/sig00000929 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000359 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001286 ), + .Q(\blk00000003/sig0000092a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000358 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001285 ), + .Q(\blk00000003/sig0000092b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000357 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001284 ), + .Q(\blk00000003/sig0000092c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000356 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001283 ), + .Q(\blk00000003/sig0000092d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000355 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001282 ), + .Q(\blk00000003/sig0000092e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000354 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001281 ), + .Q(\blk00000003/sig0000092f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000353 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001280 ), + .Q(\blk00000003/sig00000930 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000352 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig0000127f ), + .Q(\blk00000003/sig00000931 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000351 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig0000127e ), + .Q(\blk00000003/sig00000932 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk00000350 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig0000127d ), + .Q(\blk00000003/sig00000933 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk0000034f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig0000127c ), + .Q(\blk00000003/sig00000934 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk0000034e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig0000127b ), + .Q(\blk00000003/sig00000935 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk0000034d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig0000127a ), + .Q(\blk00000003/sig00000936 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a/blk0000034c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000034a/sig00001279 ), + .Q(\blk00000003/sig00000937 ) + ); + GND \blk00000003/blk0000034a/blk0000034b ( + .G(\blk00000003/blk0000034a/sig00001278 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000036d/blk0000038f ( + .I0(\blk00000003/sig00000a10 ), + .I1(ce), + .O(\blk00000003/blk0000036d/sig000012bf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk0000038e ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig0000041e ), + .Q(\blk00000003/blk0000036d/sig000012be ), + .Q15(\NLW_blk00000003/blk0000036d/blk0000038e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk0000038d ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig0000041f ), + .Q(\blk00000003/blk0000036d/sig000012bd ), + .Q15(\NLW_blk00000003/blk0000036d/blk0000038d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk0000038c ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000420 ), + .Q(\blk00000003/blk0000036d/sig000012bc ), + .Q15(\NLW_blk00000003/blk0000036d/blk0000038c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk0000038b ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000421 ), + .Q(\blk00000003/blk0000036d/sig000012bb ), + .Q15(\NLW_blk00000003/blk0000036d/blk0000038b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk0000038a ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000422 ), + .Q(\blk00000003/blk0000036d/sig000012ba ), + .Q15(\NLW_blk00000003/blk0000036d/blk0000038a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000389 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000423 ), + .Q(\blk00000003/blk0000036d/sig000012b9 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000389_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000388 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000424 ), + .Q(\blk00000003/blk0000036d/sig000012b8 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000388_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000387 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000425 ), + .Q(\blk00000003/blk0000036d/sig000012b7 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000387_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000386 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000426 ), + .Q(\blk00000003/blk0000036d/sig000012b6 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000386_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000385 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000427 ), + .Q(\blk00000003/blk0000036d/sig000012b5 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000385_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000384 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000428 ), + .Q(\blk00000003/blk0000036d/sig000012b4 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000384_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000383 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig00000429 ), + .Q(\blk00000003/blk0000036d/sig000012b3 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000383_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000382 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig0000042a ), + .Q(\blk00000003/blk0000036d/sig000012b2 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000382_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000381 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig0000042b ), + .Q(\blk00000003/blk0000036d/sig000012b1 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000381_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk00000380 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig0000042c ), + .Q(\blk00000003/blk0000036d/sig000012b0 ), + .Q15(\NLW_blk00000003/blk0000036d/blk00000380_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000036d/blk0000037f ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000036d/sig000012ae ), + .A2(\blk00000003/blk0000036d/sig000012ae ), + .A3(\blk00000003/blk0000036d/sig000012ae ), + .CE(\blk00000003/blk0000036d/sig000012bf ), + .CLK(clk), + .D(\blk00000003/sig0000042d ), + .Q(\blk00000003/blk0000036d/sig000012af ), + .Q15(\NLW_blk00000003/blk0000036d/blk0000037f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk0000037e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012be ), + .Q(\blk00000003/sig000007d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk0000037d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012bd ), + .Q(\blk00000003/sig000007d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk0000037c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012bc ), + .Q(\blk00000003/sig000007da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk0000037b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012bb ), + .Q(\blk00000003/sig000007db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk0000037a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012ba ), + .Q(\blk00000003/sig000007dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000379 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b9 ), + .Q(\blk00000003/sig000007dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000378 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b8 ), + .Q(\blk00000003/sig000007de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000377 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b7 ), + .Q(\blk00000003/sig000007df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000376 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b6 ), + .Q(\blk00000003/sig000007e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000375 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b5 ), + .Q(\blk00000003/sig000007e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000374 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b4 ), + .Q(\blk00000003/sig000007e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000373 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b3 ), + .Q(\blk00000003/sig000007e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000372 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b2 ), + .Q(\blk00000003/sig000007e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000371 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b1 ), + .Q(\blk00000003/sig000007e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk00000370 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012b0 ), + .Q(\blk00000003/sig000007e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d/blk0000036f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000036d/sig000012af ), + .Q(\blk00000003/sig000007e7 ) + ); + GND \blk00000003/blk0000036d/blk0000036e ( + .G(\blk00000003/blk0000036d/sig000012ae ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000390/blk000003b2 ( + .I0(\blk00000003/sig00000a0f ), + .I1(ce), + .O(\blk00000003/blk00000390/sig000012f5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003b1 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000a97 ), + .Q(\blk00000003/blk00000390/sig000012f4 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003b1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003b0 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000a98 ), + .Q(\blk00000003/blk00000390/sig000012f3 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003b0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003af ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000a99 ), + .Q(\blk00000003/blk00000390/sig000012f2 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003ae ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000a9a ), + .Q(\blk00000003/blk00000390/sig000012f1 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003ad ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000a9b ), + .Q(\blk00000003/blk00000390/sig000012f0 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003ac ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000a9c ), + .Q(\blk00000003/blk00000390/sig000012ef ), + .Q15(\NLW_blk00000003/blk00000390/blk000003ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003ab ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000a9d ), + .Q(\blk00000003/blk00000390/sig000012ee ), + .Q15(\NLW_blk00000003/blk00000390/blk000003ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003aa ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000a9e ), + .Q(\blk00000003/blk00000390/sig000012ed ), + .Q15(\NLW_blk00000003/blk00000390/blk000003aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003a9 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000a9f ), + .Q(\blk00000003/blk00000390/sig000012ec ), + .Q15(\NLW_blk00000003/blk00000390/blk000003a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003a8 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000aa0 ), + .Q(\blk00000003/blk00000390/sig000012eb ), + .Q15(\NLW_blk00000003/blk00000390/blk000003a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003a7 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000aa1 ), + .Q(\blk00000003/blk00000390/sig000012ea ), + .Q15(\NLW_blk00000003/blk00000390/blk000003a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003a6 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000aa2 ), + .Q(\blk00000003/blk00000390/sig000012e9 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003a5 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000aa3 ), + .Q(\blk00000003/blk00000390/sig000012e8 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003a4 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000aa4 ), + .Q(\blk00000003/blk00000390/sig000012e7 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003a3 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000aa5 ), + .Q(\blk00000003/blk00000390/sig000012e6 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000390/blk000003a2 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000390/sig000012e4 ), + .A2(\blk00000003/blk00000390/sig000012e4 ), + .A3(\blk00000003/blk00000390/sig000012e4 ), + .CE(\blk00000003/blk00000390/sig000012f5 ), + .CLK(clk), + .D(\blk00000003/sig00000aa6 ), + .Q(\blk00000003/blk00000390/sig000012e5 ), + .Q15(\NLW_blk00000003/blk00000390/blk000003a2_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk000003a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012f4 ), + .Q(\blk00000003/sig000007c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk000003a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012f3 ), + .Q(\blk00000003/sig000007c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk0000039f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012f2 ), + .Q(\blk00000003/sig000007ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk0000039e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012f1 ), + .Q(\blk00000003/sig000007cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk0000039d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012f0 ), + .Q(\blk00000003/sig000007cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk0000039c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012ef ), + .Q(\blk00000003/sig000007cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk0000039b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012ee ), + .Q(\blk00000003/sig000007ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk0000039a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012ed ), + .Q(\blk00000003/sig000007cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk00000399 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012ec ), + .Q(\blk00000003/sig000007d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk00000398 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012eb ), + .Q(\blk00000003/sig000007d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk00000397 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012ea ), + .Q(\blk00000003/sig000007d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk00000396 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012e9 ), + .Q(\blk00000003/sig000007d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk00000395 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012e8 ), + .Q(\blk00000003/sig000007d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk00000394 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012e7 ), + .Q(\blk00000003/sig000007d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk00000393 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012e6 ), + .Q(\blk00000003/sig000007d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000390/blk00000392 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000390/sig000012e5 ), + .Q(\blk00000003/sig000007d7 ) + ); + GND \blk00000003/blk00000390/blk00000391 ( + .G(\blk00000003/blk00000390/sig000012e4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003b3/blk000003d5 ( + .I0(\blk00000003/sig00000a10 ), + .I1(ce), + .O(\blk00000003/blk000003b3/sig0000132b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003d4 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000046e ), + .Q(\blk00000003/blk000003b3/sig0000132a ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003d3 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000046f ), + .Q(\blk00000003/blk000003b3/sig00001329 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003d2 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000470 ), + .Q(\blk00000003/blk000003b3/sig00001328 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003d1 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000471 ), + .Q(\blk00000003/blk000003b3/sig00001327 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003d0 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000472 ), + .Q(\blk00000003/blk000003b3/sig00001326 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003d0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003cf ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000473 ), + .Q(\blk00000003/blk000003b3/sig00001325 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003cf_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003ce ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000474 ), + .Q(\blk00000003/blk000003b3/sig00001324 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003ce_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003cd ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000475 ), + .Q(\blk00000003/blk000003b3/sig00001323 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003cd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003cc ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000476 ), + .Q(\blk00000003/blk000003b3/sig00001322 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003cc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003cb ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000477 ), + .Q(\blk00000003/blk000003b3/sig00001321 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003cb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003ca ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000478 ), + .Q(\blk00000003/blk000003b3/sig00001320 ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003ca_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003c9 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig00000479 ), + .Q(\blk00000003/blk000003b3/sig0000131f ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003c9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003c8 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000047a ), + .Q(\blk00000003/blk000003b3/sig0000131e ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003c8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003c7 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000047b ), + .Q(\blk00000003/blk000003b3/sig0000131d ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003c7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003c6 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000047c ), + .Q(\blk00000003/blk000003b3/sig0000131c ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003c6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003b3/blk000003c5 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000003b3/sig0000131a ), + .A2(\blk00000003/blk000003b3/sig0000131a ), + .A3(\blk00000003/blk000003b3/sig0000131a ), + .CE(\blk00000003/blk000003b3/sig0000132b ), + .CLK(clk), + .D(\blk00000003/sig0000047d ), + .Q(\blk00000003/blk000003b3/sig0000131b ), + .Q15(\NLW_blk00000003/blk000003b3/blk000003c5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig0000132a ), + .Q(\blk00000003/sig000008e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001329 ), + .Q(\blk00000003/sig000008e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001328 ), + .Q(\blk00000003/sig000008ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001327 ), + .Q(\blk00000003/sig000008eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001326 ), + .Q(\blk00000003/sig000008ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001325 ), + .Q(\blk00000003/sig000008ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001324 ), + .Q(\blk00000003/sig000008ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001323 ), + .Q(\blk00000003/sig000008ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001322 ), + .Q(\blk00000003/sig000008f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001321 ), + .Q(\blk00000003/sig000008f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig00001320 ), + .Q(\blk00000003/sig000008f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig0000131f ), + .Q(\blk00000003/sig000008f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig0000131e ), + .Q(\blk00000003/sig000008f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig0000131d ), + .Q(\blk00000003/sig000008f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig0000131c ), + .Q(\blk00000003/sig000008f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003b3/blk000003b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003b3/sig0000131b ), + .Q(\blk00000003/sig000008f7 ) + ); + GND \blk00000003/blk000003b3/blk000003b4 ( + .G(\blk00000003/blk000003b3/sig0000131a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003d6/blk000003f8 ( + .I0(\blk00000003/sig00000a0f ), + .I1(ce), + .O(\blk00000003/blk000003d6/sig00001361 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003f7 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000aa7 ), + .Q(\blk00000003/blk000003d6/sig00001360 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003f7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003f6 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000aa8 ), + .Q(\blk00000003/blk000003d6/sig0000135f ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003f6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003f5 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000aa9 ), + .Q(\blk00000003/blk000003d6/sig0000135e ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003f5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003f4 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000aaa ), + .Q(\blk00000003/blk000003d6/sig0000135d ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003f4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003f3 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000aab ), + .Q(\blk00000003/blk000003d6/sig0000135c ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003f3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003f2 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000aac ), + .Q(\blk00000003/blk000003d6/sig0000135b ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003f2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003f1 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000aad ), + .Q(\blk00000003/blk000003d6/sig0000135a ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003f1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003f0 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000aae ), + .Q(\blk00000003/blk000003d6/sig00001359 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003f0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003ef ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000aaf ), + .Q(\blk00000003/blk000003d6/sig00001358 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003ef_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003ee ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000ab0 ), + .Q(\blk00000003/blk000003d6/sig00001357 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003ee_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003ed ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000ab1 ), + .Q(\blk00000003/blk000003d6/sig00001356 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003ed_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003ec ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000ab2 ), + .Q(\blk00000003/blk000003d6/sig00001355 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003ec_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003eb ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000ab3 ), + .Q(\blk00000003/blk000003d6/sig00001354 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003eb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003ea ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000ab4 ), + .Q(\blk00000003/blk000003d6/sig00001353 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003ea_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003e9 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000ab5 ), + .Q(\blk00000003/blk000003d6/sig00001352 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003e9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d6/blk000003e8 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk000003d6/sig00001350 ), + .A2(\blk00000003/blk000003d6/sig00001350 ), + .A3(\blk00000003/blk000003d6/sig00001350 ), + .CE(\blk00000003/blk000003d6/sig00001361 ), + .CLK(clk), + .D(\blk00000003/sig00000ab6 ), + .Q(\blk00000003/blk000003d6/sig00001351 ), + .Q15(\NLW_blk00000003/blk000003d6/blk000003e8_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001360 ), + .Q(\blk00000003/sig000008d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig0000135f ), + .Q(\blk00000003/sig000008d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig0000135e ), + .Q(\blk00000003/sig000008da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig0000135d ), + .Q(\blk00000003/sig000008db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig0000135c ), + .Q(\blk00000003/sig000008dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig0000135b ), + .Q(\blk00000003/sig000008dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig0000135a ), + .Q(\blk00000003/sig000008de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001359 ), + .Q(\blk00000003/sig000008df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003df ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001358 ), + .Q(\blk00000003/sig000008e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003de ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001357 ), + .Q(\blk00000003/sig000008e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003dd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001356 ), + .Q(\blk00000003/sig000008e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001355 ), + .Q(\blk00000003/sig000008e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003db ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001354 ), + .Q(\blk00000003/sig000008e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003da ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001353 ), + .Q(\blk00000003/sig000008e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001352 ), + .Q(\blk00000003/sig000008e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d6/blk000003d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d6/sig00001351 ), + .Q(\blk00000003/sig000008e7 ) + ); + GND \blk00000003/blk000003d6/blk000003d7 ( + .G(\blk00000003/blk000003d6/sig00001350 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003f9/blk0000041b ( + .I0(\blk00000003/sig00000a16 ), + .I1(ce), + .O(\blk00000003/blk000003f9/sig00001397 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk0000041a ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ab7 ), + .Q(\blk00000003/blk000003f9/sig00001396 ), + .Q15(\NLW_blk00000003/blk000003f9/blk0000041a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000419 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ab8 ), + .Q(\blk00000003/blk000003f9/sig00001395 ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000419_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000418 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ab9 ), + .Q(\blk00000003/blk000003f9/sig00001394 ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000418_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000417 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000aba ), + .Q(\blk00000003/blk000003f9/sig00001393 ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000417_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000416 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000abb ), + .Q(\blk00000003/blk000003f9/sig00001392 ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000416_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000415 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000abc ), + .Q(\blk00000003/blk000003f9/sig00001391 ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000415_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000414 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000abd ), + .Q(\blk00000003/blk000003f9/sig00001390 ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000414_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000413 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000abe ), + .Q(\blk00000003/blk000003f9/sig0000138f ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000413_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000412 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000abf ), + .Q(\blk00000003/blk000003f9/sig0000138e ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000412_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000411 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ac0 ), + .Q(\blk00000003/blk000003f9/sig0000138d ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000411_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000410 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ac1 ), + .Q(\blk00000003/blk000003f9/sig0000138c ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000410_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk0000040f ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ac2 ), + .Q(\blk00000003/blk000003f9/sig0000138b ), + .Q15(\NLW_blk00000003/blk000003f9/blk0000040f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk0000040e ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ac3 ), + .Q(\blk00000003/blk000003f9/sig0000138a ), + .Q15(\NLW_blk00000003/blk000003f9/blk0000040e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk0000040d ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ac4 ), + .Q(\blk00000003/blk000003f9/sig00001389 ), + .Q15(\NLW_blk00000003/blk000003f9/blk0000040d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk0000040c ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ac5 ), + .Q(\blk00000003/blk000003f9/sig00001388 ), + .Q15(\NLW_blk00000003/blk000003f9/blk0000040c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk0000040b ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk000003f9/sig00001386 ), + .A2(\blk00000003/blk000003f9/sig00001386 ), + .A3(\blk00000003/blk000003f9/sig00001386 ), + .CE(\blk00000003/blk000003f9/sig00001397 ), + .CLK(clk), + .D(\blk00000003/sig00000ac6 ), + .Q(\blk00000003/blk000003f9/sig00001387 ), + .Q15(\NLW_blk00000003/blk000003f9/blk0000040b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk0000040a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001396 ), + .Q(\blk00000003/sig0000041e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000409 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001395 ), + .Q(\blk00000003/sig0000041f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000408 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001394 ), + .Q(\blk00000003/sig00000420 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000407 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001393 ), + .Q(\blk00000003/sig00000421 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000406 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001392 ), + .Q(\blk00000003/sig00000422 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000405 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001391 ), + .Q(\blk00000003/sig00000423 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000404 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001390 ), + .Q(\blk00000003/sig00000424 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000403 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig0000138f ), + .Q(\blk00000003/sig00000425 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000402 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig0000138e ), + .Q(\blk00000003/sig00000426 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000401 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig0000138d ), + .Q(\blk00000003/sig00000427 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000400 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig0000138c ), + .Q(\blk00000003/sig00000428 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig0000138b ), + .Q(\blk00000003/sig00000429 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig0000138a ), + .Q(\blk00000003/sig0000042a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001389 ), + .Q(\blk00000003/sig0000042b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001388 ), + .Q(\blk00000003/sig0000042c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00001387 ), + .Q(\blk00000003/sig0000042d ) + ); + GND \blk00000003/blk000003f9/blk000003fa ( + .G(\blk00000003/blk000003f9/sig00001386 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000041c/blk0000043e ( + .I0(\blk00000003/sig00000a15 ), + .I1(ce), + .O(\blk00000003/blk0000041c/sig000013cd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk0000043d ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ac7 ), + .Q(\blk00000003/blk0000041c/sig000013cc ), + .Q15(\NLW_blk00000003/blk0000041c/blk0000043d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk0000043c ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ac8 ), + .Q(\blk00000003/blk0000041c/sig000013cb ), + .Q15(\NLW_blk00000003/blk0000041c/blk0000043c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk0000043b ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ac9 ), + .Q(\blk00000003/blk0000041c/sig000013ca ), + .Q15(\NLW_blk00000003/blk0000041c/blk0000043b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk0000043a ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000aca ), + .Q(\blk00000003/blk0000041c/sig000013c9 ), + .Q15(\NLW_blk00000003/blk0000041c/blk0000043a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000439 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000acb ), + .Q(\blk00000003/blk0000041c/sig000013c8 ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000439_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000438 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000acc ), + .Q(\blk00000003/blk0000041c/sig000013c7 ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000438_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000437 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000acd ), + .Q(\blk00000003/blk0000041c/sig000013c6 ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000437_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000436 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ace ), + .Q(\blk00000003/blk0000041c/sig000013c5 ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000436_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000435 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000acf ), + .Q(\blk00000003/blk0000041c/sig000013c4 ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000435_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000434 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ad0 ), + .Q(\blk00000003/blk0000041c/sig000013c3 ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000434_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000433 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ad1 ), + .Q(\blk00000003/blk0000041c/sig000013c2 ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000433_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000432 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ad2 ), + .Q(\blk00000003/blk0000041c/sig000013c1 ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000432_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000431 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ad3 ), + .Q(\blk00000003/blk0000041c/sig000013c0 ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000431_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk00000430 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ad4 ), + .Q(\blk00000003/blk0000041c/sig000013bf ), + .Q15(\NLW_blk00000003/blk0000041c/blk00000430_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk0000042f ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ad5 ), + .Q(\blk00000003/blk0000041c/sig000013be ), + .Q15(\NLW_blk00000003/blk0000041c/blk0000042f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041c/blk0000042e ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000041c/sig000013bc ), + .A2(\blk00000003/blk0000041c/sig000013bc ), + .A3(\blk00000003/blk0000041c/sig000013bc ), + .CE(\blk00000003/blk0000041c/sig000013cd ), + .CLK(clk), + .D(\blk00000003/sig00000ad6 ), + .Q(\blk00000003/blk0000041c/sig000013bd ), + .Q15(\NLW_blk00000003/blk0000041c/blk0000042e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk0000042d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013cc ), + .Q(\blk00000003/sig0000040e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk0000042c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013cb ), + .Q(\blk00000003/sig0000040f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk0000042b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013ca ), + .Q(\blk00000003/sig00000410 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk0000042a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c9 ), + .Q(\blk00000003/sig00000411 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000429 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c8 ), + .Q(\blk00000003/sig00000412 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000428 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c7 ), + .Q(\blk00000003/sig00000413 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000427 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c6 ), + .Q(\blk00000003/sig00000414 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000426 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c5 ), + .Q(\blk00000003/sig00000415 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000425 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c4 ), + .Q(\blk00000003/sig00000416 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000424 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c3 ), + .Q(\blk00000003/sig00000417 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000423 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c2 ), + .Q(\blk00000003/sig00000418 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000422 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c1 ), + .Q(\blk00000003/sig00000419 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000421 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013c0 ), + .Q(\blk00000003/sig0000041a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk00000420 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013bf ), + .Q(\blk00000003/sig0000041b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk0000041f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013be ), + .Q(\blk00000003/sig0000041c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041c/blk0000041e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041c/sig000013bd ), + .Q(\blk00000003/sig0000041d ) + ); + GND \blk00000003/blk0000041c/blk0000041d ( + .G(\blk00000003/blk0000041c/sig000013bc ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000043f/blk00000461 ( + .I0(\blk00000003/sig00000a16 ), + .I1(ce), + .O(\blk00000003/blk0000043f/sig00001403 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000460 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ad7 ), + .Q(\blk00000003/blk0000043f/sig00001402 ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000460_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk0000045f ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ad8 ), + .Q(\blk00000003/blk0000043f/sig00001401 ), + .Q15(\NLW_blk00000003/blk0000043f/blk0000045f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk0000045e ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ad9 ), + .Q(\blk00000003/blk0000043f/sig00001400 ), + .Q15(\NLW_blk00000003/blk0000043f/blk0000045e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk0000045d ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ada ), + .Q(\blk00000003/blk0000043f/sig000013ff ), + .Q15(\NLW_blk00000003/blk0000043f/blk0000045d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk0000045c ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000adb ), + .Q(\blk00000003/blk0000043f/sig000013fe ), + .Q15(\NLW_blk00000003/blk0000043f/blk0000045c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk0000045b ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000adc ), + .Q(\blk00000003/blk0000043f/sig000013fd ), + .Q15(\NLW_blk00000003/blk0000043f/blk0000045b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk0000045a ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000add ), + .Q(\blk00000003/blk0000043f/sig000013fc ), + .Q15(\NLW_blk00000003/blk0000043f/blk0000045a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000459 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ade ), + .Q(\blk00000003/blk0000043f/sig000013fb ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000459_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000458 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000adf ), + .Q(\blk00000003/blk0000043f/sig000013fa ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000458_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000457 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ae0 ), + .Q(\blk00000003/blk0000043f/sig000013f9 ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000457_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000456 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ae1 ), + .Q(\blk00000003/blk0000043f/sig000013f8 ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000456_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000455 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ae2 ), + .Q(\blk00000003/blk0000043f/sig000013f7 ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000455_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000454 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ae3 ), + .Q(\blk00000003/blk0000043f/sig000013f6 ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000454_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000453 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ae4 ), + .Q(\blk00000003/blk0000043f/sig000013f5 ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000453_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000452 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ae5 ), + .Q(\blk00000003/blk0000043f/sig000013f4 ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000452_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000043f/blk00000451 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000043f/sig000013f2 ), + .A2(\blk00000003/blk0000043f/sig000013f2 ), + .A3(\blk00000003/blk0000043f/sig000013f2 ), + .CE(\blk00000003/blk0000043f/sig00001403 ), + .CLK(clk), + .D(\blk00000003/sig00000ae6 ), + .Q(\blk00000003/blk0000043f/sig000013f3 ), + .Q15(\NLW_blk00000003/blk0000043f/blk00000451_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000450 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig00001402 ), + .Q(\blk00000003/sig0000046e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk0000044f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig00001401 ), + .Q(\blk00000003/sig0000046f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk0000044e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig00001400 ), + .Q(\blk00000003/sig00000470 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk0000044d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013ff ), + .Q(\blk00000003/sig00000471 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk0000044c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013fe ), + .Q(\blk00000003/sig00000472 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk0000044b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013fd ), + .Q(\blk00000003/sig00000473 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk0000044a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013fc ), + .Q(\blk00000003/sig00000474 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000449 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013fb ), + .Q(\blk00000003/sig00000475 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000448 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013fa ), + .Q(\blk00000003/sig00000476 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000447 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013f9 ), + .Q(\blk00000003/sig00000477 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000446 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013f8 ), + .Q(\blk00000003/sig00000478 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000445 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013f7 ), + .Q(\blk00000003/sig00000479 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000444 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013f6 ), + .Q(\blk00000003/sig0000047a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000443 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013f5 ), + .Q(\blk00000003/sig0000047b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000442 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013f4 ), + .Q(\blk00000003/sig0000047c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000043f/blk00000441 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000043f/sig000013f3 ), + .Q(\blk00000003/sig0000047d ) + ); + GND \blk00000003/blk0000043f/blk00000440 ( + .G(\blk00000003/blk0000043f/sig000013f2 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000462/blk00000484 ( + .I0(\blk00000003/sig00000a15 ), + .I1(ce), + .O(\blk00000003/blk00000462/sig00001439 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000483 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000ae7 ), + .Q(\blk00000003/blk00000462/sig00001438 ), + .Q15(\NLW_blk00000003/blk00000462/blk00000483_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000482 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000ae8 ), + .Q(\blk00000003/blk00000462/sig00001437 ), + .Q15(\NLW_blk00000003/blk00000462/blk00000482_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000481 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000ae9 ), + .Q(\blk00000003/blk00000462/sig00001436 ), + .Q15(\NLW_blk00000003/blk00000462/blk00000481_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000480 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000aea ), + .Q(\blk00000003/blk00000462/sig00001435 ), + .Q15(\NLW_blk00000003/blk00000462/blk00000480_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk0000047f ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000aeb ), + .Q(\blk00000003/blk00000462/sig00001434 ), + .Q15(\NLW_blk00000003/blk00000462/blk0000047f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk0000047e ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000aec ), + .Q(\blk00000003/blk00000462/sig00001433 ), + .Q15(\NLW_blk00000003/blk00000462/blk0000047e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk0000047d ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000aed ), + .Q(\blk00000003/blk00000462/sig00001432 ), + .Q15(\NLW_blk00000003/blk00000462/blk0000047d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk0000047c ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000aee ), + .Q(\blk00000003/blk00000462/sig00001431 ), + .Q15(\NLW_blk00000003/blk00000462/blk0000047c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk0000047b ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000aef ), + .Q(\blk00000003/blk00000462/sig00001430 ), + .Q15(\NLW_blk00000003/blk00000462/blk0000047b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk0000047a ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000af0 ), + .Q(\blk00000003/blk00000462/sig0000142f ), + .Q15(\NLW_blk00000003/blk00000462/blk0000047a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000479 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000af1 ), + .Q(\blk00000003/blk00000462/sig0000142e ), + .Q15(\NLW_blk00000003/blk00000462/blk00000479_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000478 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000af2 ), + .Q(\blk00000003/blk00000462/sig0000142d ), + .Q15(\NLW_blk00000003/blk00000462/blk00000478_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000477 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000af3 ), + .Q(\blk00000003/blk00000462/sig0000142c ), + .Q15(\NLW_blk00000003/blk00000462/blk00000477_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000476 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000af4 ), + .Q(\blk00000003/blk00000462/sig0000142b ), + .Q15(\NLW_blk00000003/blk00000462/blk00000476_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000475 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000af5 ), + .Q(\blk00000003/blk00000462/sig0000142a ), + .Q15(\NLW_blk00000003/blk00000462/blk00000475_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000462/blk00000474 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000462/sig00001428 ), + .A2(\blk00000003/blk00000462/sig00001428 ), + .A3(\blk00000003/blk00000462/sig00001428 ), + .CE(\blk00000003/blk00000462/sig00001439 ), + .CLK(clk), + .D(\blk00000003/sig00000af6 ), + .Q(\blk00000003/blk00000462/sig00001429 ), + .Q15(\NLW_blk00000003/blk00000462/blk00000474_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000473 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001438 ), + .Q(\blk00000003/sig0000045e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000472 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001437 ), + .Q(\blk00000003/sig0000045f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000471 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001436 ), + .Q(\blk00000003/sig00000460 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000470 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001435 ), + .Q(\blk00000003/sig00000461 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk0000046f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001434 ), + .Q(\blk00000003/sig00000462 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk0000046e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001433 ), + .Q(\blk00000003/sig00000463 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk0000046d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001432 ), + .Q(\blk00000003/sig00000464 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk0000046c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001431 ), + .Q(\blk00000003/sig00000465 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk0000046b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001430 ), + .Q(\blk00000003/sig00000466 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk0000046a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig0000142f ), + .Q(\blk00000003/sig00000467 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000469 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig0000142e ), + .Q(\blk00000003/sig00000468 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000468 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig0000142d ), + .Q(\blk00000003/sig00000469 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000467 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig0000142c ), + .Q(\blk00000003/sig0000046a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000466 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig0000142b ), + .Q(\blk00000003/sig0000046b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000465 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig0000142a ), + .Q(\blk00000003/sig0000046c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000462/blk00000464 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000462/sig00001429 ), + .Q(\blk00000003/sig0000046d ) + ); + GND \blk00000003/blk00000462/blk00000463 ( + .G(\blk00000003/blk00000462/sig00001428 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000485/blk000004bd ( + .I0(\blk00000003/sig0000030c ), + .I1(ce), + .O(\blk00000003/blk00000485/sig0000149c ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004bc ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000af7 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001489 ), + .DPO(\blk00000003/blk00000485/sig0000149b ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004bb ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000af8 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001488 ), + .DPO(\blk00000003/blk00000485/sig0000149a ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004ba ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000af9 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001487 ), + .DPO(\blk00000003/blk00000485/sig00001499 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004b9 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000afa ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001486 ), + .DPO(\blk00000003/blk00000485/sig00001498 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004b8 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000afb ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001485 ), + .DPO(\blk00000003/blk00000485/sig00001497 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004b7 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000afc ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001484 ), + .DPO(\blk00000003/blk00000485/sig00001496 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004b6 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000afe ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001482 ), + .DPO(\blk00000003/blk00000485/sig00001494 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004b5 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000aff ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001481 ), + .DPO(\blk00000003/blk00000485/sig00001493 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004b4 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000afd ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001483 ), + .DPO(\blk00000003/blk00000485/sig00001495 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000485/blk000004b3 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000b00 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001480 ), + .DPO(\blk00000003/blk00000485/sig00001492 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk00000485/blk000004b2 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000b01 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig0000147f ), + .DPO(\blk00000003/blk00000485/sig00001491 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk00000485/blk000004b1 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000b02 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig0000147e ), + .DPO(\blk00000003/blk00000485/sig00001490 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000485/blk000004b0 ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000b03 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig0000147d ), + .DPO(\blk00000003/blk00000485/sig0000148f ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000485/blk000004af ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000b04 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig0000147c ), + .DPO(\blk00000003/blk00000485/sig0000148e ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000485/blk000004ae ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000b05 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig0000147b ), + .DPO(\blk00000003/blk00000485/sig0000148d ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk00000485/blk000004ad ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000b07 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001479 ), + .DPO(\blk00000003/blk00000485/sig0000148b ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000485/blk000004ac ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000b08 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig00001478 ), + .DPO(\blk00000003/blk00000485/sig0000148a ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000485/blk000004ab ( + .A0(\blk00000003/sig00000334 ), + .A1(\blk00000003/sig00000337 ), + .A2(\blk00000003/blk00000485/sig00001477 ), + .A3(\blk00000003/blk00000485/sig00001477 ), + .D(\blk00000003/sig00000b06 ), + .DPRA0(\blk00000003/sig00000375 ), + .DPRA1(\blk00000003/sig0000037b ), + .DPRA2(\blk00000003/blk00000485/sig00001477 ), + .DPRA3(\blk00000003/blk00000485/sig00001477 ), + .WCLK(clk), + .WE(\blk00000003/blk00000485/sig0000149c ), + .SPO(\blk00000003/blk00000485/sig0000147a ), + .DPO(\blk00000003/blk00000485/sig0000148c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000149b ), + .Q(\blk00000003/sig000003bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000149a ), + .Q(\blk00000003/sig000003bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001499 ), + .Q(\blk00000003/sig000003be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001498 ), + .Q(\blk00000003/sig000003bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001497 ), + .Q(\blk00000003/sig000003c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001496 ), + .Q(\blk00000003/sig000003c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001495 ), + .Q(\blk00000003/sig000003c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001494 ), + .Q(\blk00000003/sig000003c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001493 ), + .Q(\blk00000003/sig000003c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001492 ), + .Q(\blk00000003/sig000003c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk000004a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001491 ), + .Q(\blk00000003/sig000003c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000049f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001490 ), + .Q(\blk00000003/sig000003c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000049e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000148f ), + .Q(\blk00000003/sig000003c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000049d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000148e ), + .Q(\blk00000003/sig000003c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000049c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000148d ), + .Q(\blk00000003/sig000003ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000049b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000148c ), + .Q(\blk00000003/sig000003cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000049a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000148b ), + .Q(\blk00000003/sig000003cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000499 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000148a ), + .Q(\blk00000003/sig000003cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000498 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001489 ), + .Q(\blk00000003/sig00000b09 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000497 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001488 ), + .Q(\blk00000003/sig00000b0a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000496 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001487 ), + .Q(\blk00000003/sig00000b0b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000495 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001486 ), + .Q(\blk00000003/sig00000b0c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000494 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001485 ), + .Q(\blk00000003/sig00000b0d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000493 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001484 ), + .Q(\blk00000003/sig00000b0e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000492 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001483 ), + .Q(\blk00000003/sig00000b0f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000491 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001482 ), + .Q(\blk00000003/sig00000b10 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000490 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001481 ), + .Q(\blk00000003/sig00000b11 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000048f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001480 ), + .Q(\blk00000003/sig00000b12 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000048e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000147f ), + .Q(\blk00000003/sig00000b13 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000048d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000147e ), + .Q(\blk00000003/sig00000b14 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000048c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000147d ), + .Q(\blk00000003/sig00000b15 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000048b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000147c ), + .Q(\blk00000003/sig00000b16 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk0000048a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000147b ), + .Q(\blk00000003/sig00000b17 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000489 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig0000147a ), + .Q(\blk00000003/sig00000b18 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000488 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001479 ), + .Q(\blk00000003/sig00000b19 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000485/blk00000487 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000485/sig00001478 ), + .Q(\blk00000003/sig00000b1a ) + ); + GND \blk00000003/blk00000485/blk00000486 ( + .G(\blk00000003/blk00000485/sig00001477 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000004be/blk000004f6 ( + .I0(\blk00000003/sig000009f2 ), + .I1(ce), + .O(\blk00000003/blk000004be/sig000014ff ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004be/blk000004f5 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b09 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014ec ), + .DPO(\blk00000003/blk000004be/sig000014fe ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004be/blk000004f4 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b0a ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014eb ), + .DPO(\blk00000003/blk000004be/sig000014fd ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004be/blk000004f3 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b0b ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014ea ), + .DPO(\blk00000003/blk000004be/sig000014fc ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004be/blk000004f2 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b0c ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e9 ), + .DPO(\blk00000003/blk000004be/sig000014fb ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004be/blk000004f1 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b0d ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e8 ), + .DPO(\blk00000003/blk000004be/sig000014fa ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004be/blk000004f0 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b0e ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e7 ), + .DPO(\blk00000003/blk000004be/sig000014f9 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004be/blk000004ef ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b10 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e5 ), + .DPO(\blk00000003/blk000004be/sig000014f7 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk000004be/blk000004ee ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b11 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e4 ), + .DPO(\blk00000003/blk000004be/sig000014f6 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004be/blk000004ed ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b0f ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e6 ), + .DPO(\blk00000003/blk000004be/sig000014f8 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000004be/blk000004ec ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b12 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e3 ), + .DPO(\blk00000003/blk000004be/sig000014f5 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004be/blk000004eb ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b13 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e2 ), + .DPO(\blk00000003/blk000004be/sig000014f4 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk000004be/blk000004ea ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b14 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e1 ), + .DPO(\blk00000003/blk000004be/sig000014f3 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004be/blk000004e9 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b15 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014e0 ), + .DPO(\blk00000003/blk000004be/sig000014f2 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000004be/blk000004e8 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b16 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014df ), + .DPO(\blk00000003/blk000004be/sig000014f1 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004be/blk000004e7 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b17 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014de ), + .DPO(\blk00000003/blk000004be/sig000014f0 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000004be/blk000004e6 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b19 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014dc ), + .DPO(\blk00000003/blk000004be/sig000014ee ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000004be/blk000004e5 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b1a ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014db ), + .DPO(\blk00000003/blk000004be/sig000014ed ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000004be/blk000004e4 ( + .A0(\blk00000003/sig000009e8 ), + .A1(\blk00000003/sig000009e9 ), + .A2(\blk00000003/blk000004be/sig000014da ), + .A3(\blk00000003/blk000004be/sig000014da ), + .D(\blk00000003/sig00000b18 ), + .DPRA0(\blk00000003/sig00000a12 ), + .DPRA1(\blk00000003/sig00000a11 ), + .DPRA2(\blk00000003/blk000004be/sig000014da ), + .DPRA3(\blk00000003/blk000004be/sig000014da ), + .WCLK(clk), + .WE(\blk00000003/blk000004be/sig000014ff ), + .SPO(\blk00000003/blk000004be/sig000014dd ), + .DPO(\blk00000003/blk000004be/sig000014ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014fe ), + .Q(\blk00000003/sig00000580 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014fd ), + .Q(\blk00000003/sig00000581 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014fc ), + .Q(\blk00000003/sig00000582 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014fb ), + .Q(\blk00000003/sig00000583 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004df ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014fa ), + .Q(\blk00000003/sig00000584 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004de ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f9 ), + .Q(\blk00000003/sig00000585 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004dd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f8 ), + .Q(\blk00000003/sig00000586 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f7 ), + .Q(\blk00000003/sig00000587 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004db ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f6 ), + .Q(\blk00000003/sig00000588 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004da ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f5 ), + .Q(\blk00000003/sig00000589 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f4 ), + .Q(\blk00000003/sig0000058a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f3 ), + .Q(\blk00000003/sig0000058b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f2 ), + .Q(\blk00000003/sig0000058c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f1 ), + .Q(\blk00000003/sig0000058d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014f0 ), + .Q(\blk00000003/sig0000058e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014ef ), + .Q(\blk00000003/sig0000058f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014ee ), + .Q(\blk00000003/sig00000590 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014ed ), + .Q(\blk00000003/sig00000591 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014ec ), + .Q(\blk00000003/sig00000b1b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014eb ), + .Q(\blk00000003/sig00000b1c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014ea ), + .Q(\blk00000003/sig00000b1d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e9 ), + .Q(\blk00000003/sig00000b1e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e8 ), + .Q(\blk00000003/sig00000b1f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e7 ), + .Q(\blk00000003/sig00000b20 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e6 ), + .Q(\blk00000003/sig00000b21 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e5 ), + .Q(\blk00000003/sig00000b22 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e4 ), + .Q(\blk00000003/sig00000b23 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e3 ), + .Q(\blk00000003/sig00000b24 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e2 ), + .Q(\blk00000003/sig00000b25 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e1 ), + .Q(\blk00000003/sig00000b26 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014e0 ), + .Q(\blk00000003/sig00000b27 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014df ), + .Q(\blk00000003/sig00000b28 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014de ), + .Q(\blk00000003/sig00000b29 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014dd ), + .Q(\blk00000003/sig00000b2a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014dc ), + .Q(\blk00000003/sig00000b2b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be/blk000004c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004be/sig000014db ), + .Q(\blk00000003/sig00000b2c ) + ); + GND \blk00000003/blk000004be/blk000004bf ( + .G(\blk00000003/blk000004be/sig000014da ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000004f7/blk0000052f ( + .I0(\blk00000003/sig000009f3 ), + .I1(ce), + .O(\blk00000003/blk000004f7/sig00001562 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004f7/blk0000052e ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b1b ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig0000154f ), + .DPO(\blk00000003/blk000004f7/sig00001561 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004f7/blk0000052d ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b1c ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig0000154e ), + .DPO(\blk00000003/blk000004f7/sig00001560 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004f7/blk0000052c ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b1d ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig0000154d ), + .DPO(\blk00000003/blk000004f7/sig0000155f ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004f7/blk0000052b ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b1e ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig0000154c ), + .DPO(\blk00000003/blk000004f7/sig0000155e ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004f7/blk0000052a ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b1f ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig0000154b ), + .DPO(\blk00000003/blk000004f7/sig0000155d ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004f7/blk00000529 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b20 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig0000154a ), + .DPO(\blk00000003/blk000004f7/sig0000155c ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004f7/blk00000528 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b22 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001548 ), + .DPO(\blk00000003/blk000004f7/sig0000155a ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004f7/blk00000527 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b23 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001547 ), + .DPO(\blk00000003/blk000004f7/sig00001559 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk000004f7/blk00000526 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b21 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001549 ), + .DPO(\blk00000003/blk000004f7/sig0000155b ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000004f7/blk00000525 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b24 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001546 ), + .DPO(\blk00000003/blk000004f7/sig00001558 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000004f7/blk00000524 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b25 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001545 ), + .DPO(\blk00000003/blk000004f7/sig00001557 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004f7/blk00000523 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b26 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001544 ), + .DPO(\blk00000003/blk000004f7/sig00001556 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000004f7/blk00000522 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b27 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001543 ), + .DPO(\blk00000003/blk000004f7/sig00001555 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004f7/blk00000521 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b28 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001542 ), + .DPO(\blk00000003/blk000004f7/sig00001554 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk000004f7/blk00000520 ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b29 ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001541 ), + .DPO(\blk00000003/blk000004f7/sig00001553 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk000004f7/blk0000051f ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b2b ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig0000153f ), + .DPO(\blk00000003/blk000004f7/sig00001551 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004f7/blk0000051e ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b2c ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig0000153e ), + .DPO(\blk00000003/blk000004f7/sig00001550 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk000004f7/blk0000051d ( + .A0(\blk00000003/sig000009ea ), + .A1(\blk00000003/sig000009eb ), + .A2(\blk00000003/blk000004f7/sig0000153d ), + .A3(\blk00000003/blk000004f7/sig0000153d ), + .D(\blk00000003/sig00000b2a ), + .DPRA0(\blk00000003/sig00000a0c ), + .DPRA1(\blk00000003/sig00000a0b ), + .DPRA2(\blk00000003/blk000004f7/sig0000153d ), + .DPRA3(\blk00000003/blk000004f7/sig0000153d ), + .WCLK(clk), + .WE(\blk00000003/blk000004f7/sig00001562 ), + .SPO(\blk00000003/blk000004f7/sig00001540 ), + .DPO(\blk00000003/blk000004f7/sig00001552 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk0000051c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001561 ), + .Q(\blk00000003/sig000005d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk0000051b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001560 ), + .Q(\blk00000003/sig000005d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk0000051a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000155f ), + .Q(\blk00000003/sig000005d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000519 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000155e ), + .Q(\blk00000003/sig000005d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000518 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000155d ), + .Q(\blk00000003/sig000005d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000517 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000155c ), + .Q(\blk00000003/sig000005d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000516 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000155b ), + .Q(\blk00000003/sig000005d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000515 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000155a ), + .Q(\blk00000003/sig000005d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000514 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001559 ), + .Q(\blk00000003/sig000005da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000513 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001558 ), + .Q(\blk00000003/sig000005db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000512 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001557 ), + .Q(\blk00000003/sig000005dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000511 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001556 ), + .Q(\blk00000003/sig000005dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000510 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001555 ), + .Q(\blk00000003/sig000005de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk0000050f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001554 ), + .Q(\blk00000003/sig000005df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk0000050e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001553 ), + .Q(\blk00000003/sig000005e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk0000050d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001552 ), + .Q(\blk00000003/sig000005e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk0000050c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001551 ), + .Q(\blk00000003/sig000005e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk0000050b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001550 ), + .Q(\blk00000003/sig000005e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk0000050a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000154f ), + .Q(\blk00000003/sig00000b2d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000509 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000154e ), + .Q(\blk00000003/sig00000b2e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000508 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000154d ), + .Q(\blk00000003/sig00000b2f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000507 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000154c ), + .Q(\blk00000003/sig00000b30 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000506 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000154b ), + .Q(\blk00000003/sig00000b31 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000505 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000154a ), + .Q(\blk00000003/sig00000b32 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000504 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001549 ), + .Q(\blk00000003/sig00000b33 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000503 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001548 ), + .Q(\blk00000003/sig00000b34 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000502 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001547 ), + .Q(\blk00000003/sig00000b35 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000501 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001546 ), + .Q(\blk00000003/sig00000b36 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk00000500 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001545 ), + .Q(\blk00000003/sig00000b37 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk000004ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001544 ), + .Q(\blk00000003/sig00000b38 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk000004fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001543 ), + .Q(\blk00000003/sig00000b39 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk000004fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001542 ), + .Q(\blk00000003/sig00000b3a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk000004fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001541 ), + .Q(\blk00000003/sig00000b3b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk000004fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig00001540 ), + .Q(\blk00000003/sig00000b3c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk000004fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000153f ), + .Q(\blk00000003/sig00000b3d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004f7/blk000004f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004f7/sig0000153e ), + .Q(\blk00000003/sig00000b3e ) + ); + GND \blk00000003/blk000004f7/blk000004f8 ( + .G(\blk00000003/blk000004f7/sig0000153d ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000530/blk00000568 ( + .I0(\blk00000003/sig000009f4 ), + .I1(ce), + .O(\blk00000003/blk00000530/sig000015c5 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000530/blk00000567 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b2d ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015b2 ), + .DPO(\blk00000003/blk00000530/sig000015c4 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000530/blk00000566 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b2e ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015b1 ), + .DPO(\blk00000003/blk00000530/sig000015c3 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000530/blk00000565 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b2f ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015b0 ), + .DPO(\blk00000003/blk00000530/sig000015c2 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000530/blk00000564 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b30 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015af ), + .DPO(\blk00000003/blk00000530/sig000015c1 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000530/blk00000563 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b31 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015ae ), + .DPO(\blk00000003/blk00000530/sig000015c0 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk00000530/blk00000562 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b32 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015ad ), + .DPO(\blk00000003/blk00000530/sig000015bf ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000530/blk00000561 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b34 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015ab ), + .DPO(\blk00000003/blk00000530/sig000015bd ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000530/blk00000560 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b35 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015aa ), + .DPO(\blk00000003/blk00000530/sig000015bc ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000530/blk0000055f ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b33 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015ac ), + .DPO(\blk00000003/blk00000530/sig000015be ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000530/blk0000055e ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b36 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015a9 ), + .DPO(\blk00000003/blk00000530/sig000015bb ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000530/blk0000055d ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b37 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015a8 ), + .DPO(\blk00000003/blk00000530/sig000015ba ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk00000530/blk0000055c ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b38 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015a7 ), + .DPO(\blk00000003/blk00000530/sig000015b9 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000530/blk0000055b ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b39 ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015a6 ), + .DPO(\blk00000003/blk00000530/sig000015b8 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000530/blk0000055a ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b3a ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015a5 ), + .DPO(\blk00000003/blk00000530/sig000015b7 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000530/blk00000559 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b3b ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015a4 ), + .DPO(\blk00000003/blk00000530/sig000015b6 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000530/blk00000558 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b3d ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015a2 ), + .DPO(\blk00000003/blk00000530/sig000015b4 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000530/blk00000557 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b3e ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015a1 ), + .DPO(\blk00000003/blk00000530/sig000015b3 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk00000530/blk00000556 ( + .A0(\blk00000003/sig000009ec ), + .A1(\blk00000003/sig000009ed ), + .A2(\blk00000003/blk00000530/sig000015a0 ), + .A3(\blk00000003/blk00000530/sig000015a0 ), + .D(\blk00000003/sig00000b3c ), + .DPRA0(\blk00000003/sig00000a05 ), + .DPRA1(\blk00000003/sig00000a04 ), + .DPRA2(\blk00000003/blk00000530/sig000015a0 ), + .DPRA3(\blk00000003/blk00000530/sig000015a0 ), + .WCLK(clk), + .WE(\blk00000003/blk00000530/sig000015c5 ), + .SPO(\blk00000003/blk00000530/sig000015a3 ), + .DPO(\blk00000003/blk00000530/sig000015b5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000555 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015c4 ), + .Q(\blk00000003/sig00000624 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000554 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015c3 ), + .Q(\blk00000003/sig00000625 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000553 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015c2 ), + .Q(\blk00000003/sig00000626 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000552 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015c1 ), + .Q(\blk00000003/sig00000627 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000551 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015c0 ), + .Q(\blk00000003/sig00000628 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000550 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015bf ), + .Q(\blk00000003/sig00000629 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000054f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015be ), + .Q(\blk00000003/sig0000062a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000054e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015bd ), + .Q(\blk00000003/sig0000062b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000054d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015bc ), + .Q(\blk00000003/sig0000062c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000054c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015bb ), + .Q(\blk00000003/sig0000062d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000054b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015ba ), + .Q(\blk00000003/sig0000062e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000054a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b9 ), + .Q(\blk00000003/sig0000062f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000549 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b8 ), + .Q(\blk00000003/sig00000630 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000548 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b7 ), + .Q(\blk00000003/sig00000631 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000547 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b6 ), + .Q(\blk00000003/sig00000632 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000546 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b5 ), + .Q(\blk00000003/sig00000633 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000545 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b4 ), + .Q(\blk00000003/sig00000634 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000544 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b3 ), + .Q(\blk00000003/sig00000635 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000543 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b2 ), + .Q(\blk00000003/sig00000b3f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000542 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b1 ), + .Q(\blk00000003/sig00000b40 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000541 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015b0 ), + .Q(\blk00000003/sig00000b41 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000540 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015af ), + .Q(\blk00000003/sig00000b42 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000053f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015ae ), + .Q(\blk00000003/sig00000b43 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000053e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015ad ), + .Q(\blk00000003/sig00000b44 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000053d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015ac ), + .Q(\blk00000003/sig00000b45 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000053c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015ab ), + .Q(\blk00000003/sig00000b46 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000053b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015aa ), + .Q(\blk00000003/sig00000b47 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk0000053a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015a9 ), + .Q(\blk00000003/sig00000b48 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000539 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015a8 ), + .Q(\blk00000003/sig00000b49 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000538 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015a7 ), + .Q(\blk00000003/sig00000b4a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000537 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015a6 ), + .Q(\blk00000003/sig00000b4b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000536 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015a5 ), + .Q(\blk00000003/sig00000b4c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000535 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015a4 ), + .Q(\blk00000003/sig00000b4d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000534 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015a3 ), + .Q(\blk00000003/sig00000b4e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000533 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015a2 ), + .Q(\blk00000003/sig00000b4f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530/blk00000532 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000530/sig000015a1 ), + .Q(\blk00000003/sig00000b50 ) + ); + GND \blk00000003/blk00000530/blk00000531 ( + .G(\blk00000003/blk00000530/sig000015a0 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000569/blk000005a1 ( + .I0(\blk00000003/sig000009f5 ), + .I1(ce), + .O(\blk00000003/blk00000569/sig00001628 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000569/blk000005a0 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b3f ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001615 ), + .DPO(\blk00000003/blk00000569/sig00001627 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000569/blk0000059f ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b40 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001614 ), + .DPO(\blk00000003/blk00000569/sig00001626 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000569/blk0000059e ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b41 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001613 ), + .DPO(\blk00000003/blk00000569/sig00001625 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000569/blk0000059d ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b42 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001612 ), + .DPO(\blk00000003/blk00000569/sig00001624 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000569/blk0000059c ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b43 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001611 ), + .DPO(\blk00000003/blk00000569/sig00001623 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk00000569/blk0000059b ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b44 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001610 ), + .DPO(\blk00000003/blk00000569/sig00001622 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000569/blk0000059a ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b46 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig0000160e ), + .DPO(\blk00000003/blk00000569/sig00001620 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000569/blk00000599 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b47 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig0000160d ), + .DPO(\blk00000003/blk00000569/sig0000161f ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk00000569/blk00000598 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b45 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig0000160f ), + .DPO(\blk00000003/blk00000569/sig00001621 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000569/blk00000597 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b48 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig0000160c ), + .DPO(\blk00000003/blk00000569/sig0000161e ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000569/blk00000596 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b49 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig0000160b ), + .DPO(\blk00000003/blk00000569/sig0000161d ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000569/blk00000595 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b4a ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig0000160a ), + .DPO(\blk00000003/blk00000569/sig0000161c ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000569/blk00000594 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b4b ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001609 ), + .DPO(\blk00000003/blk00000569/sig0000161b ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000569/blk00000593 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b4c ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001608 ), + .DPO(\blk00000003/blk00000569/sig0000161a ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk00000569/blk00000592 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b4d ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001607 ), + .DPO(\blk00000003/blk00000569/sig00001619 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000569/blk00000591 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b4f ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001605 ), + .DPO(\blk00000003/blk00000569/sig00001617 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000569/blk00000590 ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b50 ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001604 ), + .DPO(\blk00000003/blk00000569/sig00001616 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000569/blk0000058f ( + .A0(\blk00000003/sig000009ee ), + .A1(\blk00000003/sig000009ef ), + .A2(\blk00000003/blk00000569/sig00001603 ), + .A3(\blk00000003/blk00000569/sig00001603 ), + .D(\blk00000003/sig00000b4e ), + .DPRA0(\blk00000003/sig000009fd ), + .DPRA1(\blk00000003/sig000009fb ), + .DPRA2(\blk00000003/blk00000569/sig00001603 ), + .DPRA3(\blk00000003/blk00000569/sig00001603 ), + .WCLK(clk), + .WE(\blk00000003/blk00000569/sig00001628 ), + .SPO(\blk00000003/blk00000569/sig00001606 ), + .DPO(\blk00000003/blk00000569/sig00001618 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000058e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001627 ), + .Q(\blk00000003/sig00000646 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000058d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001626 ), + .Q(\blk00000003/sig00000647 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000058c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001625 ), + .Q(\blk00000003/sig00000648 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000058b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001624 ), + .Q(\blk00000003/sig00000649 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000058a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001623 ), + .Q(\blk00000003/sig0000064a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000589 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001622 ), + .Q(\blk00000003/sig0000064b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000588 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001621 ), + .Q(\blk00000003/sig0000064c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000587 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001620 ), + .Q(\blk00000003/sig0000064d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000586 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000161f ), + .Q(\blk00000003/sig0000064e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000585 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000161e ), + .Q(\blk00000003/sig0000064f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000584 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000161d ), + .Q(\blk00000003/sig00000650 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000583 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000161c ), + .Q(\blk00000003/sig00000651 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000582 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000161b ), + .Q(\blk00000003/sig00000652 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000581 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000161a ), + .Q(\blk00000003/sig00000653 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000580 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001619 ), + .Q(\blk00000003/sig00000654 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000057f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001618 ), + .Q(\blk00000003/sig00000655 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000057e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001617 ), + .Q(\blk00000003/sig00000656 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000057d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001616 ), + .Q(\blk00000003/sig00000657 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000057c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001615 ), + .Q(\blk00000003/sig00000b51 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000057b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001614 ), + .Q(\blk00000003/sig00000b52 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000057a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001613 ), + .Q(\blk00000003/sig00000b53 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000579 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001612 ), + .Q(\blk00000003/sig00000b54 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000578 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001611 ), + .Q(\blk00000003/sig00000b55 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000577 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001610 ), + .Q(\blk00000003/sig00000b56 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000576 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000160f ), + .Q(\blk00000003/sig00000b57 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000575 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000160e ), + .Q(\blk00000003/sig00000b58 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000574 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000160d ), + .Q(\blk00000003/sig00000b59 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000573 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000160c ), + .Q(\blk00000003/sig00000b5a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000572 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000160b ), + .Q(\blk00000003/sig00000b5b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000571 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig0000160a ), + .Q(\blk00000003/sig00000b5c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk00000570 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001609 ), + .Q(\blk00000003/sig00000b5d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000056f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001608 ), + .Q(\blk00000003/sig00000b5e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000056e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001607 ), + .Q(\blk00000003/sig00000b5f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000056d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001606 ), + .Q(\blk00000003/sig00000b60 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000056c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001605 ), + .Q(\blk00000003/sig00000b61 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569/blk0000056b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000569/sig00001604 ), + .Q(\blk00000003/sig00000b62 ) + ); + GND \blk00000003/blk00000569/blk0000056a ( + .G(\blk00000003/blk00000569/sig00001603 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005a2/blk000005c8 ( + .I0(\blk00000003/sig000009f6 ), + .I1(ce), + .O(\blk00000003/blk000005a2/sig00001667 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000005a2/blk000005c7 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b51 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005c7_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001666 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk000005a2/blk000005c6 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b52 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005c6_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001665 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000005a2/blk000005c5 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b53 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005c5_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001664 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000005a2/blk000005c4 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b54 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005c4_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001663 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a2/blk000005c3 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b55 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005c3_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001662 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000005a2/blk000005c2 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b56 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005c2_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001661 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000005a2/blk000005c1 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b58 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005c1_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig0000165f ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a2/blk000005c0 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b59 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005c0_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig0000165e ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000005a2/blk000005bf ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b57 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005bf_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001660 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a2/blk000005be ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b5a ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005be_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig0000165d ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a2/blk000005bd ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b5b ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005bd_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig0000165c ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk000005a2/blk000005bc ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b5c ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005bc_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig0000165b ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a2/blk000005bb ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b5d ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005bb_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig0000165a ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000005a2/blk000005ba ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b5e ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005ba_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001659 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000005a2/blk000005b9 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b5f ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005b9_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001658 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a2/blk000005b8 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b61 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005b8_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001656 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk000005a2/blk000005b7 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b62 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005b7_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001655 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005a2/blk000005b6 ( + .A0(\blk00000003/sig000009f0 ), + .A1(\blk00000003/sig000009f1 ), + .A2(\blk00000003/blk000005a2/sig00001654 ), + .A3(\blk00000003/blk000005a2/sig00001654 ), + .D(\blk00000003/sig00000b60 ), + .DPRA0(\blk00000003/sig000009fe ), + .DPRA1(\blk00000003/sig000009fc ), + .DPRA2(\blk00000003/blk000005a2/sig00001654 ), + .DPRA3(\blk00000003/blk000005a2/sig00001654 ), + .WCLK(clk), + .WE(\blk00000003/blk000005a2/sig00001667 ), + .SPO(\NLW_blk00000003/blk000005a2/blk000005b6_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000005a2/sig00001657 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001666 ), + .Q(\blk00000003/sig000004ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001665 ), + .Q(\blk00000003/sig000004ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001664 ), + .Q(\blk00000003/sig000004f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001663 ), + .Q(\blk00000003/sig000004f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001662 ), + .Q(\blk00000003/sig000004f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001661 ), + .Q(\blk00000003/sig000004f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005af ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001660 ), + .Q(\blk00000003/sig000004f4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig0000165f ), + .Q(\blk00000003/sig000004f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig0000165e ), + .Q(\blk00000003/sig000004f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig0000165d ), + .Q(\blk00000003/sig000004f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig0000165c ), + .Q(\blk00000003/sig000004f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig0000165b ), + .Q(\blk00000003/sig000004f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig0000165a ), + .Q(\blk00000003/sig000004fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001659 ), + .Q(\blk00000003/sig000004fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001658 ), + .Q(\blk00000003/sig000004fc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001657 ), + .Q(\blk00000003/sig000004fd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001656 ), + .Q(\blk00000003/sig000004fe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005a2/blk000005a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005a2/sig00001655 ), + .Q(\blk00000003/sig000004ff ) + ); + GND \blk00000003/blk000005a2/blk000005a3 ( + .G(\blk00000003/blk000005a2/sig00001654 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005c9/blk000005db ( + .I0(\blk00000003/sig000009fa ), + .I1(ce), + .O(\blk00000003/blk000005c9/sig00001685 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c9/blk000005da ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005c9/sig0000167c ), + .A2(\blk00000003/blk000005c9/sig0000167c ), + .A3(\blk00000003/blk000005c9/sig0000167c ), + .CE(\blk00000003/blk000005c9/sig00001685 ), + .CLK(clk), + .D(\blk00000003/sig0000063e ), + .Q(\blk00000003/blk000005c9/sig00001684 ), + .Q15(\NLW_blk00000003/blk000005c9/blk000005da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c9/blk000005d9 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005c9/sig0000167c ), + .A2(\blk00000003/blk000005c9/sig0000167c ), + .A3(\blk00000003/blk000005c9/sig0000167c ), + .CE(\blk00000003/blk000005c9/sig00001685 ), + .CLK(clk), + .D(\blk00000003/sig0000063f ), + .Q(\blk00000003/blk000005c9/sig00001683 ), + .Q15(\NLW_blk00000003/blk000005c9/blk000005d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c9/blk000005d8 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005c9/sig0000167c ), + .A2(\blk00000003/blk000005c9/sig0000167c ), + .A3(\blk00000003/blk000005c9/sig0000167c ), + .CE(\blk00000003/blk000005c9/sig00001685 ), + .CLK(clk), + .D(\blk00000003/sig00000640 ), + .Q(\blk00000003/blk000005c9/sig00001682 ), + .Q15(\NLW_blk00000003/blk000005c9/blk000005d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c9/blk000005d7 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005c9/sig0000167c ), + .A2(\blk00000003/blk000005c9/sig0000167c ), + .A3(\blk00000003/blk000005c9/sig0000167c ), + .CE(\blk00000003/blk000005c9/sig00001685 ), + .CLK(clk), + .D(\blk00000003/sig00000641 ), + .Q(\blk00000003/blk000005c9/sig00001681 ), + .Q15(\NLW_blk00000003/blk000005c9/blk000005d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c9/blk000005d6 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005c9/sig0000167c ), + .A2(\blk00000003/blk000005c9/sig0000167c ), + .A3(\blk00000003/blk000005c9/sig0000167c ), + .CE(\blk00000003/blk000005c9/sig00001685 ), + .CLK(clk), + .D(\blk00000003/sig00000642 ), + .Q(\blk00000003/blk000005c9/sig00001680 ), + .Q15(\NLW_blk00000003/blk000005c9/blk000005d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c9/blk000005d5 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005c9/sig0000167c ), + .A2(\blk00000003/blk000005c9/sig0000167c ), + .A3(\blk00000003/blk000005c9/sig0000167c ), + .CE(\blk00000003/blk000005c9/sig00001685 ), + .CLK(clk), + .D(\blk00000003/sig00000643 ), + .Q(\blk00000003/blk000005c9/sig0000167f ), + .Q15(\NLW_blk00000003/blk000005c9/blk000005d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c9/blk000005d4 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005c9/sig0000167c ), + .A2(\blk00000003/blk000005c9/sig0000167c ), + .A3(\blk00000003/blk000005c9/sig0000167c ), + .CE(\blk00000003/blk000005c9/sig00001685 ), + .CLK(clk), + .D(\blk00000003/sig00000644 ), + .Q(\blk00000003/blk000005c9/sig0000167e ), + .Q15(\NLW_blk00000003/blk000005c9/blk000005d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005c9/blk000005d3 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005c9/sig0000167c ), + .A2(\blk00000003/blk000005c9/sig0000167c ), + .A3(\blk00000003/blk000005c9/sig0000167c ), + .CE(\blk00000003/blk000005c9/sig00001685 ), + .CLK(clk), + .D(\blk00000003/sig00000645 ), + .Q(\blk00000003/blk000005c9/sig0000167d ), + .Q15(\NLW_blk00000003/blk000005c9/blk000005d3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c9/blk000005d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005c9/sig00001684 ), + .Q(\blk00000003/sig000004e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c9/blk000005d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005c9/sig00001683 ), + .Q(\blk00000003/sig000004e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c9/blk000005d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005c9/sig00001682 ), + .Q(\blk00000003/sig000004e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c9/blk000005cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005c9/sig00001681 ), + .Q(\blk00000003/sig000004e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c9/blk000005ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005c9/sig00001680 ), + .Q(\blk00000003/sig000004ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c9/blk000005cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005c9/sig0000167f ), + .Q(\blk00000003/sig000004eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c9/blk000005cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005c9/sig0000167e ), + .Q(\blk00000003/sig000004ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005c9/blk000005cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005c9/sig0000167d ), + .Q(\blk00000003/sig000004ed ) + ); + GND \blk00000003/blk000005c9/blk000005ca ( + .G(\blk00000003/blk000005c9/sig0000167c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005dc/blk000005ee ( + .I0(\blk00000003/sig000009f8 ), + .I1(ce), + .O(\blk00000003/blk000005dc/sig000016a3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005dc/blk000005ed ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000005dc/sig0000169a ), + .A2(\blk00000003/blk000005dc/sig0000169a ), + .A3(\blk00000003/blk000005dc/sig0000169a ), + .CE(\blk00000003/blk000005dc/sig000016a3 ), + .CLK(clk), + .D(\blk00000003/sig00000b63 ), + .Q(\blk00000003/blk000005dc/sig000016a2 ), + .Q15(\NLW_blk00000003/blk000005dc/blk000005ed_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005dc/blk000005ec ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000005dc/sig0000169a ), + .A2(\blk00000003/blk000005dc/sig0000169a ), + .A3(\blk00000003/blk000005dc/sig0000169a ), + .CE(\blk00000003/blk000005dc/sig000016a3 ), + .CLK(clk), + .D(\blk00000003/sig00000b64 ), + .Q(\blk00000003/blk000005dc/sig000016a1 ), + .Q15(\NLW_blk00000003/blk000005dc/blk000005ec_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005dc/blk000005eb ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000005dc/sig0000169a ), + .A2(\blk00000003/blk000005dc/sig0000169a ), + .A3(\blk00000003/blk000005dc/sig0000169a ), + .CE(\blk00000003/blk000005dc/sig000016a3 ), + .CLK(clk), + .D(\blk00000003/sig00000b65 ), + .Q(\blk00000003/blk000005dc/sig000016a0 ), + .Q15(\NLW_blk00000003/blk000005dc/blk000005eb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005dc/blk000005ea ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000005dc/sig0000169a ), + .A2(\blk00000003/blk000005dc/sig0000169a ), + .A3(\blk00000003/blk000005dc/sig0000169a ), + .CE(\blk00000003/blk000005dc/sig000016a3 ), + .CLK(clk), + .D(\blk00000003/sig00000b66 ), + .Q(\blk00000003/blk000005dc/sig0000169f ), + .Q15(\NLW_blk00000003/blk000005dc/blk000005ea_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005dc/blk000005e9 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000005dc/sig0000169a ), + .A2(\blk00000003/blk000005dc/sig0000169a ), + .A3(\blk00000003/blk000005dc/sig0000169a ), + .CE(\blk00000003/blk000005dc/sig000016a3 ), + .CLK(clk), + .D(\blk00000003/sig00000b67 ), + .Q(\blk00000003/blk000005dc/sig0000169e ), + .Q15(\NLW_blk00000003/blk000005dc/blk000005e9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005dc/blk000005e8 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000005dc/sig0000169a ), + .A2(\blk00000003/blk000005dc/sig0000169a ), + .A3(\blk00000003/blk000005dc/sig0000169a ), + .CE(\blk00000003/blk000005dc/sig000016a3 ), + .CLK(clk), + .D(\blk00000003/sig00000b68 ), + .Q(\blk00000003/blk000005dc/sig0000169d ), + .Q15(\NLW_blk00000003/blk000005dc/blk000005e8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005dc/blk000005e7 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000005dc/sig0000169a ), + .A2(\blk00000003/blk000005dc/sig0000169a ), + .A3(\blk00000003/blk000005dc/sig0000169a ), + .CE(\blk00000003/blk000005dc/sig000016a3 ), + .CLK(clk), + .D(\blk00000003/sig00000b69 ), + .Q(\blk00000003/blk000005dc/sig0000169c ), + .Q15(\NLW_blk00000003/blk000005dc/blk000005e7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005dc/blk000005e6 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk000005dc/sig0000169a ), + .A2(\blk00000003/blk000005dc/sig0000169a ), + .A3(\blk00000003/blk000005dc/sig0000169a ), + .CE(\blk00000003/blk000005dc/sig000016a3 ), + .CLK(clk), + .D(\blk00000003/sig00000b6a ), + .Q(\blk00000003/blk000005dc/sig0000169b ), + .Q15(\NLW_blk00000003/blk000005dc/blk000005e6_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005dc/blk000005e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005dc/sig000016a2 ), + .Q(\blk00000003/sig000004ae ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005dc/blk000005e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005dc/sig000016a1 ), + .Q(\blk00000003/sig000004af ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005dc/blk000005e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005dc/sig000016a0 ), + .Q(\blk00000003/sig000004b0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005dc/blk000005e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005dc/sig0000169f ), + .Q(\blk00000003/sig000004b1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005dc/blk000005e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005dc/sig0000169e ), + .Q(\blk00000003/sig000004b2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005dc/blk000005e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005dc/sig0000169d ), + .Q(\blk00000003/sig000004b3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005dc/blk000005df ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005dc/sig0000169c ), + .Q(\blk00000003/sig000004b4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005dc/blk000005de ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005dc/sig0000169b ), + .Q(\blk00000003/sig000004b5 ) + ); + GND \blk00000003/blk000005dc/blk000005dd ( + .G(\blk00000003/blk000005dc/sig0000169a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005ef/blk00000601 ( + .I0(\blk00000003/sig000009fa ), + .I1(ce), + .O(\blk00000003/blk000005ef/sig000016c1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ef/blk00000600 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005ef/sig000016b8 ), + .A2(\blk00000003/blk000005ef/sig000016b8 ), + .A3(\blk00000003/blk000005ef/sig000016b8 ), + .CE(\blk00000003/blk000005ef/sig000016c1 ), + .CLK(clk), + .D(\blk00000003/sig00000720 ), + .Q(\blk00000003/blk000005ef/sig000016c0 ), + .Q15(\NLW_blk00000003/blk000005ef/blk00000600_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ef/blk000005ff ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005ef/sig000016b8 ), + .A2(\blk00000003/blk000005ef/sig000016b8 ), + .A3(\blk00000003/blk000005ef/sig000016b8 ), + .CE(\blk00000003/blk000005ef/sig000016c1 ), + .CLK(clk), + .D(\blk00000003/sig00000721 ), + .Q(\blk00000003/blk000005ef/sig000016bf ), + .Q15(\NLW_blk00000003/blk000005ef/blk000005ff_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ef/blk000005fe ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005ef/sig000016b8 ), + .A2(\blk00000003/blk000005ef/sig000016b8 ), + .A3(\blk00000003/blk000005ef/sig000016b8 ), + .CE(\blk00000003/blk000005ef/sig000016c1 ), + .CLK(clk), + .D(\blk00000003/sig00000722 ), + .Q(\blk00000003/blk000005ef/sig000016be ), + .Q15(\NLW_blk00000003/blk000005ef/blk000005fe_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ef/blk000005fd ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005ef/sig000016b8 ), + .A2(\blk00000003/blk000005ef/sig000016b8 ), + .A3(\blk00000003/blk000005ef/sig000016b8 ), + .CE(\blk00000003/blk000005ef/sig000016c1 ), + .CLK(clk), + .D(\blk00000003/sig00000723 ), + .Q(\blk00000003/blk000005ef/sig000016bd ), + .Q15(\NLW_blk00000003/blk000005ef/blk000005fd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ef/blk000005fc ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005ef/sig000016b8 ), + .A2(\blk00000003/blk000005ef/sig000016b8 ), + .A3(\blk00000003/blk000005ef/sig000016b8 ), + .CE(\blk00000003/blk000005ef/sig000016c1 ), + .CLK(clk), + .D(\blk00000003/sig00000724 ), + .Q(\blk00000003/blk000005ef/sig000016bc ), + .Q15(\NLW_blk00000003/blk000005ef/blk000005fc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ef/blk000005fb ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005ef/sig000016b8 ), + .A2(\blk00000003/blk000005ef/sig000016b8 ), + .A3(\blk00000003/blk000005ef/sig000016b8 ), + .CE(\blk00000003/blk000005ef/sig000016c1 ), + .CLK(clk), + .D(\blk00000003/sig00000725 ), + .Q(\blk00000003/blk000005ef/sig000016bb ), + .Q15(\NLW_blk00000003/blk000005ef/blk000005fb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ef/blk000005fa ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005ef/sig000016b8 ), + .A2(\blk00000003/blk000005ef/sig000016b8 ), + .A3(\blk00000003/blk000005ef/sig000016b8 ), + .CE(\blk00000003/blk000005ef/sig000016c1 ), + .CLK(clk), + .D(\blk00000003/sig00000726 ), + .Q(\blk00000003/blk000005ef/sig000016ba ), + .Q15(\NLW_blk00000003/blk000005ef/blk000005fa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000005ef/blk000005f9 ( + .A0(\blk00000003/sig00000a02 ), + .A1(\blk00000003/blk000005ef/sig000016b8 ), + .A2(\blk00000003/blk000005ef/sig000016b8 ), + .A3(\blk00000003/blk000005ef/sig000016b8 ), + .CE(\blk00000003/blk000005ef/sig000016c1 ), + .CLK(clk), + .D(\blk00000003/sig00000727 ), + .Q(\blk00000003/blk000005ef/sig000016b9 ), + .Q15(\NLW_blk00000003/blk000005ef/blk000005f9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ef/blk000005f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005ef/sig000016c0 ), + .Q(\blk00000003/sig00000538 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ef/blk000005f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005ef/sig000016bf ), + .Q(\blk00000003/sig00000539 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ef/blk000005f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005ef/sig000016be ), + .Q(\blk00000003/sig0000053a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ef/blk000005f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005ef/sig000016bd ), + .Q(\blk00000003/sig0000053b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ef/blk000005f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005ef/sig000016bc ), + .Q(\blk00000003/sig0000053c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ef/blk000005f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005ef/sig000016bb ), + .Q(\blk00000003/sig0000053d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ef/blk000005f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005ef/sig000016ba ), + .Q(\blk00000003/sig0000053e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000005ef/blk000005f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000005ef/sig000016b9 ), + .Q(\blk00000003/sig0000053f ) + ); + GND \blk00000003/blk000005ef/blk000005f0 ( + .G(\blk00000003/blk000005ef/sig000016b8 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000602/blk00000614 ( + .I0(\blk00000003/sig000009f8 ), + .I1(ce), + .O(\blk00000003/blk00000602/sig000016df ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000602/blk00000613 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000602/sig000016d6 ), + .A2(\blk00000003/blk00000602/sig000016d6 ), + .A3(\blk00000003/blk00000602/sig000016d6 ), + .CE(\blk00000003/blk00000602/sig000016df ), + .CLK(clk), + .D(\blk00000003/sig00000b6b ), + .Q(\blk00000003/blk00000602/sig000016de ), + .Q15(\NLW_blk00000003/blk00000602/blk00000613_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000602/blk00000612 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000602/sig000016d6 ), + .A2(\blk00000003/blk00000602/sig000016d6 ), + .A3(\blk00000003/blk00000602/sig000016d6 ), + .CE(\blk00000003/blk00000602/sig000016df ), + .CLK(clk), + .D(\blk00000003/sig00000b6c ), + .Q(\blk00000003/blk00000602/sig000016dd ), + .Q15(\NLW_blk00000003/blk00000602/blk00000612_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000602/blk00000611 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000602/sig000016d6 ), + .A2(\blk00000003/blk00000602/sig000016d6 ), + .A3(\blk00000003/blk00000602/sig000016d6 ), + .CE(\blk00000003/blk00000602/sig000016df ), + .CLK(clk), + .D(\blk00000003/sig00000b6d ), + .Q(\blk00000003/blk00000602/sig000016dc ), + .Q15(\NLW_blk00000003/blk00000602/blk00000611_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000602/blk00000610 ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000602/sig000016d6 ), + .A2(\blk00000003/blk00000602/sig000016d6 ), + .A3(\blk00000003/blk00000602/sig000016d6 ), + .CE(\blk00000003/blk00000602/sig000016df ), + .CLK(clk), + .D(\blk00000003/sig00000b6e ), + .Q(\blk00000003/blk00000602/sig000016db ), + .Q15(\NLW_blk00000003/blk00000602/blk00000610_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000602/blk0000060f ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000602/sig000016d6 ), + .A2(\blk00000003/blk00000602/sig000016d6 ), + .A3(\blk00000003/blk00000602/sig000016d6 ), + .CE(\blk00000003/blk00000602/sig000016df ), + .CLK(clk), + .D(\blk00000003/sig00000b6f ), + .Q(\blk00000003/blk00000602/sig000016da ), + .Q15(\NLW_blk00000003/blk00000602/blk0000060f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000602/blk0000060e ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000602/sig000016d6 ), + .A2(\blk00000003/blk00000602/sig000016d6 ), + .A3(\blk00000003/blk00000602/sig000016d6 ), + .CE(\blk00000003/blk00000602/sig000016df ), + .CLK(clk), + .D(\blk00000003/sig00000b70 ), + .Q(\blk00000003/blk00000602/sig000016d9 ), + .Q15(\NLW_blk00000003/blk00000602/blk0000060e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000602/blk0000060d ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000602/sig000016d6 ), + .A2(\blk00000003/blk00000602/sig000016d6 ), + .A3(\blk00000003/blk00000602/sig000016d6 ), + .CE(\blk00000003/blk00000602/sig000016df ), + .CLK(clk), + .D(\blk00000003/sig00000b71 ), + .Q(\blk00000003/blk00000602/sig000016d8 ), + .Q15(\NLW_blk00000003/blk00000602/blk0000060d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000602/blk0000060c ( + .A0(\blk00000003/sig00000a00 ), + .A1(\blk00000003/blk00000602/sig000016d6 ), + .A2(\blk00000003/blk00000602/sig000016d6 ), + .A3(\blk00000003/blk00000602/sig000016d6 ), + .CE(\blk00000003/blk00000602/sig000016df ), + .CLK(clk), + .D(\blk00000003/sig00000b72 ), + .Q(\blk00000003/blk00000602/sig000016d7 ), + .Q15(\NLW_blk00000003/blk00000602/blk0000060c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000602/blk0000060b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000602/sig000016de ), + .Q(\blk00000003/sig00000500 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000602/blk0000060a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000602/sig000016dd ), + .Q(\blk00000003/sig00000501 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000602/blk00000609 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000602/sig000016dc ), + .Q(\blk00000003/sig00000502 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000602/blk00000608 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000602/sig000016db ), + .Q(\blk00000003/sig00000503 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000602/blk00000607 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000602/sig000016da ), + .Q(\blk00000003/sig00000504 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000602/blk00000606 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000602/sig000016d9 ), + .Q(\blk00000003/sig00000505 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000602/blk00000605 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000602/sig000016d8 ), + .Q(\blk00000003/sig00000506 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000602/blk00000604 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000602/sig000016d7 ), + .Q(\blk00000003/sig00000507 ) + ); + GND \blk00000003/blk00000602/blk00000603 ( + .G(\blk00000003/blk00000602/sig000016d6 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000615/blk00000627 ( + .I0(\blk00000003/sig000009f9 ), + .I1(ce), + .O(\blk00000003/blk00000615/sig000016fd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000615/blk00000626 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk00000615/sig000016f4 ), + .A2(\blk00000003/blk00000615/sig000016f4 ), + .A3(\blk00000003/blk00000615/sig000016f4 ), + .CE(\blk00000003/blk00000615/sig000016fd ), + .CLK(clk), + .D(\blk00000003/sig000005ec ), + .Q(\blk00000003/blk00000615/sig000016fc ), + .Q15(\NLW_blk00000003/blk00000615/blk00000626_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000615/blk00000625 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk00000615/sig000016f4 ), + .A2(\blk00000003/blk00000615/sig000016f4 ), + .A3(\blk00000003/blk00000615/sig000016f4 ), + .CE(\blk00000003/blk00000615/sig000016fd ), + .CLK(clk), + .D(\blk00000003/sig000005ed ), + .Q(\blk00000003/blk00000615/sig000016fb ), + .Q15(\NLW_blk00000003/blk00000615/blk00000625_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000615/blk00000624 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk00000615/sig000016f4 ), + .A2(\blk00000003/blk00000615/sig000016f4 ), + .A3(\blk00000003/blk00000615/sig000016f4 ), + .CE(\blk00000003/blk00000615/sig000016fd ), + .CLK(clk), + .D(\blk00000003/sig000005ee ), + .Q(\blk00000003/blk00000615/sig000016fa ), + .Q15(\NLW_blk00000003/blk00000615/blk00000624_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000615/blk00000623 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk00000615/sig000016f4 ), + .A2(\blk00000003/blk00000615/sig000016f4 ), + .A3(\blk00000003/blk00000615/sig000016f4 ), + .CE(\blk00000003/blk00000615/sig000016fd ), + .CLK(clk), + .D(\blk00000003/sig000005ef ), + .Q(\blk00000003/blk00000615/sig000016f9 ), + .Q15(\NLW_blk00000003/blk00000615/blk00000623_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000615/blk00000622 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk00000615/sig000016f4 ), + .A2(\blk00000003/blk00000615/sig000016f4 ), + .A3(\blk00000003/blk00000615/sig000016f4 ), + .CE(\blk00000003/blk00000615/sig000016fd ), + .CLK(clk), + .D(\blk00000003/sig000005f0 ), + .Q(\blk00000003/blk00000615/sig000016f8 ), + .Q15(\NLW_blk00000003/blk00000615/blk00000622_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000615/blk00000621 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk00000615/sig000016f4 ), + .A2(\blk00000003/blk00000615/sig000016f4 ), + .A3(\blk00000003/blk00000615/sig000016f4 ), + .CE(\blk00000003/blk00000615/sig000016fd ), + .CLK(clk), + .D(\blk00000003/sig000005f1 ), + .Q(\blk00000003/blk00000615/sig000016f7 ), + .Q15(\NLW_blk00000003/blk00000615/blk00000621_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000615/blk00000620 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk00000615/sig000016f4 ), + .A2(\blk00000003/blk00000615/sig000016f4 ), + .A3(\blk00000003/blk00000615/sig000016f4 ), + .CE(\blk00000003/blk00000615/sig000016fd ), + .CLK(clk), + .D(\blk00000003/sig000005f2 ), + .Q(\blk00000003/blk00000615/sig000016f6 ), + .Q15(\NLW_blk00000003/blk00000615/blk00000620_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000615/blk0000061f ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk00000615/sig000016f4 ), + .A2(\blk00000003/blk00000615/sig000016f4 ), + .A3(\blk00000003/blk00000615/sig000016f4 ), + .CE(\blk00000003/blk00000615/sig000016fd ), + .CLK(clk), + .D(\blk00000003/sig000005f3 ), + .Q(\blk00000003/blk00000615/sig000016f5 ), + .Q15(\NLW_blk00000003/blk00000615/blk0000061f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000615/blk0000061e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000615/sig000016fc ), + .Q(\blk00000003/sig0000063e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000615/blk0000061d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000615/sig000016fb ), + .Q(\blk00000003/sig0000063f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000615/blk0000061c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000615/sig000016fa ), + .Q(\blk00000003/sig00000640 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000615/blk0000061b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000615/sig000016f9 ), + .Q(\blk00000003/sig00000641 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000615/blk0000061a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000615/sig000016f8 ), + .Q(\blk00000003/sig00000642 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000615/blk00000619 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000615/sig000016f7 ), + .Q(\blk00000003/sig00000643 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000615/blk00000618 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000615/sig000016f6 ), + .Q(\blk00000003/sig00000644 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000615/blk00000617 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000615/sig000016f5 ), + .Q(\blk00000003/sig00000645 ) + ); + GND \blk00000003/blk00000615/blk00000616 ( + .G(\blk00000003/blk00000615/sig000016f4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000628/blk0000063a ( + .I0(\blk00000003/sig000009f7 ), + .I1(ce), + .O(\blk00000003/blk00000628/sig0000171b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628/blk00000639 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000628/sig00001712 ), + .A2(\blk00000003/blk00000628/sig00001712 ), + .A3(\blk00000003/blk00000628/sig00001712 ), + .CE(\blk00000003/blk00000628/sig0000171b ), + .CLK(clk), + .D(\blk00000003/sig00000b73 ), + .Q(\blk00000003/blk00000628/sig0000171a ), + .Q15(\NLW_blk00000003/blk00000628/blk00000639_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628/blk00000638 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000628/sig00001712 ), + .A2(\blk00000003/blk00000628/sig00001712 ), + .A3(\blk00000003/blk00000628/sig00001712 ), + .CE(\blk00000003/blk00000628/sig0000171b ), + .CLK(clk), + .D(\blk00000003/sig00000b74 ), + .Q(\blk00000003/blk00000628/sig00001719 ), + .Q15(\NLW_blk00000003/blk00000628/blk00000638_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628/blk00000637 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000628/sig00001712 ), + .A2(\blk00000003/blk00000628/sig00001712 ), + .A3(\blk00000003/blk00000628/sig00001712 ), + .CE(\blk00000003/blk00000628/sig0000171b ), + .CLK(clk), + .D(\blk00000003/sig00000b75 ), + .Q(\blk00000003/blk00000628/sig00001718 ), + .Q15(\NLW_blk00000003/blk00000628/blk00000637_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628/blk00000636 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000628/sig00001712 ), + .A2(\blk00000003/blk00000628/sig00001712 ), + .A3(\blk00000003/blk00000628/sig00001712 ), + .CE(\blk00000003/blk00000628/sig0000171b ), + .CLK(clk), + .D(\blk00000003/sig00000b76 ), + .Q(\blk00000003/blk00000628/sig00001717 ), + .Q15(\NLW_blk00000003/blk00000628/blk00000636_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628/blk00000635 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000628/sig00001712 ), + .A2(\blk00000003/blk00000628/sig00001712 ), + .A3(\blk00000003/blk00000628/sig00001712 ), + .CE(\blk00000003/blk00000628/sig0000171b ), + .CLK(clk), + .D(\blk00000003/sig00000b77 ), + .Q(\blk00000003/blk00000628/sig00001716 ), + .Q15(\NLW_blk00000003/blk00000628/blk00000635_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628/blk00000634 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000628/sig00001712 ), + .A2(\blk00000003/blk00000628/sig00001712 ), + .A3(\blk00000003/blk00000628/sig00001712 ), + .CE(\blk00000003/blk00000628/sig0000171b ), + .CLK(clk), + .D(\blk00000003/sig00000b78 ), + .Q(\blk00000003/blk00000628/sig00001715 ), + .Q15(\NLW_blk00000003/blk00000628/blk00000634_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628/blk00000633 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000628/sig00001712 ), + .A2(\blk00000003/blk00000628/sig00001712 ), + .A3(\blk00000003/blk00000628/sig00001712 ), + .CE(\blk00000003/blk00000628/sig0000171b ), + .CLK(clk), + .D(\blk00000003/sig00000b79 ), + .Q(\blk00000003/blk00000628/sig00001714 ), + .Q15(\NLW_blk00000003/blk00000628/blk00000633_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000628/blk00000632 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk00000628/sig00001712 ), + .A2(\blk00000003/blk00000628/sig00001712 ), + .A3(\blk00000003/blk00000628/sig00001712 ), + .CE(\blk00000003/blk00000628/sig0000171b ), + .CLK(clk), + .D(\blk00000003/sig00000b7a ), + .Q(\blk00000003/blk00000628/sig00001713 ), + .Q15(\NLW_blk00000003/blk00000628/blk00000632_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000628/blk00000631 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000628/sig0000171a ), + .Q(\blk00000003/sig00000636 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000628/blk00000630 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000628/sig00001719 ), + .Q(\blk00000003/sig00000637 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000628/blk0000062f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000628/sig00001718 ), + .Q(\blk00000003/sig00000638 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000628/blk0000062e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000628/sig00001717 ), + .Q(\blk00000003/sig00000639 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000628/blk0000062d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000628/sig00001716 ), + .Q(\blk00000003/sig0000063a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000628/blk0000062c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000628/sig00001715 ), + .Q(\blk00000003/sig0000063b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000628/blk0000062b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000628/sig00001714 ), + .Q(\blk00000003/sig0000063c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000628/blk0000062a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000628/sig00001713 ), + .Q(\blk00000003/sig0000063d ) + ); + GND \blk00000003/blk00000628/blk00000629 ( + .G(\blk00000003/blk00000628/sig00001712 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000063b/blk0000064d ( + .I0(\blk00000003/sig000009f9 ), + .I1(ce), + .O(\blk00000003/blk0000063b/sig00001739 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063b/blk0000064c ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000063b/sig00001730 ), + .A2(\blk00000003/blk0000063b/sig00001730 ), + .A3(\blk00000003/blk0000063b/sig00001730 ), + .CE(\blk00000003/blk0000063b/sig00001739 ), + .CLK(clk), + .D(\blk00000003/sig000006e0 ), + .Q(\blk00000003/blk0000063b/sig00001738 ), + .Q15(\NLW_blk00000003/blk0000063b/blk0000064c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063b/blk0000064b ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000063b/sig00001730 ), + .A2(\blk00000003/blk0000063b/sig00001730 ), + .A3(\blk00000003/blk0000063b/sig00001730 ), + .CE(\blk00000003/blk0000063b/sig00001739 ), + .CLK(clk), + .D(\blk00000003/sig000006e1 ), + .Q(\blk00000003/blk0000063b/sig00001737 ), + .Q15(\NLW_blk00000003/blk0000063b/blk0000064b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063b/blk0000064a ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000063b/sig00001730 ), + .A2(\blk00000003/blk0000063b/sig00001730 ), + .A3(\blk00000003/blk0000063b/sig00001730 ), + .CE(\blk00000003/blk0000063b/sig00001739 ), + .CLK(clk), + .D(\blk00000003/sig000006e2 ), + .Q(\blk00000003/blk0000063b/sig00001736 ), + .Q15(\NLW_blk00000003/blk0000063b/blk0000064a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063b/blk00000649 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000063b/sig00001730 ), + .A2(\blk00000003/blk0000063b/sig00001730 ), + .A3(\blk00000003/blk0000063b/sig00001730 ), + .CE(\blk00000003/blk0000063b/sig00001739 ), + .CLK(clk), + .D(\blk00000003/sig000006e3 ), + .Q(\blk00000003/blk0000063b/sig00001735 ), + .Q15(\NLW_blk00000003/blk0000063b/blk00000649_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063b/blk00000648 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000063b/sig00001730 ), + .A2(\blk00000003/blk0000063b/sig00001730 ), + .A3(\blk00000003/blk0000063b/sig00001730 ), + .CE(\blk00000003/blk0000063b/sig00001739 ), + .CLK(clk), + .D(\blk00000003/sig000006e4 ), + .Q(\blk00000003/blk0000063b/sig00001734 ), + .Q15(\NLW_blk00000003/blk0000063b/blk00000648_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063b/blk00000647 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000063b/sig00001730 ), + .A2(\blk00000003/blk0000063b/sig00001730 ), + .A3(\blk00000003/blk0000063b/sig00001730 ), + .CE(\blk00000003/blk0000063b/sig00001739 ), + .CLK(clk), + .D(\blk00000003/sig000006e5 ), + .Q(\blk00000003/blk0000063b/sig00001733 ), + .Q15(\NLW_blk00000003/blk0000063b/blk00000647_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063b/blk00000646 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000063b/sig00001730 ), + .A2(\blk00000003/blk0000063b/sig00001730 ), + .A3(\blk00000003/blk0000063b/sig00001730 ), + .CE(\blk00000003/blk0000063b/sig00001739 ), + .CLK(clk), + .D(\blk00000003/sig000006e6 ), + .Q(\blk00000003/blk0000063b/sig00001732 ), + .Q15(\NLW_blk00000003/blk0000063b/blk00000646_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000063b/blk00000645 ( + .A0(\blk00000003/sig00000a01 ), + .A1(\blk00000003/blk0000063b/sig00001730 ), + .A2(\blk00000003/blk0000063b/sig00001730 ), + .A3(\blk00000003/blk0000063b/sig00001730 ), + .CE(\blk00000003/blk0000063b/sig00001739 ), + .CLK(clk), + .D(\blk00000003/sig000006e7 ), + .Q(\blk00000003/blk0000063b/sig00001731 ), + .Q15(\NLW_blk00000003/blk0000063b/blk00000645_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b/blk00000644 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000063b/sig00001738 ), + .Q(\blk00000003/sig00000720 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b/blk00000643 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000063b/sig00001737 ), + .Q(\blk00000003/sig00000721 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b/blk00000642 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000063b/sig00001736 ), + .Q(\blk00000003/sig00000722 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b/blk00000641 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000063b/sig00001735 ), + .Q(\blk00000003/sig00000723 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b/blk00000640 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000063b/sig00001734 ), + .Q(\blk00000003/sig00000724 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b/blk0000063f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000063b/sig00001733 ), + .Q(\blk00000003/sig00000725 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b/blk0000063e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000063b/sig00001732 ), + .Q(\blk00000003/sig00000726 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b/blk0000063d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000063b/sig00001731 ), + .Q(\blk00000003/sig00000727 ) + ); + GND \blk00000003/blk0000063b/blk0000063c ( + .G(\blk00000003/blk0000063b/sig00001730 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000064e/blk00000660 ( + .I0(\blk00000003/sig000009f7 ), + .I1(ce), + .O(\blk00000003/blk0000064e/sig00001757 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e/blk0000065f ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk0000064e/sig0000174e ), + .A2(\blk00000003/blk0000064e/sig0000174e ), + .A3(\blk00000003/blk0000064e/sig0000174e ), + .CE(\blk00000003/blk0000064e/sig00001757 ), + .CLK(clk), + .D(\blk00000003/sig00000b7b ), + .Q(\blk00000003/blk0000064e/sig00001756 ), + .Q15(\NLW_blk00000003/blk0000064e/blk0000065f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e/blk0000065e ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk0000064e/sig0000174e ), + .A2(\blk00000003/blk0000064e/sig0000174e ), + .A3(\blk00000003/blk0000064e/sig0000174e ), + .CE(\blk00000003/blk0000064e/sig00001757 ), + .CLK(clk), + .D(\blk00000003/sig00000b7c ), + .Q(\blk00000003/blk0000064e/sig00001755 ), + .Q15(\NLW_blk00000003/blk0000064e/blk0000065e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e/blk0000065d ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk0000064e/sig0000174e ), + .A2(\blk00000003/blk0000064e/sig0000174e ), + .A3(\blk00000003/blk0000064e/sig0000174e ), + .CE(\blk00000003/blk0000064e/sig00001757 ), + .CLK(clk), + .D(\blk00000003/sig00000b7d ), + .Q(\blk00000003/blk0000064e/sig00001754 ), + .Q15(\NLW_blk00000003/blk0000064e/blk0000065d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e/blk0000065c ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk0000064e/sig0000174e ), + .A2(\blk00000003/blk0000064e/sig0000174e ), + .A3(\blk00000003/blk0000064e/sig0000174e ), + .CE(\blk00000003/blk0000064e/sig00001757 ), + .CLK(clk), + .D(\blk00000003/sig00000b7e ), + .Q(\blk00000003/blk0000064e/sig00001753 ), + .Q15(\NLW_blk00000003/blk0000064e/blk0000065c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e/blk0000065b ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk0000064e/sig0000174e ), + .A2(\blk00000003/blk0000064e/sig0000174e ), + .A3(\blk00000003/blk0000064e/sig0000174e ), + .CE(\blk00000003/blk0000064e/sig00001757 ), + .CLK(clk), + .D(\blk00000003/sig00000b7f ), + .Q(\blk00000003/blk0000064e/sig00001752 ), + .Q15(\NLW_blk00000003/blk0000064e/blk0000065b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e/blk0000065a ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk0000064e/sig0000174e ), + .A2(\blk00000003/blk0000064e/sig0000174e ), + .A3(\blk00000003/blk0000064e/sig0000174e ), + .CE(\blk00000003/blk0000064e/sig00001757 ), + .CLK(clk), + .D(\blk00000003/sig00000b80 ), + .Q(\blk00000003/blk0000064e/sig00001751 ), + .Q15(\NLW_blk00000003/blk0000064e/blk0000065a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e/blk00000659 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk0000064e/sig0000174e ), + .A2(\blk00000003/blk0000064e/sig0000174e ), + .A3(\blk00000003/blk0000064e/sig0000174e ), + .CE(\blk00000003/blk0000064e/sig00001757 ), + .CLK(clk), + .D(\blk00000003/sig00000b81 ), + .Q(\blk00000003/blk0000064e/sig00001750 ), + .Q15(\NLW_blk00000003/blk0000064e/blk00000659_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000064e/blk00000658 ( + .A0(\blk00000003/sig000009ff ), + .A1(\blk00000003/blk0000064e/sig0000174e ), + .A2(\blk00000003/blk0000064e/sig0000174e ), + .A3(\blk00000003/blk0000064e/sig0000174e ), + .CE(\blk00000003/blk0000064e/sig00001757 ), + .CLK(clk), + .D(\blk00000003/sig00000b82 ), + .Q(\blk00000003/blk0000064e/sig0000174f ), + .Q15(\NLW_blk00000003/blk0000064e/blk00000658_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064e/blk00000657 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000064e/sig00001756 ), + .Q(\blk00000003/sig00000718 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064e/blk00000656 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000064e/sig00001755 ), + .Q(\blk00000003/sig00000719 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064e/blk00000655 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000064e/sig00001754 ), + .Q(\blk00000003/sig0000071a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064e/blk00000654 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000064e/sig00001753 ), + .Q(\blk00000003/sig0000071b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064e/blk00000653 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000064e/sig00001752 ), + .Q(\blk00000003/sig0000071c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064e/blk00000652 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000064e/sig00001751 ), + .Q(\blk00000003/sig0000071d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064e/blk00000651 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000064e/sig00001750 ), + .Q(\blk00000003/sig0000071e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064e/blk00000650 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000064e/sig0000174f ), + .Q(\blk00000003/sig0000071f ) + ); + GND \blk00000003/blk0000064e/blk0000064f ( + .G(\blk00000003/blk0000064e/sig0000174e ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000661/blk00000673 ( + .I0(\blk00000003/sig00000a06 ), + .I1(ce), + .O(\blk00000003/blk00000661/sig00001775 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000661/blk00000672 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000661/sig0000176c ), + .A2(\blk00000003/blk00000661/sig0000176c ), + .A3(\blk00000003/blk00000661/sig0000176c ), + .CE(\blk00000003/blk00000661/sig00001775 ), + .CLK(clk), + .D(\blk00000003/sig0000059a ), + .Q(\blk00000003/blk00000661/sig00001774 ), + .Q15(\NLW_blk00000003/blk00000661/blk00000672_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000661/blk00000671 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000661/sig0000176c ), + .A2(\blk00000003/blk00000661/sig0000176c ), + .A3(\blk00000003/blk00000661/sig0000176c ), + .CE(\blk00000003/blk00000661/sig00001775 ), + .CLK(clk), + .D(\blk00000003/sig0000059b ), + .Q(\blk00000003/blk00000661/sig00001773 ), + .Q15(\NLW_blk00000003/blk00000661/blk00000671_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000661/blk00000670 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000661/sig0000176c ), + .A2(\blk00000003/blk00000661/sig0000176c ), + .A3(\blk00000003/blk00000661/sig0000176c ), + .CE(\blk00000003/blk00000661/sig00001775 ), + .CLK(clk), + .D(\blk00000003/sig0000059c ), + .Q(\blk00000003/blk00000661/sig00001772 ), + .Q15(\NLW_blk00000003/blk00000661/blk00000670_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000661/blk0000066f ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000661/sig0000176c ), + .A2(\blk00000003/blk00000661/sig0000176c ), + .A3(\blk00000003/blk00000661/sig0000176c ), + .CE(\blk00000003/blk00000661/sig00001775 ), + .CLK(clk), + .D(\blk00000003/sig0000059d ), + .Q(\blk00000003/blk00000661/sig00001771 ), + .Q15(\NLW_blk00000003/blk00000661/blk0000066f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000661/blk0000066e ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000661/sig0000176c ), + .A2(\blk00000003/blk00000661/sig0000176c ), + .A3(\blk00000003/blk00000661/sig0000176c ), + .CE(\blk00000003/blk00000661/sig00001775 ), + .CLK(clk), + .D(\blk00000003/sig0000059e ), + .Q(\blk00000003/blk00000661/sig00001770 ), + .Q15(\NLW_blk00000003/blk00000661/blk0000066e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000661/blk0000066d ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000661/sig0000176c ), + .A2(\blk00000003/blk00000661/sig0000176c ), + .A3(\blk00000003/blk00000661/sig0000176c ), + .CE(\blk00000003/blk00000661/sig00001775 ), + .CLK(clk), + .D(\blk00000003/sig0000059f ), + .Q(\blk00000003/blk00000661/sig0000176f ), + .Q15(\NLW_blk00000003/blk00000661/blk0000066d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000661/blk0000066c ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000661/sig0000176c ), + .A2(\blk00000003/blk00000661/sig0000176c ), + .A3(\blk00000003/blk00000661/sig0000176c ), + .CE(\blk00000003/blk00000661/sig00001775 ), + .CLK(clk), + .D(\blk00000003/sig000005a0 ), + .Q(\blk00000003/blk00000661/sig0000176e ), + .Q15(\NLW_blk00000003/blk00000661/blk0000066c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000661/blk0000066b ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000661/sig0000176c ), + .A2(\blk00000003/blk00000661/sig0000176c ), + .A3(\blk00000003/blk00000661/sig0000176c ), + .CE(\blk00000003/blk00000661/sig00001775 ), + .CLK(clk), + .D(\blk00000003/sig000005a1 ), + .Q(\blk00000003/blk00000661/sig0000176d ), + .Q15(\NLW_blk00000003/blk00000661/blk0000066b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000661/blk0000066a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000661/sig00001774 ), + .Q(\blk00000003/sig000005ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000661/blk00000669 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000661/sig00001773 ), + .Q(\blk00000003/sig000005ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000661/blk00000668 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000661/sig00001772 ), + .Q(\blk00000003/sig000005ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000661/blk00000667 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000661/sig00001771 ), + .Q(\blk00000003/sig000005ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000661/blk00000666 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000661/sig00001770 ), + .Q(\blk00000003/sig000005f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000661/blk00000665 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000661/sig0000176f ), + .Q(\blk00000003/sig000005f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000661/blk00000664 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000661/sig0000176e ), + .Q(\blk00000003/sig000005f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000661/blk00000663 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000661/sig0000176d ), + .Q(\blk00000003/sig000005f3 ) + ); + GND \blk00000003/blk00000661/blk00000662 ( + .G(\blk00000003/blk00000661/sig0000176c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000674/blk00000686 ( + .I0(\blk00000003/sig00000a03 ), + .I1(ce), + .O(\blk00000003/blk00000674/sig00001793 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000674/blk00000685 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000674/sig0000178a ), + .A2(\blk00000003/blk00000674/sig0000178a ), + .A3(\blk00000003/blk00000674/sig0000178a ), + .CE(\blk00000003/blk00000674/sig00001793 ), + .CLK(clk), + .D(\blk00000003/sig00000b83 ), + .Q(\blk00000003/blk00000674/sig00001792 ), + .Q15(\NLW_blk00000003/blk00000674/blk00000685_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000674/blk00000684 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000674/sig0000178a ), + .A2(\blk00000003/blk00000674/sig0000178a ), + .A3(\blk00000003/blk00000674/sig0000178a ), + .CE(\blk00000003/blk00000674/sig00001793 ), + .CLK(clk), + .D(\blk00000003/sig00000b84 ), + .Q(\blk00000003/blk00000674/sig00001791 ), + .Q15(\NLW_blk00000003/blk00000674/blk00000684_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000674/blk00000683 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000674/sig0000178a ), + .A2(\blk00000003/blk00000674/sig0000178a ), + .A3(\blk00000003/blk00000674/sig0000178a ), + .CE(\blk00000003/blk00000674/sig00001793 ), + .CLK(clk), + .D(\blk00000003/sig00000b85 ), + .Q(\blk00000003/blk00000674/sig00001790 ), + .Q15(\NLW_blk00000003/blk00000674/blk00000683_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000674/blk00000682 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000674/sig0000178a ), + .A2(\blk00000003/blk00000674/sig0000178a ), + .A3(\blk00000003/blk00000674/sig0000178a ), + .CE(\blk00000003/blk00000674/sig00001793 ), + .CLK(clk), + .D(\blk00000003/sig00000b86 ), + .Q(\blk00000003/blk00000674/sig0000178f ), + .Q15(\NLW_blk00000003/blk00000674/blk00000682_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000674/blk00000681 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000674/sig0000178a ), + .A2(\blk00000003/blk00000674/sig0000178a ), + .A3(\blk00000003/blk00000674/sig0000178a ), + .CE(\blk00000003/blk00000674/sig00001793 ), + .CLK(clk), + .D(\blk00000003/sig00000b87 ), + .Q(\blk00000003/blk00000674/sig0000178e ), + .Q15(\NLW_blk00000003/blk00000674/blk00000681_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000674/blk00000680 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000674/sig0000178a ), + .A2(\blk00000003/blk00000674/sig0000178a ), + .A3(\blk00000003/blk00000674/sig0000178a ), + .CE(\blk00000003/blk00000674/sig00001793 ), + .CLK(clk), + .D(\blk00000003/sig00000b88 ), + .Q(\blk00000003/blk00000674/sig0000178d ), + .Q15(\NLW_blk00000003/blk00000674/blk00000680_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000674/blk0000067f ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000674/sig0000178a ), + .A2(\blk00000003/blk00000674/sig0000178a ), + .A3(\blk00000003/blk00000674/sig0000178a ), + .CE(\blk00000003/blk00000674/sig00001793 ), + .CLK(clk), + .D(\blk00000003/sig00000b89 ), + .Q(\blk00000003/blk00000674/sig0000178c ), + .Q15(\NLW_blk00000003/blk00000674/blk0000067f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000674/blk0000067e ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk00000674/sig0000178a ), + .A2(\blk00000003/blk00000674/sig0000178a ), + .A3(\blk00000003/blk00000674/sig0000178a ), + .CE(\blk00000003/blk00000674/sig00001793 ), + .CLK(clk), + .D(\blk00000003/sig00000b8a ), + .Q(\blk00000003/blk00000674/sig0000178b ), + .Q15(\NLW_blk00000003/blk00000674/blk0000067e_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000674/blk0000067d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000674/sig00001792 ), + .Q(\blk00000003/sig000005e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000674/blk0000067c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000674/sig00001791 ), + .Q(\blk00000003/sig000005e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000674/blk0000067b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000674/sig00001790 ), + .Q(\blk00000003/sig000005e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000674/blk0000067a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000674/sig0000178f ), + .Q(\blk00000003/sig000005e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000674/blk00000679 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000674/sig0000178e ), + .Q(\blk00000003/sig000005e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000674/blk00000678 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000674/sig0000178d ), + .Q(\blk00000003/sig000005e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000674/blk00000677 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000674/sig0000178c ), + .Q(\blk00000003/sig000005ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000674/blk00000676 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000674/sig0000178b ), + .Q(\blk00000003/sig000005eb ) + ); + GND \blk00000003/blk00000674/blk00000675 ( + .G(\blk00000003/blk00000674/sig0000178a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000687/blk00000699 ( + .I0(\blk00000003/sig00000a06 ), + .I1(ce), + .O(\blk00000003/blk00000687/sig000017b1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000687/blk00000698 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000687/sig000017a8 ), + .A2(\blk00000003/blk00000687/sig000017a8 ), + .A3(\blk00000003/blk00000687/sig000017a8 ), + .CE(\blk00000003/blk00000687/sig000017b1 ), + .CLK(clk), + .D(\blk00000003/sig000006a0 ), + .Q(\blk00000003/blk00000687/sig000017b0 ), + .Q15(\NLW_blk00000003/blk00000687/blk00000698_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000687/blk00000697 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000687/sig000017a8 ), + .A2(\blk00000003/blk00000687/sig000017a8 ), + .A3(\blk00000003/blk00000687/sig000017a8 ), + .CE(\blk00000003/blk00000687/sig000017b1 ), + .CLK(clk), + .D(\blk00000003/sig000006a1 ), + .Q(\blk00000003/blk00000687/sig000017af ), + .Q15(\NLW_blk00000003/blk00000687/blk00000697_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000687/blk00000696 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000687/sig000017a8 ), + .A2(\blk00000003/blk00000687/sig000017a8 ), + .A3(\blk00000003/blk00000687/sig000017a8 ), + .CE(\blk00000003/blk00000687/sig000017b1 ), + .CLK(clk), + .D(\blk00000003/sig000006a2 ), + .Q(\blk00000003/blk00000687/sig000017ae ), + .Q15(\NLW_blk00000003/blk00000687/blk00000696_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000687/blk00000695 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000687/sig000017a8 ), + .A2(\blk00000003/blk00000687/sig000017a8 ), + .A3(\blk00000003/blk00000687/sig000017a8 ), + .CE(\blk00000003/blk00000687/sig000017b1 ), + .CLK(clk), + .D(\blk00000003/sig000006a3 ), + .Q(\blk00000003/blk00000687/sig000017ad ), + .Q15(\NLW_blk00000003/blk00000687/blk00000695_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000687/blk00000694 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000687/sig000017a8 ), + .A2(\blk00000003/blk00000687/sig000017a8 ), + .A3(\blk00000003/blk00000687/sig000017a8 ), + .CE(\blk00000003/blk00000687/sig000017b1 ), + .CLK(clk), + .D(\blk00000003/sig000006a4 ), + .Q(\blk00000003/blk00000687/sig000017ac ), + .Q15(\NLW_blk00000003/blk00000687/blk00000694_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000687/blk00000693 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000687/sig000017a8 ), + .A2(\blk00000003/blk00000687/sig000017a8 ), + .A3(\blk00000003/blk00000687/sig000017a8 ), + .CE(\blk00000003/blk00000687/sig000017b1 ), + .CLK(clk), + .D(\blk00000003/sig000006a5 ), + .Q(\blk00000003/blk00000687/sig000017ab ), + .Q15(\NLW_blk00000003/blk00000687/blk00000693_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000687/blk00000692 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000687/sig000017a8 ), + .A2(\blk00000003/blk00000687/sig000017a8 ), + .A3(\blk00000003/blk00000687/sig000017a8 ), + .CE(\blk00000003/blk00000687/sig000017b1 ), + .CLK(clk), + .D(\blk00000003/sig000006a6 ), + .Q(\blk00000003/blk00000687/sig000017aa ), + .Q15(\NLW_blk00000003/blk00000687/blk00000692_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000687/blk00000691 ( + .A0(\blk00000003/sig00000a08 ), + .A1(\blk00000003/blk00000687/sig000017a8 ), + .A2(\blk00000003/blk00000687/sig000017a8 ), + .A3(\blk00000003/blk00000687/sig000017a8 ), + .CE(\blk00000003/blk00000687/sig000017b1 ), + .CLK(clk), + .D(\blk00000003/sig000006a7 ), + .Q(\blk00000003/blk00000687/sig000017a9 ), + .Q15(\NLW_blk00000003/blk00000687/blk00000691_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000687/blk00000690 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000687/sig000017b0 ), + .Q(\blk00000003/sig000006e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000687/blk0000068f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000687/sig000017af ), + .Q(\blk00000003/sig000006e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000687/blk0000068e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000687/sig000017ae ), + .Q(\blk00000003/sig000006e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000687/blk0000068d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000687/sig000017ad ), + .Q(\blk00000003/sig000006e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000687/blk0000068c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000687/sig000017ac ), + .Q(\blk00000003/sig000006e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000687/blk0000068b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000687/sig000017ab ), + .Q(\blk00000003/sig000006e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000687/blk0000068a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000687/sig000017aa ), + .Q(\blk00000003/sig000006e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000687/blk00000689 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000687/sig000017a9 ), + .Q(\blk00000003/sig000006e7 ) + ); + GND \blk00000003/blk00000687/blk00000688 ( + .G(\blk00000003/blk00000687/sig000017a8 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000069a/blk000006ac ( + .I0(\blk00000003/sig00000a03 ), + .I1(ce), + .O(\blk00000003/blk0000069a/sig000017cf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069a/blk000006ab ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk0000069a/sig000017c6 ), + .A2(\blk00000003/blk0000069a/sig000017c6 ), + .A3(\blk00000003/blk0000069a/sig000017c6 ), + .CE(\blk00000003/blk0000069a/sig000017cf ), + .CLK(clk), + .D(\blk00000003/sig00000b8b ), + .Q(\blk00000003/blk0000069a/sig000017ce ), + .Q15(\NLW_blk00000003/blk0000069a/blk000006ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069a/blk000006aa ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk0000069a/sig000017c6 ), + .A2(\blk00000003/blk0000069a/sig000017c6 ), + .A3(\blk00000003/blk0000069a/sig000017c6 ), + .CE(\blk00000003/blk0000069a/sig000017cf ), + .CLK(clk), + .D(\blk00000003/sig00000b8c ), + .Q(\blk00000003/blk0000069a/sig000017cd ), + .Q15(\NLW_blk00000003/blk0000069a/blk000006aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069a/blk000006a9 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk0000069a/sig000017c6 ), + .A2(\blk00000003/blk0000069a/sig000017c6 ), + .A3(\blk00000003/blk0000069a/sig000017c6 ), + .CE(\blk00000003/blk0000069a/sig000017cf ), + .CLK(clk), + .D(\blk00000003/sig00000b8d ), + .Q(\blk00000003/blk0000069a/sig000017cc ), + .Q15(\NLW_blk00000003/blk0000069a/blk000006a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069a/blk000006a8 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk0000069a/sig000017c6 ), + .A2(\blk00000003/blk0000069a/sig000017c6 ), + .A3(\blk00000003/blk0000069a/sig000017c6 ), + .CE(\blk00000003/blk0000069a/sig000017cf ), + .CLK(clk), + .D(\blk00000003/sig00000b8e ), + .Q(\blk00000003/blk0000069a/sig000017cb ), + .Q15(\NLW_blk00000003/blk0000069a/blk000006a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069a/blk000006a7 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk0000069a/sig000017c6 ), + .A2(\blk00000003/blk0000069a/sig000017c6 ), + .A3(\blk00000003/blk0000069a/sig000017c6 ), + .CE(\blk00000003/blk0000069a/sig000017cf ), + .CLK(clk), + .D(\blk00000003/sig00000b8f ), + .Q(\blk00000003/blk0000069a/sig000017ca ), + .Q15(\NLW_blk00000003/blk0000069a/blk000006a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069a/blk000006a6 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk0000069a/sig000017c6 ), + .A2(\blk00000003/blk0000069a/sig000017c6 ), + .A3(\blk00000003/blk0000069a/sig000017c6 ), + .CE(\blk00000003/blk0000069a/sig000017cf ), + .CLK(clk), + .D(\blk00000003/sig00000b90 ), + .Q(\blk00000003/blk0000069a/sig000017c9 ), + .Q15(\NLW_blk00000003/blk0000069a/blk000006a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069a/blk000006a5 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk0000069a/sig000017c6 ), + .A2(\blk00000003/blk0000069a/sig000017c6 ), + .A3(\blk00000003/blk0000069a/sig000017c6 ), + .CE(\blk00000003/blk0000069a/sig000017cf ), + .CLK(clk), + .D(\blk00000003/sig00000b91 ), + .Q(\blk00000003/blk0000069a/sig000017c8 ), + .Q15(\NLW_blk00000003/blk0000069a/blk000006a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069a/blk000006a4 ( + .A0(\blk00000003/sig00000a07 ), + .A1(\blk00000003/blk0000069a/sig000017c6 ), + .A2(\blk00000003/blk0000069a/sig000017c6 ), + .A3(\blk00000003/blk0000069a/sig000017c6 ), + .CE(\blk00000003/blk0000069a/sig000017cf ), + .CLK(clk), + .D(\blk00000003/sig00000b92 ), + .Q(\blk00000003/blk0000069a/sig000017c7 ), + .Q15(\NLW_blk00000003/blk0000069a/blk000006a4_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069a/blk000006a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000069a/sig000017ce ), + .Q(\blk00000003/sig000006d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069a/blk000006a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000069a/sig000017cd ), + .Q(\blk00000003/sig000006d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069a/blk000006a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000069a/sig000017cc ), + .Q(\blk00000003/sig000006da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069a/blk000006a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000069a/sig000017cb ), + .Q(\blk00000003/sig000006db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069a/blk0000069f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000069a/sig000017ca ), + .Q(\blk00000003/sig000006dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069a/blk0000069e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000069a/sig000017c9 ), + .Q(\blk00000003/sig000006dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069a/blk0000069d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000069a/sig000017c8 ), + .Q(\blk00000003/sig000006de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069a/blk0000069c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000069a/sig000017c7 ), + .Q(\blk00000003/sig000006df ) + ); + GND \blk00000003/blk0000069a/blk0000069b ( + .G(\blk00000003/blk0000069a/sig000017c6 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000006ad/blk000006bf ( + .I0(\blk00000003/sig00000a09 ), + .I1(ce), + .O(\blk00000003/blk000006ad/sig000017ed ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ad/blk000006be ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006ad/sig000017e4 ), + .A2(\blk00000003/blk000006ad/sig000017e4 ), + .A3(\blk00000003/blk000006ad/sig000017e4 ), + .CE(\blk00000003/blk000006ad/sig000017ed ), + .CLK(clk), + .D(\blk00000003/sig00000548 ), + .Q(\blk00000003/blk000006ad/sig000017ec ), + .Q15(\NLW_blk00000003/blk000006ad/blk000006be_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ad/blk000006bd ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006ad/sig000017e4 ), + .A2(\blk00000003/blk000006ad/sig000017e4 ), + .A3(\blk00000003/blk000006ad/sig000017e4 ), + .CE(\blk00000003/blk000006ad/sig000017ed ), + .CLK(clk), + .D(\blk00000003/sig00000549 ), + .Q(\blk00000003/blk000006ad/sig000017eb ), + .Q15(\NLW_blk00000003/blk000006ad/blk000006bd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ad/blk000006bc ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006ad/sig000017e4 ), + .A2(\blk00000003/blk000006ad/sig000017e4 ), + .A3(\blk00000003/blk000006ad/sig000017e4 ), + .CE(\blk00000003/blk000006ad/sig000017ed ), + .CLK(clk), + .D(\blk00000003/sig0000054a ), + .Q(\blk00000003/blk000006ad/sig000017ea ), + .Q15(\NLW_blk00000003/blk000006ad/blk000006bc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ad/blk000006bb ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006ad/sig000017e4 ), + .A2(\blk00000003/blk000006ad/sig000017e4 ), + .A3(\blk00000003/blk000006ad/sig000017e4 ), + .CE(\blk00000003/blk000006ad/sig000017ed ), + .CLK(clk), + .D(\blk00000003/sig0000054b ), + .Q(\blk00000003/blk000006ad/sig000017e9 ), + .Q15(\NLW_blk00000003/blk000006ad/blk000006bb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ad/blk000006ba ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006ad/sig000017e4 ), + .A2(\blk00000003/blk000006ad/sig000017e4 ), + .A3(\blk00000003/blk000006ad/sig000017e4 ), + .CE(\blk00000003/blk000006ad/sig000017ed ), + .CLK(clk), + .D(\blk00000003/sig0000054c ), + .Q(\blk00000003/blk000006ad/sig000017e8 ), + .Q15(\NLW_blk00000003/blk000006ad/blk000006ba_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ad/blk000006b9 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006ad/sig000017e4 ), + .A2(\blk00000003/blk000006ad/sig000017e4 ), + .A3(\blk00000003/blk000006ad/sig000017e4 ), + .CE(\blk00000003/blk000006ad/sig000017ed ), + .CLK(clk), + .D(\blk00000003/sig0000054d ), + .Q(\blk00000003/blk000006ad/sig000017e7 ), + .Q15(\NLW_blk00000003/blk000006ad/blk000006b9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ad/blk000006b8 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006ad/sig000017e4 ), + .A2(\blk00000003/blk000006ad/sig000017e4 ), + .A3(\blk00000003/blk000006ad/sig000017e4 ), + .CE(\blk00000003/blk000006ad/sig000017ed ), + .CLK(clk), + .D(\blk00000003/sig0000054e ), + .Q(\blk00000003/blk000006ad/sig000017e6 ), + .Q15(\NLW_blk00000003/blk000006ad/blk000006b8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ad/blk000006b7 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006ad/sig000017e4 ), + .A2(\blk00000003/blk000006ad/sig000017e4 ), + .A3(\blk00000003/blk000006ad/sig000017e4 ), + .CE(\blk00000003/blk000006ad/sig000017ed ), + .CLK(clk), + .D(\blk00000003/sig0000054f ), + .Q(\blk00000003/blk000006ad/sig000017e5 ), + .Q15(\NLW_blk00000003/blk000006ad/blk000006b7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ad/blk000006b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006ad/sig000017ec ), + .Q(\blk00000003/sig0000059a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ad/blk000006b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006ad/sig000017eb ), + .Q(\blk00000003/sig0000059b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ad/blk000006b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006ad/sig000017ea ), + .Q(\blk00000003/sig0000059c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ad/blk000006b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006ad/sig000017e9 ), + .Q(\blk00000003/sig0000059d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ad/blk000006b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006ad/sig000017e8 ), + .Q(\blk00000003/sig0000059e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ad/blk000006b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006ad/sig000017e7 ), + .Q(\blk00000003/sig0000059f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ad/blk000006b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006ad/sig000017e6 ), + .Q(\blk00000003/sig000005a0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ad/blk000006af ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006ad/sig000017e5 ), + .Q(\blk00000003/sig000005a1 ) + ); + GND \blk00000003/blk000006ad/blk000006ae ( + .G(\blk00000003/blk000006ad/sig000017e4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000006c0/blk000006d2 ( + .I0(\blk00000003/sig00000a0a ), + .I1(ce), + .O(\blk00000003/blk000006c0/sig0000180b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c0/blk000006d1 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006c0/sig00001802 ), + .A2(\blk00000003/blk000006c0/sig00001802 ), + .A3(\blk00000003/blk000006c0/sig00001802 ), + .CE(\blk00000003/blk000006c0/sig0000180b ), + .CLK(clk), + .D(\blk00000003/sig00000b93 ), + .Q(\blk00000003/blk000006c0/sig0000180a ), + .Q15(\NLW_blk00000003/blk000006c0/blk000006d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c0/blk000006d0 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006c0/sig00001802 ), + .A2(\blk00000003/blk000006c0/sig00001802 ), + .A3(\blk00000003/blk000006c0/sig00001802 ), + .CE(\blk00000003/blk000006c0/sig0000180b ), + .CLK(clk), + .D(\blk00000003/sig00000b94 ), + .Q(\blk00000003/blk000006c0/sig00001809 ), + .Q15(\NLW_blk00000003/blk000006c0/blk000006d0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c0/blk000006cf ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006c0/sig00001802 ), + .A2(\blk00000003/blk000006c0/sig00001802 ), + .A3(\blk00000003/blk000006c0/sig00001802 ), + .CE(\blk00000003/blk000006c0/sig0000180b ), + .CLK(clk), + .D(\blk00000003/sig00000b95 ), + .Q(\blk00000003/blk000006c0/sig00001808 ), + .Q15(\NLW_blk00000003/blk000006c0/blk000006cf_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c0/blk000006ce ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006c0/sig00001802 ), + .A2(\blk00000003/blk000006c0/sig00001802 ), + .A3(\blk00000003/blk000006c0/sig00001802 ), + .CE(\blk00000003/blk000006c0/sig0000180b ), + .CLK(clk), + .D(\blk00000003/sig00000b96 ), + .Q(\blk00000003/blk000006c0/sig00001807 ), + .Q15(\NLW_blk00000003/blk000006c0/blk000006ce_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c0/blk000006cd ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006c0/sig00001802 ), + .A2(\blk00000003/blk000006c0/sig00001802 ), + .A3(\blk00000003/blk000006c0/sig00001802 ), + .CE(\blk00000003/blk000006c0/sig0000180b ), + .CLK(clk), + .D(\blk00000003/sig00000b97 ), + .Q(\blk00000003/blk000006c0/sig00001806 ), + .Q15(\NLW_blk00000003/blk000006c0/blk000006cd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c0/blk000006cc ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006c0/sig00001802 ), + .A2(\blk00000003/blk000006c0/sig00001802 ), + .A3(\blk00000003/blk000006c0/sig00001802 ), + .CE(\blk00000003/blk000006c0/sig0000180b ), + .CLK(clk), + .D(\blk00000003/sig00000b98 ), + .Q(\blk00000003/blk000006c0/sig00001805 ), + .Q15(\NLW_blk00000003/blk000006c0/blk000006cc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c0/blk000006cb ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006c0/sig00001802 ), + .A2(\blk00000003/blk000006c0/sig00001802 ), + .A3(\blk00000003/blk000006c0/sig00001802 ), + .CE(\blk00000003/blk000006c0/sig0000180b ), + .CLK(clk), + .D(\blk00000003/sig00000b99 ), + .Q(\blk00000003/blk000006c0/sig00001804 ), + .Q15(\NLW_blk00000003/blk000006c0/blk000006cb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c0/blk000006ca ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006c0/sig00001802 ), + .A2(\blk00000003/blk000006c0/sig00001802 ), + .A3(\blk00000003/blk000006c0/sig00001802 ), + .CE(\blk00000003/blk000006c0/sig0000180b ), + .CLK(clk), + .D(\blk00000003/sig00000b9a ), + .Q(\blk00000003/blk000006c0/sig00001803 ), + .Q15(\NLW_blk00000003/blk000006c0/blk000006ca_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c0/blk000006c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006c0/sig0000180a ), + .Q(\blk00000003/sig00000592 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c0/blk000006c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006c0/sig00001809 ), + .Q(\blk00000003/sig00000593 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c0/blk000006c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006c0/sig00001808 ), + .Q(\blk00000003/sig00000594 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c0/blk000006c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006c0/sig00001807 ), + .Q(\blk00000003/sig00000595 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c0/blk000006c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006c0/sig00001806 ), + .Q(\blk00000003/sig00000596 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c0/blk000006c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006c0/sig00001805 ), + .Q(\blk00000003/sig00000597 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c0/blk000006c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006c0/sig00001804 ), + .Q(\blk00000003/sig00000598 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c0/blk000006c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006c0/sig00001803 ), + .Q(\blk00000003/sig00000599 ) + ); + GND \blk00000003/blk000006c0/blk000006c1 ( + .G(\blk00000003/blk000006c0/sig00001802 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000006d3/blk000006e5 ( + .I0(\blk00000003/sig00000a09 ), + .I1(ce), + .O(\blk00000003/blk000006d3/sig00001829 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d3/blk000006e4 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006d3/sig00001820 ), + .A2(\blk00000003/blk000006d3/sig00001820 ), + .A3(\blk00000003/blk000006d3/sig00001820 ), + .CE(\blk00000003/blk000006d3/sig00001829 ), + .CLK(clk), + .D(\blk00000003/sig00000660 ), + .Q(\blk00000003/blk000006d3/sig00001828 ), + .Q15(\NLW_blk00000003/blk000006d3/blk000006e4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d3/blk000006e3 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006d3/sig00001820 ), + .A2(\blk00000003/blk000006d3/sig00001820 ), + .A3(\blk00000003/blk000006d3/sig00001820 ), + .CE(\blk00000003/blk000006d3/sig00001829 ), + .CLK(clk), + .D(\blk00000003/sig00000661 ), + .Q(\blk00000003/blk000006d3/sig00001827 ), + .Q15(\NLW_blk00000003/blk000006d3/blk000006e3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d3/blk000006e2 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006d3/sig00001820 ), + .A2(\blk00000003/blk000006d3/sig00001820 ), + .A3(\blk00000003/blk000006d3/sig00001820 ), + .CE(\blk00000003/blk000006d3/sig00001829 ), + .CLK(clk), + .D(\blk00000003/sig00000662 ), + .Q(\blk00000003/blk000006d3/sig00001826 ), + .Q15(\NLW_blk00000003/blk000006d3/blk000006e2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d3/blk000006e1 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006d3/sig00001820 ), + .A2(\blk00000003/blk000006d3/sig00001820 ), + .A3(\blk00000003/blk000006d3/sig00001820 ), + .CE(\blk00000003/blk000006d3/sig00001829 ), + .CLK(clk), + .D(\blk00000003/sig00000663 ), + .Q(\blk00000003/blk000006d3/sig00001825 ), + .Q15(\NLW_blk00000003/blk000006d3/blk000006e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d3/blk000006e0 ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006d3/sig00001820 ), + .A2(\blk00000003/blk000006d3/sig00001820 ), + .A3(\blk00000003/blk000006d3/sig00001820 ), + .CE(\blk00000003/blk000006d3/sig00001829 ), + .CLK(clk), + .D(\blk00000003/sig00000664 ), + .Q(\blk00000003/blk000006d3/sig00001824 ), + .Q15(\NLW_blk00000003/blk000006d3/blk000006e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d3/blk000006df ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006d3/sig00001820 ), + .A2(\blk00000003/blk000006d3/sig00001820 ), + .A3(\blk00000003/blk000006d3/sig00001820 ), + .CE(\blk00000003/blk000006d3/sig00001829 ), + .CLK(clk), + .D(\blk00000003/sig00000665 ), + .Q(\blk00000003/blk000006d3/sig00001823 ), + .Q15(\NLW_blk00000003/blk000006d3/blk000006df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d3/blk000006de ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006d3/sig00001820 ), + .A2(\blk00000003/blk000006d3/sig00001820 ), + .A3(\blk00000003/blk000006d3/sig00001820 ), + .CE(\blk00000003/blk000006d3/sig00001829 ), + .CLK(clk), + .D(\blk00000003/sig00000666 ), + .Q(\blk00000003/blk000006d3/sig00001822 ), + .Q15(\NLW_blk00000003/blk000006d3/blk000006de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d3/blk000006dd ( + .A0(\blk00000003/sig00000a0e ), + .A1(\blk00000003/blk000006d3/sig00001820 ), + .A2(\blk00000003/blk000006d3/sig00001820 ), + .A3(\blk00000003/blk000006d3/sig00001820 ), + .CE(\blk00000003/blk000006d3/sig00001829 ), + .CLK(clk), + .D(\blk00000003/sig00000667 ), + .Q(\blk00000003/blk000006d3/sig00001821 ), + .Q15(\NLW_blk00000003/blk000006d3/blk000006dd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d3/blk000006dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006d3/sig00001828 ), + .Q(\blk00000003/sig000006a0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d3/blk000006db ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006d3/sig00001827 ), + .Q(\blk00000003/sig000006a1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d3/blk000006da ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006d3/sig00001826 ), + .Q(\blk00000003/sig000006a2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d3/blk000006d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006d3/sig00001825 ), + .Q(\blk00000003/sig000006a3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d3/blk000006d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006d3/sig00001824 ), + .Q(\blk00000003/sig000006a4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d3/blk000006d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006d3/sig00001823 ), + .Q(\blk00000003/sig000006a5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d3/blk000006d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006d3/sig00001822 ), + .Q(\blk00000003/sig000006a6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d3/blk000006d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006d3/sig00001821 ), + .Q(\blk00000003/sig000006a7 ) + ); + GND \blk00000003/blk000006d3/blk000006d4 ( + .G(\blk00000003/blk000006d3/sig00001820 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000006e6/blk000006f8 ( + .I0(\blk00000003/sig00000a0a ), + .I1(ce), + .O(\blk00000003/blk000006e6/sig00001847 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e6/blk000006f7 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006e6/sig0000183e ), + .A2(\blk00000003/blk000006e6/sig0000183e ), + .A3(\blk00000003/blk000006e6/sig0000183e ), + .CE(\blk00000003/blk000006e6/sig00001847 ), + .CLK(clk), + .D(\blk00000003/sig00000b9b ), + .Q(\blk00000003/blk000006e6/sig00001846 ), + .Q15(\NLW_blk00000003/blk000006e6/blk000006f7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e6/blk000006f6 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006e6/sig0000183e ), + .A2(\blk00000003/blk000006e6/sig0000183e ), + .A3(\blk00000003/blk000006e6/sig0000183e ), + .CE(\blk00000003/blk000006e6/sig00001847 ), + .CLK(clk), + .D(\blk00000003/sig00000b9c ), + .Q(\blk00000003/blk000006e6/sig00001845 ), + .Q15(\NLW_blk00000003/blk000006e6/blk000006f6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e6/blk000006f5 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006e6/sig0000183e ), + .A2(\blk00000003/blk000006e6/sig0000183e ), + .A3(\blk00000003/blk000006e6/sig0000183e ), + .CE(\blk00000003/blk000006e6/sig00001847 ), + .CLK(clk), + .D(\blk00000003/sig00000b9d ), + .Q(\blk00000003/blk000006e6/sig00001844 ), + .Q15(\NLW_blk00000003/blk000006e6/blk000006f5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e6/blk000006f4 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006e6/sig0000183e ), + .A2(\blk00000003/blk000006e6/sig0000183e ), + .A3(\blk00000003/blk000006e6/sig0000183e ), + .CE(\blk00000003/blk000006e6/sig00001847 ), + .CLK(clk), + .D(\blk00000003/sig00000b9e ), + .Q(\blk00000003/blk000006e6/sig00001843 ), + .Q15(\NLW_blk00000003/blk000006e6/blk000006f4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e6/blk000006f3 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006e6/sig0000183e ), + .A2(\blk00000003/blk000006e6/sig0000183e ), + .A3(\blk00000003/blk000006e6/sig0000183e ), + .CE(\blk00000003/blk000006e6/sig00001847 ), + .CLK(clk), + .D(\blk00000003/sig00000b9f ), + .Q(\blk00000003/blk000006e6/sig00001842 ), + .Q15(\NLW_blk00000003/blk000006e6/blk000006f3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e6/blk000006f2 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006e6/sig0000183e ), + .A2(\blk00000003/blk000006e6/sig0000183e ), + .A3(\blk00000003/blk000006e6/sig0000183e ), + .CE(\blk00000003/blk000006e6/sig00001847 ), + .CLK(clk), + .D(\blk00000003/sig00000ba0 ), + .Q(\blk00000003/blk000006e6/sig00001841 ), + .Q15(\NLW_blk00000003/blk000006e6/blk000006f2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e6/blk000006f1 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006e6/sig0000183e ), + .A2(\blk00000003/blk000006e6/sig0000183e ), + .A3(\blk00000003/blk000006e6/sig0000183e ), + .CE(\blk00000003/blk000006e6/sig00001847 ), + .CLK(clk), + .D(\blk00000003/sig00000ba1 ), + .Q(\blk00000003/blk000006e6/sig00001840 ), + .Q15(\NLW_blk00000003/blk000006e6/blk000006f1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e6/blk000006f0 ( + .A0(\blk00000003/sig00000a0d ), + .A1(\blk00000003/blk000006e6/sig0000183e ), + .A2(\blk00000003/blk000006e6/sig0000183e ), + .A3(\blk00000003/blk000006e6/sig0000183e ), + .CE(\blk00000003/blk000006e6/sig00001847 ), + .CLK(clk), + .D(\blk00000003/sig00000ba2 ), + .Q(\blk00000003/blk000006e6/sig0000183f ), + .Q15(\NLW_blk00000003/blk000006e6/blk000006f0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e6/blk000006ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006e6/sig00001846 ), + .Q(\blk00000003/sig00000698 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e6/blk000006ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006e6/sig00001845 ), + .Q(\blk00000003/sig00000699 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e6/blk000006ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006e6/sig00001844 ), + .Q(\blk00000003/sig0000069a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e6/blk000006ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006e6/sig00001843 ), + .Q(\blk00000003/sig0000069b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e6/blk000006eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006e6/sig00001842 ), + .Q(\blk00000003/sig0000069c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e6/blk000006ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006e6/sig00001841 ), + .Q(\blk00000003/sig0000069d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e6/blk000006e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006e6/sig00001840 ), + .Q(\blk00000003/sig0000069e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e6/blk000006e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006e6/sig0000183f ), + .Q(\blk00000003/sig0000069f ) + ); + GND \blk00000003/blk000006e6/blk000006e7 ( + .G(\blk00000003/blk000006e6/sig0000183e ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000006f9/blk0000070b ( + .I0(\blk00000003/sig00000a10 ), + .I1(ce), + .O(\blk00000003/blk000006f9/sig00001865 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f9/blk0000070a ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000006f9/sig0000185c ), + .A2(\blk00000003/blk000006f9/sig0000185c ), + .A3(\blk00000003/blk000006f9/sig0000185c ), + .CE(\blk00000003/blk000006f9/sig00001865 ), + .CLK(clk), + .D(\blk00000003/sig00000384 ), + .Q(\blk00000003/blk000006f9/sig00001864 ), + .Q15(\NLW_blk00000003/blk000006f9/blk0000070a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f9/blk00000709 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000006f9/sig0000185c ), + .A2(\blk00000003/blk000006f9/sig0000185c ), + .A3(\blk00000003/blk000006f9/sig0000185c ), + .CE(\blk00000003/blk000006f9/sig00001865 ), + .CLK(clk), + .D(\blk00000003/sig00000385 ), + .Q(\blk00000003/blk000006f9/sig00001863 ), + .Q15(\NLW_blk00000003/blk000006f9/blk00000709_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f9/blk00000708 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000006f9/sig0000185c ), + .A2(\blk00000003/blk000006f9/sig0000185c ), + .A3(\blk00000003/blk000006f9/sig0000185c ), + .CE(\blk00000003/blk000006f9/sig00001865 ), + .CLK(clk), + .D(\blk00000003/sig00000386 ), + .Q(\blk00000003/blk000006f9/sig00001862 ), + .Q15(\NLW_blk00000003/blk000006f9/blk00000708_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f9/blk00000707 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000006f9/sig0000185c ), + .A2(\blk00000003/blk000006f9/sig0000185c ), + .A3(\blk00000003/blk000006f9/sig0000185c ), + .CE(\blk00000003/blk000006f9/sig00001865 ), + .CLK(clk), + .D(\blk00000003/sig00000387 ), + .Q(\blk00000003/blk000006f9/sig00001861 ), + .Q15(\NLW_blk00000003/blk000006f9/blk00000707_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f9/blk00000706 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000006f9/sig0000185c ), + .A2(\blk00000003/blk000006f9/sig0000185c ), + .A3(\blk00000003/blk000006f9/sig0000185c ), + .CE(\blk00000003/blk000006f9/sig00001865 ), + .CLK(clk), + .D(\blk00000003/sig00000388 ), + .Q(\blk00000003/blk000006f9/sig00001860 ), + .Q15(\NLW_blk00000003/blk000006f9/blk00000706_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f9/blk00000705 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000006f9/sig0000185c ), + .A2(\blk00000003/blk000006f9/sig0000185c ), + .A3(\blk00000003/blk000006f9/sig0000185c ), + .CE(\blk00000003/blk000006f9/sig00001865 ), + .CLK(clk), + .D(\blk00000003/sig00000389 ), + .Q(\blk00000003/blk000006f9/sig0000185f ), + .Q15(\NLW_blk00000003/blk000006f9/blk00000705_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f9/blk00000704 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000006f9/sig0000185c ), + .A2(\blk00000003/blk000006f9/sig0000185c ), + .A3(\blk00000003/blk000006f9/sig0000185c ), + .CE(\blk00000003/blk000006f9/sig00001865 ), + .CLK(clk), + .D(\blk00000003/sig0000038a ), + .Q(\blk00000003/blk000006f9/sig0000185e ), + .Q15(\NLW_blk00000003/blk000006f9/blk00000704_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f9/blk00000703 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk000006f9/sig0000185c ), + .A2(\blk00000003/blk000006f9/sig0000185c ), + .A3(\blk00000003/blk000006f9/sig0000185c ), + .CE(\blk00000003/blk000006f9/sig00001865 ), + .CLK(clk), + .D(\blk00000003/sig0000038b ), + .Q(\blk00000003/blk000006f9/sig0000185d ), + .Q15(\NLW_blk00000003/blk000006f9/blk00000703_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f9/blk00000702 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006f9/sig00001864 ), + .Q(\blk00000003/sig00000548 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f9/blk00000701 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006f9/sig00001863 ), + .Q(\blk00000003/sig00000549 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f9/blk00000700 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006f9/sig00001862 ), + .Q(\blk00000003/sig0000054a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f9/blk000006ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006f9/sig00001861 ), + .Q(\blk00000003/sig0000054b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f9/blk000006fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006f9/sig00001860 ), + .Q(\blk00000003/sig0000054c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f9/blk000006fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006f9/sig0000185f ), + .Q(\blk00000003/sig0000054d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f9/blk000006fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006f9/sig0000185e ), + .Q(\blk00000003/sig0000054e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f9/blk000006fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000006f9/sig0000185d ), + .Q(\blk00000003/sig0000054f ) + ); + GND \blk00000003/blk000006f9/blk000006fa ( + .G(\blk00000003/blk000006f9/sig0000185c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000070c/blk0000071e ( + .I0(\blk00000003/sig00000a0f ), + .I1(ce), + .O(\blk00000003/blk0000070c/sig00001883 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070c/blk0000071d ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk0000070c/sig0000187a ), + .A2(\blk00000003/blk0000070c/sig0000187a ), + .A3(\blk00000003/blk0000070c/sig0000187a ), + .CE(\blk00000003/blk0000070c/sig00001883 ), + .CLK(clk), + .D(\blk00000003/sig00000ba3 ), + .Q(\blk00000003/blk0000070c/sig00001882 ), + .Q15(\NLW_blk00000003/blk0000070c/blk0000071d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070c/blk0000071c ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk0000070c/sig0000187a ), + .A2(\blk00000003/blk0000070c/sig0000187a ), + .A3(\blk00000003/blk0000070c/sig0000187a ), + .CE(\blk00000003/blk0000070c/sig00001883 ), + .CLK(clk), + .D(\blk00000003/sig00000ba4 ), + .Q(\blk00000003/blk0000070c/sig00001881 ), + .Q15(\NLW_blk00000003/blk0000070c/blk0000071c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070c/blk0000071b ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk0000070c/sig0000187a ), + .A2(\blk00000003/blk0000070c/sig0000187a ), + .A3(\blk00000003/blk0000070c/sig0000187a ), + .CE(\blk00000003/blk0000070c/sig00001883 ), + .CLK(clk), + .D(\blk00000003/sig00000ba5 ), + .Q(\blk00000003/blk0000070c/sig00001880 ), + .Q15(\NLW_blk00000003/blk0000070c/blk0000071b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070c/blk0000071a ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk0000070c/sig0000187a ), + .A2(\blk00000003/blk0000070c/sig0000187a ), + .A3(\blk00000003/blk0000070c/sig0000187a ), + .CE(\blk00000003/blk0000070c/sig00001883 ), + .CLK(clk), + .D(\blk00000003/sig00000ba6 ), + .Q(\blk00000003/blk0000070c/sig0000187f ), + .Q15(\NLW_blk00000003/blk0000070c/blk0000071a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070c/blk00000719 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk0000070c/sig0000187a ), + .A2(\blk00000003/blk0000070c/sig0000187a ), + .A3(\blk00000003/blk0000070c/sig0000187a ), + .CE(\blk00000003/blk0000070c/sig00001883 ), + .CLK(clk), + .D(\blk00000003/sig00000ba7 ), + .Q(\blk00000003/blk0000070c/sig0000187e ), + .Q15(\NLW_blk00000003/blk0000070c/blk00000719_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070c/blk00000718 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk0000070c/sig0000187a ), + .A2(\blk00000003/blk0000070c/sig0000187a ), + .A3(\blk00000003/blk0000070c/sig0000187a ), + .CE(\blk00000003/blk0000070c/sig00001883 ), + .CLK(clk), + .D(\blk00000003/sig00000ba8 ), + .Q(\blk00000003/blk0000070c/sig0000187d ), + .Q15(\NLW_blk00000003/blk0000070c/blk00000718_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070c/blk00000717 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk0000070c/sig0000187a ), + .A2(\blk00000003/blk0000070c/sig0000187a ), + .A3(\blk00000003/blk0000070c/sig0000187a ), + .CE(\blk00000003/blk0000070c/sig00001883 ), + .CLK(clk), + .D(\blk00000003/sig00000ba9 ), + .Q(\blk00000003/blk0000070c/sig0000187c ), + .Q15(\NLW_blk00000003/blk0000070c/blk00000717_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070c/blk00000716 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk0000070c/sig0000187a ), + .A2(\blk00000003/blk0000070c/sig0000187a ), + .A3(\blk00000003/blk0000070c/sig0000187a ), + .CE(\blk00000003/blk0000070c/sig00001883 ), + .CLK(clk), + .D(\blk00000003/sig00000baa ), + .Q(\blk00000003/blk0000070c/sig0000187b ), + .Q15(\NLW_blk00000003/blk0000070c/blk00000716_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070c/blk00000715 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000070c/sig00001882 ), + .Q(\blk00000003/sig00000540 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070c/blk00000714 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000070c/sig00001881 ), + .Q(\blk00000003/sig00000541 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070c/blk00000713 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000070c/sig00001880 ), + .Q(\blk00000003/sig00000542 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070c/blk00000712 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000070c/sig0000187f ), + .Q(\blk00000003/sig00000543 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070c/blk00000711 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000070c/sig0000187e ), + .Q(\blk00000003/sig00000544 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070c/blk00000710 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000070c/sig0000187d ), + .Q(\blk00000003/sig00000545 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070c/blk0000070f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000070c/sig0000187c ), + .Q(\blk00000003/sig00000546 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070c/blk0000070e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000070c/sig0000187b ), + .Q(\blk00000003/sig00000547 ) + ); + GND \blk00000003/blk0000070c/blk0000070d ( + .G(\blk00000003/blk0000070c/sig0000187a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000071f/blk00000731 ( + .I0(\blk00000003/sig00000a10 ), + .I1(ce), + .O(\blk00000003/blk0000071f/sig000018a1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071f/blk00000730 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000071f/sig00001898 ), + .A2(\blk00000003/blk0000071f/sig00001898 ), + .A3(\blk00000003/blk0000071f/sig00001898 ), + .CE(\blk00000003/blk0000071f/sig000018a1 ), + .CLK(clk), + .D(\blk00000003/sig000003d6 ), + .Q(\blk00000003/blk0000071f/sig000018a0 ), + .Q15(\NLW_blk00000003/blk0000071f/blk00000730_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071f/blk0000072f ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000071f/sig00001898 ), + .A2(\blk00000003/blk0000071f/sig00001898 ), + .A3(\blk00000003/blk0000071f/sig00001898 ), + .CE(\blk00000003/blk0000071f/sig000018a1 ), + .CLK(clk), + .D(\blk00000003/sig000003d7 ), + .Q(\blk00000003/blk0000071f/sig0000189f ), + .Q15(\NLW_blk00000003/blk0000071f/blk0000072f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071f/blk0000072e ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000071f/sig00001898 ), + .A2(\blk00000003/blk0000071f/sig00001898 ), + .A3(\blk00000003/blk0000071f/sig00001898 ), + .CE(\blk00000003/blk0000071f/sig000018a1 ), + .CLK(clk), + .D(\blk00000003/sig000003d8 ), + .Q(\blk00000003/blk0000071f/sig0000189e ), + .Q15(\NLW_blk00000003/blk0000071f/blk0000072e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071f/blk0000072d ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000071f/sig00001898 ), + .A2(\blk00000003/blk0000071f/sig00001898 ), + .A3(\blk00000003/blk0000071f/sig00001898 ), + .CE(\blk00000003/blk0000071f/sig000018a1 ), + .CLK(clk), + .D(\blk00000003/sig000003d9 ), + .Q(\blk00000003/blk0000071f/sig0000189d ), + .Q15(\NLW_blk00000003/blk0000071f/blk0000072d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071f/blk0000072c ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000071f/sig00001898 ), + .A2(\blk00000003/blk0000071f/sig00001898 ), + .A3(\blk00000003/blk0000071f/sig00001898 ), + .CE(\blk00000003/blk0000071f/sig000018a1 ), + .CLK(clk), + .D(\blk00000003/sig000003da ), + .Q(\blk00000003/blk0000071f/sig0000189c ), + .Q15(\NLW_blk00000003/blk0000071f/blk0000072c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071f/blk0000072b ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000071f/sig00001898 ), + .A2(\blk00000003/blk0000071f/sig00001898 ), + .A3(\blk00000003/blk0000071f/sig00001898 ), + .CE(\blk00000003/blk0000071f/sig000018a1 ), + .CLK(clk), + .D(\blk00000003/sig000003db ), + .Q(\blk00000003/blk0000071f/sig0000189b ), + .Q15(\NLW_blk00000003/blk0000071f/blk0000072b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071f/blk0000072a ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000071f/sig00001898 ), + .A2(\blk00000003/blk0000071f/sig00001898 ), + .A3(\blk00000003/blk0000071f/sig00001898 ), + .CE(\blk00000003/blk0000071f/sig000018a1 ), + .CLK(clk), + .D(\blk00000003/sig000003dc ), + .Q(\blk00000003/blk0000071f/sig0000189a ), + .Q15(\NLW_blk00000003/blk0000071f/blk0000072a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071f/blk00000729 ( + .A0(\blk00000003/sig00000a13 ), + .A1(\blk00000003/blk0000071f/sig00001898 ), + .A2(\blk00000003/blk0000071f/sig00001898 ), + .A3(\blk00000003/blk0000071f/sig00001898 ), + .CE(\blk00000003/blk0000071f/sig000018a1 ), + .CLK(clk), + .D(\blk00000003/sig000003dd ), + .Q(\blk00000003/blk0000071f/sig00001899 ), + .Q15(\NLW_blk00000003/blk0000071f/blk00000729_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071f/blk00000728 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000071f/sig000018a0 ), + .Q(\blk00000003/sig00000660 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071f/blk00000727 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000071f/sig0000189f ), + .Q(\blk00000003/sig00000661 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071f/blk00000726 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000071f/sig0000189e ), + .Q(\blk00000003/sig00000662 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071f/blk00000725 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000071f/sig0000189d ), + .Q(\blk00000003/sig00000663 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071f/blk00000724 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000071f/sig0000189c ), + .Q(\blk00000003/sig00000664 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071f/blk00000723 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000071f/sig0000189b ), + .Q(\blk00000003/sig00000665 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071f/blk00000722 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000071f/sig0000189a ), + .Q(\blk00000003/sig00000666 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071f/blk00000721 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000071f/sig00001899 ), + .Q(\blk00000003/sig00000667 ) + ); + GND \blk00000003/blk0000071f/blk00000720 ( + .G(\blk00000003/blk0000071f/sig00001898 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000732/blk00000744 ( + .I0(\blk00000003/sig00000a0f ), + .I1(ce), + .O(\blk00000003/blk00000732/sig000018bf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000732/blk00000743 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000732/sig000018b6 ), + .A2(\blk00000003/blk00000732/sig000018b6 ), + .A3(\blk00000003/blk00000732/sig000018b6 ), + .CE(\blk00000003/blk00000732/sig000018bf ), + .CLK(clk), + .D(\blk00000003/sig00000bab ), + .Q(\blk00000003/blk00000732/sig000018be ), + .Q15(\NLW_blk00000003/blk00000732/blk00000743_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000732/blk00000742 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000732/sig000018b6 ), + .A2(\blk00000003/blk00000732/sig000018b6 ), + .A3(\blk00000003/blk00000732/sig000018b6 ), + .CE(\blk00000003/blk00000732/sig000018bf ), + .CLK(clk), + .D(\blk00000003/sig00000bac ), + .Q(\blk00000003/blk00000732/sig000018bd ), + .Q15(\NLW_blk00000003/blk00000732/blk00000742_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000732/blk00000741 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000732/sig000018b6 ), + .A2(\blk00000003/blk00000732/sig000018b6 ), + .A3(\blk00000003/blk00000732/sig000018b6 ), + .CE(\blk00000003/blk00000732/sig000018bf ), + .CLK(clk), + .D(\blk00000003/sig00000bad ), + .Q(\blk00000003/blk00000732/sig000018bc ), + .Q15(\NLW_blk00000003/blk00000732/blk00000741_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000732/blk00000740 ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000732/sig000018b6 ), + .A2(\blk00000003/blk00000732/sig000018b6 ), + .A3(\blk00000003/blk00000732/sig000018b6 ), + .CE(\blk00000003/blk00000732/sig000018bf ), + .CLK(clk), + .D(\blk00000003/sig00000bae ), + .Q(\blk00000003/blk00000732/sig000018bb ), + .Q15(\NLW_blk00000003/blk00000732/blk00000740_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000732/blk0000073f ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000732/sig000018b6 ), + .A2(\blk00000003/blk00000732/sig000018b6 ), + .A3(\blk00000003/blk00000732/sig000018b6 ), + .CE(\blk00000003/blk00000732/sig000018bf ), + .CLK(clk), + .D(\blk00000003/sig00000baf ), + .Q(\blk00000003/blk00000732/sig000018ba ), + .Q15(\NLW_blk00000003/blk00000732/blk0000073f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000732/blk0000073e ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000732/sig000018b6 ), + .A2(\blk00000003/blk00000732/sig000018b6 ), + .A3(\blk00000003/blk00000732/sig000018b6 ), + .CE(\blk00000003/blk00000732/sig000018bf ), + .CLK(clk), + .D(\blk00000003/sig00000bb0 ), + .Q(\blk00000003/blk00000732/sig000018b9 ), + .Q15(\NLW_blk00000003/blk00000732/blk0000073e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000732/blk0000073d ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000732/sig000018b6 ), + .A2(\blk00000003/blk00000732/sig000018b6 ), + .A3(\blk00000003/blk00000732/sig000018b6 ), + .CE(\blk00000003/blk00000732/sig000018bf ), + .CLK(clk), + .D(\blk00000003/sig00000bb1 ), + .Q(\blk00000003/blk00000732/sig000018b8 ), + .Q15(\NLW_blk00000003/blk00000732/blk0000073d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000732/blk0000073c ( + .A0(\blk00000003/sig00000a14 ), + .A1(\blk00000003/blk00000732/sig000018b6 ), + .A2(\blk00000003/blk00000732/sig000018b6 ), + .A3(\blk00000003/blk00000732/sig000018b6 ), + .CE(\blk00000003/blk00000732/sig000018bf ), + .CLK(clk), + .D(\blk00000003/sig00000bb2 ), + .Q(\blk00000003/blk00000732/sig000018b7 ), + .Q15(\NLW_blk00000003/blk00000732/blk0000073c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732/blk0000073b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000732/sig000018be ), + .Q(\blk00000003/sig00000658 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732/blk0000073a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000732/sig000018bd ), + .Q(\blk00000003/sig00000659 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732/blk00000739 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000732/sig000018bc ), + .Q(\blk00000003/sig0000065a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732/blk00000738 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000732/sig000018bb ), + .Q(\blk00000003/sig0000065b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732/blk00000737 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000732/sig000018ba ), + .Q(\blk00000003/sig0000065c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732/blk00000736 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000732/sig000018b9 ), + .Q(\blk00000003/sig0000065d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732/blk00000735 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000732/sig000018b8 ), + .Q(\blk00000003/sig0000065e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732/blk00000734 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000732/sig000018b7 ), + .Q(\blk00000003/sig0000065f ) + ); + GND \blk00000003/blk00000732/blk00000733 ( + .G(\blk00000003/blk00000732/sig000018b6 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000745/blk00000757 ( + .I0(\blk00000003/sig00000a16 ), + .I1(ce), + .O(\blk00000003/blk00000745/sig000018dd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000745/blk00000756 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk00000745/sig000018d4 ), + .A2(\blk00000003/blk00000745/sig000018d4 ), + .A3(\blk00000003/blk00000745/sig000018d4 ), + .CE(\blk00000003/blk00000745/sig000018dd ), + .CLK(clk), + .D(\blk00000003/sig00000bb3 ), + .Q(\blk00000003/blk00000745/sig000018dc ), + .Q15(\NLW_blk00000003/blk00000745/blk00000756_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000745/blk00000755 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk00000745/sig000018d4 ), + .A2(\blk00000003/blk00000745/sig000018d4 ), + .A3(\blk00000003/blk00000745/sig000018d4 ), + .CE(\blk00000003/blk00000745/sig000018dd ), + .CLK(clk), + .D(\blk00000003/sig00000bb4 ), + .Q(\blk00000003/blk00000745/sig000018db ), + .Q15(\NLW_blk00000003/blk00000745/blk00000755_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000745/blk00000754 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk00000745/sig000018d4 ), + .A2(\blk00000003/blk00000745/sig000018d4 ), + .A3(\blk00000003/blk00000745/sig000018d4 ), + .CE(\blk00000003/blk00000745/sig000018dd ), + .CLK(clk), + .D(\blk00000003/sig00000bb5 ), + .Q(\blk00000003/blk00000745/sig000018da ), + .Q15(\NLW_blk00000003/blk00000745/blk00000754_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000745/blk00000753 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk00000745/sig000018d4 ), + .A2(\blk00000003/blk00000745/sig000018d4 ), + .A3(\blk00000003/blk00000745/sig000018d4 ), + .CE(\blk00000003/blk00000745/sig000018dd ), + .CLK(clk), + .D(\blk00000003/sig00000bb6 ), + .Q(\blk00000003/blk00000745/sig000018d9 ), + .Q15(\NLW_blk00000003/blk00000745/blk00000753_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000745/blk00000752 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk00000745/sig000018d4 ), + .A2(\blk00000003/blk00000745/sig000018d4 ), + .A3(\blk00000003/blk00000745/sig000018d4 ), + .CE(\blk00000003/blk00000745/sig000018dd ), + .CLK(clk), + .D(\blk00000003/sig00000bb7 ), + .Q(\blk00000003/blk00000745/sig000018d8 ), + .Q15(\NLW_blk00000003/blk00000745/blk00000752_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000745/blk00000751 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk00000745/sig000018d4 ), + .A2(\blk00000003/blk00000745/sig000018d4 ), + .A3(\blk00000003/blk00000745/sig000018d4 ), + .CE(\blk00000003/blk00000745/sig000018dd ), + .CLK(clk), + .D(\blk00000003/sig00000bb8 ), + .Q(\blk00000003/blk00000745/sig000018d7 ), + .Q15(\NLW_blk00000003/blk00000745/blk00000751_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000745/blk00000750 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk00000745/sig000018d4 ), + .A2(\blk00000003/blk00000745/sig000018d4 ), + .A3(\blk00000003/blk00000745/sig000018d4 ), + .CE(\blk00000003/blk00000745/sig000018dd ), + .CLK(clk), + .D(\blk00000003/sig00000bb9 ), + .Q(\blk00000003/blk00000745/sig000018d6 ), + .Q15(\NLW_blk00000003/blk00000745/blk00000750_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000745/blk0000074f ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk00000745/sig000018d4 ), + .A2(\blk00000003/blk00000745/sig000018d4 ), + .A3(\blk00000003/blk00000745/sig000018d4 ), + .CE(\blk00000003/blk00000745/sig000018dd ), + .CLK(clk), + .D(\blk00000003/sig00000bba ), + .Q(\blk00000003/blk00000745/sig000018d5 ), + .Q15(\NLW_blk00000003/blk00000745/blk0000074f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745/blk0000074e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000745/sig000018dc ), + .Q(\blk00000003/sig00000384 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745/blk0000074d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000745/sig000018db ), + .Q(\blk00000003/sig00000385 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745/blk0000074c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000745/sig000018da ), + .Q(\blk00000003/sig00000386 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745/blk0000074b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000745/sig000018d9 ), + .Q(\blk00000003/sig00000387 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745/blk0000074a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000745/sig000018d8 ), + .Q(\blk00000003/sig00000388 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745/blk00000749 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000745/sig000018d7 ), + .Q(\blk00000003/sig00000389 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745/blk00000748 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000745/sig000018d6 ), + .Q(\blk00000003/sig0000038a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000745/blk00000747 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000745/sig000018d5 ), + .Q(\blk00000003/sig0000038b ) + ); + GND \blk00000003/blk00000745/blk00000746 ( + .G(\blk00000003/blk00000745/sig000018d4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000758/blk0000076a ( + .I0(\blk00000003/sig00000a15 ), + .I1(ce), + .O(\blk00000003/blk00000758/sig000018fb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000758/blk00000769 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000758/sig000018f2 ), + .A2(\blk00000003/blk00000758/sig000018f2 ), + .A3(\blk00000003/blk00000758/sig000018f2 ), + .CE(\blk00000003/blk00000758/sig000018fb ), + .CLK(clk), + .D(\blk00000003/sig00000bbb ), + .Q(\blk00000003/blk00000758/sig000018fa ), + .Q15(\NLW_blk00000003/blk00000758/blk00000769_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000758/blk00000768 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000758/sig000018f2 ), + .A2(\blk00000003/blk00000758/sig000018f2 ), + .A3(\blk00000003/blk00000758/sig000018f2 ), + .CE(\blk00000003/blk00000758/sig000018fb ), + .CLK(clk), + .D(\blk00000003/sig00000bbc ), + .Q(\blk00000003/blk00000758/sig000018f9 ), + .Q15(\NLW_blk00000003/blk00000758/blk00000768_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000758/blk00000767 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000758/sig000018f2 ), + .A2(\blk00000003/blk00000758/sig000018f2 ), + .A3(\blk00000003/blk00000758/sig000018f2 ), + .CE(\blk00000003/blk00000758/sig000018fb ), + .CLK(clk), + .D(\blk00000003/sig00000bbd ), + .Q(\blk00000003/blk00000758/sig000018f8 ), + .Q15(\NLW_blk00000003/blk00000758/blk00000767_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000758/blk00000766 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000758/sig000018f2 ), + .A2(\blk00000003/blk00000758/sig000018f2 ), + .A3(\blk00000003/blk00000758/sig000018f2 ), + .CE(\blk00000003/blk00000758/sig000018fb ), + .CLK(clk), + .D(\blk00000003/sig00000bbe ), + .Q(\blk00000003/blk00000758/sig000018f7 ), + .Q15(\NLW_blk00000003/blk00000758/blk00000766_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000758/blk00000765 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000758/sig000018f2 ), + .A2(\blk00000003/blk00000758/sig000018f2 ), + .A3(\blk00000003/blk00000758/sig000018f2 ), + .CE(\blk00000003/blk00000758/sig000018fb ), + .CLK(clk), + .D(\blk00000003/sig00000bbf ), + .Q(\blk00000003/blk00000758/sig000018f6 ), + .Q15(\NLW_blk00000003/blk00000758/blk00000765_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000758/blk00000764 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000758/sig000018f2 ), + .A2(\blk00000003/blk00000758/sig000018f2 ), + .A3(\blk00000003/blk00000758/sig000018f2 ), + .CE(\blk00000003/blk00000758/sig000018fb ), + .CLK(clk), + .D(\blk00000003/sig00000bc0 ), + .Q(\blk00000003/blk00000758/sig000018f5 ), + .Q15(\NLW_blk00000003/blk00000758/blk00000764_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000758/blk00000763 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000758/sig000018f2 ), + .A2(\blk00000003/blk00000758/sig000018f2 ), + .A3(\blk00000003/blk00000758/sig000018f2 ), + .CE(\blk00000003/blk00000758/sig000018fb ), + .CLK(clk), + .D(\blk00000003/sig00000bc1 ), + .Q(\blk00000003/blk00000758/sig000018f4 ), + .Q15(\NLW_blk00000003/blk00000758/blk00000763_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000758/blk00000762 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk00000758/sig000018f2 ), + .A2(\blk00000003/blk00000758/sig000018f2 ), + .A3(\blk00000003/blk00000758/sig000018f2 ), + .CE(\blk00000003/blk00000758/sig000018fb ), + .CLK(clk), + .D(\blk00000003/sig00000bc2 ), + .Q(\blk00000003/blk00000758/sig000018f3 ), + .Q15(\NLW_blk00000003/blk00000758/blk00000762_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758/blk00000761 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000758/sig000018fa ), + .Q(\blk00000003/sig0000037c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758/blk00000760 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000758/sig000018f9 ), + .Q(\blk00000003/sig0000037d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758/blk0000075f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000758/sig000018f8 ), + .Q(\blk00000003/sig0000037e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758/blk0000075e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000758/sig000018f7 ), + .Q(\blk00000003/sig0000037f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758/blk0000075d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000758/sig000018f6 ), + .Q(\blk00000003/sig00000380 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758/blk0000075c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000758/sig000018f5 ), + .Q(\blk00000003/sig00000381 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758/blk0000075b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000758/sig000018f4 ), + .Q(\blk00000003/sig00000382 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758/blk0000075a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000758/sig000018f3 ), + .Q(\blk00000003/sig00000383 ) + ); + GND \blk00000003/blk00000758/blk00000759 ( + .G(\blk00000003/blk00000758/sig000018f2 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000076b/blk0000077d ( + .I0(\blk00000003/sig00000a16 ), + .I1(ce), + .O(\blk00000003/blk0000076b/sig00001919 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076b/blk0000077c ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000076b/sig00001910 ), + .A2(\blk00000003/blk0000076b/sig00001910 ), + .A3(\blk00000003/blk0000076b/sig00001910 ), + .CE(\blk00000003/blk0000076b/sig00001919 ), + .CLK(clk), + .D(\blk00000003/sig00000bc3 ), + .Q(\blk00000003/blk0000076b/sig00001918 ), + .Q15(\NLW_blk00000003/blk0000076b/blk0000077c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076b/blk0000077b ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000076b/sig00001910 ), + .A2(\blk00000003/blk0000076b/sig00001910 ), + .A3(\blk00000003/blk0000076b/sig00001910 ), + .CE(\blk00000003/blk0000076b/sig00001919 ), + .CLK(clk), + .D(\blk00000003/sig00000bc4 ), + .Q(\blk00000003/blk0000076b/sig00001917 ), + .Q15(\NLW_blk00000003/blk0000076b/blk0000077b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076b/blk0000077a ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000076b/sig00001910 ), + .A2(\blk00000003/blk0000076b/sig00001910 ), + .A3(\blk00000003/blk0000076b/sig00001910 ), + .CE(\blk00000003/blk0000076b/sig00001919 ), + .CLK(clk), + .D(\blk00000003/sig00000bc5 ), + .Q(\blk00000003/blk0000076b/sig00001916 ), + .Q15(\NLW_blk00000003/blk0000076b/blk0000077a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076b/blk00000779 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000076b/sig00001910 ), + .A2(\blk00000003/blk0000076b/sig00001910 ), + .A3(\blk00000003/blk0000076b/sig00001910 ), + .CE(\blk00000003/blk0000076b/sig00001919 ), + .CLK(clk), + .D(\blk00000003/sig00000bc6 ), + .Q(\blk00000003/blk0000076b/sig00001915 ), + .Q15(\NLW_blk00000003/blk0000076b/blk00000779_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076b/blk00000778 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000076b/sig00001910 ), + .A2(\blk00000003/blk0000076b/sig00001910 ), + .A3(\blk00000003/blk0000076b/sig00001910 ), + .CE(\blk00000003/blk0000076b/sig00001919 ), + .CLK(clk), + .D(\blk00000003/sig00000bc7 ), + .Q(\blk00000003/blk0000076b/sig00001914 ), + .Q15(\NLW_blk00000003/blk0000076b/blk00000778_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076b/blk00000777 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000076b/sig00001910 ), + .A2(\blk00000003/blk0000076b/sig00001910 ), + .A3(\blk00000003/blk0000076b/sig00001910 ), + .CE(\blk00000003/blk0000076b/sig00001919 ), + .CLK(clk), + .D(\blk00000003/sig00000bc8 ), + .Q(\blk00000003/blk0000076b/sig00001913 ), + .Q15(\NLW_blk00000003/blk0000076b/blk00000777_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076b/blk00000776 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000076b/sig00001910 ), + .A2(\blk00000003/blk0000076b/sig00001910 ), + .A3(\blk00000003/blk0000076b/sig00001910 ), + .CE(\blk00000003/blk0000076b/sig00001919 ), + .CLK(clk), + .D(\blk00000003/sig00000bc9 ), + .Q(\blk00000003/blk0000076b/sig00001912 ), + .Q15(\NLW_blk00000003/blk0000076b/blk00000776_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076b/blk00000775 ( + .A0(\blk00000003/sig0000036f ), + .A1(\blk00000003/blk0000076b/sig00001910 ), + .A2(\blk00000003/blk0000076b/sig00001910 ), + .A3(\blk00000003/blk0000076b/sig00001910 ), + .CE(\blk00000003/blk0000076b/sig00001919 ), + .CLK(clk), + .D(\blk00000003/sig00000bca ), + .Q(\blk00000003/blk0000076b/sig00001911 ), + .Q15(\NLW_blk00000003/blk0000076b/blk00000775_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076b/blk00000774 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000076b/sig00001918 ), + .Q(\blk00000003/sig000003d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076b/blk00000773 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000076b/sig00001917 ), + .Q(\blk00000003/sig000003d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076b/blk00000772 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000076b/sig00001916 ), + .Q(\blk00000003/sig000003d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076b/blk00000771 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000076b/sig00001915 ), + .Q(\blk00000003/sig000003d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076b/blk00000770 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000076b/sig00001914 ), + .Q(\blk00000003/sig000003da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076b/blk0000076f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000076b/sig00001913 ), + .Q(\blk00000003/sig000003db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076b/blk0000076e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000076b/sig00001912 ), + .Q(\blk00000003/sig000003dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076b/blk0000076d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000076b/sig00001911 ), + .Q(\blk00000003/sig000003dd ) + ); + GND \blk00000003/blk0000076b/blk0000076c ( + .G(\blk00000003/blk0000076b/sig00001910 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000077e/blk00000790 ( + .I0(\blk00000003/sig00000a15 ), + .I1(ce), + .O(\blk00000003/blk0000077e/sig00001937 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077e/blk0000078f ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000077e/sig0000192e ), + .A2(\blk00000003/blk0000077e/sig0000192e ), + .A3(\blk00000003/blk0000077e/sig0000192e ), + .CE(\blk00000003/blk0000077e/sig00001937 ), + .CLK(clk), + .D(\blk00000003/sig00000bcb ), + .Q(\blk00000003/blk0000077e/sig00001936 ), + .Q15(\NLW_blk00000003/blk0000077e/blk0000078f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077e/blk0000078e ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000077e/sig0000192e ), + .A2(\blk00000003/blk0000077e/sig0000192e ), + .A3(\blk00000003/blk0000077e/sig0000192e ), + .CE(\blk00000003/blk0000077e/sig00001937 ), + .CLK(clk), + .D(\blk00000003/sig00000bcc ), + .Q(\blk00000003/blk0000077e/sig00001935 ), + .Q15(\NLW_blk00000003/blk0000077e/blk0000078e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077e/blk0000078d ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000077e/sig0000192e ), + .A2(\blk00000003/blk0000077e/sig0000192e ), + .A3(\blk00000003/blk0000077e/sig0000192e ), + .CE(\blk00000003/blk0000077e/sig00001937 ), + .CLK(clk), + .D(\blk00000003/sig00000bcd ), + .Q(\blk00000003/blk0000077e/sig00001934 ), + .Q15(\NLW_blk00000003/blk0000077e/blk0000078d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077e/blk0000078c ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000077e/sig0000192e ), + .A2(\blk00000003/blk0000077e/sig0000192e ), + .A3(\blk00000003/blk0000077e/sig0000192e ), + .CE(\blk00000003/blk0000077e/sig00001937 ), + .CLK(clk), + .D(\blk00000003/sig00000bce ), + .Q(\blk00000003/blk0000077e/sig00001933 ), + .Q15(\NLW_blk00000003/blk0000077e/blk0000078c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077e/blk0000078b ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000077e/sig0000192e ), + .A2(\blk00000003/blk0000077e/sig0000192e ), + .A3(\blk00000003/blk0000077e/sig0000192e ), + .CE(\blk00000003/blk0000077e/sig00001937 ), + .CLK(clk), + .D(\blk00000003/sig00000bcf ), + .Q(\blk00000003/blk0000077e/sig00001932 ), + .Q15(\NLW_blk00000003/blk0000077e/blk0000078b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077e/blk0000078a ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000077e/sig0000192e ), + .A2(\blk00000003/blk0000077e/sig0000192e ), + .A3(\blk00000003/blk0000077e/sig0000192e ), + .CE(\blk00000003/blk0000077e/sig00001937 ), + .CLK(clk), + .D(\blk00000003/sig00000bd0 ), + .Q(\blk00000003/blk0000077e/sig00001931 ), + .Q15(\NLW_blk00000003/blk0000077e/blk0000078a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077e/blk00000789 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000077e/sig0000192e ), + .A2(\blk00000003/blk0000077e/sig0000192e ), + .A3(\blk00000003/blk0000077e/sig0000192e ), + .CE(\blk00000003/blk0000077e/sig00001937 ), + .CLK(clk), + .D(\blk00000003/sig00000bd1 ), + .Q(\blk00000003/blk0000077e/sig00001930 ), + .Q15(\NLW_blk00000003/blk0000077e/blk00000789_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077e/blk00000788 ( + .A0(\blk00000003/sig0000036a ), + .A1(\blk00000003/blk0000077e/sig0000192e ), + .A2(\blk00000003/blk0000077e/sig0000192e ), + .A3(\blk00000003/blk0000077e/sig0000192e ), + .CE(\blk00000003/blk0000077e/sig00001937 ), + .CLK(clk), + .D(\blk00000003/sig00000bd2 ), + .Q(\blk00000003/blk0000077e/sig0000192f ), + .Q15(\NLW_blk00000003/blk0000077e/blk00000788_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077e/blk00000787 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000077e/sig00001936 ), + .Q(\blk00000003/sig000003ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077e/blk00000786 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000077e/sig00001935 ), + .Q(\blk00000003/sig000003cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077e/blk00000785 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000077e/sig00001934 ), + .Q(\blk00000003/sig000003d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077e/blk00000784 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000077e/sig00001933 ), + .Q(\blk00000003/sig000003d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077e/blk00000783 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000077e/sig00001932 ), + .Q(\blk00000003/sig000003d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077e/blk00000782 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000077e/sig00001931 ), + .Q(\blk00000003/sig000003d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077e/blk00000781 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000077e/sig00001930 ), + .Q(\blk00000003/sig000003d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077e/blk00000780 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000077e/sig0000192f ), + .Q(\blk00000003/sig000003d5 ) + ); + GND \blk00000003/blk0000077e/blk0000077f ( + .G(\blk00000003/blk0000077e/sig0000192e ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000007c1/blk000007e7 ( + .I0(\blk00000003/sig0000030a ), + .I1(ce), + .O(\blk00000003/blk000007c1/sig00001974 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007c1/blk000007e6 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000af7 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007e6_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001973 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007e5 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000af8 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007e5_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001972 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007e4 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000af9 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007e4_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001971 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007e3 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000afa ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007e3_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001970 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007e2 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000afb ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007e2_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig0000196f ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007e1 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000afc ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007e1_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig0000196e ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007e0 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000afe ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007e0_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig0000196c ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007df ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000aff ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007df_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig0000196b ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007de ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000afd ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007de_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig0000196d ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007dd ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000b00 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007dd_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig0000196a ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007dc ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000b01 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007dc_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001969 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007db ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000b02 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007db_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001968 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007da ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000b03 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007da_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001967 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007d9 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000b04 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007d9_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001966 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007d8 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000b05 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007d8_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001965 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007d7 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000b07 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007d7_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001963 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007d6 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000b08 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007d6_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001962 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000007c1/blk000007d5 ( + .A0(\blk00000003/sig00000311 ), + .A1(\blk00000003/blk000007c1/sig00001961 ), + .A2(\blk00000003/blk000007c1/sig00001961 ), + .A3(\blk00000003/blk000007c1/sig00001961 ), + .D(\blk00000003/sig00000b06 ), + .DPRA0(\blk00000003/sig00000bd5 ), + .DPRA1(\blk00000003/blk000007c1/sig00001961 ), + .DPRA2(\blk00000003/blk000007c1/sig00001961 ), + .DPRA3(\blk00000003/blk000007c1/sig00001961 ), + .WCLK(clk), + .WE(\blk00000003/blk000007c1/sig00001974 ), + .SPO(\NLW_blk00000003/blk000007c1/blk000007d5_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000007c1/sig00001964 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001973 ), + .Q(\blk00000003/sig000001b0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001972 ), + .Q(\blk00000003/sig000001b1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001971 ), + .Q(\blk00000003/sig000001b2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007d1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001970 ), + .Q(\blk00000003/sig000001b3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig0000196f ), + .Q(\blk00000003/sig000001b4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007cf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig0000196e ), + .Q(\blk00000003/sig000001b5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig0000196d ), + .Q(\blk00000003/sig000001b6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig0000196c ), + .Q(\blk00000003/sig000001b7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig0000196b ), + .Q(\blk00000003/sig000001b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig0000196a ), + .Q(\blk00000003/sig000001b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001969 ), + .Q(\blk00000003/sig000001ba ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001968 ), + .Q(\blk00000003/sig000001bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001967 ), + .Q(\blk00000003/sig000001bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001966 ), + .Q(\blk00000003/sig000001bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001965 ), + .Q(\blk00000003/sig000001be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001964 ), + .Q(\blk00000003/sig000001bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001963 ), + .Q(\blk00000003/sig000001c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c1/blk000007c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000007c1/sig00001962 ), + .Q(\blk00000003/sig000001c1 ) + ); + GND \blk00000003/blk000007c1/blk000007c2 ( + .G(\blk00000003/blk000007c1/sig00001961 ) + ); + +// synthesis translate_on + +endmodule + +// synthesis translate_off + +`ifndef GLBL +`define GLBL + +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (weak1, weak0) GSR = GSR_int; + assign (weak1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + +endmodule + +`endif + +// synthesis translate_on diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.veo b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.veo new file mode 100644 index 000000000..eb615e1ee --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.veo @@ -0,0 +1,79 @@ +/******************************************************************************* +* (c) Copyright 1995 - 2010 Xilinx, Inc. All rights reserved. * +* * +* This file contains confidential and proprietary information * +* of Xilinx, Inc. and is protected under U.S. and * +* international copyright and other intellectual property * +* laws. * +* * +* DISCLAIMER * +* This disclaimer is not a license and does not grant any * +* rights to the materials distributed herewith. Except as * +* otherwise provided in a valid license issued to you by * +* Xilinx, and to the maximum extent permitted by applicable * +* law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND * +* WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES * +* AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING * +* BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- * +* INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and * +* (2) Xilinx shall not be liable (whether in contract or tort, * +* including negligence, or under any other theory of * +* liability) for any loss or damage of any kind or nature * +* related to, arising under or in connection with these * +* materials, including for any direct, or any indirect, * +* special, incidental, or consequential loss or damage * +* (including loss of data, profits, goodwill, or any type of * +* loss or damage suffered as a result of any action brought * +* by a third party) even if such damage or loss was * +* reasonably foreseeable or Xilinx had been advised of the * +* possibility of the same. * +* * +* CRITICAL APPLICATIONS * +* Xilinx products are not designed or intended to be fail- * +* safe, or for use in any application requiring fail-safe * +* performance, such as life-support or safety devices or * +* systems, Class III medical devices, nuclear facilities, * +* applications related to the deployment of airbags, or any * +* other applications that could lead to death, personal * +* injury, or severe property or environmental damage * +* (individually and collectively, "Critical * +* Applications"). Customer assumes the sole risk and * +* liability of any use of Xilinx products in Critical * +* Applications, subject only to applicable laws and * +* regulations governing limitations on product liability. * +* * +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS * +* PART OF THIS FILE AT ALL TIMES. * +*******************************************************************************/ + +// Generated from component ID: xilinx.com:ip:fir_compiler:5.0 + + +// The following must be inserted into your Verilog file for this +// core to be instantiated. Change the instance name and port connections +// (in parentheses) to your own signal names. + +//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG +hbdec1 YourInstanceName ( + .sclr(sclr), // input sclr + .clk(clk), // input clk + .ce(ce), // input ce + .nd(nd), // input nd + .coef_ld(coef_ld), // input coef_ld + .coef_we(coef_we), // input coef_we + .coef_din(coef_din), // input [17 : 0] coef_din + .rfd(rfd), // output rfd + .rdy(rdy), // output rdy + .data_valid(data_valid), // output data_valid + .din_1(din_1), // input [23 : 0] din_1 + .din_2(din_2), // input [23 : 0] din_2 + .dout_1(dout_1), // output [46 : 0] dout_1 + .dout_2(dout_2)); // output [46 : 0] dout_2 + +// INST_TAG_END ------ End INSTANTIATION Template --------- + +// You must compile the wrapper file hbdec1.v when simulating +// the core, hbdec1. When compiling the wrapper file, be sure to +// reference the XilinxCoreLib Verilog simulation library. For detailed +// instructions, please refer to the "CORE Generator Help". + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.xco b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.xco new file mode 100644 index 000000000..5d6c03565 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1.xco @@ -0,0 +1,102 @@ +############################################################## +# +# Xilinx Core Generator version 14.7 +# Date: Tue Jun 9 23:47:19 2015 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# Generated from component: xilinx.com:ip:fir_compiler:5.0 +# +############################################################## +# +# BEGIN Project Options +SET addpads = false +SET asysymbol = true +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = false +SET designentry = Verilog +SET device = xc6slx75 +SET devicefamily = spartan6 +SET flowvendor = Other +SET formalverification = false +SET foundationsym = false +SET implementationfiletype = Ngc +SET package = fgg484 +SET removerpms = false +SET simulationfiles = Behavioral +SET speedgrade = -3 +SET verilogsim = true +SET vhdlsim = false +# END Project Options +# BEGIN Select +SELECT FIR_Compiler family Xilinx,_Inc. 5.0 +# END Select +# BEGIN Parameters +CSET allow_rounding_approximation=false +CSET bestprecision=false +CSET chan_in_adv=0 +CSET clock_frequency=64 +CSET coefficient_buffer_type=Automatic +CSET coefficient_file=./hb47.coe +CSET coefficient_fractional_bits=0 +CSET coefficient_reload=true +CSET coefficient_sets=1 +CSET coefficient_sign=Signed +CSET coefficient_structure=Half_Band +CSET coefficient_width=18 +CSET coefficientsource=COE_File +CSET coefficientvector=6,0,-4,-3,5,6,-6,-13,7,44,64,44,7,-13,-6,6,5,-3,-4,0,6 +CSET columnconfig=7 +CSET component_name=hbdec1 +CSET data_buffer_type=Automatic +CSET data_fractional_bits=0 +CSET data_sign=Signed +CSET data_width=24 +CSET decimation_rate=2 +CSET displayreloadorder=false +CSET filter_architecture=Systolic_Multiply_Accumulate +CSET filter_selection=1 +CSET filter_type=Decimation +CSET gui_behaviour=Coregen +CSET hardwareoversamplingrate=1 +CSET has_ce=true +CSET has_data_valid=true +CSET has_nd=true +CSET has_sclr=true +CSET input_buffer_type=Automatic +CSET inter_column_pipe_length=4 +CSET interpolation_rate=1 +CSET multi_column_support=Disabled +CSET number_channels=1 +CSET number_paths=2 +CSET optimization_goal=Area +CSET output_buffer_type=Automatic +CSET output_rounding_mode=Full_Precision +CSET output_width=47 +CSET passband_max=0.5 +CSET passband_min=0.0 +CSET preference_for_other_storage=Automatic +CSET quantization=Integer_Coefficients +CSET rate_change_type=Integer +CSET ratespecification=Frequency_Specification +CSET registered_output=true +CSET sample_frequency=64 +CSET sampleperiod=1 +CSET sclr_deterministic=true +CSET stopband_max=1.0 +CSET stopband_min=0.5 +CSET usechan_in_adv=false +CSET zero_pack_factor=1 +# END Parameters +# BEGIN Extra information +MISC pkg_timestamp=2013-10-13T18:46:09Z +# END Extra information +GENERATE +# CRC: c82a9824 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_0.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_0.mif new file mode 100644 index 000000000..f19636daf --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_0.mif @@ -0,0 +1,5 @@ +111111111111000010 +000000000011000010 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_1.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_1.mif new file mode 100644 index 000000000..07e316dd3 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_1.mif @@ -0,0 +1,5 @@ +111111111001001000 +000000001101010111 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_2.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_2.mif new file mode 100644 index 000000000..da84300d6 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_2.mif @@ -0,0 +1,5 @@ +111111101000011111 +000000100110101110 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_3.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_3.mif new file mode 100644 index 000000000..ea92ca6c2 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_3.mif @@ -0,0 +1,5 @@ +111111000011000100 +000001011101100110 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_4.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_4.mif new file mode 100644 index 000000000..9e9303211 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_4.mif @@ -0,0 +1,5 @@ +111101110000011101 +000011100100101000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_5.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_5.mif new file mode 100644 index 000000000..e0c3f05fe --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto0_5.mif @@ -0,0 +1,5 @@ +111001100001011000 +010100010001000001 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto_HALFBAND_CENTRE0.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto_HALFBAND_CENTRE0.mif new file mode 100644 index 000000000..ca072e0fc --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1COEFF_auto_HALFBAND_CENTRE0.mif @@ -0,0 +1,3 @@ +011111111111111111 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_flist.txt b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_flist.txt new file mode 100644 index 000000000..2bd535f92 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_flist.txt @@ -0,0 +1,22 @@ +# Output products list for <hbdec1> +hbdec1.asy +hbdec1.gise +hbdec1.mif +hbdec1.ngc +hbdec1.v +hbdec1.veo +hbdec1.xco +hbdec1.xise +hbdec1COEFF_auto0_0.mif +hbdec1COEFF_auto0_1.mif +hbdec1COEFF_auto0_2.mif +hbdec1COEFF_auto0_3.mif +hbdec1COEFF_auto0_4.mif +hbdec1COEFF_auto0_5.mif +hbdec1COEFF_auto_HALFBAND_CENTRE0.mif +hbdec1_flist.txt +hbdec1_readme.txt +hbdec1_reload_addrfilt_decode_rom.mif +hbdec1_reload_order.txt +hbdec1_xmdf.tcl +hbdec1filt_decode_rom.mif diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_readme.txt b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_readme.txt new file mode 100644 index 000000000..7a62ed177 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_readme.txt @@ -0,0 +1,76 @@ +The following files were generated for 'hbdec1' in directory +/home/mwest/git/fpgadev/usrp3/top/b205/coregen_dsp/ + +Opens the IP Customization GUI: + Allows the user to customize or recustomize the IP instance. + + * hbdec1.mif + * hbdec1_reload_order.txt + +ISE file generator: + Add description here... + + * hbdec1_flist.txt + +Model Parameter Resolution: + Resolves generated model parameter values on the component instance. + + * hbdec1.mif + * hbdec1_reload_order.txt + +XCO file generator: + Generate an XCO file for compatibility with legacy flows. + + * hbdec1.xco + +Creates an implementation netlist: + Creates an implementation netlist for the IP. + + * hbdec1.ngc + * hbdec1.v + * hbdec1.veo + * hbdec1COEFF_auto0_0.mif + * hbdec1COEFF_auto0_1.mif + * hbdec1COEFF_auto0_2.mif + * hbdec1COEFF_auto0_3.mif + * hbdec1COEFF_auto0_4.mif + * hbdec1COEFF_auto0_5.mif + * hbdec1COEFF_auto_HALFBAND_CENTRE0.mif + * hbdec1_reload_addrfilt_decode_rom.mif + * hbdec1filt_decode_rom.mif + +Creates an HDL instantiation template: + Creates an HDL instantiation template for the IP. + + * hbdec1.veo + +IP Symbol Generator: + Generate an IP symbol based on the current project options'. + + * hbdec1.asy + +Generate ISE metadata: + Create a metadata file for use when including this core in ISE designs + + * hbdec1_xmdf.tcl + +Generate ISE subproject: + Create an ISE subproject for use when including this core in ISE designs + + * hbdec1.gise + * hbdec1.xise + +Deliver Readme: + Readme file for the IP. + + * hbdec1_readme.txt + +Generate FLIST file: + Text file listing all of the output files produced when a customized core was + generated in the CORE Generator. + + * hbdec1_flist.txt + +Please see the Xilinx CORE Generator online help for further details on +generated files and how to use them. + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_reload_addrfilt_decode_rom.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_reload_addrfilt_decode_rom.mif new file mode 100644 index 000000000..32d689cd7 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_reload_addrfilt_decode_rom.mif @@ -0,0 +1,17 @@ +00 +10 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_reload_order.txt b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_reload_order.txt new file mode 100644 index 000000000..11f12084f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_reload_order.txt @@ -0,0 +1,25 @@ +Reload index 0 = Index 20 +Reload index 1 = Index 22 +Reload index 2 = Index 16 +Reload index 3 = Index 18 +Reload index 4 = Index 12 +Reload index 5 = Index 14 +Reload index 6 = Index 8 +Reload index 7 = Index 10 +Reload index 8 = Index 4 +Reload index 9 = Index 6 +Reload index 10 = Index 0 +Reload index 11 = Index 2 +Reload index 12 = Index 23 +Reload index 13 = Index 0 +Reload index 14 = Index 0 +Reload index 15 = Index 0 +Reload index 16 = Index 0 +Reload index 17 = Index 0 +Reload index 18 = Index 0 +Reload index 19 = Index 0 +Reload index 20 = Index 0 +Reload index 21 = Index 0 +Reload index 22 = Index 0 +Reload index 23 = Index 0 + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_xmdf.tcl b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_xmdf.tcl new file mode 100644 index 000000000..7aa8f91c3 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1_xmdf.tcl @@ -0,0 +1,111 @@ +# The package naming convention is <core_name>_xmdf +package provide hbdec1_xmdf 1.0 + +# This includes some utilities that support common XMDF operations +package require utilities_xmdf + +# Define a namespace for this package. The name of the name space +# is <core_name>_xmdf +namespace eval ::hbdec1_xmdf { +# Use this to define any statics +} + +# Function called by client to rebuild the params and port arrays +# Optional when the use context does not require the param or ports +# arrays to be available. +proc ::hbdec1_xmdf::xmdfInit { instance } { +# Variable containing name of library into which module is compiled +# Recommendation: <module_name> +# Required +utilities_xmdf::xmdfSetData $instance Module Attributes Name hbdec1 +} +# ::hbdec1_xmdf::xmdfInit + +# Function called by client to fill in all the xmdf* data variables +# based on the current settings of the parameters +proc ::hbdec1_xmdf::xmdfApplyParams { instance } { + +set fcount 0 +# Array containing libraries that are assumed to exist +# Examples include unisim and xilinxcorelib +# Optional +# In this example, we assume that the unisim library will +# be available to the simulation and synthesis tool +utilities_xmdf::xmdfSetData $instance FileSet $fcount type logical_library +utilities_xmdf::xmdfSetData $instance FileSet $fcount logical_library unisim +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1.asy +utilities_xmdf::xmdfSetData $instance FileSet $fcount type asy +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1.ngc +utilities_xmdf::xmdfSetData $instance FileSet $fcount type ngc +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1.v +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1.veo +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog_template +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1.xco +utilities_xmdf::xmdfSetData $instance FileSet $fcount type coregen_ip +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1COEFF_auto0_0.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1COEFF_auto0_1.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1COEFF_auto0_2.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1COEFF_auto0_3.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1COEFF_auto0_4.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1COEFF_auto0_5.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1COEFF_auto_HALFBAND_CENTRE0.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1_reload_addrfilt_decode_rom.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1_reload_order.txt +utilities_xmdf::xmdfSetData $instance FileSet $fcount type text +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1_xmdf.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec1filt_decode_rom.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount associated_module hbdec1 +incr fcount + +} + +# ::gen_comp_name_xmdf::xmdfApplyParams diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1filt_decode_rom.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1filt_decode_rom.mif new file mode 100644 index 000000000..32d689cd7 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec1filt_decode_rom.mif @@ -0,0 +1,17 @@ +00 +10 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.asy b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.asy new file mode 100644 index 000000000..e9bd5ec37 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.asy @@ -0,0 +1,61 @@ +Version 4 +SymbolType BLOCK +TEXT 32 32 LEFT 4 hbdec2 +RECTANGLE Normal 32 32 544 2048 +LINE Normal 0 144 32 144 +PIN 0 144 LEFT 36 +PINATTR PinName nd +PINATTR Polarity IN +LINE Wide 0 240 32 240 +PIN 0 240 LEFT 36 +PINATTR PinName din_1[23:0] +PINATTR Polarity IN +LINE Wide 0 272 32 272 +PIN 0 272 LEFT 36 +PINATTR PinName din_2[23:0] +PINATTR Polarity IN +LINE Normal 0 848 32 848 +PIN 0 848 LEFT 36 +PINATTR PinName coef_ld +PINATTR Polarity IN +LINE Normal 0 880 32 880 +PIN 0 880 LEFT 36 +PINATTR PinName coef_we +PINATTR Polarity IN +LINE Wide 0 912 32 912 +PIN 0 912 LEFT 36 +PINATTR PinName coef_din[17:0] +PINATTR Polarity IN +LINE Normal 0 1008 32 1008 +PIN 0 1008 LEFT 36 +PINATTR PinName clk +PINATTR Polarity IN +LINE Normal 0 1040 32 1040 +PIN 0 1040 LEFT 36 +PINATTR PinName ce +PINATTR Polarity IN +LINE Normal 0 1072 32 1072 +PIN 0 1072 LEFT 36 +PINATTR PinName sclr +PINATTR Polarity IN +LINE Wide 576 240 544 240 +PIN 576 240 RIGHT 36 +PINATTR PinName dout_1[46:0] +PINATTR Polarity OUT +LINE Wide 576 272 544 272 +PIN 576 272 RIGHT 36 +PINATTR PinName dout_2[46:0] +PINATTR Polarity OUT +LINE Normal 576 1840 544 1840 +PIN 576 1840 RIGHT 36 +PINATTR PinName rfd +PINATTR Polarity OUT +LINE Normal 576 1872 544 1872 +PIN 576 1872 RIGHT 36 +PINATTR PinName rdy +PINATTR Polarity OUT +LINE Normal 576 1904 544 1904 +PIN 576 1904 RIGHT 36 +PINATTR PinName data_valid +PINATTR Polarity OUT + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.mif new file mode 100644 index 000000000..78d2dd901 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.mif @@ -0,0 +1,47 @@ +111111111111000010 +000000000000000000 +000000000011000010 +000000000000000000 +111111111001001000 +000000000000000000 +000000001101010111 +000000000000000000 +111111101000011111 +000000000000000000 +000000100110101110 +000000000000000000 +111111000011000100 +000000000000000000 +000001011101100110 +000000000000000000 +111101110000011101 +000000000000000000 +000011100100101000 +000000000000000000 +111001100001011000 +000000000000000000 +010100010001000001 +011111111111111111 +010100010001000001 +000000000000000000 +111001100001011000 +000000000000000000 +000011100100101000 +000000000000000000 +111101110000011101 +000000000000000000 +000001011101100110 +000000000000000000 +111111000011000100 +000000000000000000 +000000100110101110 +000000000000000000 +111111101000011111 +000000000000000000 +000000001101010111 +000000000000000000 +111111111001001000 +000000000000000000 +000000000011000010 +000000000000000000 +111111111111000010 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.ngc b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.ngc new file mode 100644 index 000000000..839be66eb --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.ngc @@ -0,0 +1,3 @@ +XILINX-XDB 0.1 STUB 0.1 ASCII +XILINX-XDM V1.6e +$37:2~753-Xnzd}foo8#5+421).97 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\ No newline at end of file diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.v b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.v new file mode 100644 index 000000000..5d7fb7317 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.v @@ -0,0 +1,27912 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. +//////////////////////////////////////////////////////////////////////////////// +// ____ ____ +// / /\/ / +// /___/ \ / Vendor: Xilinx +// \ \ \/ Version: P.20131013 +// \ \ Application: netgen +// / / Filename: hbdec2.v +// /___/ /\ Timestamp: Tue Jun 9 16:48:59 2015 +// \ \ / \ +// \___\/\___\ +// +// Command : -intstyle ise -w -sim -ofmt verilog ./tmp/_cg/hbdec2.ngc ./tmp/_cg/hbdec2.v +// Device : 6slx75fgg484-3 +// Input file : ./tmp/_cg/hbdec2.ngc +// Output file : ./tmp/_cg/hbdec2.v +// # of Modules : 1 +// Design Name : hbdec2 +// Xilinx : /opt/Xilinx/14.7/ISE_DS/ISE/ +// +// Purpose: +// This verilog netlist is a verification model and uses simulation +// primitives which may not represent the true implementation of the +// device, however the netlist is functionally correct and should not +// be modified. This file cannot be synthesized and should only be used +// with supported simulation tools. +// +// Reference: +// Command Line Tools User Guide, Chapter 23 and Synthesis and Simulation Design Guide, Chapter 6 +// +//////////////////////////////////////////////////////////////////////////////// + +`timescale 1 ns/1 ps + +module hbdec2 ( + sclr, ce, rfd, rdy, data_valid, coef_we, nd, clk, coef_ld, dout_1, dout_2, din_1, din_2, coef_din +)/* synthesis syn_black_box syn_noprune=1 */; + input sclr; + input ce; + output rfd; + output rdy; + output data_valid; + input coef_we; + input nd; + input clk; + input coef_ld; + output [46 : 0] dout_1; + output [46 : 0] dout_2; + input [23 : 0] din_1; + input [23 : 0] din_2; + input [17 : 0] coef_din; + + // synthesis translate_off + + wire NlwRenamedSig_OI_rfd; + wire \blk00000003/sig0000093c ; + wire \blk00000003/sig0000093b ; + wire \blk00000003/sig0000093a ; + wire \blk00000003/sig00000939 ; + wire \blk00000003/sig00000938 ; + wire \blk00000003/sig00000937 ; + wire \blk00000003/sig00000936 ; + wire \blk00000003/sig00000935 ; + wire \blk00000003/sig00000934 ; + wire \blk00000003/sig00000933 ; + wire \blk00000003/sig00000932 ; + wire \blk00000003/sig00000931 ; + wire \blk00000003/sig00000930 ; + wire \blk00000003/sig0000092f ; + wire \blk00000003/sig0000092e ; + wire \blk00000003/sig0000092d ; + wire \blk00000003/sig0000092c ; + wire \blk00000003/sig0000092b ; + wire \blk00000003/sig0000092a ; + wire \blk00000003/sig00000929 ; + wire \blk00000003/sig00000928 ; + wire \blk00000003/sig00000927 ; + wire \blk00000003/sig00000926 ; + wire \blk00000003/sig00000925 ; + wire \blk00000003/sig00000924 ; + wire \blk00000003/sig00000923 ; + wire \blk00000003/sig00000922 ; + wire \blk00000003/sig00000921 ; + wire \blk00000003/sig00000920 ; + wire \blk00000003/sig0000091f ; + wire \blk00000003/sig0000091e ; + wire \blk00000003/sig0000091d ; + wire \blk00000003/sig0000091c ; + wire \blk00000003/sig0000091b ; + wire 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\NLW_blk00000003/blk00000781_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000077b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000779_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000777_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000775_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000773_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000771_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000076b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000769_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000767_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000765_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000763_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000761_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000075b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000759_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000757_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000755_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000753_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000751_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000074f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000074d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000074b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000749_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000747_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000745_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000743_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000741_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000073f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000073d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000073b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000739_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000737_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000735_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000733_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000731_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000072f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000072d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000072b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000729_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000727_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000725_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000723_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000721_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000071b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000719_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000717_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000715_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000713_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000711_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000070b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000709_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000707_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000705_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000703_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000701_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006fd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006fb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006f1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ef_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ed_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006eb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006cd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006cb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006c1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006bf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006bd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006bb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000006a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000069b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000699_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000697_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000695_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000693_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000691_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000068f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000068d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000068b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000689_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000687_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000685_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000683_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000681_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000067f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000067d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000067b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000679_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000677_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000675_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000673_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000671_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000066f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000066d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000066b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000669_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000667_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000665_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000576_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000576_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000050d_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000050d_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000115_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000114_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000113_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000112_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000111_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000110_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010f_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010e_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010d_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010c_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010b_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_C<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_P<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk0000010a_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000105_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000101_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000fd_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f3_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000f3_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ee_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ed_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000ea_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e6_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e5_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e4_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e3_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e2_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000e1_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000dd_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000dc_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000db_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000da_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d9_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d8_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d1_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000d1_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cd_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000cd_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c7_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c3_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000c3_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b2_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk000000b1_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a8_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a7_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a4_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a3_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a1_O_UNCONNECTED ; + wire \NLW_blk00000003/blk000000a0_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009f_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009d_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009c_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000009a_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000099_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000024_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk00000020_Q_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001b_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000001a_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000019_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000017_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000016_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000015_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000014_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000013_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000010_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000e_O_UNCONNECTED ; + wire \NLW_blk00000003/blk0000000d_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000008_O_UNCONNECTED ; + wire \NLW_blk00000003/blk00000008_LO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000007_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_CARRYOUTF_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_CARRYOUT_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_BCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_P<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<47>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<46>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<45>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<44>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<43>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<42>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<41>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<40>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<39>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<38>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<37>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<36>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_PCOUT<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<35>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<34>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<33>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<32>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<31>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<30>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<29>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<28>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<27>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<26>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<25>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<24>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<23>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<22>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<21>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<20>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<19>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<18>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<17>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<16>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<15>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<14>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<13>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<12>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<11>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<10>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<9>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<8>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<7>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<6>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<5>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<4>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<3>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<2>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<1>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000006_M<0>_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000095_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000094_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000093_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000092_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000091_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000090_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000008f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000008e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000008d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000008c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000008b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000008a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000089_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000088_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000087_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000086_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000085_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000084_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000083_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000082_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000081_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000080_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000007f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000007e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000007d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000007c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000007b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000007a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000079_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000078_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000077_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000076_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000075_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000074_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000073_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000072_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000071_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000070_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000006f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000006e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000006d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000006c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000006b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk0000006a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000069_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000068_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000067_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000034/blk00000066_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000151_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000150_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk0000014f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk0000014e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk0000014d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk0000014c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk0000014b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk0000014a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000149_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000148_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000147_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000146_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000145_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000144_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000143_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000130/blk00000142_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000174_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000173_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000172_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000171_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000170_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000016f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000016e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000016d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000016c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000016b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk0000016a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000169_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000168_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000167_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000166_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000153/blk00000165_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000197_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000196_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000195_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000194_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000193_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000192_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000191_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000190_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk0000018f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk0000018e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk0000018d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk0000018c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk0000018b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk0000018a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000189_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000176/blk00000188_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001ba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001b0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000199/blk000001ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001dc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001db_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001da_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001bc/blk000001ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk00000200_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001ff_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001fe_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001fd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001fc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001fb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001fa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001f9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001f8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001f7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001f6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001f5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001f4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001f3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001f2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000001df/blk000001f1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000223_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000222_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000221_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000220_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk0000021f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk0000021e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk0000021d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk0000021c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk0000021b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk0000021a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000219_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000218_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000217_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000216_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000215_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000202/blk00000214_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000246_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000245_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000244_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000243_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000242_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000241_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000240_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk0000023f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk0000023e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk0000023d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk0000023c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk0000023b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk0000023a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000239_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000238_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000225/blk00000237_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000269_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000268_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000267_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000266_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000265_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000264_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000263_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000262_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000261_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk00000260_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk0000025f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk0000025e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk0000025d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk0000025c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk0000025b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000248/blk0000025a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk0000028c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk0000028b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk0000028a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000289_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000288_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000287_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000286_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000285_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000284_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000283_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000282_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000281_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk00000280_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk0000027f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk0000027e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000026b/blk0000027d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002af_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002ae_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002ad_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002ac_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002ab_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002aa_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000028e/blk000002a0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002d2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002cd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002cb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002ca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002c9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002c8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002c7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002c6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002c5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002c4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000002b1/blk000002c3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003ab_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003aa_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a9_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a8_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a7_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a6_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a5_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a4_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a3_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a2_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a1_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk000003a0_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk0000039f_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk0000039e_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk0000039d_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk0000039c_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk0000039b_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk00000386/blk0000039a_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ad/blk000003be_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ad/blk000003bd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ad/blk000003bc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ad/blk000003bb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ad/blk000003ba_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ad/blk000003b9_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ad/blk000003b8_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003ad/blk000003b7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003c0/blk000003d1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003c0/blk000003d0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003c0/blk000003cf_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003c0/blk000003ce_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003c0/blk000003cd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003c0/blk000003cc_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003c0/blk000003cb_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003c0/blk000003ca_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d3/blk000003e4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d3/blk000003e3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d3/blk000003e2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d3/blk000003e1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d3/blk000003e0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d3/blk000003df_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d3/blk000003de_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003d3/blk000003dd_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003e6/blk000003f7_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003e6/blk000003f6_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003e6/blk000003f5_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003e6/blk000003f4_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003e6/blk000003f3_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003e6/blk000003f2_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003e6/blk000003f1_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003e6/blk000003f0_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk0000040a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000409_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000408_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000407_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000406_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000405_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000404_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000003f9/blk00000403_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000040c/blk0000041d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000040c/blk0000041c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000040c/blk0000041b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000040c/blk0000041a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000040c/blk00000419_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000040c/blk00000418_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000040c/blk00000417_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000040c/blk00000416_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041f/blk00000430_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041f/blk0000042f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041f/blk0000042e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041f/blk0000042d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041f/blk0000042c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041f/blk0000042b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041f/blk0000042a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000041f/blk00000429_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000432/blk00000443_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000432/blk00000442_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000432/blk00000441_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000432/blk00000440_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000432/blk0000043f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000432/blk0000043e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000432/blk0000043d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000432/blk0000043c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000445/blk00000456_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000445/blk00000455_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000445/blk00000454_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000445/blk00000453_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000445/blk00000452_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000445/blk00000451_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000445/blk00000450_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000445/blk0000044f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000458/blk00000469_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000458/blk00000468_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000458/blk00000467_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000458/blk00000466_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000458/blk00000465_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000458/blk00000464_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000458/blk00000463_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk00000458/blk00000462_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000046b/blk0000047c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000046b/blk0000047b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000046b/blk0000047a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000046b/blk00000479_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000046b/blk00000478_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000046b/blk00000477_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000046b/blk00000476_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000046b/blk00000475_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000047e/blk0000048f_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000047e/blk0000048e_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000047e/blk0000048d_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000047e/blk0000048c_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000047e/blk0000048b_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000047e/blk0000048a_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000047e/blk00000489_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk0000047e/blk00000488_Q15_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk00000506_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk00000505_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk00000504_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk00000503_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk00000502_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk00000501_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk00000500_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004ff_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004fe_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004fd_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004fc_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004fb_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004fa_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004f9_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004f8_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004f7_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004f6_SPO_UNCONNECTED ; + wire \NLW_blk00000003/blk000004e1/blk000004f5_SPO_UNCONNECTED ; + wire [17 : 0] coef_din_0; + wire [23 : 0] din_1_1; + wire [23 : 0] din_2_2; + wire [46 : 0] NlwRenamedSig_OI_dout_1; + wire [46 : 0] NlwRenamedSig_OI_dout_2; + assign + rfd = NlwRenamedSig_OI_rfd, + dout_1[46] = NlwRenamedSig_OI_dout_1[46], + dout_1[45] = NlwRenamedSig_OI_dout_1[45], + dout_1[44] = NlwRenamedSig_OI_dout_1[44], + dout_1[43] = NlwRenamedSig_OI_dout_1[43], + dout_1[42] = NlwRenamedSig_OI_dout_1[42], + dout_1[41] = NlwRenamedSig_OI_dout_1[41], + dout_1[40] = NlwRenamedSig_OI_dout_1[40], + dout_1[39] = NlwRenamedSig_OI_dout_1[39], + dout_1[38] = NlwRenamedSig_OI_dout_1[38], + dout_1[37] = NlwRenamedSig_OI_dout_1[37], + dout_1[36] = NlwRenamedSig_OI_dout_1[36], + dout_1[35] = NlwRenamedSig_OI_dout_1[35], + dout_1[34] = NlwRenamedSig_OI_dout_1[34], + dout_1[33] = NlwRenamedSig_OI_dout_1[33], + dout_1[32] = NlwRenamedSig_OI_dout_1[32], + dout_1[31] = NlwRenamedSig_OI_dout_1[31], + dout_1[30] = NlwRenamedSig_OI_dout_1[30], + dout_1[29] = NlwRenamedSig_OI_dout_1[29], + dout_1[28] = NlwRenamedSig_OI_dout_1[28], + dout_1[27] = NlwRenamedSig_OI_dout_1[27], + dout_1[26] = NlwRenamedSig_OI_dout_1[26], + dout_1[25] = NlwRenamedSig_OI_dout_1[25], + dout_1[24] = NlwRenamedSig_OI_dout_1[24], + dout_1[23] = NlwRenamedSig_OI_dout_1[23], + dout_1[22] = NlwRenamedSig_OI_dout_1[22], + dout_1[21] = NlwRenamedSig_OI_dout_1[21], + dout_1[20] = NlwRenamedSig_OI_dout_1[20], + dout_1[19] = NlwRenamedSig_OI_dout_1[19], + dout_1[18] = NlwRenamedSig_OI_dout_1[18], + dout_1[17] = NlwRenamedSig_OI_dout_1[17], + dout_1[16] = NlwRenamedSig_OI_dout_1[16], + dout_1[15] = NlwRenamedSig_OI_dout_1[15], + dout_1[14] = NlwRenamedSig_OI_dout_1[14], + dout_1[13] = NlwRenamedSig_OI_dout_1[13], + dout_1[12] = NlwRenamedSig_OI_dout_1[12], + dout_1[11] = NlwRenamedSig_OI_dout_1[11], + dout_1[10] = NlwRenamedSig_OI_dout_1[10], + dout_1[9] = NlwRenamedSig_OI_dout_1[9], + dout_1[8] = NlwRenamedSig_OI_dout_1[8], + dout_1[7] = NlwRenamedSig_OI_dout_1[7], + dout_1[6] = NlwRenamedSig_OI_dout_1[6], + dout_1[5] = NlwRenamedSig_OI_dout_1[5], + dout_1[4] = NlwRenamedSig_OI_dout_1[4], + dout_1[3] = NlwRenamedSig_OI_dout_1[3], + dout_1[2] = NlwRenamedSig_OI_dout_1[2], + dout_1[1] = NlwRenamedSig_OI_dout_1[1], + dout_1[0] = NlwRenamedSig_OI_dout_1[0], + dout_2[46] = NlwRenamedSig_OI_dout_2[46], + dout_2[45] = NlwRenamedSig_OI_dout_2[45], + dout_2[44] = NlwRenamedSig_OI_dout_2[44], + dout_2[43] = NlwRenamedSig_OI_dout_2[43], + dout_2[42] = NlwRenamedSig_OI_dout_2[42], + dout_2[41] = NlwRenamedSig_OI_dout_2[41], + dout_2[40] = NlwRenamedSig_OI_dout_2[40], + dout_2[39] = NlwRenamedSig_OI_dout_2[39], + dout_2[38] = NlwRenamedSig_OI_dout_2[38], + dout_2[37] = NlwRenamedSig_OI_dout_2[37], + dout_2[36] = NlwRenamedSig_OI_dout_2[36], + dout_2[35] = NlwRenamedSig_OI_dout_2[35], + dout_2[34] = NlwRenamedSig_OI_dout_2[34], + dout_2[33] = NlwRenamedSig_OI_dout_2[33], + dout_2[32] = NlwRenamedSig_OI_dout_2[32], + dout_2[31] = NlwRenamedSig_OI_dout_2[31], + dout_2[30] = NlwRenamedSig_OI_dout_2[30], + dout_2[29] = NlwRenamedSig_OI_dout_2[29], + dout_2[28] = NlwRenamedSig_OI_dout_2[28], + dout_2[27] = NlwRenamedSig_OI_dout_2[27], + dout_2[26] = NlwRenamedSig_OI_dout_2[26], + dout_2[25] = NlwRenamedSig_OI_dout_2[25], + dout_2[24] = NlwRenamedSig_OI_dout_2[24], + dout_2[23] = NlwRenamedSig_OI_dout_2[23], + dout_2[22] = NlwRenamedSig_OI_dout_2[22], + dout_2[21] = NlwRenamedSig_OI_dout_2[21], + dout_2[20] = NlwRenamedSig_OI_dout_2[20], + dout_2[19] = NlwRenamedSig_OI_dout_2[19], + dout_2[18] = NlwRenamedSig_OI_dout_2[18], + dout_2[17] = NlwRenamedSig_OI_dout_2[17], + dout_2[16] = NlwRenamedSig_OI_dout_2[16], + dout_2[15] = NlwRenamedSig_OI_dout_2[15], + dout_2[14] = NlwRenamedSig_OI_dout_2[14], + dout_2[13] = NlwRenamedSig_OI_dout_2[13], + dout_2[12] = NlwRenamedSig_OI_dout_2[12], + dout_2[11] = NlwRenamedSig_OI_dout_2[11], + dout_2[10] = NlwRenamedSig_OI_dout_2[10], + dout_2[9] = NlwRenamedSig_OI_dout_2[9], + dout_2[8] = NlwRenamedSig_OI_dout_2[8], + dout_2[7] = NlwRenamedSig_OI_dout_2[7], + dout_2[6] = NlwRenamedSig_OI_dout_2[6], + dout_2[5] = NlwRenamedSig_OI_dout_2[5], + dout_2[4] = NlwRenamedSig_OI_dout_2[4], + dout_2[3] = NlwRenamedSig_OI_dout_2[3], + dout_2[2] = NlwRenamedSig_OI_dout_2[2], + dout_2[1] = NlwRenamedSig_OI_dout_2[1], + dout_2[0] = NlwRenamedSig_OI_dout_2[0], + din_1_1[23] = din_1[23], + din_1_1[22] = din_1[22], + din_1_1[21] = din_1[21], + din_1_1[20] = din_1[20], + din_1_1[19] = din_1[19], + din_1_1[18] = din_1[18], + din_1_1[17] = din_1[17], + din_1_1[16] = din_1[16], + din_1_1[15] = din_1[15], + din_1_1[14] = din_1[14], + din_1_1[13] = din_1[13], + din_1_1[12] = din_1[12], + din_1_1[11] = din_1[11], + din_1_1[10] = din_1[10], + din_1_1[9] = din_1[9], + din_1_1[8] = din_1[8], + din_1_1[7] = din_1[7], + din_1_1[6] = din_1[6], + din_1_1[5] = din_1[5], + din_1_1[4] = din_1[4], + din_1_1[3] = din_1[3], + din_1_1[2] = din_1[2], + din_1_1[1] = din_1[1], + din_1_1[0] = din_1[0], + din_2_2[23] = din_2[23], + din_2_2[22] = din_2[22], + din_2_2[21] = din_2[21], + din_2_2[20] = din_2[20], + din_2_2[19] = din_2[19], + din_2_2[18] = din_2[18], + din_2_2[17] = din_2[17], + din_2_2[16] = din_2[16], + din_2_2[15] = din_2[15], + din_2_2[14] = din_2[14], + din_2_2[13] = din_2[13], + din_2_2[12] = din_2[12], + din_2_2[11] = din_2[11], + din_2_2[10] = din_2[10], + din_2_2[9] = din_2[9], + din_2_2[8] = din_2[8], + din_2_2[7] = din_2[7], + din_2_2[6] = din_2[6], + din_2_2[5] = din_2[5], + din_2_2[4] = din_2[4], + din_2_2[3] = din_2[3], + din_2_2[2] = din_2[2], + din_2_2[1] = din_2[1], + din_2_2[0] = din_2[0], + coef_din_0[17] = coef_din[17], + coef_din_0[16] = coef_din[16], + coef_din_0[15] = coef_din[15], + coef_din_0[14] = coef_din[14], + coef_din_0[13] = coef_din[13], + coef_din_0[12] = coef_din[12], + coef_din_0[11] = coef_din[11], + coef_din_0[10] = coef_din[10], + coef_din_0[9] = coef_din[9], + coef_din_0[8] = coef_din[8], + coef_din_0[7] = coef_din[7], + coef_din_0[6] = coef_din[6], + coef_din_0[5] = coef_din[5], + coef_din_0[4] = coef_din[4], + coef_din_0[3] = coef_din[3], + coef_din_0[2] = coef_din[2], + coef_din_0[1] = coef_din[1], + coef_din_0[0] = coef_din[0]; + VCC blk00000001 ( + .P(NLW_blk00000001_P_UNCONNECTED) + ); + GND blk00000002 ( + .G(NLW_blk00000002_G_UNCONNECTED) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000800 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000093c ), + .Q(\blk00000003/sig0000080e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007ff ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000068c ), + .Q(\blk00000003/sig0000093c ), + .Q15(\NLW_blk00000003/blk000007ff_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000093b ), + .Q(\blk00000003/sig000002ae ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007fd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000068b ), + .Q(\blk00000003/sig0000093b ), + .Q15(\NLW_blk00000003/blk000007fd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000093a ), + .Q(\blk00000003/sig00000251 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007fb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008e4 ), + .Q(\blk00000003/sig0000093a ), + .Q15(\NLW_blk00000003/blk000007fb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007fa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000939 ), + .Q(\blk00000003/sig00000250 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007f9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008e8 ), + .Q(\blk00000003/sig00000939 ), + .Q15(\NLW_blk00000003/blk000007f9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000938 ), + .Q(\blk00000003/sig0000024f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007f7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008e6 ), + .Q(\blk00000003/sig00000938 ), + .Q15(\NLW_blk00000003/blk000007f7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000937 ), + .Q(\blk00000003/sig0000024d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007f5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008e0 ), + .Q(\blk00000003/sig00000937 ), + .Q15(\NLW_blk00000003/blk000007f5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000936 ), + .Q(\blk00000003/sig0000024c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007f3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008de ), + .Q(\blk00000003/sig00000936 ), + .Q15(\NLW_blk00000003/blk000007f3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000935 ), + .Q(\blk00000003/sig0000024e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007f1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008e2 ), + .Q(\blk00000003/sig00000935 ), + .Q15(\NLW_blk00000003/blk000007f1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000934 ), + .Q(\blk00000003/sig0000024a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007ef ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008d6 ), + .Q(\blk00000003/sig00000934 ), + .Q15(\NLW_blk00000003/blk000007ef_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000933 ), + .Q(\blk00000003/sig00000249 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007ed ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008da ), + .Q(\blk00000003/sig00000933 ), + .Q15(\NLW_blk00000003/blk000007ed_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000932 ), + .Q(\blk00000003/sig0000024b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007eb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008dc ), + .Q(\blk00000003/sig00000932 ), + .Q15(\NLW_blk00000003/blk000007eb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000931 ), + .Q(\blk00000003/sig00000247 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007e9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008d0 ), + .Q(\blk00000003/sig00000931 ), + .Q15(\NLW_blk00000003/blk000007e9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000930 ), + .Q(\blk00000003/sig00000246 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007e7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008d4 ), + .Q(\blk00000003/sig00000930 ), + .Q15(\NLW_blk00000003/blk000007e7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000092f ), + .Q(\blk00000003/sig00000248 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007e5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008d8 ), + .Q(\blk00000003/sig0000092f ), + .Q15(\NLW_blk00000003/blk000007e5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000092e ), + .Q(\blk00000003/sig00000245 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007e3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008d2 ), + .Q(\blk00000003/sig0000092e ), + .Q15(\NLW_blk00000003/blk000007e3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000092d ), + .Q(\blk00000003/sig00000244 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007e1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008ca ), + .Q(\blk00000003/sig0000092d ), + .Q15(\NLW_blk00000003/blk000007e1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000092c ), + .Q(\blk00000003/sig00000243 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007df ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008ce ), + .Q(\blk00000003/sig0000092c ), + .Q15(\NLW_blk00000003/blk000007df_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007de ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000092b ), + .Q(\blk00000003/sig00000242 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007dd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008cc ), + .Q(\blk00000003/sig0000092b ), + .Q15(\NLW_blk00000003/blk000007dd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000092a ), + .Q(\blk00000003/sig00000210 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007db ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008c6 ), + .Q(\blk00000003/sig0000092a ), + .Q15(\NLW_blk00000003/blk000007db_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007da ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000929 ), + .Q(\blk00000003/sig0000020f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007d9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008c4 ), + .Q(\blk00000003/sig00000929 ), + .Q15(\NLW_blk00000003/blk000007d9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000928 ), + .Q(\blk00000003/sig00000211 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007d7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008c8 ), + .Q(\blk00000003/sig00000928 ), + .Q15(\NLW_blk00000003/blk000007d7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000927 ), + .Q(\blk00000003/sig0000020d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007d5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008bc ), + .Q(\blk00000003/sig00000927 ), + .Q15(\NLW_blk00000003/blk000007d5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000926 ), + .Q(\blk00000003/sig0000020c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007d3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008c0 ), + .Q(\blk00000003/sig00000926 ), + .Q15(\NLW_blk00000003/blk000007d3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000925 ), + .Q(\blk00000003/sig0000020e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007d1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008c2 ), + .Q(\blk00000003/sig00000925 ), + .Q15(\NLW_blk00000003/blk000007d1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000924 ), + .Q(\blk00000003/sig0000020a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007cf ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008b6 ), + .Q(\blk00000003/sig00000924 ), + .Q15(\NLW_blk00000003/blk000007cf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000923 ), + .Q(\blk00000003/sig000001c9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007cd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008ba ), + .Q(\blk00000003/sig00000923 ), + .Q15(\NLW_blk00000003/blk000007cd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000922 ), + .Q(\blk00000003/sig0000020b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007cb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008be ), + .Q(\blk00000003/sig00000922 ), + .Q15(\NLW_blk00000003/blk000007cb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000921 ), + .Q(\blk00000003/sig000001c8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007c9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008b8 ), + .Q(\blk00000003/sig00000921 ), + .Q15(\NLW_blk00000003/blk000007c9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000920 ), + .Q(\blk00000003/sig000001c7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007c7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008b0 ), + .Q(\blk00000003/sig00000920 ), + .Q15(\NLW_blk00000003/blk000007c7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000091f ), + .Q(\blk00000003/sig000001c6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007c5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008b4 ), + .Q(\blk00000003/sig0000091f ), + .Q15(\NLW_blk00000003/blk000007c5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000091e ), + .Q(\blk00000003/sig000001c5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007c3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008b2 ), + .Q(\blk00000003/sig0000091e ), + .Q15(\NLW_blk00000003/blk000007c3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000091d ), + .Q(\blk00000003/sig000001c3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007c1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008ae ), + .Q(\blk00000003/sig0000091d ), + .Q15(\NLW_blk00000003/blk000007c1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000091c ), + .Q(\blk00000003/sig000001c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007bf ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008ac ), + .Q(\blk00000003/sig0000091c ), + .Q15(\NLW_blk00000003/blk000007bf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007be ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000091b ), + .Q(\blk00000003/sig000001c4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007bd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008aa ), + .Q(\blk00000003/sig0000091b ), + .Q15(\NLW_blk00000003/blk000007bd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000091a ), + .Q(\blk00000003/sig000001c0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007bb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008a8 ), + .Q(\blk00000003/sig0000091a ), + .Q15(\NLW_blk00000003/blk000007bb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000919 ), + .Q(\blk00000003/sig000001bf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007b9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008a6 ), + .Q(\blk00000003/sig00000919 ), + .Q15(\NLW_blk00000003/blk000007b9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000918 ), + .Q(\blk00000003/sig000001c1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007b7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008a4 ), + .Q(\blk00000003/sig00000918 ), + .Q15(\NLW_blk00000003/blk000007b7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000917 ), + .Q(\blk00000003/sig000001bd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007b5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008a2 ), + .Q(\blk00000003/sig00000917 ), + .Q15(\NLW_blk00000003/blk000007b5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000916 ), + .Q(\blk00000003/sig000001bc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007b3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000008a0 ), + .Q(\blk00000003/sig00000916 ), + .Q15(\NLW_blk00000003/blk000007b3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000915 ), + .Q(\blk00000003/sig000001be ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007b1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000089e ), + .Q(\blk00000003/sig00000915 ), + .Q15(\NLW_blk00000003/blk000007b1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000914 ), + .Q(\blk00000003/sig000001bb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007af ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000898 ), + .Q(\blk00000003/sig00000914 ), + .Q15(\NLW_blk00000003/blk000007af_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000913 ), + .Q(\blk00000003/sig000001ba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007ad ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000089c ), + .Q(\blk00000003/sig00000913 ), + .Q15(\NLW_blk00000003/blk000007ad_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000912 ), + .Q(\blk00000003/sig00000177 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007ab ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000089a ), + .Q(\blk00000003/sig00000912 ), + .Q15(\NLW_blk00000003/blk000007ab_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000911 ), + .Q(\blk00000003/sig00000176 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007a9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000896 ), + .Q(\blk00000003/sig00000911 ), + .Q15(\NLW_blk00000003/blk000007a9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000910 ), + .Q(\blk00000003/sig00000174 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007a7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000892 ), + .Q(\blk00000003/sig00000910 ), + .Q15(\NLW_blk00000003/blk000007a7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000090f ), + .Q(\blk00000003/sig00000173 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007a5 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000890 ), + .Q(\blk00000003/sig0000090f ), + .Q15(\NLW_blk00000003/blk000007a5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000090e ), + .Q(\blk00000003/sig00000175 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007a3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000894 ), + .Q(\blk00000003/sig0000090e ), + .Q15(\NLW_blk00000003/blk000007a3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000090d ), + .Q(\blk00000003/sig00000171 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000007a1 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000088e ), + .Q(\blk00000003/sig0000090d ), + .Q15(\NLW_blk00000003/blk000007a1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000007a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000090c ), + .Q(\blk00000003/sig00000170 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000079f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000088c ), + .Q(\blk00000003/sig0000090c ), + .Q15(\NLW_blk00000003/blk0000079f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000090b ), + .Q(\blk00000003/sig00000172 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000079d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000088a ), + .Q(\blk00000003/sig0000090b ), + .Q15(\NLW_blk00000003/blk0000079d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000090a ), + .Q(\blk00000003/sig0000068c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000079b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002b0 ), + .Q(\blk00000003/sig0000090a ), + .Q15(\NLW_blk00000003/blk0000079b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000079a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000909 ), + .Q(\blk00000003/sig0000081a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000799 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000290 ), + .Q(\blk00000003/sig00000909 ), + .Q15(\NLW_blk00000003/blk00000799_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000798 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000908 ), + .Q(\blk00000003/sig00000819 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000797 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028f ), + .Q(\blk00000003/sig00000908 ), + .Q15(\NLW_blk00000003/blk00000797_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000796 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000907 ), + .Q(\blk00000003/sig00000818 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000795 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000291 ), + .Q(\blk00000003/sig00000907 ), + .Q15(\NLW_blk00000003/blk00000795_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000794 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000906 ), + .Q(\blk00000003/sig0000081d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000793 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028d ), + .Q(\blk00000003/sig00000906 ), + .Q15(\NLW_blk00000003/blk00000793_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000792 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000905 ), + .Q(\blk00000003/sig0000081c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000791 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028c ), + .Q(\blk00000003/sig00000905 ), + .Q15(\NLW_blk00000003/blk00000791_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000790 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000904 ), + .Q(\blk00000003/sig0000081b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000078f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028e ), + .Q(\blk00000003/sig00000904 ), + .Q15(\NLW_blk00000003/blk0000078f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000078e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000903 ), + .Q(\blk00000003/sig00000820 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000078d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028a ), + .Q(\blk00000003/sig00000903 ), + .Q15(\NLW_blk00000003/blk0000078d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000078c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000902 ), + .Q(\blk00000003/sig0000081f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000078b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000289 ), + .Q(\blk00000003/sig00000902 ), + .Q15(\NLW_blk00000003/blk0000078b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000078a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000901 ), + .Q(\blk00000003/sig0000081e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000789 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000028b ), + .Q(\blk00000003/sig00000901 ), + .Q15(\NLW_blk00000003/blk00000789_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000788 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000900 ), + .Q(\blk00000003/sig00000823 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000787 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000287 ), + .Q(\blk00000003/sig00000900 ), + .Q15(\NLW_blk00000003/blk00000787_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000786 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008ff ), + .Q(\blk00000003/sig00000822 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000785 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000286 ), + .Q(\blk00000003/sig000008ff ), + .Q15(\NLW_blk00000003/blk00000785_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000784 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008fe ), + .Q(\blk00000003/sig00000821 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000783 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000288 ), + .Q(\blk00000003/sig000008fe ), + .Q15(\NLW_blk00000003/blk00000783_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000782 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008fd ), + .Q(\blk00000003/sig00000826 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000781 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000284 ), + .Q(\blk00000003/sig000008fd ), + .Q15(\NLW_blk00000003/blk00000781_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000780 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008fc ), + .Q(\blk00000003/sig00000825 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000283 ), + .Q(\blk00000003/sig000008fc ), + .Q15(\NLW_blk00000003/blk0000077f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008fb ), + .Q(\blk00000003/sig00000824 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000285 ), + .Q(\blk00000003/sig000008fb ), + .Q15(\NLW_blk00000003/blk0000077d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008fa ), + .Q(\blk00000003/sig00000828 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000077b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000209 ), + .Q(\blk00000003/sig000008fa ), + .Q15(\NLW_blk00000003/blk0000077b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000077a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f9 ), + .Q(\blk00000003/sig00000829 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000779 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000208 ), + .Q(\blk00000003/sig000008f9 ), + .Q15(\NLW_blk00000003/blk00000779_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000778 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f8 ), + .Q(\blk00000003/sig00000827 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000777 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000282 ), + .Q(\blk00000003/sig000008f8 ), + .Q15(\NLW_blk00000003/blk00000777_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000776 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f7 ), + .Q(\blk00000003/sig0000082c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000775 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000206 ), + .Q(\blk00000003/sig000008f7 ), + .Q15(\NLW_blk00000003/blk00000775_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000774 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f6 ), + .Q(\blk00000003/sig0000082b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000773 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000205 ), + .Q(\blk00000003/sig000008f6 ), + .Q15(\NLW_blk00000003/blk00000773_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000772 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f5 ), + .Q(\blk00000003/sig0000082a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000771 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000207 ), + .Q(\blk00000003/sig000008f5 ), + .Q15(\NLW_blk00000003/blk00000771_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000770 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f4 ), + .Q(\blk00000003/sig0000082d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000204 ), + .Q(\blk00000003/sig000008f4 ), + .Q15(\NLW_blk00000003/blk0000076f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f3 ), + .Q(\blk00000003/sig0000082f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000203 ), + .Q(\blk00000003/sig000008f3 ), + .Q15(\NLW_blk00000003/blk0000076d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f2 ), + .Q(\blk00000003/sig0000082e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000076b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000202 ), + .Q(\blk00000003/sig000008f2 ), + .Q15(\NLW_blk00000003/blk0000076b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000076a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f1 ), + .Q(\blk00000003/sig00000830 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000769 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000201 ), + .Q(\blk00000003/sig000008f1 ), + .Q15(\NLW_blk00000003/blk00000769_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000768 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008f0 ), + .Q(\blk00000003/sig00000831 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000767 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001ff ), + .Q(\blk00000003/sig000008f0 ), + .Q15(\NLW_blk00000003/blk00000767_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000766 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008ef ), + .Q(\blk00000003/sig00000833 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000765 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fe ), + .Q(\blk00000003/sig000008ef ), + .Q15(\NLW_blk00000003/blk00000765_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000764 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008ee ), + .Q(\blk00000003/sig00000832 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000763 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000200 ), + .Q(\blk00000003/sig000008ee ), + .Q15(\NLW_blk00000003/blk00000763_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000762 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008ed ), + .Q(\blk00000003/sig00000834 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000761 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fc ), + .Q(\blk00000003/sig000008ed ), + .Q15(\NLW_blk00000003/blk00000761_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000760 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008ec ), + .Q(\blk00000003/sig00000836 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000075f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fb ), + .Q(\blk00000003/sig000008ec ), + .Q15(\NLW_blk00000003/blk0000075f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008eb ), + .Q(\blk00000003/sig00000835 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000075d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fd ), + .Q(\blk00000003/sig000008eb ), + .Q15(\NLW_blk00000003/blk0000075d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008ea ), + .Q(\blk00000003/sig00000837 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000075b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000001fa ), + .Q(\blk00000003/sig000008ea ), + .Q15(\NLW_blk00000003/blk0000075b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000075a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000008e9 ), + .Q(\blk00000003/sig0000080f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000759 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig00000294 ), + .Q(\blk00000003/sig000008e9 ), + .Q15(\NLW_blk00000003/blk00000759_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000758 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008e7 ), + .Q(\blk00000003/sig000008e8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000757 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002e7 ), + .Q(\blk00000003/sig000008e7 ), + .Q15(\NLW_blk00000003/blk00000757_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000756 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008e5 ), + .Q(\blk00000003/sig000008e6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000755 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002e6 ), + .Q(\blk00000003/sig000008e5 ), + .Q15(\NLW_blk00000003/blk00000755_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000754 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008e3 ), + .Q(\blk00000003/sig000008e4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000753 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002e8 ), + .Q(\blk00000003/sig000008e3 ), + .Q15(\NLW_blk00000003/blk00000753_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000752 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008e1 ), + .Q(\blk00000003/sig000008e2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000751 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002e5 ), + .Q(\blk00000003/sig000008e1 ), + .Q15(\NLW_blk00000003/blk00000751_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000750 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008df ), + .Q(\blk00000003/sig000008e0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000074f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002e4 ), + .Q(\blk00000003/sig000008df ), + .Q15(\NLW_blk00000003/blk0000074f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074e ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008dd ), + .Q(\blk00000003/sig000008de ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000074d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002e3 ), + .Q(\blk00000003/sig000008dd ), + .Q15(\NLW_blk00000003/blk0000074d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074c ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008db ), + .Q(\blk00000003/sig000008dc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000074b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002e2 ), + .Q(\blk00000003/sig000008db ), + .Q15(\NLW_blk00000003/blk0000074b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000074a ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008d9 ), + .Q(\blk00000003/sig000008da ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000749 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002e0 ), + .Q(\blk00000003/sig000008d9 ), + .Q15(\NLW_blk00000003/blk00000749_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000748 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008d7 ), + .Q(\blk00000003/sig000008d8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000747 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002df ), + .Q(\blk00000003/sig000008d7 ), + .Q15(\NLW_blk00000003/blk00000747_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000746 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008d5 ), + .Q(\blk00000003/sig000008d6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000745 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002e1 ), + .Q(\blk00000003/sig000008d5 ), + .Q15(\NLW_blk00000003/blk00000745_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000744 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008d3 ), + .Q(\blk00000003/sig000008d4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000743 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002dd ), + .Q(\blk00000003/sig000008d3 ), + .Q15(\NLW_blk00000003/blk00000743_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000742 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008d1 ), + .Q(\blk00000003/sig000008d2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000741 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002dc ), + .Q(\blk00000003/sig000008d1 ), + .Q15(\NLW_blk00000003/blk00000741_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000740 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008cf ), + .Q(\blk00000003/sig000008d0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000073f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002de ), + .Q(\blk00000003/sig000008cf ), + .Q15(\NLW_blk00000003/blk0000073f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073e ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008cd ), + .Q(\blk00000003/sig000008ce ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000073d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002da ), + .Q(\blk00000003/sig000008cd ), + .Q15(\NLW_blk00000003/blk0000073d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073c ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008cb ), + .Q(\blk00000003/sig000008cc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000073b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d9 ), + .Q(\blk00000003/sig000008cb ), + .Q15(\NLW_blk00000003/blk0000073b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000073a ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008c9 ), + .Q(\blk00000003/sig000008ca ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000739 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002db ), + .Q(\blk00000003/sig000008c9 ), + .Q15(\NLW_blk00000003/blk00000739_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000738 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008c7 ), + .Q(\blk00000003/sig000008c8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000737 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d8 ), + .Q(\blk00000003/sig000008c7 ), + .Q15(\NLW_blk00000003/blk00000737_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000736 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008c5 ), + .Q(\blk00000003/sig000008c6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000735 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d7 ), + .Q(\blk00000003/sig000008c5 ), + .Q15(\NLW_blk00000003/blk00000735_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000734 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008c3 ), + .Q(\blk00000003/sig000008c4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000733 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d6 ), + .Q(\blk00000003/sig000008c3 ), + .Q15(\NLW_blk00000003/blk00000733_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000732 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008c1 ), + .Q(\blk00000003/sig000008c2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000731 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d5 ), + .Q(\blk00000003/sig000008c1 ), + .Q15(\NLW_blk00000003/blk00000731_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000730 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008bf ), + .Q(\blk00000003/sig000008c0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000072f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d3 ), + .Q(\blk00000003/sig000008bf ), + .Q15(\NLW_blk00000003/blk0000072f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072e ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008bd ), + .Q(\blk00000003/sig000008be ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000072d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d2 ), + .Q(\blk00000003/sig000008bd ), + .Q15(\NLW_blk00000003/blk0000072d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072c ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008bb ), + .Q(\blk00000003/sig000008bc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000072b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d4 ), + .Q(\blk00000003/sig000008bb ), + .Q15(\NLW_blk00000003/blk0000072b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000072a ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008b9 ), + .Q(\blk00000003/sig000008ba ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000729 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d0 ), + .Q(\blk00000003/sig000008b9 ), + .Q15(\NLW_blk00000003/blk00000729_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000728 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008b7 ), + .Q(\blk00000003/sig000008b8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000727 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002cf ), + .Q(\blk00000003/sig000008b7 ), + .Q15(\NLW_blk00000003/blk00000727_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000726 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008b5 ), + .Q(\blk00000003/sig000008b6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000725 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002d1 ), + .Q(\blk00000003/sig000008b5 ), + .Q15(\NLW_blk00000003/blk00000725_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000724 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008b3 ), + .Q(\blk00000003/sig000008b4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000723 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002cd ), + .Q(\blk00000003/sig000008b3 ), + .Q15(\NLW_blk00000003/blk00000723_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000722 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008b1 ), + .Q(\blk00000003/sig000008b2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000721 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002cc ), + .Q(\blk00000003/sig000008b1 ), + .Q15(\NLW_blk00000003/blk00000721_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000720 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008af ), + .Q(\blk00000003/sig000008b0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002ce ), + .Q(\blk00000003/sig000008af ), + .Q15(\NLW_blk00000003/blk0000071f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071e ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008ad ), + .Q(\blk00000003/sig000008ae ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002ca ), + .Q(\blk00000003/sig000008ad ), + .Q15(\NLW_blk00000003/blk0000071d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071c ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008ab ), + .Q(\blk00000003/sig000008ac ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000071b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c9 ), + .Q(\blk00000003/sig000008ab ), + .Q15(\NLW_blk00000003/blk0000071b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000071a ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008a9 ), + .Q(\blk00000003/sig000008aa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000719 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002cb ), + .Q(\blk00000003/sig000008a9 ), + .Q15(\NLW_blk00000003/blk00000719_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000718 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008a7 ), + .Q(\blk00000003/sig000008a8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000717 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c7 ), + .Q(\blk00000003/sig000008a7 ), + .Q15(\NLW_blk00000003/blk00000717_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000716 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008a5 ), + .Q(\blk00000003/sig000008a6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000715 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c6 ), + .Q(\blk00000003/sig000008a5 ), + .Q15(\NLW_blk00000003/blk00000715_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000714 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008a3 ), + .Q(\blk00000003/sig000008a4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000713 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c8 ), + .Q(\blk00000003/sig000008a3 ), + .Q15(\NLW_blk00000003/blk00000713_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000712 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig000008a1 ), + .Q(\blk00000003/sig000008a2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000711 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c4 ), + .Q(\blk00000003/sig000008a1 ), + .Q15(\NLW_blk00000003/blk00000711_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000710 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig0000089f ), + .Q(\blk00000003/sig000008a0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c3 ), + .Q(\blk00000003/sig0000089f ), + .Q15(\NLW_blk00000003/blk0000070f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070e ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig0000089d ), + .Q(\blk00000003/sig0000089e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c5 ), + .Q(\blk00000003/sig0000089d ), + .Q15(\NLW_blk00000003/blk0000070d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070c ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig0000089b ), + .Q(\blk00000003/sig0000089c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000070b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c1 ), + .Q(\blk00000003/sig0000089b ), + .Q15(\NLW_blk00000003/blk0000070b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000070a ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig00000899 ), + .Q(\blk00000003/sig0000089a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000709 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c0 ), + .Q(\blk00000003/sig00000899 ), + .Q15(\NLW_blk00000003/blk00000709_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000708 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig00000897 ), + .Q(\blk00000003/sig00000898 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000707 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002c2 ), + .Q(\blk00000003/sig00000897 ), + .Q15(\NLW_blk00000003/blk00000707_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000706 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig00000895 ), + .Q(\blk00000003/sig00000896 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000705 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002bf ), + .Q(\blk00000003/sig00000895 ), + .Q15(\NLW_blk00000003/blk00000705_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000704 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig00000893 ), + .Q(\blk00000003/sig00000894 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000703 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002be ), + .Q(\blk00000003/sig00000893 ), + .Q15(\NLW_blk00000003/blk00000703_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000702 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig00000891 ), + .Q(\blk00000003/sig00000892 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000701 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002bd ), + .Q(\blk00000003/sig00000891 ), + .Q15(\NLW_blk00000003/blk00000701_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000700 ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig0000088f ), + .Q(\blk00000003/sig00000890 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ff ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002bc ), + .Q(\blk00000003/sig0000088f ), + .Q15(\NLW_blk00000003/blk000006ff_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006fe ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig0000088d ), + .Q(\blk00000003/sig0000088e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006fd ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002ba ), + .Q(\blk00000003/sig0000088d ), + .Q15(\NLW_blk00000003/blk000006fd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006fc ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig0000088b ), + .Q(\blk00000003/sig0000088c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006fb ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002b9 ), + .Q(\blk00000003/sig0000088b ), + .Q15(\NLW_blk00000003/blk000006fb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006fa ( + .C(clk), + .CE(\blk00000003/sig00000817 ), + .D(\blk00000003/sig00000889 ), + .Q(\blk00000003/sig0000088a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f9 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig000000ac ), + .CE(\blk00000003/sig00000817 ), + .CLK(clk), + .D(\blk00000003/sig000002bb ), + .Q(\blk00000003/sig00000889 ), + .Q15(\NLW_blk00000003/blk000006f9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000888 ), + .Q(\blk00000003/sig00000816 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f7 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000067b ), + .Q(\blk00000003/sig00000888 ), + .Q15(\NLW_blk00000003/blk000006f7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000887 ), + .Q(\blk00000003/sig000006dc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f5 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e8 ), + .Q(\blk00000003/sig00000887 ), + .Q15(\NLW_blk00000003/blk000006f5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000886 ), + .Q(\blk00000003/sig00000815 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f3 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000067c ), + .Q(\blk00000003/sig00000886 ), + .Q15(\NLW_blk00000003/blk000006f3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000885 ), + .Q(\blk00000003/sig000006da ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006f1 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e6 ), + .Q(\blk00000003/sig00000885 ), + .Q15(\NLW_blk00000003/blk000006f1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000884 ), + .Q(\blk00000003/sig000006d9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ef ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e5 ), + .Q(\blk00000003/sig00000884 ), + .Q15(\NLW_blk00000003/blk000006ef_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000883 ), + .Q(\blk00000003/sig000006db ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ed ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e7 ), + .Q(\blk00000003/sig00000883 ), + .Q15(\NLW_blk00000003/blk000006ed_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000882 ), + .Q(\blk00000003/sig000006d8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006eb ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e4 ), + .Q(\blk00000003/sig00000882 ), + .Q15(\NLW_blk00000003/blk000006eb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000881 ), + .Q(\blk00000003/sig000006d7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e9 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e3 ), + .Q(\blk00000003/sig00000881 ), + .Q15(\NLW_blk00000003/blk000006e9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000880 ), + .Q(\blk00000003/sig000006d6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e7 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e2 ), + .Q(\blk00000003/sig00000880 ), + .Q15(\NLW_blk00000003/blk000006e7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000087f ), + .Q(\blk00000003/sig000006d5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e5 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e1 ), + .Q(\blk00000003/sig0000087f ), + .Q15(\NLW_blk00000003/blk000006e5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000087e ), + .Q(\blk00000003/sig000006d3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e3 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002df ), + .Q(\blk00000003/sig0000087e ), + .Q15(\NLW_blk00000003/blk000006e3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000087d ), + .Q(\blk00000003/sig000006d2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006e1 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002de ), + .Q(\blk00000003/sig0000087d ), + .Q15(\NLW_blk00000003/blk000006e1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000087c ), + .Q(\blk00000003/sig000006d4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006df ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002e0 ), + .Q(\blk00000003/sig0000087c ), + .Q15(\NLW_blk00000003/blk000006df_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006de ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000087b ), + .Q(\blk00000003/sig000006d0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006dd ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002dc ), + .Q(\blk00000003/sig0000087b ), + .Q15(\NLW_blk00000003/blk000006dd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000087a ), + .Q(\blk00000003/sig000006cf ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006db ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002db ), + .Q(\blk00000003/sig0000087a ), + .Q15(\NLW_blk00000003/blk000006db_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006da ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000879 ), + .Q(\blk00000003/sig000006d1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d9 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002dd ), + .Q(\blk00000003/sig00000879 ), + .Q15(\NLW_blk00000003/blk000006d9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000878 ), + .Q(\blk00000003/sig000006cd ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d7 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d9 ), + .Q(\blk00000003/sig00000878 ), + .Q15(\NLW_blk00000003/blk000006d7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000877 ), + .Q(\blk00000003/sig0000076c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d5 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d8 ), + .Q(\blk00000003/sig00000877 ), + .Q15(\NLW_blk00000003/blk000006d5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000876 ), + .Q(\blk00000003/sig000006ce ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d3 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002da ), + .Q(\blk00000003/sig00000876 ), + .Q15(\NLW_blk00000003/blk000006d3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000875 ), + .Q(\blk00000003/sig0000076b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006d1 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d7 ), + .Q(\blk00000003/sig00000875 ), + .Q15(\NLW_blk00000003/blk000006d1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006d0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000874 ), + .Q(\blk00000003/sig0000076a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006cf ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d6 ), + .Q(\blk00000003/sig00000874 ), + .Q15(\NLW_blk00000003/blk000006cf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ce ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000873 ), + .Q(\blk00000003/sig00000769 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006cd ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d5 ), + .Q(\blk00000003/sig00000873 ), + .Q15(\NLW_blk00000003/blk000006cd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000872 ), + .Q(\blk00000003/sig00000768 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006cb ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d4 ), + .Q(\blk00000003/sig00000872 ), + .Q15(\NLW_blk00000003/blk000006cb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000871 ), + .Q(\blk00000003/sig00000766 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c9 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d2 ), + .Q(\blk00000003/sig00000871 ), + .Q15(\NLW_blk00000003/blk000006c9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000870 ), + .Q(\blk00000003/sig00000765 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c7 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d1 ), + .Q(\blk00000003/sig00000870 ), + .Q15(\NLW_blk00000003/blk000006c7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000086f ), + .Q(\blk00000003/sig00000767 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c5 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d3 ), + .Q(\blk00000003/sig0000086f ), + .Q15(\NLW_blk00000003/blk000006c5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000086e ), + .Q(\blk00000003/sig000006fb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c3 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002cf ), + .Q(\blk00000003/sig0000086e ), + .Q15(\NLW_blk00000003/blk000006c3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000086d ), + .Q(\blk00000003/sig000006fa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006c1 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002ce ), + .Q(\blk00000003/sig0000086d ), + .Q15(\NLW_blk00000003/blk000006c1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000086c ), + .Q(\blk00000003/sig000006fc ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006bf ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002d0 ), + .Q(\blk00000003/sig0000086c ), + .Q15(\NLW_blk00000003/blk000006bf_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006be ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000086b ), + .Q(\blk00000003/sig000006f8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006bd ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002cc ), + .Q(\blk00000003/sig0000086b ), + .Q15(\NLW_blk00000003/blk000006bd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000086a ), + .Q(\blk00000003/sig000006f7 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006bb ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002cb ), + .Q(\blk00000003/sig0000086a ), + .Q15(\NLW_blk00000003/blk000006bb_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000869 ), + .Q(\blk00000003/sig000006f9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b9 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002cd ), + .Q(\blk00000003/sig00000869 ), + .Q15(\NLW_blk00000003/blk000006b9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000868 ), + .Q(\blk00000003/sig000006f6 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b7 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002ca ), + .Q(\blk00000003/sig00000868 ), + .Q15(\NLW_blk00000003/blk000006b7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000867 ), + .Q(\blk00000003/sig000006f5 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b5 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c9 ), + .Q(\blk00000003/sig00000867 ), + .Q15(\NLW_blk00000003/blk000006b5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000866 ), + .Q(\blk00000003/sig000006f4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b3 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c8 ), + .Q(\blk00000003/sig00000866 ), + .Q15(\NLW_blk00000003/blk000006b3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000865 ), + .Q(\blk00000003/sig000006f3 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006b1 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c7 ), + .Q(\blk00000003/sig00000865 ), + .Q15(\NLW_blk00000003/blk000006b1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000864 ), + .Q(\blk00000003/sig000006f1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006af ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c5 ), + .Q(\blk00000003/sig00000864 ), + .Q15(\NLW_blk00000003/blk000006af_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000863 ), + .Q(\blk00000003/sig000006f0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ad ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c4 ), + .Q(\blk00000003/sig00000863 ), + .Q15(\NLW_blk00000003/blk000006ad_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000862 ), + .Q(\blk00000003/sig000006f2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006ab ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c6 ), + .Q(\blk00000003/sig00000862 ), + .Q15(\NLW_blk00000003/blk000006ab_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000861 ), + .Q(\blk00000003/sig000006ee ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a9 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c2 ), + .Q(\blk00000003/sig00000861 ), + .Q15(\NLW_blk00000003/blk000006a9_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000860 ), + .Q(\blk00000003/sig000006ed ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a7 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c1 ), + .Q(\blk00000003/sig00000860 ), + .Q15(\NLW_blk00000003/blk000006a7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000085f ), + .Q(\blk00000003/sig000006ef ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a5 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c3 ), + .Q(\blk00000003/sig0000085f ), + .Q15(\NLW_blk00000003/blk000006a5_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000085e ), + .Q(\blk00000003/sig0000077b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a3 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002bf ), + .Q(\blk00000003/sig0000085e ), + .Q15(\NLW_blk00000003/blk000006a3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000085d ), + .Q(\blk00000003/sig0000077a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000006a1 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002be ), + .Q(\blk00000003/sig0000085d ), + .Q15(\NLW_blk00000003/blk000006a1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000006a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000085c ), + .Q(\blk00000003/sig0000077c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069f ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002c0 ), + .Q(\blk00000003/sig0000085c ), + .Q15(\NLW_blk00000003/blk0000069f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000085b ), + .Q(\blk00000003/sig00000779 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069d ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002bd ), + .Q(\blk00000003/sig0000085b ), + .Q15(\NLW_blk00000003/blk0000069d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000085a ), + .Q(\blk00000003/sig00000778 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000069b ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002bc ), + .Q(\blk00000003/sig0000085a ), + .Q15(\NLW_blk00000003/blk0000069b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000069a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000859 ), + .Q(\blk00000003/sig00000777 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000699 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002bb ), + .Q(\blk00000003/sig00000859 ), + .Q15(\NLW_blk00000003/blk00000699_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000698 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000858 ), + .Q(\blk00000003/sig00000776 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000697 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002ba ), + .Q(\blk00000003/sig00000858 ), + .Q15(\NLW_blk00000003/blk00000697_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000696 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000857 ), + .Q(\blk00000003/sig00000397 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000695 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002a5 ), + .Q(\blk00000003/sig00000857 ), + .Q15(\NLW_blk00000003/blk00000695_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000694 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000856 ), + .Q(\blk00000003/sig00000398 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000693 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000037e ), + .Q(\blk00000003/sig00000856 ), + .Q15(\NLW_blk00000003/blk00000693_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000692 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000855 ), + .Q(\blk00000003/sig00000775 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000691 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002b9 ), + .Q(\blk00000003/sig00000855 ), + .Q15(\NLW_blk00000003/blk00000691_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000690 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000854 ), + .Q(\blk00000003/sig0000071e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000068f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[0]), + .Q(\blk00000003/sig00000854 ), + .Q15(\NLW_blk00000003/blk0000068f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000068e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000853 ), + .Q(\blk00000003/sig0000071d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000068d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[1]), + .Q(\blk00000003/sig00000853 ), + .Q15(\NLW_blk00000003/blk0000068d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000068c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000852 ), + .Q(\blk00000003/sig00000814 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000068b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig000000ac ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002a1 ), + .Q(\blk00000003/sig00000852 ), + .Q15(\NLW_blk00000003/blk0000068b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000068a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000851 ), + .Q(\blk00000003/sig0000071b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000689 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[3]), + .Q(\blk00000003/sig00000851 ), + .Q15(\NLW_blk00000003/blk00000689_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000688 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000850 ), + .Q(\blk00000003/sig0000071a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000687 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[4]), + .Q(\blk00000003/sig00000850 ), + .Q15(\NLW_blk00000003/blk00000687_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000686 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000084f ), + .Q(\blk00000003/sig0000071c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000685 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[2]), + .Q(\blk00000003/sig0000084f ), + .Q15(\NLW_blk00000003/blk00000685_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000684 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000084e ), + .Q(\blk00000003/sig00000719 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000683 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[5]), + .Q(\blk00000003/sig0000084e ), + .Q15(\NLW_blk00000003/blk00000683_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000682 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000084d ), + .Q(\blk00000003/sig00000718 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000681 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[6]), + .Q(\blk00000003/sig0000084d ), + .Q15(\NLW_blk00000003/blk00000681_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000680 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000084c ), + .Q(\blk00000003/sig00000717 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000067f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[7]), + .Q(\blk00000003/sig0000084c ), + .Q15(\NLW_blk00000003/blk0000067f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000067e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000084b ), + .Q(\blk00000003/sig00000716 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000067d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[8]), + .Q(\blk00000003/sig0000084b ), + .Q15(\NLW_blk00000003/blk0000067d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000067c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000084a ), + .Q(\blk00000003/sig00000714 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000067b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[10]), + .Q(\blk00000003/sig0000084a ), + .Q15(\NLW_blk00000003/blk0000067b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000067a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000849 ), + .Q(\blk00000003/sig00000713 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000679 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[11]), + .Q(\blk00000003/sig00000849 ), + .Q15(\NLW_blk00000003/blk00000679_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000678 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000848 ), + .Q(\blk00000003/sig00000715 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000677 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[9]), + .Q(\blk00000003/sig00000848 ), + .Q15(\NLW_blk00000003/blk00000677_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000676 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000847 ), + .Q(\blk00000003/sig00000711 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000675 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[13]), + .Q(\blk00000003/sig00000847 ), + .Q15(\NLW_blk00000003/blk00000675_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000674 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000846 ), + .Q(\blk00000003/sig00000710 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000673 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[14]), + .Q(\blk00000003/sig00000846 ), + .Q15(\NLW_blk00000003/blk00000673_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000672 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000845 ), + .Q(\blk00000003/sig00000712 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000671 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[12]), + .Q(\blk00000003/sig00000845 ), + .Q15(\NLW_blk00000003/blk00000671_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000670 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000844 ), + .Q(\blk00000003/sig0000070e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000066f ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[16]), + .Q(\blk00000003/sig00000844 ), + .Q15(\NLW_blk00000003/blk0000066f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000066e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000843 ), + .Q(\blk00000003/sig0000070d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000066d ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[17]), + .Q(\blk00000003/sig00000843 ), + .Q15(\NLW_blk00000003/blk0000066d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000066c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000842 ), + .Q(\blk00000003/sig0000070f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000066b ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(coef_din_0[15]), + .Q(\blk00000003/sig00000842 ), + .Q15(\NLW_blk00000003/blk0000066b_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000066a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000841 ), + .Q(\blk00000003/sig000002b0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000669 ( + .A0(\blk00000003/sig000000ac ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002b2 ), + .Q(\blk00000003/sig00000841 ), + .Q15(\NLW_blk00000003/blk00000669_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000668 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000840 ), + .Q(\blk00000003/sig0000068b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000667 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig000000ac ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig000002a7 ), + .Q(\blk00000003/sig00000840 ), + .Q15(\NLW_blk00000003/blk00000667_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000666 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000083f ), + .Q(\blk00000003/sig00000786 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000665 ( + .A0(\blk00000003/sig00000049 ), + .A1(\blk00000003/sig00000049 ), + .A2(\blk00000003/sig00000049 ), + .A3(\blk00000003/sig00000049 ), + .CE(ce), + .CLK(clk), + .D(\blk00000003/sig0000029f ), + .Q(\blk00000003/sig0000083f ), + .Q15(\NLW_blk00000003/blk00000665_Q15_UNCONNECTED ) + ); + INV \blk00000003/blk00000664 ( + .I(\blk00000003/sig00000313 ), + .O(\blk00000003/sig00000353 ) + ); + INV \blk00000003/blk00000663 ( + .I(\blk00000003/sig0000035c ), + .O(\blk00000003/sig0000034c ) + ); + INV \blk00000003/blk00000662 ( + .I(\blk00000003/sig00000363 ), + .O(\blk00000003/sig00000352 ) + ); + INV \blk00000003/blk00000661 ( + .I(\blk00000003/sig0000029f ), + .O(\blk00000003/sig00000361 ) + ); + INV \blk00000003/blk00000660 ( + .I(\blk00000003/sig00000795 ), + .O(\blk00000003/sig0000080d ) + ); + INV \blk00000003/blk0000065f ( + .I(\blk00000003/sig00000317 ), + .O(\blk00000003/sig00000364 ) + ); + INV \blk00000003/blk0000065e ( + .I(\blk00000003/sig00000313 ), + .O(\blk00000003/sig0000034d ) + ); + INV \blk00000003/blk0000065d ( + .I(\blk00000003/sig000002ec ), + .O(\blk00000003/sig00000318 ) + ); + INV \blk00000003/blk0000065c ( + .I(\blk00000003/sig0000029d ), + .O(\blk00000003/sig00000166 ) + ); + INV \blk00000003/blk0000065b ( + .I(\blk00000003/sig00000159 ), + .O(\blk00000003/sig00000297 ) + ); + INV \blk00000003/blk0000065a ( + .I(\blk00000003/sig00000163 ), + .O(\blk00000003/sig00000164 ) + ); + LUT3 #( + .INIT ( 8'h40 )) + \blk00000003/blk00000659 ( + .I0(\blk00000003/sig00000320 ), + .I1(\blk00000003/sig00000309 ), + .I2(coef_ld), + .O(\blk00000003/sig0000031c ) + ); + LUT5 #( + .INIT ( 32'h4F444444 )) + \blk00000003/blk00000658 ( + .I0(\blk00000003/sig0000031d ), + .I1(\blk00000003/sig00000311 ), + .I2(\blk00000003/sig00000320 ), + .I3(coef_ld), + .I4(\blk00000003/sig00000309 ), + .O(\blk00000003/sig00000314 ) + ); + LUT4 #( + .INIT ( 16'h1000 )) + \blk00000003/blk00000657 ( + .I0(coef_ld), + .I1(\blk00000003/sig0000030b ), + .I2(coef_we), + .I3(\blk00000003/sig00000309 ), + .O(\blk00000003/sig0000031b ) + ); + LUT5 #( + .INIT ( 32'h20AA2020 )) + \blk00000003/blk00000656 ( + .I0(\blk00000003/sig00000309 ), + .I1(\blk00000003/sig0000030b ), + .I2(coef_we), + .I3(\blk00000003/sig00000320 ), + .I4(coef_ld), + .O(\blk00000003/sig0000031a ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk00000655 ( + .I0(\blk00000003/sig0000035c ), + .I1(ce), + .I2(\blk00000003/sig00000311 ), + .I3(\blk00000003/sig000002ea ), + .O(\blk00000003/sig0000083e ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk00000654 ( + .I0(\blk00000003/sig00000363 ), + .I1(ce), + .I2(\blk00000003/sig0000030f ), + .I3(\blk00000003/sig00000354 ), + .O(\blk00000003/sig0000083d ) + ); + LUT4 #( + .INIT ( 16'hEA2A )) + \blk00000003/blk00000653 ( + .I0(\blk00000003/sig00000810 ), + .I1(ce), + .I2(\blk00000003/sig000002a5 ), + .I3(\blk00000003/sig000002a7 ), + .O(\blk00000003/sig0000083b ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk00000652 ( + .I0(ce), + .I1(sclr), + .I2(\blk00000003/sig00000813 ), + .O(\blk00000003/sig0000083a ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk00000651 ( + .I0(ce), + .I1(\blk00000003/sig00000320 ), + .I2(\blk00000003/sig00000811 ), + .O(\blk00000003/sig00000839 ) + ); + LUT5 #( + .INIT ( 32'h6AAAAAAA )) + \blk00000003/blk00000650 ( + .I0(\blk00000003/sig00000812 ), + .I1(\blk00000003/sig00000366 ), + .I2(ce), + .I3(nd), + .I4(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig0000083c ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk0000064f ( + .C(clk), + .D(\blk00000003/sig0000083e ), + .Q(\blk00000003/sig0000035c ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk0000064e ( + .C(clk), + .D(\blk00000003/sig0000083d ), + .Q(\blk00000003/sig00000363 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064d ( + .C(clk), + .D(\blk00000003/sig0000083c ), + .R(sclr), + .Q(\blk00000003/sig00000812 ) + ); + FDR #( + .INIT ( 1'b0 )) + \blk00000003/blk0000064c ( + .C(clk), + .D(\blk00000003/sig0000083b ), + .R(sclr), + .Q(\blk00000003/sig00000810 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000064b ( + .I0(\blk00000003/sig00000798 ), + .O(\blk00000003/sig00000793 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000064a ( + .I0(\blk00000003/sig00000797 ), + .O(\blk00000003/sig00000790 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000649 ( + .I0(\blk00000003/sig00000796 ), + .O(\blk00000003/sig0000078d ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000648 ( + .I0(\blk00000003/sig00000795 ), + .O(\blk00000003/sig0000078a ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000647 ( + .I0(\blk00000003/sig00000394 ), + .O(\blk00000003/sig00000395 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000646 ( + .I0(\blk00000003/sig00000390 ), + .O(\blk00000003/sig00000391 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000645 ( + .I0(\blk00000003/sig0000037c ), + .O(\blk00000003/sig00000376 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000644 ( + .I0(\blk00000003/sig00000812 ), + .O(\blk00000003/sig0000036c ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000643 ( + .I0(\blk00000003/sig0000033d ), + .O(\blk00000003/sig0000033e ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000642 ( + .I0(\blk00000003/sig00000339 ), + .O(\blk00000003/sig0000033a ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000641 ( + .I0(\blk00000003/sig0000032b ), + .O(\blk00000003/sig00000329 ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk00000640 ( + .I0(\blk00000003/sig00000324 ), + .O(\blk00000003/sig00000322 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk0000063f ( + .I0(\blk00000003/sig00000324 ), + .I1(\blk00000003/sig00000327 ), + .O(\blk00000003/sig000002fd ) + ); + LUT1 #( + .INIT ( 2'h2 )) + \blk00000003/blk0000063e ( + .I0(\blk00000003/sig0000029d ), + .O(\blk00000003/sig00000167 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000807 ), + .R(sclr), + .Q(\blk00000003/sig0000080c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000804 ), + .R(sclr), + .Q(\blk00000003/sig0000080b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000801 ), + .R(sclr), + .Q(\blk00000003/sig0000080a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000063a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007fe ), + .R(sclr), + .Q(\blk00000003/sig00000809 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000639 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007fb ), + .R(sclr), + .Q(\blk00000003/sig00000808 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000638 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000788 ), + .R(sclr), + .Q(\blk00000003/sig00000799 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000637 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000794 ), + .R(sclr), + .Q(\blk00000003/sig00000798 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000636 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000791 ), + .R(sclr), + .Q(\blk00000003/sig00000797 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000635 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000078e ), + .R(sclr), + .Q(\blk00000003/sig00000796 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000634 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000078b ), + .S(sclr), + .Q(\blk00000003/sig00000795 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000633 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000396 ), + .R(\blk00000003/sig00000399 ), + .Q(\blk00000003/sig00000394 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000632 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000393 ), + .R(\blk00000003/sig00000399 ), + .Q(\blk00000003/sig00000390 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000631 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000389 ), + .S(\blk00000003/sig00000398 ), + .Q(\blk00000003/sig0000038e ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000630 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000038c ), + .S(\blk00000003/sig00000398 ), + .Q(\blk00000003/sig0000038d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000381 ), + .R(\blk00000003/sig00000398 ), + .Q(\blk00000003/sig00000387 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000384 ), + .R(\blk00000003/sig00000398 ), + .Q(\blk00000003/sig00000386 ) + ); + FDR \blk00000003/blk0000062d ( + .C(clk), + .D(\blk00000003/sig0000083a ), + .R(ce), + .Q(\blk00000003/sig00000813 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000062c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000377 ), + .S(sclr), + .Q(\blk00000003/sig0000037c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000037a ), + .R(sclr), + .Q(\blk00000003/sig0000037b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000062a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000371 ), + .R(sclr), + .Q(\blk00000003/sig000002b8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000629 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000374 ), + .R(sclr), + .Q(\blk00000003/sig000002b7 ) + ); + FDR \blk00000003/blk00000628 ( + .C(clk), + .D(\blk00000003/sig00000839 ), + .R(ce), + .Q(\blk00000003/sig00000811 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000627 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000033f ), + .R(\blk00000003/sig00000342 ), + .Q(\blk00000003/sig0000033d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000626 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000033c ), + .R(\blk00000003/sig00000342 ), + .Q(\blk00000003/sig00000339 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000625 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000331 ), + .R(coef_ld), + .Q(\blk00000003/sig00000337 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000624 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000334 ), + .R(coef_ld), + .Q(\blk00000003/sig00000336 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000623 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000032d ), + .R(sclr), + .Q(\blk00000003/sig0000032e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000622 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000032a ), + .R(sclr), + .Q(\blk00000003/sig0000032b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000621 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000326 ), + .R(coef_ld), + .Q(\blk00000003/sig00000327 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000620 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000323 ), + .R(coef_ld), + .Q(\blk00000003/sig00000324 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk0000061f ( + .I0(\blk00000003/sig00000163 ), + .I1(sclr), + .O(\blk00000003/sig00000838 ) + ); + FD #( + .INIT ( 1'b1 )) + \blk00000003/blk0000061e ( + .C(clk), + .D(\blk00000003/sig00000838 ), + .Q(\blk00000003/sig00000163 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000061d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000015b ), + .R(sclr), + .Q(\blk00000003/sig00000159 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk0000061c ( + .I0(\blk00000003/sig00000808 ), + .I1(\blk00000003/sig00000795 ), + .O(\blk00000003/sig000007fa ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk0000061b ( + .I0(\blk00000003/sig00000809 ), + .I1(\blk00000003/sig00000795 ), + .O(\blk00000003/sig000007fd ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk0000061a ( + .I0(\blk00000003/sig0000080a ), + .I1(\blk00000003/sig00000795 ), + .O(\blk00000003/sig00000800 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk00000619 ( + .I0(\blk00000003/sig0000080b ), + .I1(\blk00000003/sig00000795 ), + .O(\blk00000003/sig00000803 ) + ); + LUT3 #( + .INIT ( 8'hDE )) + \blk00000003/blk00000618 ( + .I0(\blk00000003/sig0000080c ), + .I1(\blk00000003/sig00000795 ), + .I2(\blk00000003/sig000002ae ), + .O(\blk00000003/sig00000806 ) + ); + LUT3 #( + .INIT ( 8'h04 )) + \blk00000003/blk00000617 ( + .I0(\blk00000003/sig000002ae ), + .I1(\blk00000003/sig0000004a ), + .I2(\blk00000003/sig00000795 ), + .O(\blk00000003/sig000007f8 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000616 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000df ), + .I3(NlwRenamedSig_OI_dout_2[45]), + .O(\blk00000003/sig000007f6 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000615 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000de ), + .I3(NlwRenamedSig_OI_dout_2[46]), + .O(\blk00000003/sig000007f7 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000614 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e0 ), + .I3(NlwRenamedSig_OI_dout_2[44]), + .O(\blk00000003/sig000007f5 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000613 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e2 ), + .I3(NlwRenamedSig_OI_dout_2[42]), + .O(\blk00000003/sig000007f3 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000612 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e1 ), + .I3(NlwRenamedSig_OI_dout_2[43]), + .O(\blk00000003/sig000007f4 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000611 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e3 ), + .I3(NlwRenamedSig_OI_dout_2[41]), + .O(\blk00000003/sig000007f2 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000610 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e5 ), + .I3(NlwRenamedSig_OI_dout_2[39]), + .O(\blk00000003/sig000007f0 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000060f ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e4 ), + .I3(NlwRenamedSig_OI_dout_2[40]), + .O(\blk00000003/sig000007f1 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000060e ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e6 ), + .I3(NlwRenamedSig_OI_dout_2[38]), + .O(\blk00000003/sig000007ef ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000060d ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e8 ), + .I3(NlwRenamedSig_OI_dout_2[36]), + .O(\blk00000003/sig000007ed ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000060c ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e7 ), + .I3(NlwRenamedSig_OI_dout_2[37]), + .O(\blk00000003/sig000007ee ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000060b ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000e9 ), + .I3(NlwRenamedSig_OI_dout_2[35]), + .O(\blk00000003/sig000007ec ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk0000060a ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000eb ), + .I3(NlwRenamedSig_OI_dout_2[33]), + .O(\blk00000003/sig000007ea ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000609 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000ea ), + .I3(NlwRenamedSig_OI_dout_2[34]), + .O(\blk00000003/sig000007eb ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000608 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000ec ), + .I3(NlwRenamedSig_OI_dout_2[32]), + .O(\blk00000003/sig000007e9 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000607 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000ee ), + .I3(NlwRenamedSig_OI_dout_2[30]), + .O(\blk00000003/sig000007e7 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000606 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000ed ), + .I3(NlwRenamedSig_OI_dout_2[31]), + .O(\blk00000003/sig000007e8 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000605 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000ef ), + .I3(NlwRenamedSig_OI_dout_2[29]), + .O(\blk00000003/sig000007e6 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000604 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f1 ), + .I3(NlwRenamedSig_OI_dout_2[27]), + .O(\blk00000003/sig000007e4 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000603 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f0 ), + .I3(NlwRenamedSig_OI_dout_2[28]), + .O(\blk00000003/sig000007e5 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000602 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f2 ), + .I3(NlwRenamedSig_OI_dout_2[26]), + .O(\blk00000003/sig000007e3 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000601 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f4 ), + .I3(NlwRenamedSig_OI_dout_2[24]), + .O(\blk00000003/sig000007e1 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk00000600 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f3 ), + .I3(NlwRenamedSig_OI_dout_2[25]), + .O(\blk00000003/sig000007e2 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ff ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f5 ), + .I3(NlwRenamedSig_OI_dout_2[23]), + .O(\blk00000003/sig000007e0 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005fe ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f7 ), + .I3(NlwRenamedSig_OI_dout_2[21]), + .O(\blk00000003/sig000007de ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005fd ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f6 ), + .I3(NlwRenamedSig_OI_dout_2[22]), + .O(\blk00000003/sig000007df ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005fc ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f8 ), + .I3(NlwRenamedSig_OI_dout_2[20]), + .O(\blk00000003/sig000007dd ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005fb ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000fa ), + .I3(NlwRenamedSig_OI_dout_2[18]), + .O(\blk00000003/sig000007db ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005fa ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000f9 ), + .I3(NlwRenamedSig_OI_dout_2[19]), + .O(\blk00000003/sig000007dc ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f9 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000fb ), + .I3(NlwRenamedSig_OI_dout_2[17]), + .O(\blk00000003/sig000007da ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f8 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000837 ), + .I3(NlwRenamedSig_OI_dout_2[15]), + .O(\blk00000003/sig000007d8 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f7 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig000000fc ), + .I3(NlwRenamedSig_OI_dout_2[16]), + .O(\blk00000003/sig000007d9 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f6 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000836 ), + .I3(NlwRenamedSig_OI_dout_2[14]), + .O(\blk00000003/sig000007d7 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f5 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000835 ), + .I3(NlwRenamedSig_OI_dout_2[12]), + .O(\blk00000003/sig000007d5 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f4 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000834 ), + .I3(NlwRenamedSig_OI_dout_2[13]), + .O(\blk00000003/sig000007d6 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f3 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000833 ), + .I3(NlwRenamedSig_OI_dout_2[11]), + .O(\blk00000003/sig000007d4 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f2 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000832 ), + .I3(NlwRenamedSig_OI_dout_2[9]), + .O(\blk00000003/sig000007d2 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f1 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000831 ), + .I3(NlwRenamedSig_OI_dout_2[10]), + .O(\blk00000003/sig000007d3 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005f0 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000830 ), + .I3(NlwRenamedSig_OI_dout_2[8]), + .O(\blk00000003/sig000007d1 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ef ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000082f ), + .I3(NlwRenamedSig_OI_dout_2[6]), + .O(\blk00000003/sig000007cf ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ee ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000082e ), + .I3(NlwRenamedSig_OI_dout_2[7]), + .O(\blk00000003/sig000007d0 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ed ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000082d ), + .I3(NlwRenamedSig_OI_dout_2[5]), + .O(\blk00000003/sig000007ce ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ec ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000082c ), + .I3(NlwRenamedSig_OI_dout_2[3]), + .O(\blk00000003/sig000007cc ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005eb ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000082b ), + .I3(NlwRenamedSig_OI_dout_2[4]), + .O(\blk00000003/sig000007cd ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ea ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000082a ), + .I3(NlwRenamedSig_OI_dout_2[2]), + .O(\blk00000003/sig000007cb ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e9 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000829 ), + .I3(NlwRenamedSig_OI_dout_2[1]), + .O(\blk00000003/sig000007ca ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e8 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000134 ), + .I3(NlwRenamedSig_OI_dout_1[46]), + .O(\blk00000003/sig000007c8 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e7 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000828 ), + .I3(NlwRenamedSig_OI_dout_2[0]), + .O(\blk00000003/sig000007c9 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e6 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000135 ), + .I3(NlwRenamedSig_OI_dout_1[45]), + .O(\blk00000003/sig000007c7 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e5 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000137 ), + .I3(NlwRenamedSig_OI_dout_1[43]), + .O(\blk00000003/sig000007c5 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e4 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000136 ), + .I3(NlwRenamedSig_OI_dout_1[44]), + .O(\blk00000003/sig000007c6 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e3 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000138 ), + .I3(NlwRenamedSig_OI_dout_1[42]), + .O(\blk00000003/sig000007c4 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e2 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000013a ), + .I3(NlwRenamedSig_OI_dout_1[40]), + .O(\blk00000003/sig000007c2 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e1 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000139 ), + .I3(NlwRenamedSig_OI_dout_1[41]), + .O(\blk00000003/sig000007c3 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005e0 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000013b ), + .I3(NlwRenamedSig_OI_dout_1[39]), + .O(\blk00000003/sig000007c1 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005df ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000013d ), + .I3(NlwRenamedSig_OI_dout_1[37]), + .O(\blk00000003/sig000007bf ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005de ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000013c ), + .I3(NlwRenamedSig_OI_dout_1[38]), + .O(\blk00000003/sig000007c0 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005dd ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000013e ), + .I3(NlwRenamedSig_OI_dout_1[36]), + .O(\blk00000003/sig000007be ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005dc ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000140 ), + .I3(NlwRenamedSig_OI_dout_1[34]), + .O(\blk00000003/sig000007bc ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005db ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000013f ), + .I3(NlwRenamedSig_OI_dout_1[35]), + .O(\blk00000003/sig000007bd ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005da ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000141 ), + .I3(NlwRenamedSig_OI_dout_1[33]), + .O(\blk00000003/sig000007bb ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d9 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000143 ), + .I3(NlwRenamedSig_OI_dout_1[31]), + .O(\blk00000003/sig000007b9 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d8 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000142 ), + .I3(NlwRenamedSig_OI_dout_1[32]), + .O(\blk00000003/sig000007ba ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d7 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000144 ), + .I3(NlwRenamedSig_OI_dout_1[30]), + .O(\blk00000003/sig000007b8 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d6 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000146 ), + .I3(NlwRenamedSig_OI_dout_1[28]), + .O(\blk00000003/sig000007b6 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d5 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000145 ), + .I3(NlwRenamedSig_OI_dout_1[29]), + .O(\blk00000003/sig000007b7 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d4 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000147 ), + .I3(NlwRenamedSig_OI_dout_1[27]), + .O(\blk00000003/sig000007b5 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d3 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000149 ), + .I3(NlwRenamedSig_OI_dout_1[25]), + .O(\blk00000003/sig000007b3 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d2 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000148 ), + .I3(NlwRenamedSig_OI_dout_1[26]), + .O(\blk00000003/sig000007b4 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d1 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000014a ), + .I3(NlwRenamedSig_OI_dout_1[24]), + .O(\blk00000003/sig000007b2 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005d0 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000014c ), + .I3(NlwRenamedSig_OI_dout_1[22]), + .O(\blk00000003/sig000007b0 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005cf ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000014b ), + .I3(NlwRenamedSig_OI_dout_1[23]), + .O(\blk00000003/sig000007b1 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ce ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000014d ), + .I3(NlwRenamedSig_OI_dout_1[21]), + .O(\blk00000003/sig000007af ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005cd ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000014f ), + .I3(NlwRenamedSig_OI_dout_1[19]), + .O(\blk00000003/sig000007ad ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005cc ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000014e ), + .I3(NlwRenamedSig_OI_dout_1[20]), + .O(\blk00000003/sig000007ae ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005cb ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000150 ), + .I3(NlwRenamedSig_OI_dout_1[18]), + .O(\blk00000003/sig000007ac ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ca ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000152 ), + .I3(NlwRenamedSig_OI_dout_1[16]), + .O(\blk00000003/sig000007aa ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c9 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000151 ), + .I3(NlwRenamedSig_OI_dout_1[17]), + .O(\blk00000003/sig000007ab ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c8 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000827 ), + .I3(NlwRenamedSig_OI_dout_1[15]), + .O(\blk00000003/sig000007a9 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c7 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000826 ), + .I3(NlwRenamedSig_OI_dout_1[13]), + .O(\blk00000003/sig000007a7 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c6 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000825 ), + .I3(NlwRenamedSig_OI_dout_1[14]), + .O(\blk00000003/sig000007a8 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c5 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000824 ), + .I3(NlwRenamedSig_OI_dout_1[12]), + .O(\blk00000003/sig000007a6 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c4 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000823 ), + .I3(NlwRenamedSig_OI_dout_1[10]), + .O(\blk00000003/sig000007a4 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c3 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000822 ), + .I3(NlwRenamedSig_OI_dout_1[11]), + .O(\blk00000003/sig000007a5 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c2 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000821 ), + .I3(NlwRenamedSig_OI_dout_1[9]), + .O(\blk00000003/sig000007a3 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c1 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000820 ), + .I3(NlwRenamedSig_OI_dout_1[7]), + .O(\blk00000003/sig000007a1 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005c0 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000081f ), + .I3(NlwRenamedSig_OI_dout_1[8]), + .O(\blk00000003/sig000007a2 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005bf ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000081e ), + .I3(NlwRenamedSig_OI_dout_1[6]), + .O(\blk00000003/sig000007a0 ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005be ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000081d ), + .I3(NlwRenamedSig_OI_dout_1[4]), + .O(\blk00000003/sig0000079e ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005bd ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000081c ), + .I3(NlwRenamedSig_OI_dout_1[5]), + .O(\blk00000003/sig0000079f ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005bc ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000081b ), + .I3(NlwRenamedSig_OI_dout_1[3]), + .O(\blk00000003/sig0000079d ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005bb ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig0000081a ), + .I3(NlwRenamedSig_OI_dout_1[1]), + .O(\blk00000003/sig0000079b ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005ba ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000819 ), + .I3(NlwRenamedSig_OI_dout_1[2]), + .O(\blk00000003/sig0000079c ) + ); + LUT4 #( + .INIT ( 16'h5140 )) + \blk00000003/blk000005b9 ( + .I0(\blk00000003/sig0000029d ), + .I1(\blk00000003/sig000002ae ), + .I2(\blk00000003/sig00000818 ), + .I3(NlwRenamedSig_OI_dout_1[0]), + .O(\blk00000003/sig0000079a ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk000005b8 ( + .I0(\blk00000003/sig00000799 ), + .I1(\blk00000003/sig00000795 ), + .O(\blk00000003/sig00000787 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005b7 ( + .I0(ce), + .I1(\blk00000003/sig000002b0 ), + .O(\blk00000003/sig00000817 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005b6 ( + .I0(ce), + .I1(\blk00000003/sig0000067a ), + .O(\blk00000003/sig00000785 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005b5 ( + .I0(ce), + .I1(\blk00000003/sig00000816 ), + .O(\blk00000003/sig00000744 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005b4 ( + .I0(ce), + .I1(\blk00000003/sig00000815 ), + .O(\blk00000003/sig00000743 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk000005b3 ( + .I0(\blk00000003/sig0000038d ), + .I1(\blk00000003/sig00000397 ), + .O(\blk00000003/sig0000038b ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk000005b2 ( + .I0(\blk00000003/sig0000038e ), + .I1(\blk00000003/sig00000397 ), + .O(\blk00000003/sig00000388 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk000005b1 ( + .I0(\blk00000003/sig00000397 ), + .I1(\blk00000003/sig00000814 ), + .O(\blk00000003/sig00000385 ) + ); + LUT3 #( + .INIT ( 8'hEA )) + \blk00000003/blk000005b0 ( + .I0(\blk00000003/sig00000386 ), + .I1(\blk00000003/sig00000397 ), + .I2(\blk00000003/sig00000814 ), + .O(\blk00000003/sig00000383 ) + ); + LUT3 #( + .INIT ( 8'hDA )) + \blk00000003/blk000005af ( + .I0(\blk00000003/sig00000387 ), + .I1(\blk00000003/sig00000814 ), + .I2(\blk00000003/sig00000397 ), + .O(\blk00000003/sig00000380 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk000005ae ( + .I0(sclr), + .I1(\blk00000003/sig00000813 ), + .O(\blk00000003/sig0000037d ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk000005ad ( + .I0(\blk00000003/sig0000037b ), + .I1(\blk00000003/sig000002a7 ), + .O(\blk00000003/sig00000379 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk000005ac ( + .I0(\blk00000003/sig0000036e ), + .I1(nd), + .I2(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig00000375 ) + ); + LUT4 #( + .INIT ( 16'hFF80 )) + \blk00000003/blk000005ab ( + .I0(nd), + .I1(\blk00000003/sig0000036e ), + .I2(NlwRenamedSig_OI_rfd), + .I3(\blk00000003/sig000002b7 ), + .O(\blk00000003/sig00000373 ) + ); + LUT4 #( + .INIT ( 16'hDFA0 )) + \blk00000003/blk000005aa ( + .I0(nd), + .I1(\blk00000003/sig0000036e ), + .I2(NlwRenamedSig_OI_rfd), + .I3(\blk00000003/sig000002b8 ), + .O(\blk00000003/sig00000370 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000005a9 ( + .I0(nd), + .I1(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig00000368 ) + ); + LUT3 #( + .INIT ( 8'h09 )) + \blk00000003/blk000005a8 ( + .I0(\blk00000003/sig00000812 ), + .I1(\blk00000003/sig000002b7 ), + .I2(\blk00000003/sig000002b8 ), + .O(\blk00000003/sig0000036b ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk000005a7 ( + .I0(\blk00000003/sig00000317 ), + .I1(\blk00000003/sig00000310 ), + .O(\blk00000003/sig00000362 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk000005a6 ( + .I0(\blk00000003/sig00000317 ), + .I1(\blk00000003/sig0000030f ), + .O(\blk00000003/sig0000035f ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk000005a5 ( + .I0(\blk00000003/sig00000317 ), + .I1(\blk00000003/sig00000313 ), + .O(\blk00000003/sig0000035d ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk000005a4 ( + .I0(\blk00000003/sig00000317 ), + .I1(\blk00000003/sig00000315 ), + .I2(\blk00000003/sig0000031d ), + .O(\blk00000003/sig00000358 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk000005a3 ( + .I0(\blk00000003/sig00000315 ), + .I1(\blk00000003/sig00000313 ), + .I2(\blk00000003/sig00000317 ), + .O(\blk00000003/sig0000035a ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk000005a2 ( + .I0(\blk00000003/sig00000313 ), + .I1(\blk00000003/sig00000310 ), + .O(\blk00000003/sig00000351 ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk000005a1 ( + .I0(\blk00000003/sig00000313 ), + .I1(\blk00000003/sig0000030f ), + .O(\blk00000003/sig0000034f ) + ); + LUT3 #( + .INIT ( 8'hBF )) + \blk00000003/blk000005a0 ( + .I0(\blk00000003/sig00000317 ), + .I1(\blk00000003/sig00000313 ), + .I2(\blk00000003/sig0000030d ), + .O(\blk00000003/sig0000034a ) + ); + LUT2 #( + .INIT ( 4'h7 )) + \blk00000003/blk0000059f ( + .I0(\blk00000003/sig00000312 ), + .I1(\blk00000003/sig00000313 ), + .O(\blk00000003/sig00000346 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk0000059e ( + .I0(\blk00000003/sig00000311 ), + .I1(\blk00000003/sig00000313 ), + .I2(\blk00000003/sig0000031d ), + .O(\blk00000003/sig00000348 ) + ); + LUT2 #( + .INIT ( 4'hE )) + \blk00000003/blk0000059d ( + .I0(\blk00000003/sig00000320 ), + .I1(\blk00000003/sig00000811 ), + .O(\blk00000003/sig00000341 ) + ); + LUT3 #( + .INIT ( 8'h7F )) + \blk00000003/blk0000059c ( + .I0(\blk00000003/sig000002f3 ), + .I1(coef_we), + .I2(\blk00000003/sig000002f9 ), + .O(\blk00000003/sig00000335 ) + ); + LUT4 #( + .INIT ( 16'hEAAA )) + \blk00000003/blk0000059b ( + .I0(\blk00000003/sig00000336 ), + .I1(coef_we), + .I2(\blk00000003/sig000002f9 ), + .I3(\blk00000003/sig000002f3 ), + .O(\blk00000003/sig00000333 ) + ); + LUT4 #( + .INIT ( 16'hDAAA )) + \blk00000003/blk0000059a ( + .I0(\blk00000003/sig00000337 ), + .I1(\blk00000003/sig000002f3 ), + .I2(\blk00000003/sig000002f9 ), + .I3(coef_we), + .O(\blk00000003/sig00000330 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000599 ( + .I0(\blk00000003/sig0000032e ), + .I1(\blk00000003/sig00000294 ), + .O(\blk00000003/sig0000032c ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000598 ( + .I0(\blk00000003/sig00000327 ), + .I1(coef_we), + .O(\blk00000003/sig00000325 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000597 ( + .I0(coef_ld), + .I1(\blk00000003/sig00000320 ), + .O(\blk00000003/sig00000316 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000596 ( + .I0(coef_we), + .I1(\blk00000003/sig000002f9 ), + .O(\blk00000003/sig000002f4 ) + ); + LUT3 #( + .INIT ( 8'h40 )) + \blk00000003/blk00000595 ( + .I0(coef_ld), + .I1(coef_we), + .I2(\blk00000003/sig0000030b ), + .O(\blk00000003/sig0000031e ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000594 ( + .I0(\blk00000003/sig00000336 ), + .I1(\blk00000003/sig00000337 ), + .O(\blk00000003/sig00000301 ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000593 ( + .I0(\blk00000003/sig00000324 ), + .I1(\blk00000003/sig00000327 ), + .O(\blk00000003/sig000002fc ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000592 ( + .I0(\blk00000003/sig00000337 ), + .I1(\blk00000003/sig00000336 ), + .O(\blk00000003/sig000002f7 ) + ); + LUT3 #( + .INIT ( 8'hBF )) + \blk00000003/blk00000591 ( + .I0(\blk00000003/sig00000320 ), + .I1(\blk00000003/sig00000309 ), + .I2(coef_ld), + .O(\blk00000003/sig000002f1 ) + ); + LUT3 #( + .INIT ( 8'hBF )) + \blk00000003/blk00000590 ( + .I0(\blk00000003/sig0000030b ), + .I1(coef_we), + .I2(\blk00000003/sig00000309 ), + .O(\blk00000003/sig000002ee ) + ); + LUT5 #( + .INIT ( 32'hFFFF2AAA )) + \blk00000003/blk0000058f ( + .I0(\blk00000003/sig0000030b ), + .I1(coef_we), + .I2(\blk00000003/sig000002f9 ), + .I3(\blk00000003/sig000002f3 ), + .I4(coef_ld), + .O(\blk00000003/sig0000030a ) + ); + LUT4 #( + .INIT ( 16'hFF8A )) + \blk00000003/blk0000058e ( + .I0(\blk00000003/sig00000309 ), + .I1(\blk00000003/sig0000030b ), + .I2(coef_we), + .I3(coef_ld), + .O(\blk00000003/sig00000308 ) + ); + LUT3 #( + .INIT ( 8'h80 )) + \blk00000003/blk0000058d ( + .I0(nd), + .I1(\blk00000003/sig00000366 ), + .I2(NlwRenamedSig_OI_rfd), + .O(\blk00000003/sig000002b6 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000058c ( + .I0(\blk00000003/sig0000016b ), + .I1(\blk00000003/sig000002ae ), + .O(\blk00000003/sig000002b4 ) + ); + LUT3 #( + .INIT ( 8'h10 )) + \blk00000003/blk0000058b ( + .I0(\blk00000003/sig0000016b ), + .I1(\blk00000003/sig00000795 ), + .I2(\blk00000003/sig000002ae ), + .O(\blk00000003/sig0000016c ) + ); + LUT3 #( + .INIT ( 8'hEA )) + \blk00000003/blk0000058a ( + .I0(sclr), + .I1(ce), + .I2(\blk00000003/sig00000795 ), + .O(\blk00000003/sig000002af ) + ); + LUT2 #( + .INIT ( 4'hD )) + \blk00000003/blk00000589 ( + .I0(NlwRenamedSig_OI_rfd), + .I1(nd), + .O(\blk00000003/sig0000029b ) + ); + LUT2 #( + .INIT ( 4'h2 )) + \blk00000003/blk00000588 ( + .I0(\blk00000003/sig0000032b ), + .I1(\blk00000003/sig0000032e ), + .O(\blk00000003/sig00000295 ) + ); + LUT5 #( + .INIT ( 32'h00002000 )) + \blk00000003/blk00000587 ( + .I0(\blk00000003/sig00000808 ), + .I1(\blk00000003/sig00000809 ), + .I2(\blk00000003/sig0000080a ), + .I3(\blk00000003/sig0000080b ), + .I4(\blk00000003/sig0000080c ), + .O(\blk00000003/sig0000016f ) + ); + LUT3 #( + .INIT ( 8'hF4 )) + \blk00000003/blk00000586 ( + .I0(\blk00000003/sig000002a7 ), + .I1(\blk00000003/sig00000294 ), + .I2(\blk00000003/sig000002b5 ), + .O(\blk00000003/sig000002a6 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000585 ( + .I0(\blk00000003/sig0000037c ), + .I1(\blk00000003/sig000002b3 ), + .O(\blk00000003/sig000002ac ) + ); + LUT3 #( + .INIT ( 8'hD8 )) + \blk00000003/blk00000584 ( + .I0(ce), + .I1(\blk00000003/sig0000080e ), + .I2(\blk00000003/sig00000161 ), + .O(\blk00000003/sig00000160 ) + ); + LUT3 #( + .INIT ( 8'h72 )) + \blk00000003/blk00000583 ( + .I0(ce), + .I1(\blk00000003/sig0000080e ), + .I2(\blk00000003/sig0000015f ), + .O(\blk00000003/sig0000015e ) + ); + LUT4 #( + .INIT ( 16'h8F88 )) + \blk00000003/blk00000582 ( + .I0(NlwRenamedSig_OI_rfd), + .I1(nd), + .I2(\blk00000003/sig000002a9 ), + .I3(\blk00000003/sig00000296 ), + .O(\blk00000003/sig000002a8 ) + ); + LUT2 #( + .INIT ( 4'h6 )) + \blk00000003/blk00000581 ( + .I0(\blk00000003/sig00000159 ), + .I1(\blk00000003/sig00000296 ), + .O(\blk00000003/sig0000015a ) + ); + LUT5 #( + .INIT ( 32'hCEEE8AAA )) + \blk00000003/blk00000580 ( + .I0(\blk00000003/sig00000294 ), + .I1(\blk00000003/sig000002b5 ), + .I2(\blk00000003/sig000002a5 ), + .I3(\blk00000003/sig000002a7 ), + .I4(\blk00000003/sig000002a3 ), + .O(\blk00000003/sig000002a4 ) + ); + LUT4 #( + .INIT ( 16'h8808 )) + \blk00000003/blk0000057f ( + .I0(\blk00000003/sig000002a5 ), + .I1(\blk00000003/sig00000810 ), + .I2(\blk00000003/sig000002a7 ), + .I3(\blk00000003/sig000002b5 ), + .O(\blk00000003/sig000002a0 ) + ); + LUT4 #( + .INIT ( 16'h5540 )) + \blk00000003/blk0000057e ( + .I0(\blk00000003/sig000002b5 ), + .I1(\blk00000003/sig000002a5 ), + .I2(\blk00000003/sig000002a7 ), + .I3(\blk00000003/sig000002a3 ), + .O(\blk00000003/sig000002a2 ) + ); + LUT3 #( + .INIT ( 8'h9A )) + \blk00000003/blk0000057d ( + .I0(\blk00000003/sig0000037b ), + .I1(\blk00000003/sig0000037c ), + .I2(\blk00000003/sig000002b3 ), + .O(\blk00000003/sig000002aa ) + ); + LUT4 #( + .INIT ( 16'hFDA8 )) + \blk00000003/blk0000057c ( + .I0(ce), + .I1(\blk00000003/sig0000080e ), + .I2(\blk00000003/sig0000080f ), + .I3(\blk00000003/sig0000015d ), + .O(\blk00000003/sig0000015c ) + ); + MUXCY \blk00000003/blk0000057b ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig0000080d ), + .O(\blk00000003/sig00000805 ) + ); + MUXCY_L \blk00000003/blk0000057a ( + .CI(\blk00000003/sig00000805 ), + .DI(\blk00000003/sig0000080c ), + .S(\blk00000003/sig00000806 ), + .LO(\blk00000003/sig00000802 ) + ); + MUXCY_L \blk00000003/blk00000579 ( + .CI(\blk00000003/sig00000802 ), + .DI(\blk00000003/sig0000080b ), + .S(\blk00000003/sig00000803 ), + .LO(\blk00000003/sig000007ff ) + ); + MUXCY_L \blk00000003/blk00000578 ( + .CI(\blk00000003/sig000007ff ), + .DI(\blk00000003/sig0000080a ), + .S(\blk00000003/sig00000800 ), + .LO(\blk00000003/sig000007fc ) + ); + MUXCY_L \blk00000003/blk00000577 ( + .CI(\blk00000003/sig000007fc ), + .DI(\blk00000003/sig00000809 ), + .S(\blk00000003/sig000007fd ), + .LO(\blk00000003/sig000007f9 ) + ); + MUXCY_D \blk00000003/blk00000576 ( + .CI(\blk00000003/sig000007f9 ), + .DI(\blk00000003/sig00000808 ), + .S(\blk00000003/sig000007fa ), + .O(\NLW_blk00000003/blk00000576_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk00000576_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000575 ( + .CI(\blk00000003/sig00000805 ), + .LI(\blk00000003/sig00000806 ), + .O(\blk00000003/sig00000807 ) + ); + XORCY \blk00000003/blk00000574 ( + .CI(\blk00000003/sig00000802 ), + .LI(\blk00000003/sig00000803 ), + .O(\blk00000003/sig00000804 ) + ); + XORCY \blk00000003/blk00000573 ( + .CI(\blk00000003/sig000007ff ), + .LI(\blk00000003/sig00000800 ), + .O(\blk00000003/sig00000801 ) + ); + XORCY \blk00000003/blk00000572 ( + .CI(\blk00000003/sig000007fc ), + .LI(\blk00000003/sig000007fd ), + .O(\blk00000003/sig000007fe ) + ); + XORCY \blk00000003/blk00000571 ( + .CI(\blk00000003/sig000007f9 ), + .LI(\blk00000003/sig000007fa ), + .O(\blk00000003/sig000007fb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000570 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007f8 ), + .R(sclr), + .Q(\blk00000003/sig0000004a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000056f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007f7 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000056e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007f6 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000056d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007f5 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000056c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007f4 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000056b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007f3 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000056a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007f2 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000569 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007f1 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000568 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007f0 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000567 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ef ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000566 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ee ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000565 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ed ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000564 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ec ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000563 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007eb ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000562 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ea ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000561 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e9 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000560 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e8 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000055f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e7 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000055e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e6 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000055d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e5 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000055c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e4 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000055b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e3 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000055a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e2 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000559 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e1 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000558 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007e0 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000557 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007df ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000556 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007de ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000555 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007dd ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000554 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007dc ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000553 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007db ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000552 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007da ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000551 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d9 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000550 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d8 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d7 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d6 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d5 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d4 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d3 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000054a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d2 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000549 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d1 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000548 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007d0 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000547 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007cf ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000546 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ce ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000545 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007cd ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000544 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007cc ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000543 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007cb ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000542 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ca ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000541 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c9 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_2[0]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000540 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c8 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[46]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000053f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c7 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[45]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000053e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c6 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[44]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000053d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c5 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[43]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000053c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c4 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[42]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000053b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c3 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[41]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000053a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c2 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[40]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000539 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c1 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[39]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000538 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007c0 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[38]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000537 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007bf ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[37]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000536 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007be ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[36]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000535 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007bd ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[35]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000534 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007bc ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[34]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000533 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007bb ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[33]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000532 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ba ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[32]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000531 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b9 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[31]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000530 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b8 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[30]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b7 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[29]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b6 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[28]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b5 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[27]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b4 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[26]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b3 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[25]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000052a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b2 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[24]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000529 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b1 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[23]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000528 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007b0 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[22]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000527 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007af ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[21]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000526 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ae ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[20]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000525 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ad ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[19]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000524 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ac ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[18]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000523 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007ab ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[17]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000522 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007aa ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[16]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000521 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a9 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[15]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000520 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a8 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[14]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a7 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[13]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a6 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[12]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a5 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[11]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a4 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[10]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a3 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[9]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000051a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a2 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[8]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000519 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a1 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[7]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000518 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000007a0 ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[6]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000517 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000079f ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[5]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000516 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000079e ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[4]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000515 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000079d ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[3]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000514 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000079c ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[2]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000513 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000079b ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[1]) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000512 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000079a ), + .R(sclr), + .Q(NlwRenamedSig_OI_dout_1[0]) + ); + MUXCY_L \blk00000003/blk00000511 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000799 ), + .S(\blk00000003/sig00000787 ), + .LO(\blk00000003/sig00000792 ) + ); + MUXCY_L \blk00000003/blk00000510 ( + .CI(\blk00000003/sig00000792 ), + .DI(\blk00000003/sig00000798 ), + .S(\blk00000003/sig00000793 ), + .LO(\blk00000003/sig0000078f ) + ); + MUXCY_L \blk00000003/blk0000050f ( + .CI(\blk00000003/sig0000078f ), + .DI(\blk00000003/sig00000797 ), + .S(\blk00000003/sig00000790 ), + .LO(\blk00000003/sig0000078c ) + ); + MUXCY_L \blk00000003/blk0000050e ( + .CI(\blk00000003/sig0000078c ), + .DI(\blk00000003/sig00000796 ), + .S(\blk00000003/sig0000078d ), + .LO(\blk00000003/sig00000789 ) + ); + MUXCY_D \blk00000003/blk0000050d ( + .CI(\blk00000003/sig00000789 ), + .DI(\blk00000003/sig00000795 ), + .S(\blk00000003/sig0000078a ), + .O(\NLW_blk00000003/blk0000050d_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk0000050d_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk0000050c ( + .CI(\blk00000003/sig00000792 ), + .LI(\blk00000003/sig00000793 ), + .O(\blk00000003/sig00000794 ) + ); + XORCY \blk00000003/blk0000050b ( + .CI(\blk00000003/sig0000078f ), + .LI(\blk00000003/sig00000790 ), + .O(\blk00000003/sig00000791 ) + ); + XORCY \blk00000003/blk0000050a ( + .CI(\blk00000003/sig0000078c ), + .LI(\blk00000003/sig0000078d ), + .O(\blk00000003/sig0000078e ) + ); + XORCY \blk00000003/blk00000509 ( + .CI(\blk00000003/sig00000789 ), + .LI(\blk00000003/sig0000078a ), + .O(\blk00000003/sig0000078b ) + ); + XORCY \blk00000003/blk00000508 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000787 ), + .O(\blk00000003/sig00000788 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e0 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005e0 ), + .R(sclr), + .Q(\blk00000003/sig0000069c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004df ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005df ), + .R(sclr), + .Q(\blk00000003/sig0000069b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004de ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005de ), + .R(sclr), + .Q(\blk00000003/sig0000069a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004dd ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005dd ), + .R(sclr), + .Q(\blk00000003/sig00000699 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004dc ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005dc ), + .R(sclr), + .Q(\blk00000003/sig00000698 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004db ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005db ), + .R(sclr), + .Q(\blk00000003/sig00000697 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004da ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005da ), + .R(sclr), + .Q(\blk00000003/sig00000696 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d9 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005d9 ), + .R(sclr), + .Q(\blk00000003/sig00000695 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d8 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005d8 ), + .R(sclr), + .Q(\blk00000003/sig00000694 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d7 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005d7 ), + .R(sclr), + .Q(\blk00000003/sig00000693 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d6 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005d6 ), + .R(sclr), + .Q(\blk00000003/sig00000692 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d5 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005d5 ), + .R(sclr), + .Q(\blk00000003/sig00000691 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d4 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005d4 ), + .R(sclr), + .Q(\blk00000003/sig00000690 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d3 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005d3 ), + .R(sclr), + .Q(\blk00000003/sig0000068f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d2 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005d2 ), + .R(sclr), + .Q(\blk00000003/sig0000068e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d1 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig000005d1 ), + .R(sclr), + .Q(\blk00000003/sig0000068d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004d0 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000050c ), + .R(sclr), + .Q(\blk00000003/sig0000074c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004cf ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000050b ), + .R(sclr), + .Q(\blk00000003/sig0000074b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ce ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000050a ), + .R(sclr), + .Q(\blk00000003/sig0000074a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004cd ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000509 ), + .R(sclr), + .Q(\blk00000003/sig00000749 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004cc ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000508 ), + .R(sclr), + .Q(\blk00000003/sig00000748 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004cb ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000507 ), + .R(sclr), + .Q(\blk00000003/sig00000747 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ca ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000506 ), + .R(sclr), + .Q(\blk00000003/sig00000746 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c9 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000505 ), + .R(sclr), + .Q(\blk00000003/sig00000745 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c8 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000630 ), + .R(sclr), + .Q(\blk00000003/sig000006ac ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c7 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000062f ), + .R(sclr), + .Q(\blk00000003/sig000006ab ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c6 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000062e ), + .R(sclr), + .Q(\blk00000003/sig000006aa ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c5 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000062d ), + .R(sclr), + .Q(\blk00000003/sig000006a9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c4 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000062c ), + .R(sclr), + .Q(\blk00000003/sig000006a8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c3 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000062b ), + .R(sclr), + .Q(\blk00000003/sig000006a7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c2 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000062a ), + .R(sclr), + .Q(\blk00000003/sig000006a6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c1 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000629 ), + .R(sclr), + .Q(\blk00000003/sig000006a5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004c0 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000628 ), + .R(sclr), + .Q(\blk00000003/sig000006a4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004bf ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000627 ), + .R(sclr), + .Q(\blk00000003/sig000006a3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004be ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000626 ), + .R(sclr), + .Q(\blk00000003/sig000006a2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004bd ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000625 ), + .R(sclr), + .Q(\blk00000003/sig000006a1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004bc ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000624 ), + .R(sclr), + .Q(\blk00000003/sig000006a0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004bb ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000623 ), + .R(sclr), + .Q(\blk00000003/sig0000069f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ba ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000622 ), + .R(sclr), + .Q(\blk00000003/sig0000069e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b9 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000621 ), + .R(sclr), + .Q(\blk00000003/sig0000069d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b8 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000055e ), + .R(sclr), + .Q(\blk00000003/sig00000754 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b7 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000055d ), + .R(sclr), + .Q(\blk00000003/sig00000753 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b6 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000055c ), + .R(sclr), + .Q(\blk00000003/sig00000752 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b5 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000055b ), + .R(sclr), + .Q(\blk00000003/sig00000751 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b4 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig0000055a ), + .R(sclr), + .Q(\blk00000003/sig00000750 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b3 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000559 ), + .R(sclr), + .Q(\blk00000003/sig0000074f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b2 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000558 ), + .R(sclr), + .Q(\blk00000003/sig0000074e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b1 ( + .C(clk), + .CE(\blk00000003/sig00000785 ), + .D(\blk00000003/sig00000557 ), + .R(sclr), + .Q(\blk00000003/sig0000074d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004b0 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000566 ), + .R(sclr), + .Q(\blk00000003/sig00000774 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004af ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000565 ), + .R(sclr), + .Q(\blk00000003/sig00000773 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ae ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000564 ), + .R(sclr), + .Q(\blk00000003/sig00000772 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ad ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000563 ), + .R(sclr), + .Q(\blk00000003/sig00000771 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ac ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000562 ), + .R(sclr), + .Q(\blk00000003/sig00000770 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004ab ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000561 ), + .R(sclr), + .Q(\blk00000003/sig0000076f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004aa ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000560 ), + .R(sclr), + .Q(\blk00000003/sig0000076e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a9 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000055f ), + .R(sclr), + .Q(\blk00000003/sig0000076d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a8 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000004d4 ), + .R(sclr), + .Q(\blk00000003/sig0000075c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a7 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000004d3 ), + .R(sclr), + .Q(\blk00000003/sig0000075b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a6 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000004d2 ), + .R(sclr), + .Q(\blk00000003/sig0000075a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a5 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000004d1 ), + .R(sclr), + .Q(\blk00000003/sig00000759 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a4 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000004d0 ), + .R(sclr), + .Q(\blk00000003/sig00000758 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a3 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000004cf ), + .R(sclr), + .Q(\blk00000003/sig00000757 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a2 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000004ce ), + .R(sclr), + .Q(\blk00000003/sig00000756 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a1 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000004cd ), + .R(sclr), + .Q(\blk00000003/sig00000755 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004a0 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000588 ), + .R(sclr), + .Q(\blk00000003/sig00000784 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049f ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000587 ), + .R(sclr), + .Q(\blk00000003/sig00000783 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049e ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000586 ), + .R(sclr), + .Q(\blk00000003/sig00000782 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049d ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000585 ), + .R(sclr), + .Q(\blk00000003/sig00000781 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049c ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000584 ), + .R(sclr), + .Q(\blk00000003/sig00000780 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049b ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000583 ), + .R(sclr), + .Q(\blk00000003/sig0000077f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000049a ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000582 ), + .R(sclr), + .Q(\blk00000003/sig0000077e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000499 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000581 ), + .R(sclr), + .Q(\blk00000003/sig0000077d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000498 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000526 ), + .R(sclr), + .Q(\blk00000003/sig00000764 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000497 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000525 ), + .R(sclr), + .Q(\blk00000003/sig00000763 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000496 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000524 ), + .R(sclr), + .Q(\blk00000003/sig00000762 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000495 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000523 ), + .R(sclr), + .Q(\blk00000003/sig00000761 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000494 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000522 ), + .R(sclr), + .Q(\blk00000003/sig00000760 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000493 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000521 ), + .R(sclr), + .Q(\blk00000003/sig0000075f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000492 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000520 ), + .R(sclr), + .Q(\blk00000003/sig0000075e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000491 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig0000051f ), + .R(sclr), + .Q(\blk00000003/sig0000075d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000385 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000640 ), + .R(sclr), + .Q(\blk00000003/sig000006ec ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000384 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000063f ), + .R(sclr), + .Q(\blk00000003/sig000006eb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000383 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000063e ), + .R(sclr), + .Q(\blk00000003/sig000006ea ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000382 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000063d ), + .R(sclr), + .Q(\blk00000003/sig000006e9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000381 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000063c ), + .R(sclr), + .Q(\blk00000003/sig000006e8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000380 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000063b ), + .R(sclr), + .Q(\blk00000003/sig000006e7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037f ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000063a ), + .R(sclr), + .Q(\blk00000003/sig000006e6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037e ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000639 ), + .R(sclr), + .Q(\blk00000003/sig000006e5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037d ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000638 ), + .R(sclr), + .Q(\blk00000003/sig000006e4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037c ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000637 ), + .R(sclr), + .Q(\blk00000003/sig000006e3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037b ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000636 ), + .R(sclr), + .Q(\blk00000003/sig000006e2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000037a ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000635 ), + .R(sclr), + .Q(\blk00000003/sig000006e1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000379 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000634 ), + .R(sclr), + .Q(\blk00000003/sig000006e0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000378 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000633 ), + .R(sclr), + .Q(\blk00000003/sig000006df ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000377 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000632 ), + .R(sclr), + .Q(\blk00000003/sig000006de ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000376 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000631 ), + .R(sclr), + .Q(\blk00000003/sig000006dd ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000375 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005a0 ), + .R(sclr), + .Q(\blk00000003/sig000006bc ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000374 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig0000059f ), + .R(sclr), + .Q(\blk00000003/sig000006bb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000373 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig0000059e ), + .R(sclr), + .Q(\blk00000003/sig000006ba ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000372 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig0000059d ), + .R(sclr), + .Q(\blk00000003/sig000006b9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000371 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig0000059c ), + .R(sclr), + .Q(\blk00000003/sig000006b8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000370 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig0000059b ), + .R(sclr), + .Q(\blk00000003/sig000006b7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036f ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig0000059a ), + .R(sclr), + .Q(\blk00000003/sig000006b6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036e ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000599 ), + .R(sclr), + .Q(\blk00000003/sig000006b5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036d ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000598 ), + .R(sclr), + .Q(\blk00000003/sig000006b4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036c ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000597 ), + .R(sclr), + .Q(\blk00000003/sig000006b3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036b ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000596 ), + .R(sclr), + .Q(\blk00000003/sig000006b2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000036a ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000595 ), + .R(sclr), + .Q(\blk00000003/sig000006b1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000369 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000594 ), + .R(sclr), + .Q(\blk00000003/sig000006b0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000368 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000593 ), + .R(sclr), + .Q(\blk00000003/sig000006af ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000367 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000592 ), + .R(sclr), + .Q(\blk00000003/sig000006ae ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000366 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig00000591 ), + .R(sclr), + .Q(\blk00000003/sig000006ad ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000365 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000660 ), + .R(sclr), + .Q(\blk00000003/sig0000070c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000364 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000065f ), + .R(sclr), + .Q(\blk00000003/sig0000070b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000363 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000065e ), + .R(sclr), + .Q(\blk00000003/sig0000070a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000362 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000065d ), + .R(sclr), + .Q(\blk00000003/sig00000709 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000361 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000065c ), + .R(sclr), + .Q(\blk00000003/sig00000708 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000360 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000065b ), + .R(sclr), + .Q(\blk00000003/sig00000707 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035f ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig0000065a ), + .R(sclr), + .Q(\blk00000003/sig00000706 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035e ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000659 ), + .R(sclr), + .Q(\blk00000003/sig00000705 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035d ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000658 ), + .R(sclr), + .Q(\blk00000003/sig00000704 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035c ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000657 ), + .R(sclr), + .Q(\blk00000003/sig00000703 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035b ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000656 ), + .R(sclr), + .Q(\blk00000003/sig00000702 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000035a ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000655 ), + .R(sclr), + .Q(\blk00000003/sig00000701 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000359 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000654 ), + .R(sclr), + .Q(\blk00000003/sig00000700 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000358 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000653 ), + .R(sclr), + .Q(\blk00000003/sig000006ff ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000357 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000652 ), + .R(sclr), + .Q(\blk00000003/sig000006fe ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000356 ( + .C(clk), + .CE(\blk00000003/sig00000744 ), + .D(\blk00000003/sig00000651 ), + .R(sclr), + .Q(\blk00000003/sig000006fd ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000355 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005f0 ), + .R(sclr), + .Q(\blk00000003/sig000006cc ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000354 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005ef ), + .R(sclr), + .Q(\blk00000003/sig000006cb ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000353 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005ee ), + .R(sclr), + .Q(\blk00000003/sig000006ca ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000352 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005ed ), + .R(sclr), + .Q(\blk00000003/sig000006c9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000351 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005ec ), + .R(sclr), + .Q(\blk00000003/sig000006c8 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000350 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005eb ), + .R(sclr), + .Q(\blk00000003/sig000006c7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034f ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005ea ), + .R(sclr), + .Q(\blk00000003/sig000006c6 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034e ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005e9 ), + .R(sclr), + .Q(\blk00000003/sig000006c5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034d ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005e8 ), + .R(sclr), + .Q(\blk00000003/sig000006c4 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034c ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005e7 ), + .R(sclr), + .Q(\blk00000003/sig000006c3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034b ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005e6 ), + .R(sclr), + .Q(\blk00000003/sig000006c2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000034a ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005e5 ), + .R(sclr), + .Q(\blk00000003/sig000006c1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000349 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005e4 ), + .R(sclr), + .Q(\blk00000003/sig000006c0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000348 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005e3 ), + .R(sclr), + .Q(\blk00000003/sig000006bf ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000347 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005e2 ), + .R(sclr), + .Q(\blk00000003/sig000006be ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000346 ( + .C(clk), + .CE(\blk00000003/sig00000743 ), + .D(\blk00000003/sig000005e1 ), + .R(sclr), + .Q(\blk00000003/sig000006bd ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000038e ), + .R(sclr), + .Q(\blk00000003/sig00000685 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000038d ), + .R(sclr), + .Q(\blk00000003/sig00000683 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000390 ), + .R(sclr), + .Q(\blk00000003/sig00000681 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000394 ), + .R(sclr), + .Q(\blk00000003/sig0000067f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000039a ), + .R(sclr), + .Q(\blk00000003/sig0000067d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000012a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000068c ), + .R(sclr), + .Q(\blk00000003/sig0000067b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000129 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000068b ), + .R(sclr), + .Q(\blk00000003/sig00000679 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000128 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000387 ), + .R(sclr), + .Q(\blk00000003/sig00000689 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000127 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000386 ), + .R(sclr), + .Q(\blk00000003/sig00000687 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000126 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000689 ), + .R(sclr), + .Q(\blk00000003/sig0000068a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000125 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000687 ), + .R(sclr), + .Q(\blk00000003/sig00000688 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000124 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000685 ), + .R(sclr), + .Q(\blk00000003/sig00000686 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000123 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000683 ), + .R(sclr), + .Q(\blk00000003/sig00000684 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000122 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000681 ), + .R(sclr), + .Q(\blk00000003/sig00000682 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000121 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000067f ), + .R(sclr), + .Q(\blk00000003/sig00000680 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000120 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000067d ), + .R(sclr), + .Q(\blk00000003/sig0000067e ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000067b ), + .R(sclr), + .Q(\blk00000003/sig0000067c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000679 ), + .R(sclr), + .Q(\blk00000003/sig0000067a ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000677 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000678 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000307 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000677 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000673 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000676 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000011a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000672 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000675 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000119 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000671 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000674 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000118 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000340 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000673 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000117 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000033d ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000672 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000116 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000339 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000671 ) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000115 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000115_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000115_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000651 , \blk00000003/sig00000652 , \blk00000003/sig00000653 , +\blk00000003/sig00000654 , \blk00000003/sig00000655 , \blk00000003/sig00000656 , \blk00000003/sig00000657 , \blk00000003/sig00000658 , +\blk00000003/sig00000659 , \blk00000003/sig0000065a , \blk00000003/sig0000065b , \blk00000003/sig0000065c , \blk00000003/sig0000065d , +\blk00000003/sig0000065e , \blk00000003/sig0000065f , \blk00000003/sig00000660 }), + .BCOUT({\NLW_blk00000003/blk00000115_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000115_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000115_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000115_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000115_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000115_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000115_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000115_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000115_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000115_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000115_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000115_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000115_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000115_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000115_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000115_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000115_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000115_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig0000049d , \blk00000003/sig0000049e , \blk00000003/sig0000049f , \blk00000003/sig000004a0 , \blk00000003/sig000004a1 , +\blk00000003/sig000004a2 , \blk00000003/sig000004a3 , \blk00000003/sig000004a4 , \blk00000003/sig000004a5 , \blk00000003/sig000004a6 , +\blk00000003/sig000004a7 , \blk00000003/sig000004a8 , \blk00000003/sig000004a9 , \blk00000003/sig000004aa , \blk00000003/sig000004ab , +\blk00000003/sig000004ac , \blk00000003/sig000004ad , \blk00000003/sig000004ae , \blk00000003/sig000004af , \blk00000003/sig000004b0 , +\blk00000003/sig000004b1 , \blk00000003/sig000004b2 , \blk00000003/sig000004b3 , \blk00000003/sig000004b4 , \blk00000003/sig000004b5 , +\blk00000003/sig000004b6 , \blk00000003/sig000004b7 , \blk00000003/sig000004b8 , \blk00000003/sig000004b9 , \blk00000003/sig000004ba , +\blk00000003/sig000004bb , \blk00000003/sig000004bc , \blk00000003/sig000004bd , \blk00000003/sig000004be , \blk00000003/sig000004bf , +\blk00000003/sig000004c0 , \blk00000003/sig000004c1 , \blk00000003/sig000004c2 , \blk00000003/sig000004c3 , \blk00000003/sig000004c4 , +\blk00000003/sig000004c5 , \blk00000003/sig000004c6 , \blk00000003/sig000004c7 , \blk00000003/sig000004c8 , \blk00000003/sig000004c9 , +\blk00000003/sig000004ca , \blk00000003/sig000004cb , \blk00000003/sig000004cc }), + .C({\NLW_blk00000003/blk00000115_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000115_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000115_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000115_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000115_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000115_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000661 , \blk00000003/sig00000662 , \blk00000003/sig00000663 , +\blk00000003/sig00000664 , \blk00000003/sig00000665 , \blk00000003/sig00000666 , \blk00000003/sig00000667 , \blk00000003/sig00000668 , +\blk00000003/sig00000669 , \blk00000003/sig0000066a , \blk00000003/sig0000066b , \blk00000003/sig0000066c , \blk00000003/sig0000066d , +\blk00000003/sig0000066e , \blk00000003/sig0000066f , \blk00000003/sig00000670 }), + .PCOUT({\blk00000003/sig000005f1 , \blk00000003/sig000005f2 , \blk00000003/sig000005f3 , \blk00000003/sig000005f4 , \blk00000003/sig000005f5 , +\blk00000003/sig000005f6 , \blk00000003/sig000005f7 , \blk00000003/sig000005f8 , \blk00000003/sig000005f9 , \blk00000003/sig000005fa , +\blk00000003/sig000005fb , \blk00000003/sig000005fc , \blk00000003/sig000005fd , \blk00000003/sig000005fe , \blk00000003/sig000005ff , +\blk00000003/sig00000600 , \blk00000003/sig00000601 , \blk00000003/sig00000602 , \blk00000003/sig00000603 , \blk00000003/sig00000604 , +\blk00000003/sig00000605 , \blk00000003/sig00000606 , \blk00000003/sig00000607 , \blk00000003/sig00000608 , \blk00000003/sig00000609 , +\blk00000003/sig0000060a , \blk00000003/sig0000060b , \blk00000003/sig0000060c , \blk00000003/sig0000060d , \blk00000003/sig0000060e , +\blk00000003/sig0000060f , \blk00000003/sig00000610 , \blk00000003/sig00000611 , \blk00000003/sig00000612 , \blk00000003/sig00000613 , +\blk00000003/sig00000614 , \blk00000003/sig00000615 , \blk00000003/sig00000616 , \blk00000003/sig00000617 , \blk00000003/sig00000618 , +\blk00000003/sig00000619 , \blk00000003/sig0000061a , \blk00000003/sig0000061b , \blk00000003/sig0000061c , \blk00000003/sig0000061d , +\blk00000003/sig0000061e , \blk00000003/sig0000061f , \blk00000003/sig00000620 }), + .A({\blk00000003/sig0000056f , \blk00000003/sig00000570 , \blk00000003/sig00000571 , \blk00000003/sig00000572 , \blk00000003/sig00000573 , +\blk00000003/sig00000574 , \blk00000003/sig00000575 , \blk00000003/sig00000576 , \blk00000003/sig00000577 , \blk00000003/sig00000578 , +\blk00000003/sig00000579 , \blk00000003/sig0000057a , \blk00000003/sig0000057b , \blk00000003/sig0000057c , \blk00000003/sig0000057d , +\blk00000003/sig0000057e , \blk00000003/sig0000057f , \blk00000003/sig00000580 }), + .M({\NLW_blk00000003/blk00000115_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000115_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000115_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000114 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000114_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000114_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000631 , \blk00000003/sig00000632 , \blk00000003/sig00000633 , +\blk00000003/sig00000634 , \blk00000003/sig00000635 , \blk00000003/sig00000636 , \blk00000003/sig00000637 , \blk00000003/sig00000638 , +\blk00000003/sig00000639 , \blk00000003/sig0000063a , \blk00000003/sig0000063b , \blk00000003/sig0000063c , \blk00000003/sig0000063d , +\blk00000003/sig0000063e , \blk00000003/sig0000063f , \blk00000003/sig00000640 }), + .BCOUT({\NLW_blk00000003/blk00000114_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000114_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000114_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000114_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000114_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000114_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000114_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000114_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000114_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000114_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000114_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000114_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000114_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000114_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000114_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000114_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000114_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000114_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig0000044d , \blk00000003/sig0000044e , \blk00000003/sig0000044f , \blk00000003/sig00000450 , \blk00000003/sig00000451 , +\blk00000003/sig00000452 , \blk00000003/sig00000453 , \blk00000003/sig00000454 , \blk00000003/sig00000455 , \blk00000003/sig00000456 , +\blk00000003/sig00000457 , \blk00000003/sig00000458 , \blk00000003/sig00000459 , \blk00000003/sig0000045a , \blk00000003/sig0000045b , +\blk00000003/sig0000045c , \blk00000003/sig0000045d , \blk00000003/sig0000045e , \blk00000003/sig0000045f , \blk00000003/sig00000460 , +\blk00000003/sig00000461 , \blk00000003/sig00000462 , \blk00000003/sig00000463 , \blk00000003/sig00000464 , \blk00000003/sig00000465 , +\blk00000003/sig00000466 , \blk00000003/sig00000467 , \blk00000003/sig00000468 , \blk00000003/sig00000469 , \blk00000003/sig0000046a , +\blk00000003/sig0000046b , \blk00000003/sig0000046c , \blk00000003/sig0000046d , \blk00000003/sig0000046e , \blk00000003/sig0000046f , +\blk00000003/sig00000470 , \blk00000003/sig00000471 , \blk00000003/sig00000472 , \blk00000003/sig00000473 , \blk00000003/sig00000474 , +\blk00000003/sig00000475 , \blk00000003/sig00000476 , \blk00000003/sig00000477 , \blk00000003/sig00000478 , \blk00000003/sig00000479 , +\blk00000003/sig0000047a , \blk00000003/sig0000047b , \blk00000003/sig0000047c }), + .C({\NLW_blk00000003/blk00000114_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000114_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000114_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000114_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000114_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000114_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000641 , \blk00000003/sig00000642 , \blk00000003/sig00000643 , +\blk00000003/sig00000644 , \blk00000003/sig00000645 , \blk00000003/sig00000646 , \blk00000003/sig00000647 , \blk00000003/sig00000648 , +\blk00000003/sig00000649 , \blk00000003/sig0000064a , \blk00000003/sig0000064b , \blk00000003/sig0000064c , \blk00000003/sig0000064d , +\blk00000003/sig0000064e , \blk00000003/sig0000064f , \blk00000003/sig00000650 }), + .PCOUT({\blk00000003/sig000005a1 , \blk00000003/sig000005a2 , \blk00000003/sig000005a3 , \blk00000003/sig000005a4 , \blk00000003/sig000005a5 , +\blk00000003/sig000005a6 , \blk00000003/sig000005a7 , \blk00000003/sig000005a8 , \blk00000003/sig000005a9 , \blk00000003/sig000005aa , +\blk00000003/sig000005ab , \blk00000003/sig000005ac , \blk00000003/sig000005ad , \blk00000003/sig000005ae , \blk00000003/sig000005af , +\blk00000003/sig000005b0 , \blk00000003/sig000005b1 , \blk00000003/sig000005b2 , \blk00000003/sig000005b3 , \blk00000003/sig000005b4 , +\blk00000003/sig000005b5 , \blk00000003/sig000005b6 , \blk00000003/sig000005b7 , \blk00000003/sig000005b8 , \blk00000003/sig000005b9 , +\blk00000003/sig000005ba , \blk00000003/sig000005bb , \blk00000003/sig000005bc , \blk00000003/sig000005bd , \blk00000003/sig000005be , +\blk00000003/sig000005bf , \blk00000003/sig000005c0 , \blk00000003/sig000005c1 , \blk00000003/sig000005c2 , \blk00000003/sig000005c3 , +\blk00000003/sig000005c4 , \blk00000003/sig000005c5 , \blk00000003/sig000005c6 , \blk00000003/sig000005c7 , \blk00000003/sig000005c8 , +\blk00000003/sig000005c9 , \blk00000003/sig000005ca , \blk00000003/sig000005cb , \blk00000003/sig000005cc , \blk00000003/sig000005cd , +\blk00000003/sig000005ce , \blk00000003/sig000005cf , \blk00000003/sig000005d0 }), + .A({\blk00000003/sig0000056f , \blk00000003/sig00000570 , \blk00000003/sig00000571 , \blk00000003/sig00000572 , \blk00000003/sig00000573 , +\blk00000003/sig00000574 , \blk00000003/sig00000575 , \blk00000003/sig00000576 , \blk00000003/sig00000577 , \blk00000003/sig00000578 , +\blk00000003/sig00000579 , \blk00000003/sig0000057a , \blk00000003/sig0000057b , \blk00000003/sig0000057c , \blk00000003/sig0000057d , +\blk00000003/sig0000057e , \blk00000003/sig0000057f , \blk00000003/sig00000580 }), + .M({\NLW_blk00000003/blk00000114_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000114_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000114_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000113 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000113_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000113_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000005e1 , \blk00000003/sig000005e2 , \blk00000003/sig000005e3 , +\blk00000003/sig000005e4 , \blk00000003/sig000005e5 , \blk00000003/sig000005e6 , \blk00000003/sig000005e7 , \blk00000003/sig000005e8 , +\blk00000003/sig000005e9 , \blk00000003/sig000005ea , \blk00000003/sig000005eb , \blk00000003/sig000005ec , \blk00000003/sig000005ed , +\blk00000003/sig000005ee , \blk00000003/sig000005ef , \blk00000003/sig000005f0 }), + .BCOUT({\NLW_blk00000003/blk00000113_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000113_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000113_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000113_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000113_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000113_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000113_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000113_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000113_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000113_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000113_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000113_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000113_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000113_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000113_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000113_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000113_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000113_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000005f1 , \blk00000003/sig000005f2 , \blk00000003/sig000005f3 , \blk00000003/sig000005f4 , \blk00000003/sig000005f5 , +\blk00000003/sig000005f6 , \blk00000003/sig000005f7 , \blk00000003/sig000005f8 , \blk00000003/sig000005f9 , \blk00000003/sig000005fa , +\blk00000003/sig000005fb , \blk00000003/sig000005fc , \blk00000003/sig000005fd , \blk00000003/sig000005fe , \blk00000003/sig000005ff , +\blk00000003/sig00000600 , \blk00000003/sig00000601 , \blk00000003/sig00000602 , \blk00000003/sig00000603 , \blk00000003/sig00000604 , +\blk00000003/sig00000605 , \blk00000003/sig00000606 , \blk00000003/sig00000607 , \blk00000003/sig00000608 , \blk00000003/sig00000609 , +\blk00000003/sig0000060a , \blk00000003/sig0000060b , \blk00000003/sig0000060c , \blk00000003/sig0000060d , \blk00000003/sig0000060e , +\blk00000003/sig0000060f , \blk00000003/sig00000610 , \blk00000003/sig00000611 , \blk00000003/sig00000612 , \blk00000003/sig00000613 , +\blk00000003/sig00000614 , \blk00000003/sig00000615 , \blk00000003/sig00000616 , \blk00000003/sig00000617 , \blk00000003/sig00000618 , +\blk00000003/sig00000619 , \blk00000003/sig0000061a , \blk00000003/sig0000061b , \blk00000003/sig0000061c , \blk00000003/sig0000061d , +\blk00000003/sig0000061e , \blk00000003/sig0000061f , \blk00000003/sig00000620 }), + .C({\NLW_blk00000003/blk00000113_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000113_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000113_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000113_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000113_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000113_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000621 , \blk00000003/sig00000622 , \blk00000003/sig00000623 , +\blk00000003/sig00000624 , \blk00000003/sig00000625 , \blk00000003/sig00000626 , \blk00000003/sig00000627 , \blk00000003/sig00000628 , +\blk00000003/sig00000629 , \blk00000003/sig0000062a , \blk00000003/sig0000062b , \blk00000003/sig0000062c , \blk00000003/sig0000062d , +\blk00000003/sig0000062e , \blk00000003/sig0000062f , \blk00000003/sig00000630 }), + .PCOUT({\blk00000003/sig000001ca , \blk00000003/sig000001cb , \blk00000003/sig000001cc , \blk00000003/sig000001cd , \blk00000003/sig000001ce , +\blk00000003/sig000001cf , \blk00000003/sig000001d0 , \blk00000003/sig000001d1 , \blk00000003/sig000001d2 , \blk00000003/sig000001d3 , +\blk00000003/sig000001d4 , \blk00000003/sig000001d5 , \blk00000003/sig000001d6 , \blk00000003/sig000001d7 , \blk00000003/sig000001d8 , +\blk00000003/sig000001d9 , \blk00000003/sig000001da , \blk00000003/sig000001db , \blk00000003/sig000001dc , \blk00000003/sig000001dd , +\blk00000003/sig000001de , \blk00000003/sig000001df , \blk00000003/sig000001e0 , \blk00000003/sig000001e1 , \blk00000003/sig000001e2 , +\blk00000003/sig000001e3 , \blk00000003/sig000001e4 , \blk00000003/sig000001e5 , \blk00000003/sig000001e6 , \blk00000003/sig000001e7 , +\blk00000003/sig000001e8 , \blk00000003/sig000001e9 , \blk00000003/sig000001ea , \blk00000003/sig000001eb , \blk00000003/sig000001ec , +\blk00000003/sig000001ed , \blk00000003/sig000001ee , \blk00000003/sig000001ef , \blk00000003/sig000001f0 , \blk00000003/sig000001f1 , +\blk00000003/sig000001f2 , \blk00000003/sig000001f3 , \blk00000003/sig000001f4 , \blk00000003/sig000001f5 , \blk00000003/sig000001f6 , +\blk00000003/sig000001f7 , \blk00000003/sig000001f8 , \blk00000003/sig000001f9 }), + .A({\blk00000003/sig0000050d , \blk00000003/sig0000050e , \blk00000003/sig0000050f , \blk00000003/sig00000510 , \blk00000003/sig00000511 , +\blk00000003/sig00000512 , \blk00000003/sig00000513 , \blk00000003/sig00000514 , \blk00000003/sig00000515 , \blk00000003/sig00000516 , +\blk00000003/sig00000517 , \blk00000003/sig00000518 , \blk00000003/sig00000519 , \blk00000003/sig0000051a , \blk00000003/sig0000051b , +\blk00000003/sig0000051c , \blk00000003/sig0000051d , \blk00000003/sig0000051e }), + .M({\NLW_blk00000003/blk00000113_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000113_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000113_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000112 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000112_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000112_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000591 , \blk00000003/sig00000592 , \blk00000003/sig00000593 , +\blk00000003/sig00000594 , \blk00000003/sig00000595 , \blk00000003/sig00000596 , \blk00000003/sig00000597 , \blk00000003/sig00000598 , +\blk00000003/sig00000599 , \blk00000003/sig0000059a , \blk00000003/sig0000059b , \blk00000003/sig0000059c , \blk00000003/sig0000059d , +\blk00000003/sig0000059e , \blk00000003/sig0000059f , \blk00000003/sig000005a0 }), + .BCOUT({\NLW_blk00000003/blk00000112_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000112_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000112_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000112_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000112_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000112_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000112_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000112_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000112_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000112_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000112_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000112_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000112_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000112_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000112_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000112_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000112_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000112_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000005a1 , \blk00000003/sig000005a2 , \blk00000003/sig000005a3 , \blk00000003/sig000005a4 , \blk00000003/sig000005a5 , +\blk00000003/sig000005a6 , \blk00000003/sig000005a7 , \blk00000003/sig000005a8 , \blk00000003/sig000005a9 , \blk00000003/sig000005aa , +\blk00000003/sig000005ab , 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\blk00000003/sig000005d0 }), + .C({\NLW_blk00000003/blk00000112_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000112_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000112_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000112_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000112_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000112_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000005d1 , \blk00000003/sig000005d2 , \blk00000003/sig000005d3 , +\blk00000003/sig000005d4 , \blk00000003/sig000005d5 , \blk00000003/sig000005d6 , \blk00000003/sig000005d7 , \blk00000003/sig000005d8 , +\blk00000003/sig000005d9 , \blk00000003/sig000005da , \blk00000003/sig000005db , \blk00000003/sig000005dc , \blk00000003/sig000005dd , +\blk00000003/sig000005de , \blk00000003/sig000005df , \blk00000003/sig000005e0 }), + .PCOUT({\blk00000003/sig00000252 , \blk00000003/sig00000253 , \blk00000003/sig00000254 , \blk00000003/sig00000255 , \blk00000003/sig00000256 , +\blk00000003/sig00000257 , \blk00000003/sig00000258 , \blk00000003/sig00000259 , \blk00000003/sig0000025a , \blk00000003/sig0000025b , +\blk00000003/sig0000025c , \blk00000003/sig0000025d , \blk00000003/sig0000025e , \blk00000003/sig0000025f , \blk00000003/sig00000260 , +\blk00000003/sig00000261 , \blk00000003/sig00000262 , \blk00000003/sig00000263 , \blk00000003/sig00000264 , \blk00000003/sig00000265 , +\blk00000003/sig00000266 , \blk00000003/sig00000267 , \blk00000003/sig00000268 , \blk00000003/sig00000269 , \blk00000003/sig0000026a , +\blk00000003/sig0000026b , \blk00000003/sig0000026c , \blk00000003/sig0000026d , \blk00000003/sig0000026e , \blk00000003/sig0000026f , +\blk00000003/sig00000270 , \blk00000003/sig00000271 , \blk00000003/sig00000272 , \blk00000003/sig00000273 , \blk00000003/sig00000274 , +\blk00000003/sig00000275 , \blk00000003/sig00000276 , \blk00000003/sig00000277 , \blk00000003/sig00000278 , \blk00000003/sig00000279 , +\blk00000003/sig0000027a , \blk00000003/sig0000027b , \blk00000003/sig0000027c , \blk00000003/sig0000027d , \blk00000003/sig0000027e , +\blk00000003/sig0000027f , \blk00000003/sig00000280 , \blk00000003/sig00000281 }), + .A({\blk00000003/sig0000050d , \blk00000003/sig0000050e , \blk00000003/sig0000050f , \blk00000003/sig00000510 , \blk00000003/sig00000511 , +\blk00000003/sig00000512 , \blk00000003/sig00000513 , \blk00000003/sig00000514 , \blk00000003/sig00000515 , \blk00000003/sig00000516 , +\blk00000003/sig00000517 , \blk00000003/sig00000518 , \blk00000003/sig00000519 , \blk00000003/sig0000051a , \blk00000003/sig0000051b , +\blk00000003/sig0000051c , \blk00000003/sig0000051d , \blk00000003/sig0000051e }), + .M({\NLW_blk00000003/blk00000112_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000112_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000112_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000111 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000111_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000111_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000581 , \blk00000003/sig00000581 , \blk00000003/sig00000581 , \blk00000003/sig00000581 , \blk00000003/sig00000581 , +\blk00000003/sig00000581 , \blk00000003/sig00000581 , \blk00000003/sig00000581 , \blk00000003/sig00000581 , \blk00000003/sig00000581 , +\blk00000003/sig00000581 , \blk00000003/sig00000582 , \blk00000003/sig00000583 , \blk00000003/sig00000584 , \blk00000003/sig00000585 , +\blk00000003/sig00000586 , \blk00000003/sig00000587 , \blk00000003/sig00000588 }), + .BCOUT({\NLW_blk00000003/blk00000111_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000111_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000111_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000111_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000111_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000111_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000111_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000111_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000111_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000111_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000111_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000111_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000111_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000111_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000111_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000111_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000111_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000111_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000003fd , \blk00000003/sig000003fe , \blk00000003/sig000003ff , \blk00000003/sig00000400 , \blk00000003/sig00000401 , +\blk00000003/sig00000402 , \blk00000003/sig00000403 , \blk00000003/sig00000404 , \blk00000003/sig00000405 , \blk00000003/sig00000406 , +\blk00000003/sig00000407 , \blk00000003/sig00000408 , \blk00000003/sig00000409 , \blk00000003/sig0000040a , \blk00000003/sig0000040b , +\blk00000003/sig0000040c , \blk00000003/sig0000040d , \blk00000003/sig0000040e , \blk00000003/sig0000040f , \blk00000003/sig00000410 , +\blk00000003/sig00000411 , \blk00000003/sig00000412 , \blk00000003/sig00000413 , \blk00000003/sig00000414 , \blk00000003/sig00000415 , +\blk00000003/sig00000416 , \blk00000003/sig00000417 , \blk00000003/sig00000418 , \blk00000003/sig00000419 , \blk00000003/sig0000041a , +\blk00000003/sig0000041b , \blk00000003/sig0000041c , \blk00000003/sig0000041d , \blk00000003/sig0000041e , \blk00000003/sig0000041f , +\blk00000003/sig00000420 , \blk00000003/sig00000421 , \blk00000003/sig00000422 , \blk00000003/sig00000423 , \blk00000003/sig00000424 , +\blk00000003/sig00000425 , \blk00000003/sig00000426 , \blk00000003/sig00000427 , \blk00000003/sig00000428 , \blk00000003/sig00000429 , +\blk00000003/sig0000042a , \blk00000003/sig0000042b , \blk00000003/sig0000042c }), + .C({\NLW_blk00000003/blk00000111_C<47>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<46>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<45>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<44>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<43>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<42>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<41>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<40>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<39>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<38>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<37>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<36>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<35>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<34>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<33>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<32>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<31>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<30>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<29>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<28>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<27>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<26>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<25>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<24>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<23>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<22>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<21>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<20>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<19>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<18>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<17>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<16>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<15>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<14>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<13>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<12>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<11>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<10>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<9>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<8>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<7>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<6>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<5>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<4>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<3>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<2>_UNCONNECTED , \NLW_blk00000003/blk00000111_C<1>_UNCONNECTED , +\NLW_blk00000003/blk00000111_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk00000111_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<31>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<30>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<29>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<28>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<27>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<26>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<25>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<24>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<23>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<22>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<21>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<20>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<19>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<18>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<17>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<16>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<15>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<14>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<13>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<12>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<11>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<10>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<9>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<8>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<7>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<6>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<5>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<4>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<3>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<2>_UNCONNECTED , \NLW_blk00000003/blk00000111_P<1>_UNCONNECTED , +\NLW_blk00000003/blk00000111_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig00000589 , \blk00000003/sig00000589 , \blk00000003/sig00000589 , \blk00000003/sig00000589 , \blk00000003/sig00000589 , +\blk00000003/sig00000589 , \blk00000003/sig00000589 , \blk00000003/sig00000589 , \blk00000003/sig00000589 , \blk00000003/sig00000589 , +\blk00000003/sig00000589 , \blk00000003/sig0000058a , \blk00000003/sig0000058b , \blk00000003/sig0000058c , \blk00000003/sig0000058d , +\blk00000003/sig0000058e , \blk00000003/sig0000058f , \blk00000003/sig00000590 }), + .PCOUT({\blk00000003/sig00000527 , \blk00000003/sig00000528 , \blk00000003/sig00000529 , \blk00000003/sig0000052a , \blk00000003/sig0000052b , +\blk00000003/sig0000052c , \blk00000003/sig0000052d , \blk00000003/sig0000052e , \blk00000003/sig0000052f , \blk00000003/sig00000530 , +\blk00000003/sig00000531 , \blk00000003/sig00000532 , \blk00000003/sig00000533 , \blk00000003/sig00000534 , \blk00000003/sig00000535 , +\blk00000003/sig00000536 , \blk00000003/sig00000537 , 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, \NLW_blk00000003/blk00000111_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000111_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000111_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000111_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000111_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000111_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000111_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000111_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000111_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000111_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000110 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000110_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000110_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig0000055f , \blk00000003/sig0000055f , \blk00000003/sig0000055f , \blk00000003/sig0000055f , \blk00000003/sig0000055f , +\blk00000003/sig0000055f , \blk00000003/sig0000055f , \blk00000003/sig0000055f , \blk00000003/sig0000055f , \blk00000003/sig0000055f , +\blk00000003/sig0000055f , \blk00000003/sig00000560 , \blk00000003/sig00000561 , \blk00000003/sig00000562 , \blk00000003/sig00000563 , +\blk00000003/sig00000564 , \blk00000003/sig00000565 , \blk00000003/sig00000566 }), + .BCOUT({\NLW_blk00000003/blk00000110_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000110_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000110_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000110_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000110_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000110_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000110_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000110_BCOUT<10>_UNCONNECTED , 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\NLW_blk00000003/blk00000110_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000110_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000110_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000110_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000110_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000110_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000110_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000110_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000110_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000010f ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000010f_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010f_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig0000051f , \blk00000003/sig0000051f , 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+\NLW_blk00000003/blk0000010f_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000010f_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000527 , \blk00000003/sig00000528 , \blk00000003/sig00000529 , \blk00000003/sig0000052a , \blk00000003/sig0000052b , +\blk00000003/sig0000052c , \blk00000003/sig0000052d , \blk00000003/sig0000052e , \blk00000003/sig0000052f , \blk00000003/sig00000530 , +\blk00000003/sig00000531 , \blk00000003/sig00000532 , \blk00000003/sig00000533 , \blk00000003/sig00000534 , \blk00000003/sig00000535 , +\blk00000003/sig00000536 , \blk00000003/sig00000537 , \blk00000003/sig00000538 , \blk00000003/sig00000539 , \blk00000003/sig0000053a , +\blk00000003/sig0000053b , \blk00000003/sig0000053c , \blk00000003/sig0000053d , \blk00000003/sig0000053e , \blk00000003/sig0000053f , +\blk00000003/sig00000540 , \blk00000003/sig00000541 , \blk00000003/sig00000542 , \blk00000003/sig00000543 , \blk00000003/sig00000544 , +\blk00000003/sig00000545 , \blk00000003/sig00000546 , \blk00000003/sig00000547 , \blk00000003/sig00000548 , \blk00000003/sig00000549 , +\blk00000003/sig0000054a , \blk00000003/sig0000054b , \blk00000003/sig0000054c , \blk00000003/sig0000054d , \blk00000003/sig0000054e , +\blk00000003/sig0000054f , \blk00000003/sig00000550 , \blk00000003/sig00000551 , \blk00000003/sig00000552 , \blk00000003/sig00000553 , +\blk00000003/sig00000554 , \blk00000003/sig00000555 , \blk00000003/sig00000556 }), + .C({\NLW_blk00000003/blk0000010f_C<47>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<45>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<44>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<43>_UNCONNECTED , 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\NLW_blk00000003/blk0000010f_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010f_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_C<3>_UNCONNECTED , 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\NLW_blk00000003/blk0000010f_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010f_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig00000557 , \blk00000003/sig00000557 , \blk00000003/sig00000557 , \blk00000003/sig00000557 , \blk00000003/sig00000557 , +\blk00000003/sig00000557 , \blk00000003/sig00000557 , \blk00000003/sig00000557 , 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\blk00000003/sig0000051b , +\blk00000003/sig0000051c , \blk00000003/sig0000051d , \blk00000003/sig0000051e }), + .M({\NLW_blk00000003/blk0000010f_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010f_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010f_M<19>_UNCONNECTED , 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\NLW_blk00000003/blk0000010e_C<41>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<39>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<38>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<36>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<35>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<33>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<32>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<30>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<29>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<27>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<26>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<24>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<23>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010e_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010e_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<39>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<38>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<36>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<35>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<33>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<32>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<30>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<29>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<27>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<26>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<24>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<23>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010e_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig000000ac , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig00000505 , \blk00000003/sig00000505 , \blk00000003/sig00000505 , \blk00000003/sig00000505 , \blk00000003/sig00000505 , +\blk00000003/sig00000505 , \blk00000003/sig00000505 , \blk00000003/sig00000505 , \blk00000003/sig00000505 , \blk00000003/sig00000505 , +\blk00000003/sig00000505 , \blk00000003/sig00000506 , \blk00000003/sig00000507 , \blk00000003/sig00000508 , \blk00000003/sig00000509 , +\blk00000003/sig0000050a , \blk00000003/sig0000050b , \blk00000003/sig0000050c }), + .PCOUT({\blk00000003/sig00000212 , \blk00000003/sig00000213 , \blk00000003/sig00000214 , \blk00000003/sig00000215 , \blk00000003/sig00000216 , +\blk00000003/sig00000217 , \blk00000003/sig00000218 , \blk00000003/sig00000219 , \blk00000003/sig0000021a , \blk00000003/sig0000021b , +\blk00000003/sig0000021c , \blk00000003/sig0000021d , \blk00000003/sig0000021e , \blk00000003/sig0000021f , \blk00000003/sig00000220 , +\blk00000003/sig00000221 , \blk00000003/sig00000222 , \blk00000003/sig00000223 , \blk00000003/sig00000224 , \blk00000003/sig00000225 , +\blk00000003/sig00000226 , \blk00000003/sig00000227 , \blk00000003/sig00000228 , \blk00000003/sig00000229 , \blk00000003/sig0000022a , +\blk00000003/sig0000022b , \blk00000003/sig0000022c , \blk00000003/sig0000022d , \blk00000003/sig0000022e , \blk00000003/sig0000022f , +\blk00000003/sig00000230 , \blk00000003/sig00000231 , \blk00000003/sig00000232 , \blk00000003/sig00000233 , \blk00000003/sig00000234 , +\blk00000003/sig00000235 , \blk00000003/sig00000236 , \blk00000003/sig00000237 , \blk00000003/sig00000238 , \blk00000003/sig00000239 , +\blk00000003/sig0000023a , \blk00000003/sig0000023b , \blk00000003/sig0000023c , \blk00000003/sig0000023d , \blk00000003/sig0000023e , +\blk00000003/sig0000023f , \blk00000003/sig00000240 , \blk00000003/sig00000241 }), + .A({\blk00000003/sig0000050d , \blk00000003/sig0000050e , \blk00000003/sig0000050f , \blk00000003/sig00000510 , \blk00000003/sig00000511 , +\blk00000003/sig00000512 , \blk00000003/sig00000513 , \blk00000003/sig00000514 , \blk00000003/sig00000515 , \blk00000003/sig00000516 , +\blk00000003/sig00000517 , \blk00000003/sig00000518 , \blk00000003/sig00000519 , \blk00000003/sig0000051a , \blk00000003/sig0000051b , +\blk00000003/sig0000051c , \blk00000003/sig0000051d , \blk00000003/sig0000051e }), + .M({\NLW_blk00000003/blk0000010e_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000010e_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010e_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000010d ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000010d_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010d_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig0000047d , \blk00000003/sig0000047e , \blk00000003/sig0000047f , +\blk00000003/sig00000480 , \blk00000003/sig00000481 , \blk00000003/sig00000482 , \blk00000003/sig00000483 , \blk00000003/sig00000484 , +\blk00000003/sig00000485 , \blk00000003/sig00000486 , \blk00000003/sig00000487 , \blk00000003/sig00000488 , \blk00000003/sig00000489 , +\blk00000003/sig0000048a , \blk00000003/sig0000048b , \blk00000003/sig0000048c }), + .BCOUT({\NLW_blk00000003/blk0000010d_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000010d_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\NLW_blk00000003/blk0000010d_C<47>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<45>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<44>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<42>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<41>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<39>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<38>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<36>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<35>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<33>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<32>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<30>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<29>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<27>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<26>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<24>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<23>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010d_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010d_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<39>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<38>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<36>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<35>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<33>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<32>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<30>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<29>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<27>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<26>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<24>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<23>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010d_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig0000048d , \blk00000003/sig0000048e , \blk00000003/sig0000048f , +\blk00000003/sig00000490 , \blk00000003/sig00000491 , \blk00000003/sig00000492 , \blk00000003/sig00000493 , \blk00000003/sig00000494 , +\blk00000003/sig00000495 , \blk00000003/sig00000496 , \blk00000003/sig00000497 , \blk00000003/sig00000498 , \blk00000003/sig00000499 , +\blk00000003/sig0000049a , \blk00000003/sig0000049b , \blk00000003/sig0000049c }), + .PCOUT({\blk00000003/sig0000049d , \blk00000003/sig0000049e , \blk00000003/sig0000049f , \blk00000003/sig000004a0 , \blk00000003/sig000004a1 , +\blk00000003/sig000004a2 , \blk00000003/sig000004a3 , \blk00000003/sig000004a4 , \blk00000003/sig000004a5 , \blk00000003/sig000004a6 , +\blk00000003/sig000004a7 , \blk00000003/sig000004a8 , \blk00000003/sig000004a9 , \blk00000003/sig000004aa , \blk00000003/sig000004ab , +\blk00000003/sig000004ac , \blk00000003/sig000004ad , \blk00000003/sig000004ae , \blk00000003/sig000004af , \blk00000003/sig000004b0 , +\blk00000003/sig000004b1 , \blk00000003/sig000004b2 , \blk00000003/sig000004b3 , \blk00000003/sig000004b4 , \blk00000003/sig000004b5 , +\blk00000003/sig000004b6 , \blk00000003/sig000004b7 , \blk00000003/sig000004b8 , \blk00000003/sig000004b9 , \blk00000003/sig000004ba , +\blk00000003/sig000004bb , \blk00000003/sig000004bc , \blk00000003/sig000004bd , \blk00000003/sig000004be , \blk00000003/sig000004bf , +\blk00000003/sig000004c0 , \blk00000003/sig000004c1 , \blk00000003/sig000004c2 , \blk00000003/sig000004c3 , \blk00000003/sig000004c4 , +\blk00000003/sig000004c5 , \blk00000003/sig000004c6 , \blk00000003/sig000004c7 , \blk00000003/sig000004c8 , \blk00000003/sig000004c9 , +\blk00000003/sig000004ca , \blk00000003/sig000004cb , \blk00000003/sig000004cc }), + .A({\blk00000003/sig000003db , \blk00000003/sig000003dc , \blk00000003/sig000003dd , \blk00000003/sig000003de , \blk00000003/sig000003df , +\blk00000003/sig000003e0 , \blk00000003/sig000003e1 , \blk00000003/sig000003e2 , \blk00000003/sig000003e3 , \blk00000003/sig000003e4 , +\blk00000003/sig000003e5 , \blk00000003/sig000003e6 , \blk00000003/sig000003e7 , \blk00000003/sig000003e8 , \blk00000003/sig000003e9 , +\blk00000003/sig000003ea , \blk00000003/sig000003eb , \blk00000003/sig000003ec }), + .M({\NLW_blk00000003/blk0000010d_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000010d_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010d_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000010c ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000010c_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010c_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig0000042d , \blk00000003/sig0000042e , \blk00000003/sig0000042f , +\blk00000003/sig00000430 , \blk00000003/sig00000431 , \blk00000003/sig00000432 , \blk00000003/sig00000433 , \blk00000003/sig00000434 , +\blk00000003/sig00000435 , \blk00000003/sig00000436 , \blk00000003/sig00000437 , \blk00000003/sig00000438 , \blk00000003/sig00000439 , +\blk00000003/sig0000043a , \blk00000003/sig0000043b , \blk00000003/sig0000043c }), + .BCOUT({\NLW_blk00000003/blk0000010c_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000010c_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\NLW_blk00000003/blk0000010c_C<47>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<45>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<44>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<42>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<41>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<39>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<38>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<36>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<35>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<33>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<32>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<30>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<29>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<27>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<26>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<24>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<23>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010c_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010c_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<45>_UNCONNECTED , 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+\NLW_blk00000003/blk0000010c_P<24>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<23>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010c_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig0000043d , \blk00000003/sig0000043e , \blk00000003/sig0000043f , +\blk00000003/sig00000440 , \blk00000003/sig00000441 , \blk00000003/sig00000442 , \blk00000003/sig00000443 , \blk00000003/sig00000444 , +\blk00000003/sig00000445 , \blk00000003/sig00000446 , \blk00000003/sig00000447 , \blk00000003/sig00000448 , \blk00000003/sig00000449 , +\blk00000003/sig0000044a , \blk00000003/sig0000044b , \blk00000003/sig0000044c }), + .PCOUT({\blk00000003/sig0000044d , \blk00000003/sig0000044e , \blk00000003/sig0000044f , \blk00000003/sig00000450 , \blk00000003/sig00000451 , +\blk00000003/sig00000452 , \blk00000003/sig00000453 , \blk00000003/sig00000454 , \blk00000003/sig00000455 , \blk00000003/sig00000456 , +\blk00000003/sig00000457 , \blk00000003/sig00000458 , \blk00000003/sig00000459 , \blk00000003/sig0000045a , \blk00000003/sig0000045b , +\blk00000003/sig0000045c , \blk00000003/sig0000045d , \blk00000003/sig0000045e , \blk00000003/sig0000045f , \blk00000003/sig00000460 , +\blk00000003/sig00000461 , \blk00000003/sig00000462 , \blk00000003/sig00000463 , \blk00000003/sig00000464 , \blk00000003/sig00000465 , +\blk00000003/sig00000466 , \blk00000003/sig00000467 , \blk00000003/sig00000468 , \blk00000003/sig00000469 , \blk00000003/sig0000046a , +\blk00000003/sig0000046b , \blk00000003/sig0000046c , \blk00000003/sig0000046d , \blk00000003/sig0000046e , \blk00000003/sig0000046f , +\blk00000003/sig00000470 , \blk00000003/sig00000471 , \blk00000003/sig00000472 , \blk00000003/sig00000473 , \blk00000003/sig00000474 , +\blk00000003/sig00000475 , \blk00000003/sig00000476 , \blk00000003/sig00000477 , \blk00000003/sig00000478 , \blk00000003/sig00000479 , +\blk00000003/sig0000047a , \blk00000003/sig0000047b , \blk00000003/sig0000047c }), + .A({\blk00000003/sig000003db , \blk00000003/sig000003dc , \blk00000003/sig000003dd , \blk00000003/sig000003de , \blk00000003/sig000003df , +\blk00000003/sig000003e0 , \blk00000003/sig000003e1 , \blk00000003/sig000003e2 , \blk00000003/sig000003e3 , \blk00000003/sig000003e4 , +\blk00000003/sig000003e5 , \blk00000003/sig000003e6 , \blk00000003/sig000003e7 , \blk00000003/sig000003e8 , \blk00000003/sig000003e9 , +\blk00000003/sig000003ea , \blk00000003/sig000003eb , \blk00000003/sig000003ec }), + .M({\NLW_blk00000003/blk0000010c_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000010c_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010c_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk0000010b ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk0000010b_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010b_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig000003ed , \blk00000003/sig000003ed , \blk00000003/sig000003ed , \blk00000003/sig000003ed , \blk00000003/sig000003ed , +\blk00000003/sig000003ed , \blk00000003/sig000003ed , \blk00000003/sig000003ed , \blk00000003/sig000003ed , \blk00000003/sig000003ed , +\blk00000003/sig000003ed , \blk00000003/sig000003ee , \blk00000003/sig000003ef , \blk00000003/sig000003f0 , \blk00000003/sig000003f1 , +\blk00000003/sig000003f2 , \blk00000003/sig000003f3 , \blk00000003/sig000003f4 }), + .BCOUT({\NLW_blk00000003/blk0000010b_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk0000010b_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .C({\NLW_blk00000003/blk0000010b_C<47>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<45>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<44>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<42>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<41>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<39>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<38>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<36>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<35>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<33>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<32>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<30>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<29>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<27>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<26>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<24>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<23>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<21>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<20>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<18>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<17>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<15>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<14>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010b_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010b_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<43>_UNCONNECTED , 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\NLW_blk00000003/blk0000010b_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010b_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010b_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig000003f5 , \blk00000003/sig000003f5 , \blk00000003/sig000003f5 , \blk00000003/sig000003f5 , \blk00000003/sig000003f5 , +\blk00000003/sig000003f5 , \blk00000003/sig000003f5 , \blk00000003/sig000003f5 , \blk00000003/sig000003f5 , \blk00000003/sig000003f5 , +\blk00000003/sig000003f5 , \blk00000003/sig000003f6 , \blk00000003/sig000003f7 , \blk00000003/sig000003f8 , \blk00000003/sig000003f9 , +\blk00000003/sig000003fa , \blk00000003/sig000003fb , \blk00000003/sig000003fc }), + .PCOUT({\blk00000003/sig000003fd , \blk00000003/sig000003fe , \blk00000003/sig000003ff , \blk00000003/sig00000400 , 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.CARRYOUTF(\NLW_blk00000003/blk0000010a_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk0000010a_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig0000039b , \blk00000003/sig0000039b , \blk00000003/sig0000039b , \blk00000003/sig0000039b , \blk00000003/sig0000039b , +\blk00000003/sig0000039b , \blk00000003/sig0000039b , \blk00000003/sig0000039b , \blk00000003/sig0000039b , \blk00000003/sig0000039b , +\blk00000003/sig0000039b , \blk00000003/sig0000039c , \blk00000003/sig0000039d , \blk00000003/sig0000039e , \blk00000003/sig0000039f , +\blk00000003/sig000003a0 , \blk00000003/sig000003a1 , \blk00000003/sig000003a2 }), + .BCOUT({\NLW_blk00000003/blk0000010a_BCOUT<17>_UNCONNECTED , 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+\NLW_blk00000003/blk0000010a_C<12>_UNCONNECTED , \NLW_blk00000003/blk0000010a_C<11>_UNCONNECTED , \NLW_blk00000003/blk0000010a_C<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_C<9>_UNCONNECTED , \NLW_blk00000003/blk0000010a_C<8>_UNCONNECTED , \NLW_blk00000003/blk0000010a_C<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_C<6>_UNCONNECTED , \NLW_blk00000003/blk0000010a_C<5>_UNCONNECTED , \NLW_blk00000003/blk0000010a_C<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_C<3>_UNCONNECTED , \NLW_blk00000003/blk0000010a_C<2>_UNCONNECTED , \NLW_blk00000003/blk0000010a_C<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_C<0>_UNCONNECTED }), + .P({\NLW_blk00000003/blk0000010a_P<47>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<46>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<45>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<44>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<43>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<42>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<41>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<40>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<39>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<38>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<37>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<36>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<35>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<33>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<32>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<30>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<29>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<27>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<26>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<24>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<23>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<21>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<20>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<18>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<17>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<15>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<14>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<12>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<11>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<9>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<8>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<6>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<5>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<3>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<2>_UNCONNECTED , \NLW_blk00000003/blk0000010a_P<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_P<0>_UNCONNECTED }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000000ac }), + .D({\blk00000003/sig000003a3 , \blk00000003/sig000003a3 , \blk00000003/sig000003a3 , \blk00000003/sig000003a3 , \blk00000003/sig000003a3 , +\blk00000003/sig000003a3 , \blk00000003/sig000003a3 , \blk00000003/sig000003a3 , \blk00000003/sig000003a3 , \blk00000003/sig000003a3 , +\blk00000003/sig000003a3 , \blk00000003/sig000003a4 , \blk00000003/sig000003a5 , \blk00000003/sig000003a6 , \blk00000003/sig000003a7 , +\blk00000003/sig000003a8 , \blk00000003/sig000003a9 , \blk00000003/sig000003aa }), + .PCOUT({\blk00000003/sig000003ab , \blk00000003/sig000003ac , \blk00000003/sig000003ad , \blk00000003/sig000003ae , \blk00000003/sig000003af , +\blk00000003/sig000003b0 , \blk00000003/sig000003b1 , \blk00000003/sig000003b2 , \blk00000003/sig000003b3 , \blk00000003/sig000003b4 , +\blk00000003/sig000003b5 , \blk00000003/sig000003b6 , \blk00000003/sig000003b7 , \blk00000003/sig000003b8 , \blk00000003/sig000003b9 , +\blk00000003/sig000003ba , \blk00000003/sig000003bb , \blk00000003/sig000003bc , \blk00000003/sig000003bd , \blk00000003/sig000003be , +\blk00000003/sig000003bf , \blk00000003/sig000003c0 , \blk00000003/sig000003c1 , \blk00000003/sig000003c2 , \blk00000003/sig000003c3 , +\blk00000003/sig000003c4 , \blk00000003/sig000003c5 , \blk00000003/sig000003c6 , \blk00000003/sig000003c7 , \blk00000003/sig000003c8 , +\blk00000003/sig000003c9 , \blk00000003/sig000003ca , \blk00000003/sig000003cb , \blk00000003/sig000003cc , \blk00000003/sig000003cd , +\blk00000003/sig000003ce , \blk00000003/sig000003cf , \blk00000003/sig000003d0 , \blk00000003/sig000003d1 , \blk00000003/sig000003d2 , +\blk00000003/sig000003d3 , \blk00000003/sig000003d4 , \blk00000003/sig000003d5 , \blk00000003/sig000003d6 , \blk00000003/sig000003d7 , +\blk00000003/sig000003d8 , \blk00000003/sig000003d9 , \blk00000003/sig000003da }), + .A({\blk00000003/sig000003db , \blk00000003/sig000003dc , \blk00000003/sig000003dd , \blk00000003/sig000003de , \blk00000003/sig000003df , +\blk00000003/sig000003e0 , \blk00000003/sig000003e1 , \blk00000003/sig000003e2 , \blk00000003/sig000003e3 , \blk00000003/sig000003e4 , +\blk00000003/sig000003e5 , \blk00000003/sig000003e6 , \blk00000003/sig000003e7 , \blk00000003/sig000003e8 , \blk00000003/sig000003e9 , +\blk00000003/sig000003ea , \blk00000003/sig000003eb , \blk00000003/sig000003ec }), + .M({\NLW_blk00000003/blk0000010a_M<35>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<34>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<33>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<32>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<31>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<30>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<29>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<28>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<27>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<26>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<25>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<24>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<23>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<22>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<21>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<20>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<19>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<18>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<17>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<16>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<15>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<14>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<13>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<12>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<11>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<10>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<9>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<8>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<7>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<6>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<5>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<4>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<3>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<2>_UNCONNECTED , \NLW_blk00000003/blk0000010a_M<1>_UNCONNECTED , +\NLW_blk00000003/blk0000010a_M<0>_UNCONNECTED }) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000109 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029e ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000039a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000108 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000398 ), + .Q(\blk00000003/sig00000399 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000107 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000397 ), + .Q(\blk00000003/sig0000038f ) + ); + XORCY \blk00000003/blk00000106 ( + .CI(\blk00000003/sig00000392 ), + .LI(\blk00000003/sig00000395 ), + .O(\blk00000003/sig00000396 ) + ); + MUXCY_D \blk00000003/blk00000105 ( + .CI(\blk00000003/sig00000392 ), + .DI(\blk00000003/sig00000394 ), + .S(\blk00000003/sig00000395 ), + .O(\NLW_blk00000003/blk00000105_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk00000105_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000104 ( + .CI(\blk00000003/sig0000038f ), + .LI(\blk00000003/sig00000391 ), + .O(\blk00000003/sig00000393 ) + ); + MUXCY_L \blk00000003/blk00000103 ( + .CI(\blk00000003/sig0000038f ), + .DI(\blk00000003/sig00000390 ), + .S(\blk00000003/sig00000391 ), + .LO(\blk00000003/sig00000392 ) + ); + MUXCY_L \blk00000003/blk00000102 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig0000038e ), + .S(\blk00000003/sig00000388 ), + .LO(\blk00000003/sig0000038a ) + ); + MUXCY_D \blk00000003/blk00000101 ( + .CI(\blk00000003/sig0000038a ), + .DI(\blk00000003/sig0000038d ), + .S(\blk00000003/sig0000038b ), + .O(\NLW_blk00000003/blk00000101_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk00000101_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000100 ( + .CI(\blk00000003/sig0000038a ), + .LI(\blk00000003/sig0000038b ), + .O(\blk00000003/sig0000038c ) + ); + XORCY \blk00000003/blk000000ff ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000388 ), + .O(\blk00000003/sig00000389 ) + ); + MUXCY_L \blk00000003/blk000000fe ( + .CI(\blk00000003/sig0000037f ), + .DI(\blk00000003/sig00000387 ), + .S(\blk00000003/sig00000380 ), + .LO(\blk00000003/sig00000382 ) + ); + MUXCY_D \blk00000003/blk000000fd ( + .CI(\blk00000003/sig00000382 ), + .DI(\blk00000003/sig00000386 ), + .S(\blk00000003/sig00000383 ), + .O(\NLW_blk00000003/blk000000fd_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000fd_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000fc ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig00000385 ), + .O(\blk00000003/sig0000037f ) + ); + XORCY \blk00000003/blk000000fb ( + .CI(\blk00000003/sig00000382 ), + .LI(\blk00000003/sig00000383 ), + .O(\blk00000003/sig00000384 ) + ); + XORCY \blk00000003/blk000000fa ( + .CI(\blk00000003/sig0000037f ), + .LI(\blk00000003/sig00000380 ), + .O(\blk00000003/sig00000381 ) + ); + FDE \blk00000003/blk000000f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000037d ), + .Q(\blk00000003/sig0000037e ) + ); + MUXCY_L \blk00000003/blk000000f8 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig0000037c ), + .S(\blk00000003/sig00000376 ), + .LO(\blk00000003/sig00000378 ) + ); + MUXCY_D \blk00000003/blk000000f7 ( + .CI(\blk00000003/sig00000378 ), + .DI(\blk00000003/sig0000037b ), + .S(\blk00000003/sig00000379 ), + .O(\NLW_blk00000003/blk000000f7_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000f7_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000f6 ( + .CI(\blk00000003/sig00000378 ), + .LI(\blk00000003/sig00000379 ), + .O(\blk00000003/sig0000037a ) + ); + XORCY \blk00000003/blk000000f5 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000376 ), + .O(\blk00000003/sig00000377 ) + ); + MUXCY_L \blk00000003/blk000000f4 ( + .CI(\blk00000003/sig0000036f ), + .DI(\blk00000003/sig000002b8 ), + .S(\blk00000003/sig00000370 ), + .LO(\blk00000003/sig00000372 ) + ); + MUXCY_D \blk00000003/blk000000f3 ( + .CI(\blk00000003/sig00000372 ), + .DI(\blk00000003/sig000002b7 ), + .S(\blk00000003/sig00000373 ), + .O(\NLW_blk00000003/blk000000f3_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000f3_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000f2 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig00000375 ), + .O(\blk00000003/sig0000036f ) + ); + XORCY \blk00000003/blk000000f1 ( + .CI(\blk00000003/sig00000372 ), + .LI(\blk00000003/sig00000373 ), + .O(\blk00000003/sig00000374 ) + ); + XORCY \blk00000003/blk000000f0 ( + .CI(\blk00000003/sig0000036f ), + .LI(\blk00000003/sig00000370 ), + .O(\blk00000003/sig00000371 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000036d ), + .R(sclr), + .Q(\blk00000003/sig0000036e ) + ); + MUXCY_D \blk00000003/blk000000ee ( + .CI(\blk00000003/sig0000036a ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000036c ), + .O(\NLW_blk00000003/blk000000ee_O_UNCONNECTED ), + .LO(\blk00000003/sig0000036d ) + ); + MUXCY_D \blk00000003/blk000000ed ( + .CI(\blk00000003/sig000000ac ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig0000036b ), + .O(\blk00000003/sig00000367 ), + .LO(\NLW_blk00000003/blk000000ed_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000ec ( + .CI(\blk00000003/sig00000369 ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig00000365 ) + ); + MUXCY \blk00000003/blk000000eb ( + .CI(\blk00000003/sig00000369 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000ac ), + .O(\blk00000003/sig0000036a ) + ); + MUXCY_D \blk00000003/blk000000ea ( + .CI(\blk00000003/sig00000367 ), + .DI(\blk00000003/sig00000366 ), + .S(\blk00000003/sig00000368 ), + .O(\blk00000003/sig00000369 ), + .LO(\NLW_blk00000003/blk000000ea_LO_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000365 ), + .R(sclr), + .Q(\blk00000003/sig00000366 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000356 ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002f0 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000355 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002ed ) + ); + MUXCY_D \blk00000003/blk000000e6 ( + .CI(\blk00000003/sig000002ed ), + .DI(\blk00000003/sig00000363 ), + .S(\blk00000003/sig00000364 ), + .O(\blk00000003/sig00000360 ), + .LO(\NLW_blk00000003/blk000000e6_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000e5 ( + .CI(\blk00000003/sig00000360 ), + .DI(\blk00000003/sig00000361 ), + .S(\blk00000003/sig00000362 ), + .O(\blk00000003/sig0000035e ), + .LO(\NLW_blk00000003/blk000000e5_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000e4 ( + .CI(\blk00000003/sig0000035e ), + .DI(\blk00000003/sig00000354 ), + .S(\blk00000003/sig0000035f ), + .O(\blk00000003/sig0000035b ), + .LO(\NLW_blk00000003/blk000000e4_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000e3 ( + .CI(\blk00000003/sig0000035b ), + .DI(\blk00000003/sig0000035c ), + .S(\blk00000003/sig0000035d ), + .O(\blk00000003/sig00000359 ), + .LO(\NLW_blk00000003/blk000000e3_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000e2 ( + .CI(\blk00000003/sig00000359 ), + .DI(\blk00000003/sig00000319 ), + .S(\blk00000003/sig0000035a ), + .O(\blk00000003/sig00000357 ), + .LO(\NLW_blk00000003/blk000000e2_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000e1 ( + .CI(\blk00000003/sig00000357 ), + .DI(\blk00000003/sig000002ea ), + .S(\blk00000003/sig00000358 ), + .O(\NLW_blk00000003/blk000000e1_O_UNCONNECTED ), + .LO(\blk00000003/sig00000355 ) + ); + XORCY \blk00000003/blk000000e0 ( + .CI(\blk00000003/sig00000355 ), + .LI(\blk00000003/sig000000ac ), + .O(\blk00000003/sig00000356 ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk000000df ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000344 ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000354 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000de ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000343 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000029e ) + ); + MUXCY_D \blk00000003/blk000000dd ( + .CI(\blk00000003/sig0000029e ), + .DI(\blk00000003/sig00000352 ), + .S(\blk00000003/sig00000353 ), + .O(\blk00000003/sig00000350 ), + .LO(\NLW_blk00000003/blk000000dd_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000dc ( + .CI(\blk00000003/sig00000350 ), + .DI(\blk00000003/sig0000029f ), + .S(\blk00000003/sig00000351 ), + .O(\blk00000003/sig0000034e ), + .LO(\NLW_blk00000003/blk000000dc_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000db ( + .CI(\blk00000003/sig0000034e ), + .DI(\blk00000003/sig0000029e ), + .S(\blk00000003/sig0000034f ), + .O(\blk00000003/sig0000034b ), + .LO(\NLW_blk00000003/blk000000db_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000da ( + .CI(\blk00000003/sig0000034b ), + .DI(\blk00000003/sig0000034c ), + .S(\blk00000003/sig0000034d ), + .O(\blk00000003/sig00000349 ), + .LO(\NLW_blk00000003/blk000000da_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d9 ( + .CI(\blk00000003/sig00000349 ), + .DI(\blk00000003/sig000002f0 ), + .S(\blk00000003/sig0000034a ), + .O(\blk00000003/sig00000345 ), + .LO(\NLW_blk00000003/blk000000d9_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000d8 ( + .CI(\blk00000003/sig00000347 ), + .DI(\blk00000003/sig000002f0 ), + .S(\blk00000003/sig00000348 ), + .O(\NLW_blk00000003/blk000000d8_O_UNCONNECTED ), + .LO(\blk00000003/sig00000343 ) + ); + MUXCY_D \blk00000003/blk000000d7 ( + .CI(\blk00000003/sig00000345 ), + .DI(\blk00000003/sig0000030e ), + .S(\blk00000003/sig00000346 ), + .O(\blk00000003/sig00000347 ), + .LO(\NLW_blk00000003/blk000000d7_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000d6 ( + .CI(\blk00000003/sig00000343 ), + .LI(\blk00000003/sig000000ac ), + .O(\blk00000003/sig00000344 ) + ); + FDE \blk00000003/blk000000d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000341 ), + .Q(\blk00000003/sig00000342 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000d4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ed ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000340 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000d3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000031f ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000338 ) + ); + XORCY \blk00000003/blk000000d2 ( + .CI(\blk00000003/sig0000033b ), + .LI(\blk00000003/sig0000033e ), + .O(\blk00000003/sig0000033f ) + ); + MUXCY_D \blk00000003/blk000000d1 ( + .CI(\blk00000003/sig0000033b ), + .DI(\blk00000003/sig0000033d ), + .S(\blk00000003/sig0000033e ), + .O(\NLW_blk00000003/blk000000d1_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000d1_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000d0 ( + .CI(\blk00000003/sig00000338 ), + .LI(\blk00000003/sig0000033a ), + .O(\blk00000003/sig0000033c ) + ); + MUXCY_L \blk00000003/blk000000cf ( + .CI(\blk00000003/sig00000338 ), + .DI(\blk00000003/sig00000339 ), + .S(\blk00000003/sig0000033a ), + .LO(\blk00000003/sig0000033b ) + ); + MUXCY_L \blk00000003/blk000000ce ( + .CI(\blk00000003/sig0000032f ), + .DI(\blk00000003/sig00000337 ), + .S(\blk00000003/sig00000330 ), + .LO(\blk00000003/sig00000332 ) + ); + MUXCY_D \blk00000003/blk000000cd ( + .CI(\blk00000003/sig00000332 ), + .DI(\blk00000003/sig00000336 ), + .S(\blk00000003/sig00000333 ), + .O(\NLW_blk00000003/blk000000cd_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000cd_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk000000cc ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig00000335 ), + .O(\blk00000003/sig0000032f ) + ); + XORCY \blk00000003/blk000000cb ( + .CI(\blk00000003/sig00000332 ), + .LI(\blk00000003/sig00000333 ), + .O(\blk00000003/sig00000334 ) + ); + XORCY \blk00000003/blk000000ca ( + .CI(\blk00000003/sig0000032f ), + .LI(\blk00000003/sig00000330 ), + .O(\blk00000003/sig00000331 ) + ); + MUXCY_L \blk00000003/blk000000c9 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig0000032e ), + .S(\blk00000003/sig0000032c ), + .LO(\blk00000003/sig00000328 ) + ); + XORCY \blk00000003/blk000000c8 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig0000032c ), + .O(\blk00000003/sig0000032d ) + ); + MUXCY_D \blk00000003/blk000000c7 ( + .CI(\blk00000003/sig00000328 ), + .DI(\blk00000003/sig0000032b ), + .S(\blk00000003/sig00000329 ), + .O(\NLW_blk00000003/blk000000c7_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000c7_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000c6 ( + .CI(\blk00000003/sig00000328 ), + .LI(\blk00000003/sig00000329 ), + .O(\blk00000003/sig0000032a ) + ); + MUXCY_L \blk00000003/blk000000c5 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000327 ), + .S(\blk00000003/sig00000325 ), + .LO(\blk00000003/sig00000321 ) + ); + XORCY \blk00000003/blk000000c4 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig00000325 ), + .O(\blk00000003/sig00000326 ) + ); + MUXCY_D \blk00000003/blk000000c3 ( + .CI(\blk00000003/sig00000321 ), + .DI(\blk00000003/sig00000324 ), + .S(\blk00000003/sig00000322 ), + .O(\NLW_blk00000003/blk000000c3_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk000000c3_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000c2 ( + .CI(\blk00000003/sig00000321 ), + .LI(\blk00000003/sig00000322 ), + .O(\blk00000003/sig00000323 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c1 ( + .C(clk), + .CE(ce), + .D(coef_ld), + .Q(\blk00000003/sig00000320 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000c0 ( + .C(clk), + .CE(ce), + .D(coef_we), + .Q(\blk00000003/sig0000031f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b1 ), + .Q(\blk00000003/sig00000313 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000be ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000031e ), + .Q(\blk00000003/sig00000306 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000031c ), + .Q(\blk00000003/sig0000031d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000031b ), + .Q(\blk00000003/sig00000304 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000031a ), + .Q(\blk00000003/sig00000311 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000318 ), + .Q(\blk00000003/sig00000319 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000316 ), + .Q(\blk00000003/sig00000317 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000314 ), + .Q(\blk00000003/sig00000315 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000313 ), + .Q(\blk00000003/sig0000030f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000311 ), + .Q(\blk00000003/sig00000312 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000030f ), + .Q(\blk00000003/sig00000310 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ec ), + .Q(\blk00000003/sig0000030e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000309 ), + .Q(\blk00000003/sig0000030d ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000303 ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk000000b2_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000300 ), + .R(coef_ld), + .Q(\NLW_blk00000003/blk000000b1_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002fb ), + .R(coef_ld), + .Q(\blk00000003/sig000002f9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000af ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002f6 ), + .R(coef_ld), + .Q(\blk00000003/sig000002f3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ae ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ed ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000030c ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ad ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000030a ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig0000030b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ac ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000308 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000309 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000ab ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000306 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000307 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk000000aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000304 ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig00000305 ) + ); + XORCY \blk00000003/blk000000a9 ( + .CI(\blk00000003/sig00000302 ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig00000303 ) + ); + MUXCY \blk00000003/blk000000a8 ( + .CI(\blk00000003/sig00000302 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000ac ), + .O(\NLW_blk00000003/blk000000a8_O_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000a7 ( + .CI(\blk00000003/sig000002ff ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000301 ), + .O(\blk00000003/sig00000302 ), + .LO(\NLW_blk00000003/blk000000a7_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000a6 ( + .CI(\blk00000003/sig000002fe ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig00000300 ) + ); + MUXCY \blk00000003/blk000000a5 ( + .CI(\blk00000003/sig000002fe ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000ac ), + .O(\blk00000003/sig000002ff ) + ); + MUXCY_D \blk00000003/blk000000a4 ( + .CI(coef_we), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000002fd ), + .O(\blk00000003/sig000002fe ), + .LO(\NLW_blk00000003/blk000000a4_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000a3 ( + .CI(\blk00000003/sig000000ac ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000002fc ), + .O(\blk00000003/sig000002f8 ), + .LO(\NLW_blk00000003/blk000000a3_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk000000a2 ( + .CI(\blk00000003/sig000002fa ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig000002fb ) + ); + MUXCY \blk00000003/blk000000a1 ( + .CI(\blk00000003/sig000002fa ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000ac ), + .O(\NLW_blk00000003/blk000000a1_O_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk000000a0 ( + .CI(\blk00000003/sig000002f8 ), + .DI(\blk00000003/sig000002f9 ), + .S(coef_we), + .O(\blk00000003/sig000002fa ), + .LO(\NLW_blk00000003/blk000000a0_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk0000009f ( + .CI(\blk00000003/sig000000ac ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000002f7 ), + .O(\blk00000003/sig000002f2 ), + .LO(\NLW_blk00000003/blk0000009f_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk0000009e ( + .CI(\blk00000003/sig000002f5 ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig000002f6 ) + ); + MUXCY \blk00000003/blk0000009d ( + .CI(\blk00000003/sig000002f5 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000ac ), + .O(\NLW_blk00000003/blk0000009d_O_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk0000009c ( + .CI(\blk00000003/sig000002f2 ), + .DI(\blk00000003/sig000002f3 ), + .S(\blk00000003/sig000002f4 ), + .O(\blk00000003/sig000002f5 ), + .LO(\NLW_blk00000003/blk0000009c_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk0000009b ( + .CI(\blk00000003/sig000002eb ), + .LI(\blk00000003/sig000000ac ), + .O(\blk00000003/sig000002e9 ) + ); + MUXCY_D \blk00000003/blk0000009a ( + .CI(\blk00000003/sig000002ef ), + .DI(\blk00000003/sig000002f0 ), + .S(\blk00000003/sig000002f1 ), + .O(\NLW_blk00000003/blk0000009a_O_UNCONNECTED ), + .LO(\blk00000003/sig000002eb ) + ); + MUXCY_D \blk00000003/blk00000099 ( + .CI(\blk00000003/sig000002ec ), + .DI(\blk00000003/sig000002ed ), + .S(\blk00000003/sig000002ee ), + .O(\blk00000003/sig000002ef ), + .LO(\NLW_blk00000003/blk00000099_LO_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000098 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002eb ), + .R(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002ec ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk00000097 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002e9 ), + .S(\blk00000003/sig00000049 ), + .Q(\blk00000003/sig000002ea ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000033 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b6 ), + .R(sclr), + .Q(\blk00000003/sig000002b5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000032 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b5 ), + .R(sclr), + .Q(\blk00000003/sig000002b2 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000031 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b4 ), + .R(\blk00000003/sig000002af ), + .Q(data_valid) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000030 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b2 ), + .R(sclr), + .Q(\blk00000003/sig000002b3 ) + ); + FDRE \blk00000003/blk0000002f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002b0 ), + .R(sclr), + .Q(\blk00000003/sig000002b1 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002e ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ae ), + .R(\blk00000003/sig000002af ), + .Q(rdy) + ); + FDSE \blk00000003/blk0000002d ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002ac ), + .S(sclr), + .Q(\blk00000003/sig000002ad ) + ); + FDRE \blk00000003/blk0000002c ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002aa ), + .R(sclr), + .Q(\blk00000003/sig000002ab ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000002b ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029c ), + .S(sclr), + .Q(NlwRenamedSig_OI_rfd) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000002a ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029a ), + .R(sclr), + .Q(\blk00000003/sig000002a9 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000029 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a8 ), + .R(sclr), + .Q(\blk00000003/sig00000296 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000028 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000293 ), + .R(sclr), + .Q(\blk00000003/sig000002a7 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000027 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a6 ), + .R(sclr), + .Q(\blk00000003/sig00000294 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000026 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a4 ), + .R(sclr), + .Q(\blk00000003/sig000002a5 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000025 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a2 ), + .R(sclr), + .Q(\blk00000003/sig000002a3 ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000024 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a0 ), + .R(sclr), + .Q(\NLW_blk00000003/blk00000024_Q_UNCONNECTED ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000023 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig000002a0 ), + .R(sclr), + .Q(\blk00000003/sig000002a1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000022 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000029e ), + .Q(\blk00000003/sig0000029f ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000021 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig0000016e ), + .R(sclr), + .Q(\blk00000003/sig0000016b ) + ); + FDRE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000020 ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000168 ), + .R(sclr), + .Q(\NLW_blk00000003/blk00000020_Q_UNCONNECTED ) + ); + FDSE #( + .INIT ( 1'b1 )) + \blk00000003/blk0000001f ( + .C(clk), + .CE(ce), + .D(\blk00000003/sig00000169 ), + .S(sclr), + .Q(\blk00000003/sig0000029d ) + ); + MUXCY \blk00000003/blk0000001e ( + .CI(\blk00000003/sig00000299 ), + .DI(\blk00000003/sig000000ac ), + .S(\blk00000003/sig0000029b ), + .O(\blk00000003/sig0000029c ) + ); + XORCY \blk00000003/blk0000001d ( + .CI(\blk00000003/sig00000298 ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig0000029a ) + ); + MUXCY \blk00000003/blk0000001c ( + .CI(\blk00000003/sig00000298 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000ac ), + .O(\blk00000003/sig00000299 ) + ); + MUXCY_D \blk00000003/blk0000001b ( + .CI(\blk00000003/sig00000296 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000297 ), + .O(\blk00000003/sig00000298 ), + .LO(\NLW_blk00000003/blk0000001b_LO_UNCONNECTED ) + ); + MUXCY_D \blk00000003/blk0000001a ( + .CI(\blk00000003/sig00000294 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig00000295 ), + .O(\blk00000003/sig00000292 ), + .LO(\NLW_blk00000003/blk0000001a_LO_UNCONNECTED ) + ); + MUXCY \blk00000003/blk00000019 ( + .CI(\blk00000003/sig00000292 ), + .DI(\blk00000003/sig00000049 ), + .S(\blk00000003/sig000000ac ), + .O(\NLW_blk00000003/blk00000019_O_UNCONNECTED ) + ); + XORCY \blk00000003/blk00000018 ( + .CI(\blk00000003/sig00000292 ), + .LI(\blk00000003/sig00000049 ), + .O(\blk00000003/sig00000293 ) + ); + DSP48A1 #( + .A0REG ( 1 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000017 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000017_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000017_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000242 , \blk00000003/sig00000243 , \blk00000003/sig00000244 , +\blk00000003/sig00000245 , \blk00000003/sig00000246 , \blk00000003/sig00000247 , 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\NLW_blk00000003/blk00000017_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000017_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000017_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000017_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000017_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000252 , \blk00000003/sig00000253 , \blk00000003/sig00000254 , \blk00000003/sig00000255 , \blk00000003/sig00000256 , +\blk00000003/sig00000257 , \blk00000003/sig00000258 , \blk00000003/sig00000259 , \blk00000003/sig0000025a , \blk00000003/sig0000025b , +\blk00000003/sig0000025c , \blk00000003/sig0000025d , \blk00000003/sig0000025e , \blk00000003/sig0000025f , \blk00000003/sig00000260 , +\blk00000003/sig00000261 , \blk00000003/sig00000262 , \blk00000003/sig00000263 , \blk00000003/sig00000264 , \blk00000003/sig00000265 , +\blk00000003/sig00000266 , \blk00000003/sig00000267 , \blk00000003/sig00000268 , \blk00000003/sig00000269 , \blk00000003/sig0000026a , +\blk00000003/sig0000026b , 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\NLW_blk00000003/blk00000017_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000017_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000017_PCOUT<0>_UNCONNECTED }), + .A({\blk00000003/sig000001a8 , \blk00000003/sig000001a9 , \blk00000003/sig000001aa , \blk00000003/sig000001ab , \blk00000003/sig000001ac , +\blk00000003/sig000001ad , \blk00000003/sig000001ae , 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.B({\blk00000003/sig0000020a , \blk00000003/sig0000020a , \blk00000003/sig0000020a , \blk00000003/sig0000020a , \blk00000003/sig0000020a , +\blk00000003/sig0000020a , \blk00000003/sig0000020a , \blk00000003/sig0000020a , \blk00000003/sig0000020a , \blk00000003/sig0000020a , +\blk00000003/sig0000020a , \blk00000003/sig0000020b , \blk00000003/sig0000020c , \blk00000003/sig0000020d , \blk00000003/sig0000020e , +\blk00000003/sig0000020f , \blk00000003/sig00000210 , \blk00000003/sig00000211 }), + .BCOUT({\NLW_blk00000003/blk00000016_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000016_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000016_BCOUT<9>_UNCONNECTED , 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\NLW_blk00000003/blk00000016_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000016_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000016_PCOUT<0>_UNCONNECTED }), + .A({\blk00000003/sig000001a8 , \blk00000003/sig000001a9 , \blk00000003/sig000001aa , \blk00000003/sig000001ab , \blk00000003/sig000001ac , +\blk00000003/sig000001ad , \blk00000003/sig000001ae , \blk00000003/sig000001af , \blk00000003/sig000001b0 , \blk00000003/sig000001b1 , +\blk00000003/sig000001b2 , \blk00000003/sig000001b3 , \blk00000003/sig000001b4 , \blk00000003/sig000001b5 , \blk00000003/sig000001b6 , +\blk00000003/sig000001b7 , \blk00000003/sig000001b8 , \blk00000003/sig000001b9 }), + .M({\NLW_blk00000003/blk00000016_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000016_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000016_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000016_M<32>_UNCONNECTED , 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.RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000015_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000015_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig000001ba , \blk00000003/sig000001bb , \blk00000003/sig000001bc , +\blk00000003/sig000001bd , \blk00000003/sig000001be , \blk00000003/sig000001bf , \blk00000003/sig000001c0 , \blk00000003/sig000001c1 , +\blk00000003/sig000001c2 , \blk00000003/sig000001c3 , \blk00000003/sig000001c4 , \blk00000003/sig000001c5 , \blk00000003/sig000001c6 , +\blk00000003/sig000001c7 , \blk00000003/sig000001c8 , \blk00000003/sig000001c9 }), + .BCOUT({\NLW_blk00000003/blk00000015_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000015_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000015_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig000001ca , 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\blk00000003/sig000001b9 }), + .M({\NLW_blk00000003/blk00000015_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000015_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000015_M<0>_UNCONNECTED }) + ); + DSP48A1 #( + .A0REG ( 1 ), + .A1REG ( 1 ), + .B0REG ( 1 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 1 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000014 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000014_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000014_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000170 , \blk00000003/sig00000170 , \blk00000003/sig00000170 , \blk00000003/sig00000170 , \blk00000003/sig00000170 , +\blk00000003/sig00000170 , \blk00000003/sig00000170 , \blk00000003/sig00000170 , \blk00000003/sig00000170 , \blk00000003/sig00000170 , +\blk00000003/sig00000170 , \blk00000003/sig00000171 , \blk00000003/sig00000172 , \blk00000003/sig00000173 , \blk00000003/sig00000174 , +\blk00000003/sig00000175 , \blk00000003/sig00000176 , \blk00000003/sig00000177 }), + .BCOUT({\NLW_blk00000003/blk00000014_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000014_BCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000014_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000014_BCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000014_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000014_BCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000014_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000014_BCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000014_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000014_BCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000014_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000014_BCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000014_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000014_BCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000014_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000014_BCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000014_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000014_BCOUT<0>_UNCONNECTED }), + .PCIN({\blk00000003/sig00000178 , \blk00000003/sig00000179 , \blk00000003/sig0000017a , \blk00000003/sig0000017b , \blk00000003/sig0000017c , +\blk00000003/sig0000017d , \blk00000003/sig0000017e , \blk00000003/sig0000017f , \blk00000003/sig00000180 , \blk00000003/sig00000181 , +\blk00000003/sig00000182 , \blk00000003/sig00000183 , \blk00000003/sig00000184 , \blk00000003/sig00000185 , \blk00000003/sig00000186 , +\blk00000003/sig00000187 , \blk00000003/sig00000188 , \blk00000003/sig00000189 , \blk00000003/sig0000018a , \blk00000003/sig0000018b , +\blk00000003/sig0000018c , \blk00000003/sig0000018d , \blk00000003/sig0000018e , \blk00000003/sig0000018f , \blk00000003/sig00000190 , +\blk00000003/sig00000191 , \blk00000003/sig00000192 , \blk00000003/sig00000193 , \blk00000003/sig00000194 , \blk00000003/sig00000195 , +\blk00000003/sig00000196 , \blk00000003/sig00000197 , \blk00000003/sig00000198 , \blk00000003/sig00000199 , \blk00000003/sig0000019a , +\blk00000003/sig0000019b , \blk00000003/sig0000019c , \blk00000003/sig0000019d , \blk00000003/sig0000019e , \blk00000003/sig0000019f , +\blk00000003/sig000001a0 , \blk00000003/sig000001a1 , \blk00000003/sig000001a2 , \blk00000003/sig000001a3 , \blk00000003/sig000001a4 , +\blk00000003/sig000001a5 , \blk00000003/sig000001a6 , \blk00000003/sig000001a7 }), + .C({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .P({\NLW_blk00000003/blk00000014_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<46>_UNCONNECTED , +\NLW_blk00000003/blk00000014_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<43>_UNCONNECTED , +\NLW_blk00000003/blk00000014_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<40>_UNCONNECTED , +\NLW_blk00000003/blk00000014_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<37>_UNCONNECTED , +\NLW_blk00000003/blk00000014_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<34>_UNCONNECTED , +\NLW_blk00000003/blk00000014_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<32>_UNCONNECTED , \NLW_blk00000003/blk00000014_P<31>_UNCONNECTED , +\blk00000003/sig000000bf , \blk00000003/sig000000c0 , \blk00000003/sig000000c1 , \blk00000003/sig000000c2 , \blk00000003/sig000000c3 , +\blk00000003/sig000000c4 , \blk00000003/sig000000c5 , \blk00000003/sig000000c6 , \blk00000003/sig000000c7 , \blk00000003/sig000000c8 , +\blk00000003/sig000000c9 , \blk00000003/sig000000ca , \blk00000003/sig000000cb , \blk00000003/sig000000cc , \blk00000003/sig000000cd , +\blk00000003/sig000000ce , \blk00000003/sig000000cf , \blk00000003/sig000000d0 , \blk00000003/sig000000d1 , \blk00000003/sig000000d2 , +\blk00000003/sig000000d3 , \blk00000003/sig000000d4 , \blk00000003/sig000000d5 , \blk00000003/sig000000d6 , \blk00000003/sig000000d7 , +\blk00000003/sig000000d8 , \blk00000003/sig000000d9 , \blk00000003/sig000000da , \blk00000003/sig000000db , \blk00000003/sig000000dc , +\blk00000003/sig000000dd }), + .OPMODE({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig0000015d , \blk00000003/sig0000015f , \blk00000003/sig00000161 }), + .D({\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 , +\blk00000003/sig00000049 , \blk00000003/sig00000049 , \blk00000003/sig00000049 }), + .PCOUT({\NLW_blk00000003/blk00000014_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<46>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<44>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<42>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<40>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<38>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<36>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<34>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<32>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<30>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<28>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<26>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<24>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<22>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<20>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000014_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000014_PCOUT<0>_UNCONNECTED }), + .A({\blk00000003/sig000001a8 , \blk00000003/sig000001a9 , \blk00000003/sig000001aa , \blk00000003/sig000001ab , \blk00000003/sig000001ac , +\blk00000003/sig000001ad , \blk00000003/sig000001ae , \blk00000003/sig000001af , \blk00000003/sig000001b0 , \blk00000003/sig000001b1 , +\blk00000003/sig000001b2 , \blk00000003/sig000001b3 , \blk00000003/sig000001b4 , \blk00000003/sig000001b5 , \blk00000003/sig000001b6 , +\blk00000003/sig000001b7 , \blk00000003/sig000001b8 , \blk00000003/sig000001b9 }), + .M({\NLW_blk00000003/blk00000014_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000014_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000014_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000014_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000014_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000014_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000014_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000014_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000014_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000014_M<26>_UNCONNECTED , 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.O(\blk00000003/sig0000016d ), + .LO(\NLW_blk00000003/blk00000010_LO_UNCONNECTED ) + ); + XORCY \blk00000003/blk0000000f ( + .CI(\blk00000003/sig00000168 ), + .LI(\blk00000003/sig000000ac ), + .O(\blk00000003/sig00000169 ) + ); + MUXCY_D \blk00000003/blk0000000e ( + .CI(\blk00000003/sig00000165 ), + .DI(\blk00000003/sig00000166 ), + .S(\blk00000003/sig00000167 ), + .O(\NLW_blk00000003/blk0000000e_O_UNCONNECTED ), + .LO(\blk00000003/sig00000168 ) + ); + MUXCY_D \blk00000003/blk0000000d ( + .CI(\blk00000003/sig00000162 ), + .DI(\blk00000003/sig00000163 ), + .S(\blk00000003/sig00000164 ), + .O(\blk00000003/sig00000165 ), + .LO(\NLW_blk00000003/blk0000000d_LO_UNCONNECTED ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk0000000c ( + .C(clk), + .D(\blk00000003/sig00000160 ), + .Q(\blk00000003/sig00000161 ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk0000000b ( + .C(clk), + .D(\blk00000003/sig0000015e ), + .Q(\blk00000003/sig0000015f ) + ); + FD #( + .INIT ( 1'b0 )) + \blk00000003/blk0000000a ( + .C(clk), + .D(\blk00000003/sig0000015c ), + .Q(\blk00000003/sig0000015d ) + ); + XORCY \blk00000003/blk00000009 ( + .CI(\blk00000003/sig00000049 ), + .LI(\blk00000003/sig0000015a ), + .O(\blk00000003/sig0000015b ) + ); + MUXCY_D \blk00000003/blk00000008 ( + .CI(\blk00000003/sig00000049 ), + .DI(\blk00000003/sig00000159 ), + .S(\blk00000003/sig0000015a ), + .O(\NLW_blk00000003/blk00000008_O_UNCONNECTED ), + .LO(\NLW_blk00000003/blk00000008_LO_UNCONNECTED ) + ); + DSP48A1 #( + .A0REG ( 0 ), + .A1REG ( 1 ), + .B0REG ( 0 ), + .B1REG ( 1 ), + .CARRYINREG ( 0 ), + .CARRYINSEL ( "OPMODE5" ), + .CARRYOUTREG ( 0 ), + .CREG ( 1 ), + .DREG ( 1 ), + .MREG ( 1 ), + .OPMODEREG ( 0 ), + .PREG ( 1 ), + .RSTTYPE ( "SYNC" )) + \blk00000003/blk00000007 ( + .CECARRYIN(ce), + .RSTC(\blk00000003/sig00000049 ), + .RSTCARRYIN(\blk00000003/sig00000049 ), + .CED(ce), + .RSTD(\blk00000003/sig00000049 ), + .CEOPMODE(ce), + .CEC(ce), + .CARRYOUTF(\NLW_blk00000003/blk00000007_CARRYOUTF_UNCONNECTED ), + .RSTOPMODE(\blk00000003/sig00000049 ), + .RSTM(\blk00000003/sig00000049 ), + .CLK(clk), + .RSTB(\blk00000003/sig00000049 ), + .CEM(ce), + .CEB(ce), + .CARRYIN(\blk00000003/sig00000049 ), + .CEP(ce), + .CEA(ce), + .CARRYOUT(\NLW_blk00000003/blk00000007_CARRYOUT_UNCONNECTED ), + .RSTA(\blk00000003/sig00000049 ), + .RSTP(\blk00000003/sig00000049 ), + .B({\blk00000003/sig00000103 , \blk00000003/sig00000104 , \blk00000003/sig00000105 , \blk00000003/sig00000106 , \blk00000003/sig00000107 , +\blk00000003/sig00000108 , \blk00000003/sig00000109 , \blk00000003/sig0000010a , \blk00000003/sig0000010b , \blk00000003/sig0000010c , +\blk00000003/sig0000010d , \blk00000003/sig0000010e , \blk00000003/sig0000010f , \blk00000003/sig00000110 , \blk00000003/sig00000111 , +\blk00000003/sig00000112 , \blk00000003/sig00000113 , \blk00000003/sig00000114 }), + .BCOUT({\NLW_blk00000003/blk00000007_BCOUT<17>_UNCONNECTED , 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+\NLW_blk00000003/blk00000006_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<18>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<16>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<14>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<12>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<10>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<8>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<6>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<4>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<2>_UNCONNECTED , +\NLW_blk00000003/blk00000006_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<0>_UNCONNECTED }), + .A({\blk00000003/sig000000fd , \blk00000003/sig000000fd , \blk00000003/sig000000fd , \blk00000003/sig000000fd , \blk00000003/sig000000fd , +\blk00000003/sig000000fd , \blk00000003/sig000000fd , \blk00000003/sig000000fd , \blk00000003/sig000000fd , \blk00000003/sig000000fd , +\blk00000003/sig000000fd , \blk00000003/sig000000fd , \blk00000003/sig000000fd , \blk00000003/sig000000fe , \blk00000003/sig000000ff , +\blk00000003/sig00000100 , \blk00000003/sig00000101 , \blk00000003/sig00000102 }), + .M({\NLW_blk00000003/blk00000006_M<35>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<34>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<33>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<32>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<31>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<30>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<29>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<28>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<27>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<26>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<25>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<24>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<23>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<22>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<21>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<20>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<19>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<18>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<17>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<16>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<15>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<14>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<13>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<12>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<11>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<10>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<9>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<8>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<7>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<6>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<5>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<4>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<3>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<2>_UNCONNECTED , \NLW_blk00000003/blk00000006_M<1>_UNCONNECTED , +\NLW_blk00000003/blk00000006_M<0>_UNCONNECTED }) + ); + VCC \blk00000003/blk00000005 ( + .P(\blk00000003/sig000000ac ) + ); + GND \blk00000003/blk00000004 ( + .G(\blk00000003/sig00000049 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000034/blk00000096 ( + .I0(nd), + .I1(ce), + .O(\blk00000003/blk00000034/sig000009d5 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000095 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[22]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000095_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009d3 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000094 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[21]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000094_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009d2 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000093 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[23]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000093_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009d4 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000092 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[19]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000092_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009d0 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000091 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[18]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000091_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009cf ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000090 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[20]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000090_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009d1 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000008f ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[16]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000008f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009cd ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000008e ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[15]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000008e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009cc ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000008d ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[17]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000008d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009ce ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000008c ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[13]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000008c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009ca ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000008b ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[12]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000008b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c9 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000008a ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[14]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000008a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009cb ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000089 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[10]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000089_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c7 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000088 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[9]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000088_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c6 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000087 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[11]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000087_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c8 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000086 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[7]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000086_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c4 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000085 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[6]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000085_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c3 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000084 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[8]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000084_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c5 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000083 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[4]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000083_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c1 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000082 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[3]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000082_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c0 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000081 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[5]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000081_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009c2 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000080 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[1]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000080_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009be ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000007f ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[0]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000007f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009bd ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000007e ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_2_2[2]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000007e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009bf ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000007d ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[22]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000007d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009bb ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000007c ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[21]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000007c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009ba ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000007b ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[23]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000007b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009bc ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000007a ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[19]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000007a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b8 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000079 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[18]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000079_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b7 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000078 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[20]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000078_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b9 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000077 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[16]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000077_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b5 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000076 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[15]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000076_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b4 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000075 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[17]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000075_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b6 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000074 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[13]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000074_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b2 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000073 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[12]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000073_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b1 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000072 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[14]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000072_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b3 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000071 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[10]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000071_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009af ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000070 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[9]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000070_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009ae ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000006f ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[11]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000006f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009b0 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000006e ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[7]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000006e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009ac ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000006d ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[6]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000006d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009ab ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000006c ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[8]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000006c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009ad ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000006b ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[4]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000006b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009a9 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk0000006a ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[3]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk0000006a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009a8 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000069 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[5]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000069_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009aa ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000068 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[1]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000068_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009a6 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000067 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[0]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000067_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009a5 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000034/blk00000066 ( + .A0(\blk00000003/sig000002b8 ), + .A1(\blk00000003/sig000002b7 ), + .A2(\blk00000003/blk00000034/sig000009a4 ), + .A3(\blk00000003/blk00000034/sig000009a4 ), + .D(din_1_1[2]), + .DPRA0(\blk00000003/sig000002ad ), + .DPRA1(\blk00000003/sig000002ab ), + .DPRA2(\blk00000003/blk00000034/sig000009a4 ), + .DPRA3(\blk00000003/blk00000034/sig000009a4 ), + .WCLK(clk), + .WE(\blk00000003/blk00000034/sig000009d5 ), + .SPO(\NLW_blk00000003/blk00000034/blk00000066_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000034/sig000009a7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000065 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009d4 ), + .Q(\blk00000003/sig000002b9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000064 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009d3 ), + .Q(\blk00000003/sig000002ba ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000063 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009d2 ), + .Q(\blk00000003/sig000002bb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000062 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009d1 ), + .Q(\blk00000003/sig000002bc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000061 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009d0 ), + .Q(\blk00000003/sig000002bd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000060 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009cf ), + .Q(\blk00000003/sig000002be ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000005f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009ce ), + .Q(\blk00000003/sig000002bf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000005e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009cd ), + .Q(\blk00000003/sig000002c0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000005d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009cc ), + .Q(\blk00000003/sig000002c1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000005c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009cb ), + .Q(\blk00000003/sig000002c2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000005b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009ca ), + .Q(\blk00000003/sig000002c3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000005a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c9 ), + .Q(\blk00000003/sig000002c4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000059 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c8 ), + .Q(\blk00000003/sig000002c5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000058 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c7 ), + .Q(\blk00000003/sig000002c6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000057 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c6 ), + .Q(\blk00000003/sig000002c7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000056 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c5 ), + .Q(\blk00000003/sig000002c8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000055 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c4 ), + .Q(\blk00000003/sig000002c9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000054 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c3 ), + .Q(\blk00000003/sig000002ca ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000053 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c2 ), + .Q(\blk00000003/sig000002cb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000052 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c1 ), + .Q(\blk00000003/sig000002cc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000051 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009c0 ), + .Q(\blk00000003/sig000002cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000050 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009bf ), + .Q(\blk00000003/sig000002ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000004f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009be ), + .Q(\blk00000003/sig000002cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000004e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009bd ), + .Q(\blk00000003/sig000002d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000004d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009bc ), + .Q(\blk00000003/sig000002d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000004c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009bb ), + .Q(\blk00000003/sig000002d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000004b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009ba ), + .Q(\blk00000003/sig000002d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000004a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b9 ), + .Q(\blk00000003/sig000002d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000049 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b8 ), + .Q(\blk00000003/sig000002d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000048 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b7 ), + .Q(\blk00000003/sig000002d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000047 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b6 ), + .Q(\blk00000003/sig000002d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000046 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b5 ), + .Q(\blk00000003/sig000002d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000045 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b4 ), + .Q(\blk00000003/sig000002d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000044 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b3 ), + .Q(\blk00000003/sig000002da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000043 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b2 ), + .Q(\blk00000003/sig000002db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000042 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b1 ), + .Q(\blk00000003/sig000002dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000041 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009b0 ), + .Q(\blk00000003/sig000002dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000040 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009af ), + .Q(\blk00000003/sig000002de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000003f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009ae ), + .Q(\blk00000003/sig000002df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000003e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009ad ), + .Q(\blk00000003/sig000002e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000003d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009ac ), + .Q(\blk00000003/sig000002e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000003c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009ab ), + .Q(\blk00000003/sig000002e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000003b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009aa ), + .Q(\blk00000003/sig000002e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk0000003a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009a9 ), + .Q(\blk00000003/sig000002e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000039 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009a8 ), + .Q(\blk00000003/sig000002e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000038 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009a7 ), + .Q(\blk00000003/sig000002e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000037 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009a6 ), + .Q(\blk00000003/sig000002e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000034/blk00000036 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000034/sig000009a5 ), + .Q(\blk00000003/sig000002e8 ) + ); + GND \blk00000003/blk00000034/blk00000035 ( + .G(\blk00000003/blk00000034/sig000009a4 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000130/blk00000152 ( + .I0(\blk00000003/sig0000067c ), + .I1(ce), + .O(\blk00000003/blk00000130/sig00000a0c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000151 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000641 ), + .Q(\blk00000003/blk00000130/sig00000a0b ), + .Q15(\NLW_blk00000003/blk00000130/blk00000151_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000150 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000642 ), + .Q(\blk00000003/blk00000130/sig00000a0a ), + .Q15(\NLW_blk00000003/blk00000130/blk00000150_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk0000014f ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000643 ), + .Q(\blk00000003/blk00000130/sig00000a09 ), + .Q15(\NLW_blk00000003/blk00000130/blk0000014f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk0000014e ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000644 ), + .Q(\blk00000003/blk00000130/sig00000a08 ), + .Q15(\NLW_blk00000003/blk00000130/blk0000014e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk0000014d ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000645 ), + .Q(\blk00000003/blk00000130/sig00000a07 ), + .Q15(\NLW_blk00000003/blk00000130/blk0000014d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk0000014c ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000646 ), + .Q(\blk00000003/blk00000130/sig00000a06 ), + .Q15(\NLW_blk00000003/blk00000130/blk0000014c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk0000014b ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000647 ), + .Q(\blk00000003/blk00000130/sig00000a05 ), + .Q15(\NLW_blk00000003/blk00000130/blk0000014b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk0000014a ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000648 ), + .Q(\blk00000003/blk00000130/sig00000a04 ), + .Q15(\NLW_blk00000003/blk00000130/blk0000014a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000149 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000649 ), + .Q(\blk00000003/blk00000130/sig00000a03 ), + .Q15(\NLW_blk00000003/blk00000130/blk00000149_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000148 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig0000064a ), + .Q(\blk00000003/blk00000130/sig00000a02 ), + .Q15(\NLW_blk00000003/blk00000130/blk00000148_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000147 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig0000064b ), + .Q(\blk00000003/blk00000130/sig00000a01 ), + .Q15(\NLW_blk00000003/blk00000130/blk00000147_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000146 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig0000064c ), + .Q(\blk00000003/blk00000130/sig00000a00 ), + .Q15(\NLW_blk00000003/blk00000130/blk00000146_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000145 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig0000064d ), + .Q(\blk00000003/blk00000130/sig000009ff ), + .Q15(\NLW_blk00000003/blk00000130/blk00000145_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000144 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig0000064e ), + .Q(\blk00000003/blk00000130/sig000009fe ), + .Q15(\NLW_blk00000003/blk00000130/blk00000144_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000143 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig0000064f ), + .Q(\blk00000003/blk00000130/sig000009fd ), + .Q15(\NLW_blk00000003/blk00000130/blk00000143_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000130/blk00000142 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000130/sig000009fb ), + .A3(\blk00000003/blk00000130/sig000009fb ), + .CE(\blk00000003/blk00000130/sig00000a0c ), + .CLK(clk), + .D(\blk00000003/sig00000650 ), + .Q(\blk00000003/blk00000130/sig000009fc ), + .Q15(\NLW_blk00000003/blk00000130/blk00000142_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000141 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a0b ), + .Q(\blk00000003/sig000005d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000140 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a0a ), + .Q(\blk00000003/sig000005d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk0000013f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a09 ), + .Q(\blk00000003/sig000005d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk0000013e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a08 ), + .Q(\blk00000003/sig000005d4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk0000013d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a07 ), + .Q(\blk00000003/sig000005d5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk0000013c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a06 ), + .Q(\blk00000003/sig000005d6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk0000013b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a05 ), + .Q(\blk00000003/sig000005d7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk0000013a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a04 ), + .Q(\blk00000003/sig000005d8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000139 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a03 ), + .Q(\blk00000003/sig000005d9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000138 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a02 ), + .Q(\blk00000003/sig000005da ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000137 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a01 ), + .Q(\blk00000003/sig000005db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000136 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig00000a00 ), + .Q(\blk00000003/sig000005dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000135 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig000009ff ), + .Q(\blk00000003/sig000005dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000134 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig000009fe ), + .Q(\blk00000003/sig000005de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000133 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig000009fd ), + .Q(\blk00000003/sig000005df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000130/blk00000132 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000130/sig000009fc ), + .Q(\blk00000003/sig000005e0 ) + ); + GND \blk00000003/blk00000130/blk00000131 ( + .G(\blk00000003/blk00000130/sig000009fb ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000153/blk00000175 ( + .I0(\blk00000003/sig0000067a ), + .I1(ce), + .O(\blk00000003/blk00000153/sig00000a43 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000174 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig0000068d ), + .Q(\blk00000003/blk00000153/sig00000a42 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000174_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000173 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig0000068e ), + .Q(\blk00000003/blk00000153/sig00000a41 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000173_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000172 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig0000068f ), + .Q(\blk00000003/blk00000153/sig00000a40 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000172_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000171 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000690 ), + .Q(\blk00000003/blk00000153/sig00000a3f ), + .Q15(\NLW_blk00000003/blk00000153/blk00000171_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000170 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000691 ), + .Q(\blk00000003/blk00000153/sig00000a3e ), + .Q15(\NLW_blk00000003/blk00000153/blk00000170_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000016f ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000692 ), + .Q(\blk00000003/blk00000153/sig00000a3d ), + .Q15(\NLW_blk00000003/blk00000153/blk0000016f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000016e ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000693 ), + .Q(\blk00000003/blk00000153/sig00000a3c ), + .Q15(\NLW_blk00000003/blk00000153/blk0000016e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000016d ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000694 ), + .Q(\blk00000003/blk00000153/sig00000a3b ), + .Q15(\NLW_blk00000003/blk00000153/blk0000016d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000016c ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000695 ), + .Q(\blk00000003/blk00000153/sig00000a3a ), + .Q15(\NLW_blk00000003/blk00000153/blk0000016c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000016b ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000696 ), + .Q(\blk00000003/blk00000153/sig00000a39 ), + .Q15(\NLW_blk00000003/blk00000153/blk0000016b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk0000016a ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000697 ), + .Q(\blk00000003/blk00000153/sig00000a38 ), + .Q15(\NLW_blk00000003/blk00000153/blk0000016a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000169 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000698 ), + .Q(\blk00000003/blk00000153/sig00000a37 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000169_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000168 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig00000699 ), + .Q(\blk00000003/blk00000153/sig00000a36 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000168_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000167 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig0000069a ), + .Q(\blk00000003/blk00000153/sig00000a35 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000167_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000166 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig0000069b ), + .Q(\blk00000003/blk00000153/sig00000a34 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000166_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000153/blk00000165 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000153/sig00000a32 ), + .A3(\blk00000003/blk00000153/sig00000a32 ), + .CE(\blk00000003/blk00000153/sig00000a43 ), + .CLK(clk), + .D(\blk00000003/sig0000069c ), + .Q(\blk00000003/blk00000153/sig00000a33 ), + .Q15(\NLW_blk00000003/blk00000153/blk00000165_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000164 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a42 ), + .Q(\blk00000003/sig00000591 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000163 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a41 ), + .Q(\blk00000003/sig00000592 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000162 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a40 ), + .Q(\blk00000003/sig00000593 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000161 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a3f ), + .Q(\blk00000003/sig00000594 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000160 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a3e ), + .Q(\blk00000003/sig00000595 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a3d ), + .Q(\blk00000003/sig00000596 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a3c ), + .Q(\blk00000003/sig00000597 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a3b ), + .Q(\blk00000003/sig00000598 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a3a ), + .Q(\blk00000003/sig00000599 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a39 ), + .Q(\blk00000003/sig0000059a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk0000015a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a38 ), + .Q(\blk00000003/sig0000059b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000159 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a37 ), + .Q(\blk00000003/sig0000059c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000158 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a36 ), + .Q(\blk00000003/sig0000059d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000157 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a35 ), + .Q(\blk00000003/sig0000059e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000156 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a34 ), + .Q(\blk00000003/sig0000059f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000153/blk00000155 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000153/sig00000a33 ), + .Q(\blk00000003/sig000005a0 ) + ); + GND \blk00000003/blk00000153/blk00000154 ( + .G(\blk00000003/blk00000153/sig00000a32 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000176/blk00000198 ( + .I0(\blk00000003/sig0000067c ), + .I1(ce), + .O(\blk00000003/blk00000176/sig00000a7a ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000197 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000661 ), + .Q(\blk00000003/blk00000176/sig00000a79 ), + .Q15(\NLW_blk00000003/blk00000176/blk00000197_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000196 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000662 ), + .Q(\blk00000003/blk00000176/sig00000a78 ), + .Q15(\NLW_blk00000003/blk00000176/blk00000196_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000195 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000663 ), + .Q(\blk00000003/blk00000176/sig00000a77 ), + .Q15(\NLW_blk00000003/blk00000176/blk00000195_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000194 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000664 ), + .Q(\blk00000003/blk00000176/sig00000a76 ), + .Q15(\NLW_blk00000003/blk00000176/blk00000194_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000193 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000665 ), + .Q(\blk00000003/blk00000176/sig00000a75 ), + .Q15(\NLW_blk00000003/blk00000176/blk00000193_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000192 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000666 ), + .Q(\blk00000003/blk00000176/sig00000a74 ), + .Q15(\NLW_blk00000003/blk00000176/blk00000192_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000191 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000667 ), + .Q(\blk00000003/blk00000176/sig00000a73 ), + .Q15(\NLW_blk00000003/blk00000176/blk00000191_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000190 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000668 ), + .Q(\blk00000003/blk00000176/sig00000a72 ), + .Q15(\NLW_blk00000003/blk00000176/blk00000190_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk0000018f ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000669 ), + .Q(\blk00000003/blk00000176/sig00000a71 ), + .Q15(\NLW_blk00000003/blk00000176/blk0000018f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk0000018e ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig0000066a ), + .Q(\blk00000003/blk00000176/sig00000a70 ), + .Q15(\NLW_blk00000003/blk00000176/blk0000018e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk0000018d ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig0000066b ), + .Q(\blk00000003/blk00000176/sig00000a6f ), + .Q15(\NLW_blk00000003/blk00000176/blk0000018d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk0000018c ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig0000066c ), + .Q(\blk00000003/blk00000176/sig00000a6e ), + .Q15(\NLW_blk00000003/blk00000176/blk0000018c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk0000018b ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig0000066d ), + .Q(\blk00000003/blk00000176/sig00000a6d ), + .Q15(\NLW_blk00000003/blk00000176/blk0000018b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk0000018a ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig0000066e ), + .Q(\blk00000003/blk00000176/sig00000a6c ), + .Q15(\NLW_blk00000003/blk00000176/blk0000018a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000189 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig0000066f ), + .Q(\blk00000003/blk00000176/sig00000a6b ), + .Q15(\NLW_blk00000003/blk00000176/blk00000189_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000176/blk00000188 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk00000176/sig00000a69 ), + .A3(\blk00000003/blk00000176/sig00000a69 ), + .CE(\blk00000003/blk00000176/sig00000a7a ), + .CLK(clk), + .D(\blk00000003/sig00000670 ), + .Q(\blk00000003/blk00000176/sig00000a6a ), + .Q15(\NLW_blk00000003/blk00000176/blk00000188_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000187 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a79 ), + .Q(\blk00000003/sig00000621 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000186 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a78 ), + .Q(\blk00000003/sig00000622 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000185 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a77 ), + .Q(\blk00000003/sig00000623 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000184 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a76 ), + .Q(\blk00000003/sig00000624 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000183 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a75 ), + .Q(\blk00000003/sig00000625 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000182 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a74 ), + .Q(\blk00000003/sig00000626 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000181 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a73 ), + .Q(\blk00000003/sig00000627 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000180 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a72 ), + .Q(\blk00000003/sig00000628 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk0000017f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a71 ), + .Q(\blk00000003/sig00000629 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk0000017e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a70 ), + .Q(\blk00000003/sig0000062a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk0000017d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a6f ), + .Q(\blk00000003/sig0000062b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk0000017c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a6e ), + .Q(\blk00000003/sig0000062c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk0000017b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a6d ), + .Q(\blk00000003/sig0000062d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk0000017a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a6c ), + .Q(\blk00000003/sig0000062e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000179 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a6b ), + .Q(\blk00000003/sig0000062f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000176/blk00000178 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000176/sig00000a6a ), + .Q(\blk00000003/sig00000630 ) + ); + GND \blk00000003/blk00000176/blk00000177 ( + .G(\blk00000003/blk00000176/sig00000a69 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000199/blk000001bb ( + .I0(\blk00000003/sig0000067a ), + .I1(ce), + .O(\blk00000003/blk00000199/sig00000ab1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001ba ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig0000069d ), + .Q(\blk00000003/blk00000199/sig00000ab0 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001ba_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b9 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig0000069e ), + .Q(\blk00000003/blk00000199/sig00000aaf ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b8 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig0000069f ), + .Q(\blk00000003/blk00000199/sig00000aae ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b7 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a0 ), + .Q(\blk00000003/blk00000199/sig00000aad ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b6 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a1 ), + .Q(\blk00000003/blk00000199/sig00000aac ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b5 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a2 ), + .Q(\blk00000003/blk00000199/sig00000aab ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b4 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a3 ), + .Q(\blk00000003/blk00000199/sig00000aaa ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b3 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a4 ), + .Q(\blk00000003/blk00000199/sig00000aa9 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b2 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a5 ), + .Q(\blk00000003/blk00000199/sig00000aa8 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b1 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a6 ), + .Q(\blk00000003/blk00000199/sig00000aa7 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001b0 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a7 ), + .Q(\blk00000003/blk00000199/sig00000aa6 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001b0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001af ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a8 ), + .Q(\blk00000003/blk00000199/sig00000aa5 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001ae ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006a9 ), + .Q(\blk00000003/blk00000199/sig00000aa4 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001ad ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006aa ), + .Q(\blk00000003/blk00000199/sig00000aa3 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001ac ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006ab ), + .Q(\blk00000003/blk00000199/sig00000aa2 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000199/blk000001ab ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk00000199/sig00000aa0 ), + .A3(\blk00000003/blk00000199/sig00000aa0 ), + .CE(\blk00000003/blk00000199/sig00000ab1 ), + .CLK(clk), + .D(\blk00000003/sig000006ac ), + .Q(\blk00000003/blk00000199/sig00000aa1 ), + .Q15(\NLW_blk00000003/blk00000199/blk000001ab_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001aa ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000ab0 ), + .Q(\blk00000003/sig000005e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aaf ), + .Q(\blk00000003/sig000005e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aae ), + .Q(\blk00000003/sig000005e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aad ), + .Q(\blk00000003/sig000005e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aac ), + .Q(\blk00000003/sig000005e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aab ), + .Q(\blk00000003/sig000005e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aaa ), + .Q(\blk00000003/sig000005e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aa9 ), + .Q(\blk00000003/sig000005e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aa8 ), + .Q(\blk00000003/sig000005e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aa7 ), + .Q(\blk00000003/sig000005ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk000001a0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aa6 ), + .Q(\blk00000003/sig000005eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk0000019f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aa5 ), + .Q(\blk00000003/sig000005ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk0000019e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aa4 ), + .Q(\blk00000003/sig000005ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk0000019d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aa3 ), + .Q(\blk00000003/sig000005ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk0000019c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aa2 ), + .Q(\blk00000003/sig000005ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000199/blk0000019b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000199/sig00000aa1 ), + .Q(\blk00000003/sig000005f0 ) + ); + GND \blk00000003/blk00000199/blk0000019a ( + .G(\blk00000003/blk00000199/sig00000aa0 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001bc/blk000001de ( + .I0(\blk00000003/sig0000067b ), + .I1(ce), + .O(\blk00000003/blk000001bc/sig00000ae8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001dd ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig0000043d ), + .Q(\blk00000003/blk000001bc/sig00000ae7 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001dd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001dc ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig0000043e ), + .Q(\blk00000003/blk000001bc/sig00000ae6 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001dc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001db ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig0000043f ), + .Q(\blk00000003/blk000001bc/sig00000ae5 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001db_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001da ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000440 ), + .Q(\blk00000003/blk000001bc/sig00000ae4 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001da_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d9 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000441 ), + .Q(\blk00000003/blk000001bc/sig00000ae3 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d8 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000442 ), + .Q(\blk00000003/blk000001bc/sig00000ae2 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d7 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000443 ), + .Q(\blk00000003/blk000001bc/sig00000ae1 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d6 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000444 ), + .Q(\blk00000003/blk000001bc/sig00000ae0 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d5 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000445 ), + .Q(\blk00000003/blk000001bc/sig00000adf ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d4 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000446 ), + .Q(\blk00000003/blk000001bc/sig00000ade ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d3 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000447 ), + .Q(\blk00000003/blk000001bc/sig00000add ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d2 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000448 ), + .Q(\blk00000003/blk000001bc/sig00000adc ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d1 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig00000449 ), + .Q(\blk00000003/blk000001bc/sig00000adb ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001d0 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig0000044a ), + .Q(\blk00000003/blk000001bc/sig00000ada ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001d0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001cf ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig0000044b ), + .Q(\blk00000003/blk000001bc/sig00000ad9 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001cf_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001bc/blk000001ce ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000001bc/sig00000ad7 ), + .A3(\blk00000003/blk000001bc/sig00000ad7 ), + .CE(\blk00000003/blk000001bc/sig00000ae8 ), + .CLK(clk), + .D(\blk00000003/sig0000044c ), + .Q(\blk00000003/blk000001bc/sig00000ad8 ), + .Q15(\NLW_blk00000003/blk000001bc/blk000001ce_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001cd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ae7 ), + .Q(\blk00000003/sig00000641 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001cc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ae6 ), + .Q(\blk00000003/sig00000642 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001cb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ae5 ), + .Q(\blk00000003/sig00000643 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001ca ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ae4 ), + .Q(\blk00000003/sig00000644 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ae3 ), + .Q(\blk00000003/sig00000645 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ae2 ), + .Q(\blk00000003/sig00000646 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ae1 ), + .Q(\blk00000003/sig00000647 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ae0 ), + .Q(\blk00000003/sig00000648 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000adf ), + .Q(\blk00000003/sig00000649 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ade ), + .Q(\blk00000003/sig0000064a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000add ), + .Q(\blk00000003/sig0000064b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000adc ), + .Q(\blk00000003/sig0000064c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000adb ), + .Q(\blk00000003/sig0000064d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ada ), + .Q(\blk00000003/sig0000064e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ad9 ), + .Q(\blk00000003/sig0000064f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001bc/blk000001be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001bc/sig00000ad8 ), + .Q(\blk00000003/sig00000650 ) + ); + GND \blk00000003/blk000001bc/blk000001bd ( + .G(\blk00000003/blk000001bc/sig00000ad7 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000001df/blk00000201 ( + .I0(\blk00000003/sig00000679 ), + .I1(ce), + .O(\blk00000003/blk000001df/sig00000b1f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk00000200 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006ad ), + .Q(\blk00000003/blk000001df/sig00000b1e ), + .Q15(\NLW_blk00000003/blk000001df/blk00000200_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001ff ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006ae ), + .Q(\blk00000003/blk000001df/sig00000b1d ), + .Q15(\NLW_blk00000003/blk000001df/blk000001ff_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001fe ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006af ), + .Q(\blk00000003/blk000001df/sig00000b1c ), + .Q15(\NLW_blk00000003/blk000001df/blk000001fe_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001fd ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b0 ), + .Q(\blk00000003/blk000001df/sig00000b1b ), + .Q15(\NLW_blk00000003/blk000001df/blk000001fd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001fc ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b1 ), + .Q(\blk00000003/blk000001df/sig00000b1a ), + .Q15(\NLW_blk00000003/blk000001df/blk000001fc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001fb ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b2 ), + .Q(\blk00000003/blk000001df/sig00000b19 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001fb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001fa ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b3 ), + .Q(\blk00000003/blk000001df/sig00000b18 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001fa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001f9 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b4 ), + .Q(\blk00000003/blk000001df/sig00000b17 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001f9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001f8 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b5 ), + .Q(\blk00000003/blk000001df/sig00000b16 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001f8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001f7 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b6 ), + .Q(\blk00000003/blk000001df/sig00000b15 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001f7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001f6 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b7 ), + .Q(\blk00000003/blk000001df/sig00000b14 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001f6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001f5 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b8 ), + .Q(\blk00000003/blk000001df/sig00000b13 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001f5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001f4 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006b9 ), + .Q(\blk00000003/blk000001df/sig00000b12 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001f4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001f3 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006ba ), + .Q(\blk00000003/blk000001df/sig00000b11 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001f3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001f2 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006bb ), + .Q(\blk00000003/blk000001df/sig00000b10 ), + .Q15(\NLW_blk00000003/blk000001df/blk000001f2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000001df/blk000001f1 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk000001df/sig00000b0e ), + .A3(\blk00000003/blk000001df/sig00000b0e ), + .CE(\blk00000003/blk000001df/sig00000b1f ), + .CLK(clk), + .D(\blk00000003/sig000006bc ), + .Q(\blk00000003/blk000001df/sig00000b0f ), + .Q15(\NLW_blk00000003/blk000001df/blk000001f1_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b1e ), + .Q(\blk00000003/sig00000631 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b1d ), + .Q(\blk00000003/sig00000632 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b1c ), + .Q(\blk00000003/sig00000633 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b1b ), + .Q(\blk00000003/sig00000634 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b1a ), + .Q(\blk00000003/sig00000635 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b19 ), + .Q(\blk00000003/sig00000636 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b18 ), + .Q(\blk00000003/sig00000637 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b17 ), + .Q(\blk00000003/sig00000638 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b16 ), + .Q(\blk00000003/sig00000639 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b15 ), + .Q(\blk00000003/sig0000063a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b14 ), + .Q(\blk00000003/sig0000063b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b13 ), + .Q(\blk00000003/sig0000063c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b12 ), + .Q(\blk00000003/sig0000063d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b11 ), + .Q(\blk00000003/sig0000063e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b10 ), + .Q(\blk00000003/sig0000063f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000001df/blk000001e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000001df/sig00000b0f ), + .Q(\blk00000003/sig00000640 ) + ); + GND \blk00000003/blk000001df/blk000001e0 ( + .G(\blk00000003/blk000001df/sig00000b0e ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000202/blk00000224 ( + .I0(\blk00000003/sig0000067b ), + .I1(ce), + .O(\blk00000003/blk00000202/sig00000b56 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000223 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig0000048d ), + .Q(\blk00000003/blk00000202/sig00000b55 ), + .Q15(\NLW_blk00000003/blk00000202/blk00000223_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000222 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig0000048e ), + .Q(\blk00000003/blk00000202/sig00000b54 ), + .Q15(\NLW_blk00000003/blk00000202/blk00000222_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000221 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig0000048f ), + .Q(\blk00000003/blk00000202/sig00000b53 ), + .Q15(\NLW_blk00000003/blk00000202/blk00000221_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000220 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000490 ), + .Q(\blk00000003/blk00000202/sig00000b52 ), + .Q15(\NLW_blk00000003/blk00000202/blk00000220_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk0000021f ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000491 ), + .Q(\blk00000003/blk00000202/sig00000b51 ), + .Q15(\NLW_blk00000003/blk00000202/blk0000021f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk0000021e ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000492 ), + .Q(\blk00000003/blk00000202/sig00000b50 ), + .Q15(\NLW_blk00000003/blk00000202/blk0000021e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk0000021d ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000493 ), + .Q(\blk00000003/blk00000202/sig00000b4f ), + .Q15(\NLW_blk00000003/blk00000202/blk0000021d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk0000021c ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000494 ), + .Q(\blk00000003/blk00000202/sig00000b4e ), + .Q15(\NLW_blk00000003/blk00000202/blk0000021c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk0000021b ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000495 ), + .Q(\blk00000003/blk00000202/sig00000b4d ), + .Q15(\NLW_blk00000003/blk00000202/blk0000021b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk0000021a ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000496 ), + .Q(\blk00000003/blk00000202/sig00000b4c ), + .Q15(\NLW_blk00000003/blk00000202/blk0000021a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000219 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000497 ), + .Q(\blk00000003/blk00000202/sig00000b4b ), + .Q15(\NLW_blk00000003/blk00000202/blk00000219_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000218 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000498 ), + .Q(\blk00000003/blk00000202/sig00000b4a ), + .Q15(\NLW_blk00000003/blk00000202/blk00000218_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000217 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig00000499 ), + .Q(\blk00000003/blk00000202/sig00000b49 ), + .Q15(\NLW_blk00000003/blk00000202/blk00000217_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000216 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig0000049a ), + .Q(\blk00000003/blk00000202/sig00000b48 ), + .Q15(\NLW_blk00000003/blk00000202/blk00000216_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000215 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig0000049b ), + .Q(\blk00000003/blk00000202/sig00000b47 ), + .Q15(\NLW_blk00000003/blk00000202/blk00000215_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000202/blk00000214 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk00000202/sig00000b45 ), + .A3(\blk00000003/blk00000202/sig00000b45 ), + .CE(\blk00000003/blk00000202/sig00000b56 ), + .CLK(clk), + .D(\blk00000003/sig0000049c ), + .Q(\blk00000003/blk00000202/sig00000b46 ), + .Q15(\NLW_blk00000003/blk00000202/blk00000214_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000213 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b55 ), + .Q(\blk00000003/sig00000661 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000212 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b54 ), + .Q(\blk00000003/sig00000662 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000211 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b53 ), + .Q(\blk00000003/sig00000663 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000210 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b52 ), + .Q(\blk00000003/sig00000664 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk0000020f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b51 ), + .Q(\blk00000003/sig00000665 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk0000020e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b50 ), + .Q(\blk00000003/sig00000666 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk0000020d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b4f ), + .Q(\blk00000003/sig00000667 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk0000020c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b4e ), + .Q(\blk00000003/sig00000668 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk0000020b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b4d ), + .Q(\blk00000003/sig00000669 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk0000020a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b4c ), + .Q(\blk00000003/sig0000066a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000209 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b4b ), + .Q(\blk00000003/sig0000066b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000208 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b4a ), + .Q(\blk00000003/sig0000066c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000207 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b49 ), + .Q(\blk00000003/sig0000066d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000206 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b48 ), + .Q(\blk00000003/sig0000066e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000205 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b47 ), + .Q(\blk00000003/sig0000066f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000202/blk00000204 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000202/sig00000b46 ), + .Q(\blk00000003/sig00000670 ) + ); + GND \blk00000003/blk00000202/blk00000203 ( + .G(\blk00000003/blk00000202/sig00000b45 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000225/blk00000247 ( + .I0(\blk00000003/sig00000679 ), + .I1(ce), + .O(\blk00000003/blk00000225/sig00000b8d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000246 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006bd ), + .Q(\blk00000003/blk00000225/sig00000b8c ), + .Q15(\NLW_blk00000003/blk00000225/blk00000246_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000245 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006be ), + .Q(\blk00000003/blk00000225/sig00000b8b ), + .Q15(\NLW_blk00000003/blk00000225/blk00000245_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000244 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006bf ), + .Q(\blk00000003/blk00000225/sig00000b8a ), + .Q15(\NLW_blk00000003/blk00000225/blk00000244_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000243 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c0 ), + .Q(\blk00000003/blk00000225/sig00000b89 ), + .Q15(\NLW_blk00000003/blk00000225/blk00000243_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000242 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c1 ), + .Q(\blk00000003/blk00000225/sig00000b88 ), + .Q15(\NLW_blk00000003/blk00000225/blk00000242_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000241 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c2 ), + .Q(\blk00000003/blk00000225/sig00000b87 ), + .Q15(\NLW_blk00000003/blk00000225/blk00000241_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000240 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c3 ), + .Q(\blk00000003/blk00000225/sig00000b86 ), + .Q15(\NLW_blk00000003/blk00000225/blk00000240_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk0000023f ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c4 ), + .Q(\blk00000003/blk00000225/sig00000b85 ), + .Q15(\NLW_blk00000003/blk00000225/blk0000023f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk0000023e ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c5 ), + .Q(\blk00000003/blk00000225/sig00000b84 ), + .Q15(\NLW_blk00000003/blk00000225/blk0000023e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk0000023d ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c6 ), + .Q(\blk00000003/blk00000225/sig00000b83 ), + .Q15(\NLW_blk00000003/blk00000225/blk0000023d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk0000023c ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c7 ), + .Q(\blk00000003/blk00000225/sig00000b82 ), + .Q15(\NLW_blk00000003/blk00000225/blk0000023c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk0000023b ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c8 ), + .Q(\blk00000003/blk00000225/sig00000b81 ), + .Q15(\NLW_blk00000003/blk00000225/blk0000023b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk0000023a ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006c9 ), + .Q(\blk00000003/blk00000225/sig00000b80 ), + .Q15(\NLW_blk00000003/blk00000225/blk0000023a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000239 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006ca ), + .Q(\blk00000003/blk00000225/sig00000b7f ), + .Q15(\NLW_blk00000003/blk00000225/blk00000239_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000238 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006cb ), + .Q(\blk00000003/blk00000225/sig00000b7e ), + .Q15(\NLW_blk00000003/blk00000225/blk00000238_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000225/blk00000237 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000225/sig00000b7c ), + .A3(\blk00000003/blk00000225/sig00000b7c ), + .CE(\blk00000003/blk00000225/sig00000b8d ), + .CLK(clk), + .D(\blk00000003/sig000006cc ), + .Q(\blk00000003/blk00000225/sig00000b7d ), + .Q15(\NLW_blk00000003/blk00000225/blk00000237_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000236 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b8c ), + .Q(\blk00000003/sig00000651 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000235 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b8b ), + .Q(\blk00000003/sig00000652 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000234 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b8a ), + .Q(\blk00000003/sig00000653 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000233 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b89 ), + .Q(\blk00000003/sig00000654 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000232 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b88 ), + .Q(\blk00000003/sig00000655 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000231 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b87 ), + .Q(\blk00000003/sig00000656 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000230 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b86 ), + .Q(\blk00000003/sig00000657 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk0000022f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b85 ), + .Q(\blk00000003/sig00000658 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk0000022e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b84 ), + .Q(\blk00000003/sig00000659 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk0000022d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b83 ), + .Q(\blk00000003/sig0000065a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk0000022c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b82 ), + .Q(\blk00000003/sig0000065b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk0000022b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b81 ), + .Q(\blk00000003/sig0000065c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk0000022a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b80 ), + .Q(\blk00000003/sig0000065d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000229 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b7f ), + .Q(\blk00000003/sig0000065e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000228 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b7e ), + .Q(\blk00000003/sig0000065f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000225/blk00000227 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000225/sig00000b7d ), + .Q(\blk00000003/sig00000660 ) + ); + GND \blk00000003/blk00000225/blk00000226 ( + .G(\blk00000003/blk00000225/sig00000b7c ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000248/blk0000026a ( + .I0(\blk00000003/sig0000068c ), + .I1(ce), + .O(\blk00000003/blk00000248/sig00000bc4 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000269 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006cd ), + .Q(\blk00000003/blk00000248/sig00000bc3 ), + .Q15(\NLW_blk00000003/blk00000248/blk00000269_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000268 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006ce ), + .Q(\blk00000003/blk00000248/sig00000bc2 ), + .Q15(\NLW_blk00000003/blk00000248/blk00000268_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000267 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006cf ), + .Q(\blk00000003/blk00000248/sig00000bc1 ), + .Q15(\NLW_blk00000003/blk00000248/blk00000267_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000266 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d0 ), + .Q(\blk00000003/blk00000248/sig00000bc0 ), + .Q15(\NLW_blk00000003/blk00000248/blk00000266_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000265 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d1 ), + .Q(\blk00000003/blk00000248/sig00000bbf ), + .Q15(\NLW_blk00000003/blk00000248/blk00000265_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000264 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d2 ), + .Q(\blk00000003/blk00000248/sig00000bbe ), + .Q15(\NLW_blk00000003/blk00000248/blk00000264_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000263 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d3 ), + .Q(\blk00000003/blk00000248/sig00000bbd ), + .Q15(\NLW_blk00000003/blk00000248/blk00000263_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000262 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d4 ), + .Q(\blk00000003/blk00000248/sig00000bbc ), + .Q15(\NLW_blk00000003/blk00000248/blk00000262_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000261 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d5 ), + .Q(\blk00000003/blk00000248/sig00000bbb ), + .Q15(\NLW_blk00000003/blk00000248/blk00000261_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk00000260 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d6 ), + .Q(\blk00000003/blk00000248/sig00000bba ), + .Q15(\NLW_blk00000003/blk00000248/blk00000260_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk0000025f ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d7 ), + .Q(\blk00000003/blk00000248/sig00000bb9 ), + .Q15(\NLW_blk00000003/blk00000248/blk0000025f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk0000025e ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d8 ), + .Q(\blk00000003/blk00000248/sig00000bb8 ), + .Q15(\NLW_blk00000003/blk00000248/blk0000025e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk0000025d ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006d9 ), + .Q(\blk00000003/blk00000248/sig00000bb7 ), + .Q15(\NLW_blk00000003/blk00000248/blk0000025d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk0000025c ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006da ), + .Q(\blk00000003/blk00000248/sig00000bb6 ), + .Q15(\NLW_blk00000003/blk00000248/blk0000025c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk0000025b ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006db ), + .Q(\blk00000003/blk00000248/sig00000bb5 ), + .Q15(\NLW_blk00000003/blk00000248/blk0000025b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000248/blk0000025a ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000248/sig00000bb3 ), + .A3(\blk00000003/blk00000248/sig00000bb3 ), + .CE(\blk00000003/blk00000248/sig00000bc4 ), + .CLK(clk), + .D(\blk00000003/sig000006dc ), + .Q(\blk00000003/blk00000248/sig00000bb4 ), + .Q15(\NLW_blk00000003/blk00000248/blk0000025a_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000259 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bc3 ), + .Q(\blk00000003/sig0000043d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000258 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bc2 ), + .Q(\blk00000003/sig0000043e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000257 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bc1 ), + .Q(\blk00000003/sig0000043f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000256 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bc0 ), + .Q(\blk00000003/sig00000440 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000255 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bbf ), + .Q(\blk00000003/sig00000441 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000254 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bbe ), + .Q(\blk00000003/sig00000442 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000253 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bbd ), + .Q(\blk00000003/sig00000443 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000252 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bbc ), + .Q(\blk00000003/sig00000444 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000251 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bbb ), + .Q(\blk00000003/sig00000445 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk00000250 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bba ), + .Q(\blk00000003/sig00000446 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk0000024f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bb9 ), + .Q(\blk00000003/sig00000447 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk0000024e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bb8 ), + .Q(\blk00000003/sig00000448 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk0000024d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bb7 ), + .Q(\blk00000003/sig00000449 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk0000024c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bb6 ), + .Q(\blk00000003/sig0000044a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk0000024b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bb5 ), + .Q(\blk00000003/sig0000044b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000248/blk0000024a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000248/sig00000bb4 ), + .Q(\blk00000003/sig0000044c ) + ); + GND \blk00000003/blk00000248/blk00000249 ( + .G(\blk00000003/blk00000248/sig00000bb3 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000026b/blk0000028d ( + .I0(\blk00000003/sig0000068b ), + .I1(ce), + .O(\blk00000003/blk0000026b/sig00000bfb ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk0000028c ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006dd ), + .Q(\blk00000003/blk0000026b/sig00000bfa ), + .Q15(\NLW_blk00000003/blk0000026b/blk0000028c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk0000028b ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006de ), + .Q(\blk00000003/blk0000026b/sig00000bf9 ), + .Q15(\NLW_blk00000003/blk0000026b/blk0000028b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk0000028a ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006df ), + .Q(\blk00000003/blk0000026b/sig00000bf8 ), + .Q15(\NLW_blk00000003/blk0000026b/blk0000028a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000289 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e0 ), + .Q(\blk00000003/blk0000026b/sig00000bf7 ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000289_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000288 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e1 ), + .Q(\blk00000003/blk0000026b/sig00000bf6 ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000288_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000287 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e2 ), + .Q(\blk00000003/blk0000026b/sig00000bf5 ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000287_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000286 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e3 ), + .Q(\blk00000003/blk0000026b/sig00000bf4 ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000286_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000285 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e4 ), + .Q(\blk00000003/blk0000026b/sig00000bf3 ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000285_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000284 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e5 ), + .Q(\blk00000003/blk0000026b/sig00000bf2 ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000284_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000283 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e6 ), + .Q(\blk00000003/blk0000026b/sig00000bf1 ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000283_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000282 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e7 ), + .Q(\blk00000003/blk0000026b/sig00000bf0 ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000282_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000281 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e8 ), + .Q(\blk00000003/blk0000026b/sig00000bef ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000281_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk00000280 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006e9 ), + .Q(\blk00000003/blk0000026b/sig00000bee ), + .Q15(\NLW_blk00000003/blk0000026b/blk00000280_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk0000027f ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006ea ), + .Q(\blk00000003/blk0000026b/sig00000bed ), + .Q15(\NLW_blk00000003/blk0000026b/blk0000027f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk0000027e ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006eb ), + .Q(\blk00000003/blk0000026b/sig00000bec ), + .Q15(\NLW_blk00000003/blk0000026b/blk0000027e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000026b/blk0000027d ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000026b/sig00000bea ), + .A3(\blk00000003/blk0000026b/sig00000bea ), + .CE(\blk00000003/blk0000026b/sig00000bfb ), + .CLK(clk), + .D(\blk00000003/sig000006ec ), + .Q(\blk00000003/blk0000026b/sig00000beb ), + .Q15(\NLW_blk00000003/blk0000026b/blk0000027d_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk0000027c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bfa ), + .Q(\blk00000003/sig0000042d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk0000027b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf9 ), + .Q(\blk00000003/sig0000042e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk0000027a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf8 ), + .Q(\blk00000003/sig0000042f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000279 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf7 ), + .Q(\blk00000003/sig00000430 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000278 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf6 ), + .Q(\blk00000003/sig00000431 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000277 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf5 ), + .Q(\blk00000003/sig00000432 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000276 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf4 ), + .Q(\blk00000003/sig00000433 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000275 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf3 ), + .Q(\blk00000003/sig00000434 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000274 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf2 ), + .Q(\blk00000003/sig00000435 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000273 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf1 ), + .Q(\blk00000003/sig00000436 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000272 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bf0 ), + .Q(\blk00000003/sig00000437 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000271 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bef ), + .Q(\blk00000003/sig00000438 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk00000270 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bee ), + .Q(\blk00000003/sig00000439 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk0000026f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bed ), + .Q(\blk00000003/sig0000043a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk0000026e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000bec ), + .Q(\blk00000003/sig0000043b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000026b/blk0000026d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000026b/sig00000beb ), + .Q(\blk00000003/sig0000043c ) + ); + GND \blk00000003/blk0000026b/blk0000026c ( + .G(\blk00000003/blk0000026b/sig00000bea ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000028e/blk000002b0 ( + .I0(\blk00000003/sig0000068c ), + .I1(ce), + .O(\blk00000003/blk0000028e/sig00000c32 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002af ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006ed ), + .Q(\blk00000003/blk0000028e/sig00000c31 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002af_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002ae ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006ee ), + .Q(\blk00000003/blk0000028e/sig00000c30 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002ae_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002ad ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006ef ), + .Q(\blk00000003/blk0000028e/sig00000c2f ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002ad_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002ac ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f0 ), + .Q(\blk00000003/blk0000028e/sig00000c2e ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002ac_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002ab ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f1 ), + .Q(\blk00000003/blk0000028e/sig00000c2d ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002ab_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002aa ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f2 ), + .Q(\blk00000003/blk0000028e/sig00000c2c ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002aa_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a9 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f3 ), + .Q(\blk00000003/blk0000028e/sig00000c2b ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a8 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f4 ), + .Q(\blk00000003/blk0000028e/sig00000c2a ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a7 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f5 ), + .Q(\blk00000003/blk0000028e/sig00000c29 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a6 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f6 ), + .Q(\blk00000003/blk0000028e/sig00000c28 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a5 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f7 ), + .Q(\blk00000003/blk0000028e/sig00000c27 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a4 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f8 ), + .Q(\blk00000003/blk0000028e/sig00000c26 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a3 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006f9 ), + .Q(\blk00000003/blk0000028e/sig00000c25 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a2 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006fa ), + .Q(\blk00000003/blk0000028e/sig00000c24 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a1 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006fb ), + .Q(\blk00000003/blk0000028e/sig00000c23 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000028e/blk000002a0 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000028e/sig00000c21 ), + .A3(\blk00000003/blk0000028e/sig00000c21 ), + .CE(\blk00000003/blk0000028e/sig00000c32 ), + .CLK(clk), + .D(\blk00000003/sig000006fc ), + .Q(\blk00000003/blk0000028e/sig00000c22 ), + .Q15(\NLW_blk00000003/blk0000028e/blk000002a0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk0000029f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c31 ), + .Q(\blk00000003/sig0000048d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk0000029e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c30 ), + .Q(\blk00000003/sig0000048e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk0000029d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c2f ), + .Q(\blk00000003/sig0000048f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk0000029c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c2e ), + .Q(\blk00000003/sig00000490 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk0000029b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c2d ), + .Q(\blk00000003/sig00000491 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk0000029a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c2c ), + .Q(\blk00000003/sig00000492 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000299 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c2b ), + .Q(\blk00000003/sig00000493 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000298 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c2a ), + .Q(\blk00000003/sig00000494 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000297 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c29 ), + .Q(\blk00000003/sig00000495 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000296 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c28 ), + .Q(\blk00000003/sig00000496 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000295 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c27 ), + .Q(\blk00000003/sig00000497 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000294 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c26 ), + .Q(\blk00000003/sig00000498 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000293 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c25 ), + .Q(\blk00000003/sig00000499 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000292 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c24 ), + .Q(\blk00000003/sig0000049a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000291 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c23 ), + .Q(\blk00000003/sig0000049b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000028e/blk00000290 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000028e/sig00000c22 ), + .Q(\blk00000003/sig0000049c ) + ); + GND \blk00000003/blk0000028e/blk0000028f ( + .G(\blk00000003/blk0000028e/sig00000c21 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002b1/blk000002d3 ( + .I0(\blk00000003/sig0000068b ), + .I1(ce), + .O(\blk00000003/blk000002b1/sig00000c69 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002d2 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig000006fd ), + .Q(\blk00000003/blk000002b1/sig00000c68 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002d2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002d1 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig000006fe ), + .Q(\blk00000003/blk000002b1/sig00000c67 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002d0 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig000006ff ), + .Q(\blk00000003/blk000002b1/sig00000c66 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002d0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002cf ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000700 ), + .Q(\blk00000003/blk000002b1/sig00000c65 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002cf_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002ce ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000701 ), + .Q(\blk00000003/blk000002b1/sig00000c64 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002ce_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002cd ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000702 ), + .Q(\blk00000003/blk000002b1/sig00000c63 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002cd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002cc ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000703 ), + .Q(\blk00000003/blk000002b1/sig00000c62 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002cc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002cb ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000704 ), + .Q(\blk00000003/blk000002b1/sig00000c61 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002cb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002ca ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000705 ), + .Q(\blk00000003/blk000002b1/sig00000c60 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002ca_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002c9 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000706 ), + .Q(\blk00000003/blk000002b1/sig00000c5f ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002c9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002c8 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000707 ), + .Q(\blk00000003/blk000002b1/sig00000c5e ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002c8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002c7 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000708 ), + .Q(\blk00000003/blk000002b1/sig00000c5d ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002c7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002c6 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig00000709 ), + .Q(\blk00000003/blk000002b1/sig00000c5c ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002c6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002c5 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig0000070a ), + .Q(\blk00000003/blk000002b1/sig00000c5b ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002c5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002c4 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig0000070b ), + .Q(\blk00000003/blk000002b1/sig00000c5a ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002c4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002b1/blk000002c3 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk000002b1/sig00000c58 ), + .A3(\blk00000003/blk000002b1/sig00000c58 ), + .CE(\blk00000003/blk000002b1/sig00000c69 ), + .CLK(clk), + .D(\blk00000003/sig0000070c ), + .Q(\blk00000003/blk000002b1/sig00000c59 ), + .Q15(\NLW_blk00000003/blk000002b1/blk000002c3_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c68 ), + .Q(\blk00000003/sig0000047d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c67 ), + .Q(\blk00000003/sig0000047e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002c0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c66 ), + .Q(\blk00000003/sig0000047f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002bf ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c65 ), + .Q(\blk00000003/sig00000480 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002be ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c64 ), + .Q(\blk00000003/sig00000481 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002bd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c63 ), + .Q(\blk00000003/sig00000482 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002bc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c62 ), + .Q(\blk00000003/sig00000483 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002bb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c61 ), + .Q(\blk00000003/sig00000484 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002ba ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c60 ), + .Q(\blk00000003/sig00000485 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c5f ), + .Q(\blk00000003/sig00000486 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c5e ), + .Q(\blk00000003/sig00000487 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c5d ), + .Q(\blk00000003/sig00000488 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c5c ), + .Q(\blk00000003/sig00000489 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c5b ), + .Q(\blk00000003/sig0000048a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c5a ), + .Q(\blk00000003/sig0000048b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002b1/blk000002b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002b1/sig00000c59 ), + .Q(\blk00000003/sig0000048c ) + ); + GND \blk00000003/blk000002b1/blk000002b2 ( + .G(\blk00000003/blk000002b1/sig00000c58 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000002d4/blk0000030c ( + .I0(\blk00000003/sig00000307 ), + .I1(ce), + .O(\blk00000003/blk000002d4/sig00000cce ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk000002d4/blk0000030b ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig0000070d ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cbb ), + .DPO(\blk00000003/blk000002d4/sig00000ccd ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk000002d4/blk0000030a ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig0000070e ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cba ), + .DPO(\blk00000003/blk000002d4/sig00000ccc ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk000002d4/blk00000309 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig0000070f ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb9 ), + .DPO(\blk00000003/blk000002d4/sig00000ccb ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk000002d4/blk00000308 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000710 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb8 ), + .DPO(\blk00000003/blk000002d4/sig00000cca ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk000002d4/blk00000307 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000711 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb7 ), + .DPO(\blk00000003/blk000002d4/sig00000cc9 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk000002d4/blk00000306 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000712 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb6 ), + .DPO(\blk00000003/blk000002d4/sig00000cc8 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk000002d4/blk00000305 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000714 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb4 ), + .DPO(\blk00000003/blk000002d4/sig00000cc6 ) + ); + RAM16X1D #( + .INIT ( 16'h000D )) + \blk00000003/blk000002d4/blk00000304 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000715 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb3 ), + .DPO(\blk00000003/blk000002d4/sig00000cc5 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk000002d4/blk00000303 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000713 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb5 ), + .DPO(\blk00000003/blk000002d4/sig00000cc7 ) + ); + RAM16X1D #( + .INIT ( 16'h0009 )) + \blk00000003/blk000002d4/blk00000302 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000716 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb2 ), + .DPO(\blk00000003/blk000002d4/sig00000cc4 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk000002d4/blk00000301 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000717 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb1 ), + .DPO(\blk00000003/blk000002d4/sig00000cc3 ) + ); + RAM16X1D #( + .INIT ( 16'h000F )) + \blk00000003/blk000002d4/blk00000300 ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000718 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cb0 ), + .DPO(\blk00000003/blk000002d4/sig00000cc2 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000002d4/blk000002ff ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig00000719 ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000caf ), + .DPO(\blk00000003/blk000002d4/sig00000cc1 ) + ); + RAM16X1D #( + .INIT ( 16'h0008 )) + \blk00000003/blk000002d4/blk000002fe ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig0000071a ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cae ), + .DPO(\blk00000003/blk000002d4/sig00000cc0 ) + ); + RAM16X1D #( + .INIT ( 16'h0004 )) + \blk00000003/blk000002d4/blk000002fd ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig0000071b ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cad ), + .DPO(\blk00000003/blk000002d4/sig00000cbf ) + ); + RAM16X1D #( + .INIT ( 16'h000B )) + \blk00000003/blk000002d4/blk000002fc ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig0000071d ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cab ), + .DPO(\blk00000003/blk000002d4/sig00000cbd ) + ); + RAM16X1D #( + .INIT ( 16'h0008 )) + \blk00000003/blk000002d4/blk000002fb ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig0000071e ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000caa ), + .DPO(\blk00000003/blk000002d4/sig00000cbc ) + ); + RAM16X1D #( + .INIT ( 16'h0008 )) + \blk00000003/blk000002d4/blk000002fa ( + .A0(\blk00000003/sig00000339 ), + .A1(\blk00000003/sig0000033d ), + .A2(\blk00000003/sig00000340 ), + .A3(\blk00000003/blk000002d4/sig00000ca9 ), + .D(\blk00000003/sig0000071c ), + .DPRA0(\blk00000003/sig00000390 ), + .DPRA1(\blk00000003/sig00000394 ), + .DPRA2(\blk00000003/sig0000039a ), + .DPRA3(\blk00000003/blk000002d4/sig00000ca9 ), + .WCLK(clk), + .WE(\blk00000003/blk000002d4/sig00000cce ), + .SPO(\blk00000003/blk000002d4/sig00000cac ), + .DPO(\blk00000003/blk000002d4/sig00000cbe ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000ccd ), + .Q(\blk00000003/sig000003db ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000ccc ), + .Q(\blk00000003/sig000003dc ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000ccb ), + .Q(\blk00000003/sig000003dd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cca ), + .Q(\blk00000003/sig000003de ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc9 ), + .Q(\blk00000003/sig000003df ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc8 ), + .Q(\blk00000003/sig000003e0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc7 ), + .Q(\blk00000003/sig000003e1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc6 ), + .Q(\blk00000003/sig000003e2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc5 ), + .Q(\blk00000003/sig000003e3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc4 ), + .Q(\blk00000003/sig000003e4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc3 ), + .Q(\blk00000003/sig000003e5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc2 ), + .Q(\blk00000003/sig000003e6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc1 ), + .Q(\blk00000003/sig000003e7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cc0 ), + .Q(\blk00000003/sig000003e8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cbf ), + .Q(\blk00000003/sig000003e9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cbe ), + .Q(\blk00000003/sig000003ea ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cbd ), + .Q(\blk00000003/sig000003eb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cbc ), + .Q(\blk00000003/sig000003ec ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cbb ), + .Q(\blk00000003/sig0000071f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cba ), + .Q(\blk00000003/sig00000720 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb9 ), + .Q(\blk00000003/sig00000721 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb8 ), + .Q(\blk00000003/sig00000722 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb7 ), + .Q(\blk00000003/sig00000723 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb6 ), + .Q(\blk00000003/sig00000724 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb5 ), + .Q(\blk00000003/sig00000725 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002e0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb4 ), + .Q(\blk00000003/sig00000726 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002df ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb3 ), + .Q(\blk00000003/sig00000727 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002de ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb2 ), + .Q(\blk00000003/sig00000728 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002dd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb1 ), + .Q(\blk00000003/sig00000729 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cb0 ), + .Q(\blk00000003/sig0000072a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002db ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000caf ), + .Q(\blk00000003/sig0000072b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002da ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cae ), + .Q(\blk00000003/sig0000072c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cad ), + .Q(\blk00000003/sig0000072d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cac ), + .Q(\blk00000003/sig0000072e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000cab ), + .Q(\blk00000003/sig0000072f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000002d4/blk000002d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000002d4/sig00000caa ), + .Q(\blk00000003/sig00000730 ) + ); + GND \blk00000003/blk000002d4/blk000002d5 ( + .G(\blk00000003/blk000002d4/sig00000ca9 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000030d/blk00000345 ( + .I0(\blk00000003/sig00000677 ), + .I1(ce), + .O(\blk00000003/blk0000030d/sig00000d33 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk0000030d/blk00000344 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig0000071f ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d20 ), + .DPO(\blk00000003/blk0000030d/sig00000d32 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk0000030d/blk00000343 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000720 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d1f ), + .DPO(\blk00000003/blk0000030d/sig00000d31 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk0000030d/blk00000342 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000721 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d1e ), + .DPO(\blk00000003/blk0000030d/sig00000d30 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk0000030d/blk00000341 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000722 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d1d ), + .DPO(\blk00000003/blk0000030d/sig00000d2f ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk0000030d/blk00000340 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000723 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d1c ), + .DPO(\blk00000003/blk0000030d/sig00000d2e ) + ); + RAM16X1D #( + .INIT ( 16'h000D )) + \blk00000003/blk0000030d/blk0000033f ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000724 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d1b ), + .DPO(\blk00000003/blk0000030d/sig00000d2d ) + ); + RAM16X1D #( + .INIT ( 16'h0008 )) + \blk00000003/blk0000030d/blk0000033e ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000726 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d19 ), + .DPO(\blk00000003/blk0000030d/sig00000d2b ) + ); + RAM16X1D #( + .INIT ( 16'h0009 )) + \blk00000003/blk0000030d/blk0000033d ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000727 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d18 ), + .DPO(\blk00000003/blk0000030d/sig00000d2a ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk0000030d/blk0000033c ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000725 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d1a ), + .DPO(\blk00000003/blk0000030d/sig00000d2c ) + ); + RAM16X1D #( + .INIT ( 16'h000A )) + \blk00000003/blk0000030d/blk0000033b ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000728 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d17 ), + .DPO(\blk00000003/blk0000030d/sig00000d29 ) + ); + RAM16X1D #( + .INIT ( 16'h0006 )) + \blk00000003/blk0000030d/blk0000033a ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000729 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d16 ), + .DPO(\blk00000003/blk0000030d/sig00000d28 ) + ); + RAM16X1D #( + .INIT ( 16'h000C )) + \blk00000003/blk0000030d/blk00000339 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig0000072a ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d15 ), + .DPO(\blk00000003/blk0000030d/sig00000d27 ) + ); + RAM16X1D #( + .INIT ( 16'h000A )) + \blk00000003/blk0000030d/blk00000338 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig0000072b ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d14 ), + .DPO(\blk00000003/blk0000030d/sig00000d26 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk0000030d/blk00000337 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig0000072c ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d13 ), + .DPO(\blk00000003/blk0000030d/sig00000d25 ) + ); + RAM16X1D #( + .INIT ( 16'h0003 )) + \blk00000003/blk0000030d/blk00000336 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig0000072d ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d12 ), + .DPO(\blk00000003/blk0000030d/sig00000d24 ) + ); + RAM16X1D #( + .INIT ( 16'h000B )) + \blk00000003/blk0000030d/blk00000335 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig0000072f ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d10 ), + .DPO(\blk00000003/blk0000030d/sig00000d22 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk0000030d/blk00000334 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig00000730 ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d0f ), + .DPO(\blk00000003/blk0000030d/sig00000d21 ) + ); + RAM16X1D #( + .INIT ( 16'h000F )) + \blk00000003/blk0000030d/blk00000333 ( + .A0(\blk00000003/sig00000671 ), + .A1(\blk00000003/sig00000672 ), + .A2(\blk00000003/sig00000673 ), + .A3(\blk00000003/blk0000030d/sig00000d0e ), + .D(\blk00000003/sig0000072e ), + .DPRA0(\blk00000003/sig00000681 ), + .DPRA1(\blk00000003/sig0000067f ), + .DPRA2(\blk00000003/sig0000067d ), + .DPRA3(\blk00000003/blk0000030d/sig00000d0e ), + .WCLK(clk), + .WE(\blk00000003/blk0000030d/sig00000d33 ), + .SPO(\blk00000003/blk0000030d/sig00000d11 ), + .DPO(\blk00000003/blk0000030d/sig00000d23 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000332 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d32 ), + .Q(\blk00000003/sig0000056f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000331 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d31 ), + .Q(\blk00000003/sig00000570 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000330 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d30 ), + .Q(\blk00000003/sig00000571 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000032f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d2f ), + .Q(\blk00000003/sig00000572 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000032e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d2e ), + .Q(\blk00000003/sig00000573 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000032d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d2d ), + .Q(\blk00000003/sig00000574 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000032c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d2c ), + .Q(\blk00000003/sig00000575 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000032b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d2b ), + .Q(\blk00000003/sig00000576 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000032a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d2a ), + .Q(\blk00000003/sig00000577 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000329 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d29 ), + .Q(\blk00000003/sig00000578 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000328 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d28 ), + .Q(\blk00000003/sig00000579 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000327 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d27 ), + .Q(\blk00000003/sig0000057a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000326 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d26 ), + .Q(\blk00000003/sig0000057b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000325 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d25 ), + .Q(\blk00000003/sig0000057c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000324 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d24 ), + .Q(\blk00000003/sig0000057d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000323 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d23 ), + .Q(\blk00000003/sig0000057e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000322 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d22 ), + .Q(\blk00000003/sig0000057f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000321 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d21 ), + .Q(\blk00000003/sig00000580 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000320 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d20 ), + .Q(\blk00000003/sig00000731 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000031f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d1f ), + .Q(\blk00000003/sig00000732 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000031e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d1e ), + .Q(\blk00000003/sig00000733 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000031d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d1d ), + .Q(\blk00000003/sig00000734 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000031c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d1c ), + .Q(\blk00000003/sig00000735 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000031b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d1b ), + .Q(\blk00000003/sig00000736 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000031a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d1a ), + .Q(\blk00000003/sig00000737 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000319 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d19 ), + .Q(\blk00000003/sig00000738 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000318 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d18 ), + .Q(\blk00000003/sig00000739 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000317 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d17 ), + .Q(\blk00000003/sig0000073a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000316 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d16 ), + .Q(\blk00000003/sig0000073b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000315 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d15 ), + .Q(\blk00000003/sig0000073c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000314 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d14 ), + .Q(\blk00000003/sig0000073d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000313 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d13 ), + .Q(\blk00000003/sig0000073e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000312 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d12 ), + .Q(\blk00000003/sig0000073f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000311 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d11 ), + .Q(\blk00000003/sig00000740 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk00000310 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d10 ), + .Q(\blk00000003/sig00000741 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000030d/blk0000030f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000030d/sig00000d0f ), + .Q(\blk00000003/sig00000742 ) + ); + GND \blk00000003/blk0000030d/blk0000030e ( + .G(\blk00000003/blk0000030d/sig00000d0e ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000386/blk000003ac ( + .I0(\blk00000003/sig00000678 ), + .I1(ce), + .O(\blk00000003/blk00000386/sig00000d74 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk00000386/blk000003ab ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000731 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003ab_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d73 ) + ); + RAM16X1D #( + .INIT ( 16'h000D )) + \blk00000003/blk00000386/blk000003aa ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000732 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003aa_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d72 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk00000386/blk000003a9 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000733 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a9_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d71 ) + ); + RAM16X1D #( + .INIT ( 16'h0009 )) + \blk00000003/blk00000386/blk000003a8 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000734 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a8_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d70 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000386/blk000003a7 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000735 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a7_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d6f ) + ); + RAM16X1D #( + .INIT ( 16'h0007 )) + \blk00000003/blk00000386/blk000003a6 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000736 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a6_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d6e ) + ); + RAM16X1D #( + .INIT ( 16'h0009 )) + \blk00000003/blk00000386/blk000003a5 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000738 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a5_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d6c ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000386/blk000003a4 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000739 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a4_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d6b ) + ); + RAM16X1D #( + .INIT ( 16'h0007 )) + \blk00000003/blk00000386/blk000003a3 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000737 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a3_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d6d ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000386/blk000003a2 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig0000073a ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a2_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d6a ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000386/blk000003a1 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig0000073b ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a1_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d69 ) + ); + RAM16X1D #( + .INIT ( 16'h000C )) + \blk00000003/blk00000386/blk000003a0 ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig0000073c ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk000003a0_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d68 ) + ); + RAM16X1D #( + .INIT ( 16'h0002 )) + \blk00000003/blk00000386/blk0000039f ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig0000073d ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk0000039f_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d67 ) + ); + RAM16X1D #( + .INIT ( 16'h0005 )) + \blk00000003/blk00000386/blk0000039e ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig0000073e ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk0000039e_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d66 ) + ); + RAM16X1D #( + .INIT ( 16'h0007 )) + \blk00000003/blk00000386/blk0000039d ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig0000073f ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk0000039d_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d65 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000386/blk0000039c ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000741 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk0000039c_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d63 ) + ); + RAM16X1D #( + .INIT ( 16'h0009 )) + \blk00000003/blk00000386/blk0000039b ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000742 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk0000039b_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d62 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk00000386/blk0000039a ( + .A0(\blk00000003/sig00000674 ), + .A1(\blk00000003/sig00000675 ), + .A2(\blk00000003/sig00000676 ), + .A3(\blk00000003/blk00000386/sig00000d61 ), + .D(\blk00000003/sig00000740 ), + .DPRA0(\blk00000003/sig00000682 ), + .DPRA1(\blk00000003/sig00000680 ), + .DPRA2(\blk00000003/sig0000067e ), + .DPRA3(\blk00000003/blk00000386/sig00000d61 ), + .WCLK(clk), + .WE(\blk00000003/blk00000386/sig00000d74 ), + .SPO(\NLW_blk00000003/blk00000386/blk0000039a_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk00000386/sig00000d64 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000399 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d73 ), + .Q(\blk00000003/sig0000050d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000398 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d72 ), + .Q(\blk00000003/sig0000050e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000397 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d71 ), + .Q(\blk00000003/sig0000050f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000396 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d70 ), + .Q(\blk00000003/sig00000510 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000395 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d6f ), + .Q(\blk00000003/sig00000511 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000394 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d6e ), + .Q(\blk00000003/sig00000512 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000393 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d6d ), + .Q(\blk00000003/sig00000513 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000392 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d6c ), + .Q(\blk00000003/sig00000514 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000391 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d6b ), + .Q(\blk00000003/sig00000515 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000390 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d6a ), + .Q(\blk00000003/sig00000516 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk0000038f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d69 ), + .Q(\blk00000003/sig00000517 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk0000038e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d68 ), + .Q(\blk00000003/sig00000518 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk0000038d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d67 ), + .Q(\blk00000003/sig00000519 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk0000038c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d66 ), + .Q(\blk00000003/sig0000051a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk0000038b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d65 ), + .Q(\blk00000003/sig0000051b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk0000038a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d64 ), + .Q(\blk00000003/sig0000051c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000389 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d63 ), + .Q(\blk00000003/sig0000051d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000386/blk00000388 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000386/sig00000d62 ), + .Q(\blk00000003/sig0000051e ) + ); + GND \blk00000003/blk00000386/blk00000387 ( + .G(\blk00000003/blk00000386/sig00000d61 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003ad/blk000003bf ( + .I0(\blk00000003/sig0000067c ), + .I1(ce), + .O(\blk00000003/blk000003ad/sig00000d93 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ad/blk000003be ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003ad/sig00000d8a ), + .A3(\blk00000003/blk000003ad/sig00000d8a ), + .CE(\blk00000003/blk000003ad/sig00000d93 ), + .CLK(clk), + .D(\blk00000003/sig00000567 ), + .Q(\blk00000003/blk000003ad/sig00000d92 ), + .Q15(\NLW_blk00000003/blk000003ad/blk000003be_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ad/blk000003bd ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003ad/sig00000d8a ), + .A3(\blk00000003/blk000003ad/sig00000d8a ), + .CE(\blk00000003/blk000003ad/sig00000d93 ), + .CLK(clk), + .D(\blk00000003/sig00000568 ), + .Q(\blk00000003/blk000003ad/sig00000d91 ), + .Q15(\NLW_blk00000003/blk000003ad/blk000003bd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ad/blk000003bc ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003ad/sig00000d8a ), + .A3(\blk00000003/blk000003ad/sig00000d8a ), + .CE(\blk00000003/blk000003ad/sig00000d93 ), + .CLK(clk), + .D(\blk00000003/sig00000569 ), + .Q(\blk00000003/blk000003ad/sig00000d90 ), + .Q15(\NLW_blk00000003/blk000003ad/blk000003bc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ad/blk000003bb ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003ad/sig00000d8a ), + .A3(\blk00000003/blk000003ad/sig00000d8a ), + .CE(\blk00000003/blk000003ad/sig00000d93 ), + .CLK(clk), + .D(\blk00000003/sig0000056a ), + .Q(\blk00000003/blk000003ad/sig00000d8f ), + .Q15(\NLW_blk00000003/blk000003ad/blk000003bb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ad/blk000003ba ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003ad/sig00000d8a ), + .A3(\blk00000003/blk000003ad/sig00000d8a ), + .CE(\blk00000003/blk000003ad/sig00000d93 ), + .CLK(clk), + .D(\blk00000003/sig0000056b ), + .Q(\blk00000003/blk000003ad/sig00000d8e ), + .Q15(\NLW_blk00000003/blk000003ad/blk000003ba_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ad/blk000003b9 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003ad/sig00000d8a ), + .A3(\blk00000003/blk000003ad/sig00000d8a ), + .CE(\blk00000003/blk000003ad/sig00000d93 ), + .CLK(clk), + .D(\blk00000003/sig0000056c ), + .Q(\blk00000003/blk000003ad/sig00000d8d ), + .Q15(\NLW_blk00000003/blk000003ad/blk000003b9_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ad/blk000003b8 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003ad/sig00000d8a ), + .A3(\blk00000003/blk000003ad/sig00000d8a ), + .CE(\blk00000003/blk000003ad/sig00000d93 ), + .CLK(clk), + .D(\blk00000003/sig0000056d ), + .Q(\blk00000003/blk000003ad/sig00000d8c ), + .Q15(\NLW_blk00000003/blk000003ad/blk000003b8_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003ad/blk000003b7 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003ad/sig00000d8a ), + .A3(\blk00000003/blk000003ad/sig00000d8a ), + .CE(\blk00000003/blk000003ad/sig00000d93 ), + .CLK(clk), + .D(\blk00000003/sig0000056e ), + .Q(\blk00000003/blk000003ad/sig00000d8b ), + .Q15(\NLW_blk00000003/blk000003ad/blk000003b7_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ad/blk000003b6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ad/sig00000d92 ), + .Q(\blk00000003/sig00000505 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ad/blk000003b5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ad/sig00000d91 ), + .Q(\blk00000003/sig00000506 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ad/blk000003b4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ad/sig00000d90 ), + .Q(\blk00000003/sig00000507 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ad/blk000003b3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ad/sig00000d8f ), + .Q(\blk00000003/sig00000508 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ad/blk000003b2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ad/sig00000d8e ), + .Q(\blk00000003/sig00000509 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ad/blk000003b1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ad/sig00000d8d ), + .Q(\blk00000003/sig0000050a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ad/blk000003b0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ad/sig00000d8c ), + .Q(\blk00000003/sig0000050b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003ad/blk000003af ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003ad/sig00000d8b ), + .Q(\blk00000003/sig0000050c ) + ); + GND \blk00000003/blk000003ad/blk000003ae ( + .G(\blk00000003/blk000003ad/sig00000d8a ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003c0/blk000003d2 ( + .I0(\blk00000003/sig0000067a ), + .I1(ce), + .O(\blk00000003/blk000003c0/sig00000db2 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003c0/blk000003d1 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003c0/sig00000da9 ), + .A3(\blk00000003/blk000003c0/sig00000da9 ), + .CE(\blk00000003/blk000003c0/sig00000db2 ), + .CLK(clk), + .D(\blk00000003/sig00000745 ), + .Q(\blk00000003/blk000003c0/sig00000db1 ), + .Q15(\NLW_blk00000003/blk000003c0/blk000003d1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003c0/blk000003d0 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003c0/sig00000da9 ), + .A3(\blk00000003/blk000003c0/sig00000da9 ), + .CE(\blk00000003/blk000003c0/sig00000db2 ), + .CLK(clk), + .D(\blk00000003/sig00000746 ), + .Q(\blk00000003/blk000003c0/sig00000db0 ), + .Q15(\NLW_blk00000003/blk000003c0/blk000003d0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003c0/blk000003cf ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003c0/sig00000da9 ), + .A3(\blk00000003/blk000003c0/sig00000da9 ), + .CE(\blk00000003/blk000003c0/sig00000db2 ), + .CLK(clk), + .D(\blk00000003/sig00000747 ), + .Q(\blk00000003/blk000003c0/sig00000daf ), + .Q15(\NLW_blk00000003/blk000003c0/blk000003cf_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003c0/blk000003ce ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003c0/sig00000da9 ), + .A3(\blk00000003/blk000003c0/sig00000da9 ), + .CE(\blk00000003/blk000003c0/sig00000db2 ), + .CLK(clk), + .D(\blk00000003/sig00000748 ), + .Q(\blk00000003/blk000003c0/sig00000dae ), + .Q15(\NLW_blk00000003/blk000003c0/blk000003ce_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003c0/blk000003cd ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003c0/sig00000da9 ), + .A3(\blk00000003/blk000003c0/sig00000da9 ), + .CE(\blk00000003/blk000003c0/sig00000db2 ), + .CLK(clk), + .D(\blk00000003/sig00000749 ), + .Q(\blk00000003/blk000003c0/sig00000dad ), + .Q15(\NLW_blk00000003/blk000003c0/blk000003cd_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003c0/blk000003cc ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003c0/sig00000da9 ), + .A3(\blk00000003/blk000003c0/sig00000da9 ), + .CE(\blk00000003/blk000003c0/sig00000db2 ), + .CLK(clk), + .D(\blk00000003/sig0000074a ), + .Q(\blk00000003/blk000003c0/sig00000dac ), + .Q15(\NLW_blk00000003/blk000003c0/blk000003cc_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003c0/blk000003cb ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003c0/sig00000da9 ), + .A3(\blk00000003/blk000003c0/sig00000da9 ), + .CE(\blk00000003/blk000003c0/sig00000db2 ), + .CLK(clk), + .D(\blk00000003/sig0000074b ), + .Q(\blk00000003/blk000003c0/sig00000dab ), + .Q15(\NLW_blk00000003/blk000003c0/blk000003cb_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003c0/blk000003ca ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003c0/sig00000da9 ), + .A3(\blk00000003/blk000003c0/sig00000da9 ), + .CE(\blk00000003/blk000003c0/sig00000db2 ), + .CLK(clk), + .D(\blk00000003/sig0000074c ), + .Q(\blk00000003/blk000003c0/sig00000daa ), + .Q15(\NLW_blk00000003/blk000003c0/blk000003ca_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c0/blk000003c9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003c0/sig00000db1 ), + .Q(\blk00000003/sig000004cd ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c0/blk000003c8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003c0/sig00000db0 ), + .Q(\blk00000003/sig000004ce ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c0/blk000003c7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003c0/sig00000daf ), + .Q(\blk00000003/sig000004cf ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c0/blk000003c6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003c0/sig00000dae ), + .Q(\blk00000003/sig000004d0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c0/blk000003c5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003c0/sig00000dad ), + .Q(\blk00000003/sig000004d1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c0/blk000003c4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003c0/sig00000dac ), + .Q(\blk00000003/sig000004d2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c0/blk000003c3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003c0/sig00000dab ), + .Q(\blk00000003/sig000004d3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003c0/blk000003c2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003c0/sig00000daa ), + .Q(\blk00000003/sig000004d4 ) + ); + GND \blk00000003/blk000003c0/blk000003c1 ( + .G(\blk00000003/blk000003c0/sig00000da9 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003d3/blk000003e5 ( + .I0(\blk00000003/sig0000067c ), + .I1(ce), + .O(\blk00000003/blk000003d3/sig00000dd1 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d3/blk000003e4 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003d3/sig00000dc8 ), + .A3(\blk00000003/blk000003d3/sig00000dc8 ), + .CE(\blk00000003/blk000003d3/sig00000dd1 ), + .CLK(clk), + .D(\blk00000003/sig00000589 ), + .Q(\blk00000003/blk000003d3/sig00000dd0 ), + .Q15(\NLW_blk00000003/blk000003d3/blk000003e4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d3/blk000003e3 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003d3/sig00000dc8 ), + .A3(\blk00000003/blk000003d3/sig00000dc8 ), + .CE(\blk00000003/blk000003d3/sig00000dd1 ), + .CLK(clk), + .D(\blk00000003/sig0000058a ), + .Q(\blk00000003/blk000003d3/sig00000dcf ), + .Q15(\NLW_blk00000003/blk000003d3/blk000003e3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d3/blk000003e2 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003d3/sig00000dc8 ), + .A3(\blk00000003/blk000003d3/sig00000dc8 ), + .CE(\blk00000003/blk000003d3/sig00000dd1 ), + .CLK(clk), + .D(\blk00000003/sig0000058b ), + .Q(\blk00000003/blk000003d3/sig00000dce ), + .Q15(\NLW_blk00000003/blk000003d3/blk000003e2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d3/blk000003e1 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003d3/sig00000dc8 ), + .A3(\blk00000003/blk000003d3/sig00000dc8 ), + .CE(\blk00000003/blk000003d3/sig00000dd1 ), + .CLK(clk), + .D(\blk00000003/sig0000058c ), + .Q(\blk00000003/blk000003d3/sig00000dcd ), + .Q15(\NLW_blk00000003/blk000003d3/blk000003e1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d3/blk000003e0 ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003d3/sig00000dc8 ), + .A3(\blk00000003/blk000003d3/sig00000dc8 ), + .CE(\blk00000003/blk000003d3/sig00000dd1 ), + .CLK(clk), + .D(\blk00000003/sig0000058d ), + .Q(\blk00000003/blk000003d3/sig00000dcc ), + .Q15(\NLW_blk00000003/blk000003d3/blk000003e0_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d3/blk000003df ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003d3/sig00000dc8 ), + .A3(\blk00000003/blk000003d3/sig00000dc8 ), + .CE(\blk00000003/blk000003d3/sig00000dd1 ), + .CLK(clk), + .D(\blk00000003/sig0000058e ), + .Q(\blk00000003/blk000003d3/sig00000dcb ), + .Q15(\NLW_blk00000003/blk000003d3/blk000003df_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d3/blk000003de ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003d3/sig00000dc8 ), + .A3(\blk00000003/blk000003d3/sig00000dc8 ), + .CE(\blk00000003/blk000003d3/sig00000dd1 ), + .CLK(clk), + .D(\blk00000003/sig0000058f ), + .Q(\blk00000003/blk000003d3/sig00000dca ), + .Q15(\NLW_blk00000003/blk000003d3/blk000003de_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003d3/blk000003dd ( + .A0(\blk00000003/sig0000068a ), + .A1(\blk00000003/sig00000688 ), + .A2(\blk00000003/blk000003d3/sig00000dc8 ), + .A3(\blk00000003/blk000003d3/sig00000dc8 ), + .CE(\blk00000003/blk000003d3/sig00000dd1 ), + .CLK(clk), + .D(\blk00000003/sig00000590 ), + .Q(\blk00000003/blk000003d3/sig00000dc9 ), + .Q15(\NLW_blk00000003/blk000003d3/blk000003dd_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d3/blk000003dc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d3/sig00000dd0 ), + .Q(\blk00000003/sig00000557 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d3/blk000003db ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d3/sig00000dcf ), + .Q(\blk00000003/sig00000558 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d3/blk000003da ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d3/sig00000dce ), + .Q(\blk00000003/sig00000559 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d3/blk000003d9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d3/sig00000dcd ), + .Q(\blk00000003/sig0000055a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d3/blk000003d8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d3/sig00000dcc ), + .Q(\blk00000003/sig0000055b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d3/blk000003d7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d3/sig00000dcb ), + .Q(\blk00000003/sig0000055c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d3/blk000003d6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d3/sig00000dca ), + .Q(\blk00000003/sig0000055d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003d3/blk000003d5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003d3/sig00000dc9 ), + .Q(\blk00000003/sig0000055e ) + ); + GND \blk00000003/blk000003d3/blk000003d4 ( + .G(\blk00000003/blk000003d3/sig00000dc8 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003e6/blk000003f8 ( + .I0(\blk00000003/sig0000067a ), + .I1(ce), + .O(\blk00000003/blk000003e6/sig00000df0 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003e6/blk000003f7 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003e6/sig00000de7 ), + .A3(\blk00000003/blk000003e6/sig00000de7 ), + .CE(\blk00000003/blk000003e6/sig00000df0 ), + .CLK(clk), + .D(\blk00000003/sig0000074d ), + .Q(\blk00000003/blk000003e6/sig00000def ), + .Q15(\NLW_blk00000003/blk000003e6/blk000003f7_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003e6/blk000003f6 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003e6/sig00000de7 ), + .A3(\blk00000003/blk000003e6/sig00000de7 ), + .CE(\blk00000003/blk000003e6/sig00000df0 ), + .CLK(clk), + .D(\blk00000003/sig0000074e ), + .Q(\blk00000003/blk000003e6/sig00000dee ), + .Q15(\NLW_blk00000003/blk000003e6/blk000003f6_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003e6/blk000003f5 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003e6/sig00000de7 ), + .A3(\blk00000003/blk000003e6/sig00000de7 ), + .CE(\blk00000003/blk000003e6/sig00000df0 ), + .CLK(clk), + .D(\blk00000003/sig0000074f ), + .Q(\blk00000003/blk000003e6/sig00000ded ), + .Q15(\NLW_blk00000003/blk000003e6/blk000003f5_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003e6/blk000003f4 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003e6/sig00000de7 ), + .A3(\blk00000003/blk000003e6/sig00000de7 ), + .CE(\blk00000003/blk000003e6/sig00000df0 ), + .CLK(clk), + .D(\blk00000003/sig00000750 ), + .Q(\blk00000003/blk000003e6/sig00000dec ), + .Q15(\NLW_blk00000003/blk000003e6/blk000003f4_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003e6/blk000003f3 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003e6/sig00000de7 ), + .A3(\blk00000003/blk000003e6/sig00000de7 ), + .CE(\blk00000003/blk000003e6/sig00000df0 ), + .CLK(clk), + .D(\blk00000003/sig00000751 ), + .Q(\blk00000003/blk000003e6/sig00000deb ), + .Q15(\NLW_blk00000003/blk000003e6/blk000003f3_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003e6/blk000003f2 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003e6/sig00000de7 ), + .A3(\blk00000003/blk000003e6/sig00000de7 ), + .CE(\blk00000003/blk000003e6/sig00000df0 ), + .CLK(clk), + .D(\blk00000003/sig00000752 ), + .Q(\blk00000003/blk000003e6/sig00000dea ), + .Q15(\NLW_blk00000003/blk000003e6/blk000003f2_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003e6/blk000003f1 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003e6/sig00000de7 ), + .A3(\blk00000003/blk000003e6/sig00000de7 ), + .CE(\blk00000003/blk000003e6/sig00000df0 ), + .CLK(clk), + .D(\blk00000003/sig00000753 ), + .Q(\blk00000003/blk000003e6/sig00000de9 ), + .Q15(\NLW_blk00000003/blk000003e6/blk000003f1_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003e6/blk000003f0 ( + .A0(\blk00000003/sig00000686 ), + .A1(\blk00000003/sig00000684 ), + .A2(\blk00000003/blk000003e6/sig00000de7 ), + .A3(\blk00000003/blk000003e6/sig00000de7 ), + .CE(\blk00000003/blk000003e6/sig00000df0 ), + .CLK(clk), + .D(\blk00000003/sig00000754 ), + .Q(\blk00000003/blk000003e6/sig00000de8 ), + .Q15(\NLW_blk00000003/blk000003e6/blk000003f0_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e6/blk000003ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003e6/sig00000def ), + .Q(\blk00000003/sig0000051f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e6/blk000003ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003e6/sig00000dee ), + .Q(\blk00000003/sig00000520 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e6/blk000003ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003e6/sig00000ded ), + .Q(\blk00000003/sig00000521 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e6/blk000003ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003e6/sig00000dec ), + .Q(\blk00000003/sig00000522 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e6/blk000003eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003e6/sig00000deb ), + .Q(\blk00000003/sig00000523 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e6/blk000003ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003e6/sig00000dea ), + .Q(\blk00000003/sig00000524 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e6/blk000003e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003e6/sig00000de9 ), + .Q(\blk00000003/sig00000525 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003e6/blk000003e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003e6/sig00000de8 ), + .Q(\blk00000003/sig00000526 ) + ); + GND \blk00000003/blk000003e6/blk000003e7 ( + .G(\blk00000003/blk000003e6/sig00000de7 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000003f9/blk0000040b ( + .I0(\blk00000003/sig0000067b ), + .I1(ce), + .O(\blk00000003/blk000003f9/sig00000e0f ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk0000040a ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000003f9/sig00000e06 ), + .A3(\blk00000003/blk000003f9/sig00000e06 ), + .CE(\blk00000003/blk000003f9/sig00000e0f ), + .CLK(clk), + .D(\blk00000003/sig000003a3 ), + .Q(\blk00000003/blk000003f9/sig00000e0e ), + .Q15(\NLW_blk00000003/blk000003f9/blk0000040a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000409 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000003f9/sig00000e06 ), + .A3(\blk00000003/blk000003f9/sig00000e06 ), + .CE(\blk00000003/blk000003f9/sig00000e0f ), + .CLK(clk), + .D(\blk00000003/sig000003a4 ), + .Q(\blk00000003/blk000003f9/sig00000e0d ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000409_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000408 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000003f9/sig00000e06 ), + .A3(\blk00000003/blk000003f9/sig00000e06 ), + .CE(\blk00000003/blk000003f9/sig00000e0f ), + .CLK(clk), + .D(\blk00000003/sig000003a5 ), + .Q(\blk00000003/blk000003f9/sig00000e0c ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000408_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000407 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000003f9/sig00000e06 ), + .A3(\blk00000003/blk000003f9/sig00000e06 ), + .CE(\blk00000003/blk000003f9/sig00000e0f ), + .CLK(clk), + .D(\blk00000003/sig000003a6 ), + .Q(\blk00000003/blk000003f9/sig00000e0b ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000407_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000406 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000003f9/sig00000e06 ), + .A3(\blk00000003/blk000003f9/sig00000e06 ), + .CE(\blk00000003/blk000003f9/sig00000e0f ), + .CLK(clk), + .D(\blk00000003/sig000003a7 ), + .Q(\blk00000003/blk000003f9/sig00000e0a ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000406_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000405 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000003f9/sig00000e06 ), + .A3(\blk00000003/blk000003f9/sig00000e06 ), + .CE(\blk00000003/blk000003f9/sig00000e0f ), + .CLK(clk), + .D(\blk00000003/sig000003a8 ), + .Q(\blk00000003/blk000003f9/sig00000e09 ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000405_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000404 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000003f9/sig00000e06 ), + .A3(\blk00000003/blk000003f9/sig00000e06 ), + .CE(\blk00000003/blk000003f9/sig00000e0f ), + .CLK(clk), + .D(\blk00000003/sig000003a9 ), + .Q(\blk00000003/blk000003f9/sig00000e08 ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000404_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk000003f9/blk00000403 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk000003f9/sig00000e06 ), + .A3(\blk00000003/blk000003f9/sig00000e06 ), + .CE(\blk00000003/blk000003f9/sig00000e0f ), + .CLK(clk), + .D(\blk00000003/sig000003aa ), + .Q(\blk00000003/blk000003f9/sig00000e07 ), + .Q15(\NLW_blk00000003/blk000003f9/blk00000403_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000402 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00000e0e ), + .Q(\blk00000003/sig00000567 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000401 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00000e0d ), + .Q(\blk00000003/sig00000568 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk00000400 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00000e0c ), + .Q(\blk00000003/sig00000569 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003ff ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00000e0b ), + .Q(\blk00000003/sig0000056a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003fe ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00000e0a ), + .Q(\blk00000003/sig0000056b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003fd ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00000e09 ), + .Q(\blk00000003/sig0000056c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003fc ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00000e08 ), + .Q(\blk00000003/sig0000056d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000003f9/blk000003fb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000003f9/sig00000e07 ), + .Q(\blk00000003/sig0000056e ) + ); + GND \blk00000003/blk000003f9/blk000003fa ( + .G(\blk00000003/blk000003f9/sig00000e06 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000040c/blk0000041e ( + .I0(\blk00000003/sig00000679 ), + .I1(ce), + .O(\blk00000003/blk0000040c/sig00000e2e ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000040c/blk0000041d ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk0000040c/sig00000e25 ), + .A3(\blk00000003/blk0000040c/sig00000e25 ), + .CE(\blk00000003/blk0000040c/sig00000e2e ), + .CLK(clk), + .D(\blk00000003/sig00000755 ), + .Q(\blk00000003/blk0000040c/sig00000e2d ), + .Q15(\NLW_blk00000003/blk0000040c/blk0000041d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000040c/blk0000041c ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk0000040c/sig00000e25 ), + .A3(\blk00000003/blk0000040c/sig00000e25 ), + .CE(\blk00000003/blk0000040c/sig00000e2e ), + .CLK(clk), + .D(\blk00000003/sig00000756 ), + .Q(\blk00000003/blk0000040c/sig00000e2c ), + .Q15(\NLW_blk00000003/blk0000040c/blk0000041c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000040c/blk0000041b ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk0000040c/sig00000e25 ), + .A3(\blk00000003/blk0000040c/sig00000e25 ), + .CE(\blk00000003/blk0000040c/sig00000e2e ), + .CLK(clk), + .D(\blk00000003/sig00000757 ), + .Q(\blk00000003/blk0000040c/sig00000e2b ), + .Q15(\NLW_blk00000003/blk0000040c/blk0000041b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000040c/blk0000041a ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk0000040c/sig00000e25 ), + .A3(\blk00000003/blk0000040c/sig00000e25 ), + .CE(\blk00000003/blk0000040c/sig00000e2e ), + .CLK(clk), + .D(\blk00000003/sig00000758 ), + .Q(\blk00000003/blk0000040c/sig00000e2a ), + .Q15(\NLW_blk00000003/blk0000040c/blk0000041a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000040c/blk00000419 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk0000040c/sig00000e25 ), + .A3(\blk00000003/blk0000040c/sig00000e25 ), + .CE(\blk00000003/blk0000040c/sig00000e2e ), + .CLK(clk), + .D(\blk00000003/sig00000759 ), + .Q(\blk00000003/blk0000040c/sig00000e29 ), + .Q15(\NLW_blk00000003/blk0000040c/blk00000419_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000040c/blk00000418 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk0000040c/sig00000e25 ), + .A3(\blk00000003/blk0000040c/sig00000e25 ), + .CE(\blk00000003/blk0000040c/sig00000e2e ), + .CLK(clk), + .D(\blk00000003/sig0000075a ), + .Q(\blk00000003/blk0000040c/sig00000e28 ), + .Q15(\NLW_blk00000003/blk0000040c/blk00000418_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000040c/blk00000417 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk0000040c/sig00000e25 ), + .A3(\blk00000003/blk0000040c/sig00000e25 ), + .CE(\blk00000003/blk0000040c/sig00000e2e ), + .CLK(clk), + .D(\blk00000003/sig0000075b ), + .Q(\blk00000003/blk0000040c/sig00000e27 ), + .Q15(\NLW_blk00000003/blk0000040c/blk00000417_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000040c/blk00000416 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk0000040c/sig00000e25 ), + .A3(\blk00000003/blk0000040c/sig00000e25 ), + .CE(\blk00000003/blk0000040c/sig00000e2e ), + .CLK(clk), + .D(\blk00000003/sig0000075c ), + .Q(\blk00000003/blk0000040c/sig00000e26 ), + .Q15(\NLW_blk00000003/blk0000040c/blk00000416_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040c/blk00000415 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000040c/sig00000e2d ), + .Q(\blk00000003/sig0000055f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040c/blk00000414 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000040c/sig00000e2c ), + .Q(\blk00000003/sig00000560 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040c/blk00000413 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000040c/sig00000e2b ), + .Q(\blk00000003/sig00000561 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040c/blk00000412 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000040c/sig00000e2a ), + .Q(\blk00000003/sig00000562 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040c/blk00000411 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000040c/sig00000e29 ), + .Q(\blk00000003/sig00000563 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040c/blk00000410 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000040c/sig00000e28 ), + .Q(\blk00000003/sig00000564 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040c/blk0000040f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000040c/sig00000e27 ), + .Q(\blk00000003/sig00000565 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000040c/blk0000040e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000040c/sig00000e26 ), + .Q(\blk00000003/sig00000566 ) + ); + GND \blk00000003/blk0000040c/blk0000040d ( + .G(\blk00000003/blk0000040c/sig00000e25 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000041f/blk00000431 ( + .I0(\blk00000003/sig0000067b ), + .I1(ce), + .O(\blk00000003/blk0000041f/sig00000e4d ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041f/blk00000430 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk0000041f/sig00000e44 ), + .A3(\blk00000003/blk0000041f/sig00000e44 ), + .CE(\blk00000003/blk0000041f/sig00000e4d ), + .CLK(clk), + .D(\blk00000003/sig000003f5 ), + .Q(\blk00000003/blk0000041f/sig00000e4c ), + .Q15(\NLW_blk00000003/blk0000041f/blk00000430_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041f/blk0000042f ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk0000041f/sig00000e44 ), + .A3(\blk00000003/blk0000041f/sig00000e44 ), + .CE(\blk00000003/blk0000041f/sig00000e4d ), + .CLK(clk), + .D(\blk00000003/sig000003f6 ), + .Q(\blk00000003/blk0000041f/sig00000e4b ), + .Q15(\NLW_blk00000003/blk0000041f/blk0000042f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041f/blk0000042e ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk0000041f/sig00000e44 ), + .A3(\blk00000003/blk0000041f/sig00000e44 ), + .CE(\blk00000003/blk0000041f/sig00000e4d ), + .CLK(clk), + .D(\blk00000003/sig000003f7 ), + .Q(\blk00000003/blk0000041f/sig00000e4a ), + .Q15(\NLW_blk00000003/blk0000041f/blk0000042e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041f/blk0000042d ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk0000041f/sig00000e44 ), + .A3(\blk00000003/blk0000041f/sig00000e44 ), + .CE(\blk00000003/blk0000041f/sig00000e4d ), + .CLK(clk), + .D(\blk00000003/sig000003f8 ), + .Q(\blk00000003/blk0000041f/sig00000e49 ), + .Q15(\NLW_blk00000003/blk0000041f/blk0000042d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041f/blk0000042c ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk0000041f/sig00000e44 ), + .A3(\blk00000003/blk0000041f/sig00000e44 ), + .CE(\blk00000003/blk0000041f/sig00000e4d ), + .CLK(clk), + .D(\blk00000003/sig000003f9 ), + .Q(\blk00000003/blk0000041f/sig00000e48 ), + .Q15(\NLW_blk00000003/blk0000041f/blk0000042c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041f/blk0000042b ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk0000041f/sig00000e44 ), + .A3(\blk00000003/blk0000041f/sig00000e44 ), + .CE(\blk00000003/blk0000041f/sig00000e4d ), + .CLK(clk), + .D(\blk00000003/sig000003fa ), + .Q(\blk00000003/blk0000041f/sig00000e47 ), + .Q15(\NLW_blk00000003/blk0000041f/blk0000042b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041f/blk0000042a ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk0000041f/sig00000e44 ), + .A3(\blk00000003/blk0000041f/sig00000e44 ), + .CE(\blk00000003/blk0000041f/sig00000e4d ), + .CLK(clk), + .D(\blk00000003/sig000003fb ), + .Q(\blk00000003/blk0000041f/sig00000e46 ), + .Q15(\NLW_blk00000003/blk0000041f/blk0000042a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000041f/blk00000429 ( + .A0(\blk00000003/sig00000689 ), + .A1(\blk00000003/sig00000687 ), + .A2(\blk00000003/blk0000041f/sig00000e44 ), + .A3(\blk00000003/blk0000041f/sig00000e44 ), + .CE(\blk00000003/blk0000041f/sig00000e4d ), + .CLK(clk), + .D(\blk00000003/sig000003fc ), + .Q(\blk00000003/blk0000041f/sig00000e45 ), + .Q15(\NLW_blk00000003/blk0000041f/blk00000429_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041f/blk00000428 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041f/sig00000e4c ), + .Q(\blk00000003/sig00000589 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041f/blk00000427 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041f/sig00000e4b ), + .Q(\blk00000003/sig0000058a ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041f/blk00000426 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041f/sig00000e4a ), + .Q(\blk00000003/sig0000058b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041f/blk00000425 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041f/sig00000e49 ), + .Q(\blk00000003/sig0000058c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041f/blk00000424 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041f/sig00000e48 ), + .Q(\blk00000003/sig0000058d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041f/blk00000423 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041f/sig00000e47 ), + .Q(\blk00000003/sig0000058e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041f/blk00000422 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041f/sig00000e46 ), + .Q(\blk00000003/sig0000058f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000041f/blk00000421 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000041f/sig00000e45 ), + .Q(\blk00000003/sig00000590 ) + ); + GND \blk00000003/blk0000041f/blk00000420 ( + .G(\blk00000003/blk0000041f/sig00000e44 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000432/blk00000444 ( + .I0(\blk00000003/sig00000679 ), + .I1(ce), + .O(\blk00000003/blk00000432/sig00000e6c ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000432/blk00000443 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000432/sig00000e63 ), + .A3(\blk00000003/blk00000432/sig00000e63 ), + .CE(\blk00000003/blk00000432/sig00000e6c ), + .CLK(clk), + .D(\blk00000003/sig0000075d ), + .Q(\blk00000003/blk00000432/sig00000e6b ), + .Q15(\NLW_blk00000003/blk00000432/blk00000443_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000432/blk00000442 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000432/sig00000e63 ), + .A3(\blk00000003/blk00000432/sig00000e63 ), + .CE(\blk00000003/blk00000432/sig00000e6c ), + .CLK(clk), + .D(\blk00000003/sig0000075e ), + .Q(\blk00000003/blk00000432/sig00000e6a ), + .Q15(\NLW_blk00000003/blk00000432/blk00000442_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000432/blk00000441 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000432/sig00000e63 ), + .A3(\blk00000003/blk00000432/sig00000e63 ), + .CE(\blk00000003/blk00000432/sig00000e6c ), + .CLK(clk), + .D(\blk00000003/sig0000075f ), + .Q(\blk00000003/blk00000432/sig00000e69 ), + .Q15(\NLW_blk00000003/blk00000432/blk00000441_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000432/blk00000440 ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000432/sig00000e63 ), + .A3(\blk00000003/blk00000432/sig00000e63 ), + .CE(\blk00000003/blk00000432/sig00000e6c ), + .CLK(clk), + .D(\blk00000003/sig00000760 ), + .Q(\blk00000003/blk00000432/sig00000e68 ), + .Q15(\NLW_blk00000003/blk00000432/blk00000440_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000432/blk0000043f ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000432/sig00000e63 ), + .A3(\blk00000003/blk00000432/sig00000e63 ), + .CE(\blk00000003/blk00000432/sig00000e6c ), + .CLK(clk), + .D(\blk00000003/sig00000761 ), + .Q(\blk00000003/blk00000432/sig00000e67 ), + .Q15(\NLW_blk00000003/blk00000432/blk0000043f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000432/blk0000043e ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000432/sig00000e63 ), + .A3(\blk00000003/blk00000432/sig00000e63 ), + .CE(\blk00000003/blk00000432/sig00000e6c ), + .CLK(clk), + .D(\blk00000003/sig00000762 ), + .Q(\blk00000003/blk00000432/sig00000e66 ), + .Q15(\NLW_blk00000003/blk00000432/blk0000043e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000432/blk0000043d ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000432/sig00000e63 ), + .A3(\blk00000003/blk00000432/sig00000e63 ), + .CE(\blk00000003/blk00000432/sig00000e6c ), + .CLK(clk), + .D(\blk00000003/sig00000763 ), + .Q(\blk00000003/blk00000432/sig00000e65 ), + .Q15(\NLW_blk00000003/blk00000432/blk0000043d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000432/blk0000043c ( + .A0(\blk00000003/sig00000685 ), + .A1(\blk00000003/sig00000683 ), + .A2(\blk00000003/blk00000432/sig00000e63 ), + .A3(\blk00000003/blk00000432/sig00000e63 ), + .CE(\blk00000003/blk00000432/sig00000e6c ), + .CLK(clk), + .D(\blk00000003/sig00000764 ), + .Q(\blk00000003/blk00000432/sig00000e64 ), + .Q15(\NLW_blk00000003/blk00000432/blk0000043c_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000432/blk0000043b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000432/sig00000e6b ), + .Q(\blk00000003/sig00000581 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000432/blk0000043a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000432/sig00000e6a ), + .Q(\blk00000003/sig00000582 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000432/blk00000439 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000432/sig00000e69 ), + .Q(\blk00000003/sig00000583 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000432/blk00000438 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000432/sig00000e68 ), + .Q(\blk00000003/sig00000584 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000432/blk00000437 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000432/sig00000e67 ), + .Q(\blk00000003/sig00000585 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000432/blk00000436 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000432/sig00000e66 ), + .Q(\blk00000003/sig00000586 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000432/blk00000435 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000432/sig00000e65 ), + .Q(\blk00000003/sig00000587 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000432/blk00000434 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000432/sig00000e64 ), + .Q(\blk00000003/sig00000588 ) + ); + GND \blk00000003/blk00000432/blk00000433 ( + .G(\blk00000003/blk00000432/sig00000e63 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000445/blk00000457 ( + .I0(\blk00000003/sig0000068c ), + .I1(ce), + .O(\blk00000003/blk00000445/sig00000e8b ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000445/blk00000456 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000445/sig00000e82 ), + .A3(\blk00000003/blk00000445/sig00000e82 ), + .CE(\blk00000003/blk00000445/sig00000e8b ), + .CLK(clk), + .D(\blk00000003/sig00000765 ), + .Q(\blk00000003/blk00000445/sig00000e8a ), + .Q15(\NLW_blk00000003/blk00000445/blk00000456_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000445/blk00000455 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000445/sig00000e82 ), + .A3(\blk00000003/blk00000445/sig00000e82 ), + .CE(\blk00000003/blk00000445/sig00000e8b ), + .CLK(clk), + .D(\blk00000003/sig00000766 ), + .Q(\blk00000003/blk00000445/sig00000e89 ), + .Q15(\NLW_blk00000003/blk00000445/blk00000455_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000445/blk00000454 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000445/sig00000e82 ), + .A3(\blk00000003/blk00000445/sig00000e82 ), + .CE(\blk00000003/blk00000445/sig00000e8b ), + .CLK(clk), + .D(\blk00000003/sig00000767 ), + .Q(\blk00000003/blk00000445/sig00000e88 ), + .Q15(\NLW_blk00000003/blk00000445/blk00000454_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000445/blk00000453 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000445/sig00000e82 ), + .A3(\blk00000003/blk00000445/sig00000e82 ), + .CE(\blk00000003/blk00000445/sig00000e8b ), + .CLK(clk), + .D(\blk00000003/sig00000768 ), + .Q(\blk00000003/blk00000445/sig00000e87 ), + .Q15(\NLW_blk00000003/blk00000445/blk00000453_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000445/blk00000452 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000445/sig00000e82 ), + .A3(\blk00000003/blk00000445/sig00000e82 ), + .CE(\blk00000003/blk00000445/sig00000e8b ), + .CLK(clk), + .D(\blk00000003/sig00000769 ), + .Q(\blk00000003/blk00000445/sig00000e86 ), + .Q15(\NLW_blk00000003/blk00000445/blk00000452_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000445/blk00000451 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000445/sig00000e82 ), + .A3(\blk00000003/blk00000445/sig00000e82 ), + .CE(\blk00000003/blk00000445/sig00000e8b ), + .CLK(clk), + .D(\blk00000003/sig0000076a ), + .Q(\blk00000003/blk00000445/sig00000e85 ), + .Q15(\NLW_blk00000003/blk00000445/blk00000451_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000445/blk00000450 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000445/sig00000e82 ), + .A3(\blk00000003/blk00000445/sig00000e82 ), + .CE(\blk00000003/blk00000445/sig00000e8b ), + .CLK(clk), + .D(\blk00000003/sig0000076b ), + .Q(\blk00000003/blk00000445/sig00000e84 ), + .Q15(\NLW_blk00000003/blk00000445/blk00000450_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000445/blk0000044f ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk00000445/sig00000e82 ), + .A3(\blk00000003/blk00000445/sig00000e82 ), + .CE(\blk00000003/blk00000445/sig00000e8b ), + .CLK(clk), + .D(\blk00000003/sig0000076c ), + .Q(\blk00000003/blk00000445/sig00000e83 ), + .Q15(\NLW_blk00000003/blk00000445/blk0000044f_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000445/blk0000044e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000445/sig00000e8a ), + .Q(\blk00000003/sig000003a3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000445/blk0000044d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000445/sig00000e89 ), + .Q(\blk00000003/sig000003a4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000445/blk0000044c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000445/sig00000e88 ), + .Q(\blk00000003/sig000003a5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000445/blk0000044b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000445/sig00000e87 ), + .Q(\blk00000003/sig000003a6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000445/blk0000044a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000445/sig00000e86 ), + .Q(\blk00000003/sig000003a7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000445/blk00000449 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000445/sig00000e85 ), + .Q(\blk00000003/sig000003a8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000445/blk00000448 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000445/sig00000e84 ), + .Q(\blk00000003/sig000003a9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000445/blk00000447 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000445/sig00000e83 ), + .Q(\blk00000003/sig000003aa ) + ); + GND \blk00000003/blk00000445/blk00000446 ( + .G(\blk00000003/blk00000445/sig00000e82 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk00000458/blk0000046a ( + .I0(\blk00000003/sig0000068b ), + .I1(ce), + .O(\blk00000003/blk00000458/sig00000eaa ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000458/blk00000469 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk00000458/sig00000ea1 ), + .A3(\blk00000003/blk00000458/sig00000ea1 ), + .CE(\blk00000003/blk00000458/sig00000eaa ), + .CLK(clk), + .D(\blk00000003/sig0000076d ), + .Q(\blk00000003/blk00000458/sig00000ea9 ), + .Q15(\NLW_blk00000003/blk00000458/blk00000469_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000458/blk00000468 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk00000458/sig00000ea1 ), + .A3(\blk00000003/blk00000458/sig00000ea1 ), + .CE(\blk00000003/blk00000458/sig00000eaa ), + .CLK(clk), + .D(\blk00000003/sig0000076e ), + .Q(\blk00000003/blk00000458/sig00000ea8 ), + .Q15(\NLW_blk00000003/blk00000458/blk00000468_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000458/blk00000467 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk00000458/sig00000ea1 ), + .A3(\blk00000003/blk00000458/sig00000ea1 ), + .CE(\blk00000003/blk00000458/sig00000eaa ), + .CLK(clk), + .D(\blk00000003/sig0000076f ), + .Q(\blk00000003/blk00000458/sig00000ea7 ), + .Q15(\NLW_blk00000003/blk00000458/blk00000467_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000458/blk00000466 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk00000458/sig00000ea1 ), + .A3(\blk00000003/blk00000458/sig00000ea1 ), + .CE(\blk00000003/blk00000458/sig00000eaa ), + .CLK(clk), + .D(\blk00000003/sig00000770 ), + .Q(\blk00000003/blk00000458/sig00000ea6 ), + .Q15(\NLW_blk00000003/blk00000458/blk00000466_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000458/blk00000465 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk00000458/sig00000ea1 ), + .A3(\blk00000003/blk00000458/sig00000ea1 ), + .CE(\blk00000003/blk00000458/sig00000eaa ), + .CLK(clk), + .D(\blk00000003/sig00000771 ), + .Q(\blk00000003/blk00000458/sig00000ea5 ), + .Q15(\NLW_blk00000003/blk00000458/blk00000465_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000458/blk00000464 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk00000458/sig00000ea1 ), + .A3(\blk00000003/blk00000458/sig00000ea1 ), + .CE(\blk00000003/blk00000458/sig00000eaa ), + .CLK(clk), + .D(\blk00000003/sig00000772 ), + .Q(\blk00000003/blk00000458/sig00000ea4 ), + .Q15(\NLW_blk00000003/blk00000458/blk00000464_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000458/blk00000463 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk00000458/sig00000ea1 ), + .A3(\blk00000003/blk00000458/sig00000ea1 ), + .CE(\blk00000003/blk00000458/sig00000eaa ), + .CLK(clk), + .D(\blk00000003/sig00000773 ), + .Q(\blk00000003/blk00000458/sig00000ea3 ), + .Q15(\NLW_blk00000003/blk00000458/blk00000463_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk00000458/blk00000462 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk00000458/sig00000ea1 ), + .A3(\blk00000003/blk00000458/sig00000ea1 ), + .CE(\blk00000003/blk00000458/sig00000eaa ), + .CLK(clk), + .D(\blk00000003/sig00000774 ), + .Q(\blk00000003/blk00000458/sig00000ea2 ), + .Q15(\NLW_blk00000003/blk00000458/blk00000462_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000458/blk00000461 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000458/sig00000ea9 ), + .Q(\blk00000003/sig0000039b ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000458/blk00000460 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000458/sig00000ea8 ), + .Q(\blk00000003/sig0000039c ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000458/blk0000045f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000458/sig00000ea7 ), + .Q(\blk00000003/sig0000039d ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000458/blk0000045e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000458/sig00000ea6 ), + .Q(\blk00000003/sig0000039e ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000458/blk0000045d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000458/sig00000ea5 ), + .Q(\blk00000003/sig0000039f ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000458/blk0000045c ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000458/sig00000ea4 ), + .Q(\blk00000003/sig000003a0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000458/blk0000045b ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000458/sig00000ea3 ), + .Q(\blk00000003/sig000003a1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk00000458/blk0000045a ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk00000458/sig00000ea2 ), + .Q(\blk00000003/sig000003a2 ) + ); + GND \blk00000003/blk00000458/blk00000459 ( + .G(\blk00000003/blk00000458/sig00000ea1 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000046b/blk0000047d ( + .I0(\blk00000003/sig0000068c ), + .I1(ce), + .O(\blk00000003/blk0000046b/sig00000ec9 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000046b/blk0000047c ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000046b/sig00000ec0 ), + .A3(\blk00000003/blk0000046b/sig00000ec0 ), + .CE(\blk00000003/blk0000046b/sig00000ec9 ), + .CLK(clk), + .D(\blk00000003/sig00000775 ), + .Q(\blk00000003/blk0000046b/sig00000ec8 ), + .Q15(\NLW_blk00000003/blk0000046b/blk0000047c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000046b/blk0000047b ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000046b/sig00000ec0 ), + .A3(\blk00000003/blk0000046b/sig00000ec0 ), + .CE(\blk00000003/blk0000046b/sig00000ec9 ), + .CLK(clk), + .D(\blk00000003/sig00000776 ), + .Q(\blk00000003/blk0000046b/sig00000ec7 ), + .Q15(\NLW_blk00000003/blk0000046b/blk0000047b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000046b/blk0000047a ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000046b/sig00000ec0 ), + .A3(\blk00000003/blk0000046b/sig00000ec0 ), + .CE(\blk00000003/blk0000046b/sig00000ec9 ), + .CLK(clk), + .D(\blk00000003/sig00000777 ), + .Q(\blk00000003/blk0000046b/sig00000ec6 ), + .Q15(\NLW_blk00000003/blk0000046b/blk0000047a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000046b/blk00000479 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000046b/sig00000ec0 ), + .A3(\blk00000003/blk0000046b/sig00000ec0 ), + .CE(\blk00000003/blk0000046b/sig00000ec9 ), + .CLK(clk), + .D(\blk00000003/sig00000778 ), + .Q(\blk00000003/blk0000046b/sig00000ec5 ), + .Q15(\NLW_blk00000003/blk0000046b/blk00000479_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000046b/blk00000478 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000046b/sig00000ec0 ), + .A3(\blk00000003/blk0000046b/sig00000ec0 ), + .CE(\blk00000003/blk0000046b/sig00000ec9 ), + .CLK(clk), + .D(\blk00000003/sig00000779 ), + .Q(\blk00000003/blk0000046b/sig00000ec4 ), + .Q15(\NLW_blk00000003/blk0000046b/blk00000478_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000046b/blk00000477 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000046b/sig00000ec0 ), + .A3(\blk00000003/blk0000046b/sig00000ec0 ), + .CE(\blk00000003/blk0000046b/sig00000ec9 ), + .CLK(clk), + .D(\blk00000003/sig0000077a ), + .Q(\blk00000003/blk0000046b/sig00000ec3 ), + .Q15(\NLW_blk00000003/blk0000046b/blk00000477_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000046b/blk00000476 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000046b/sig00000ec0 ), + .A3(\blk00000003/blk0000046b/sig00000ec0 ), + .CE(\blk00000003/blk0000046b/sig00000ec9 ), + .CLK(clk), + .D(\blk00000003/sig0000077b ), + .Q(\blk00000003/blk0000046b/sig00000ec2 ), + .Q15(\NLW_blk00000003/blk0000046b/blk00000476_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000046b/blk00000475 ( + .A0(\blk00000003/sig00000387 ), + .A1(\blk00000003/sig00000386 ), + .A2(\blk00000003/blk0000046b/sig00000ec0 ), + .A3(\blk00000003/blk0000046b/sig00000ec0 ), + .CE(\blk00000003/blk0000046b/sig00000ec9 ), + .CLK(clk), + .D(\blk00000003/sig0000077c ), + .Q(\blk00000003/blk0000046b/sig00000ec1 ), + .Q15(\NLW_blk00000003/blk0000046b/blk00000475_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000046b/blk00000474 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000046b/sig00000ec8 ), + .Q(\blk00000003/sig000003f5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000046b/blk00000473 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000046b/sig00000ec7 ), + .Q(\blk00000003/sig000003f6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000046b/blk00000472 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000046b/sig00000ec6 ), + .Q(\blk00000003/sig000003f7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000046b/blk00000471 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000046b/sig00000ec5 ), + .Q(\blk00000003/sig000003f8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000046b/blk00000470 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000046b/sig00000ec4 ), + .Q(\blk00000003/sig000003f9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000046b/blk0000046f ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000046b/sig00000ec3 ), + .Q(\blk00000003/sig000003fa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000046b/blk0000046e ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000046b/sig00000ec2 ), + .Q(\blk00000003/sig000003fb ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000046b/blk0000046d ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000046b/sig00000ec1 ), + .Q(\blk00000003/sig000003fc ) + ); + GND \blk00000003/blk0000046b/blk0000046c ( + .G(\blk00000003/blk0000046b/sig00000ec0 ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk0000047e/blk00000490 ( + .I0(\blk00000003/sig0000068b ), + .I1(ce), + .O(\blk00000003/blk0000047e/sig00000ee8 ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000047e/blk0000048f ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000047e/sig00000edf ), + .A3(\blk00000003/blk0000047e/sig00000edf ), + .CE(\blk00000003/blk0000047e/sig00000ee8 ), + .CLK(clk), + .D(\blk00000003/sig0000077d ), + .Q(\blk00000003/blk0000047e/sig00000ee7 ), + .Q15(\NLW_blk00000003/blk0000047e/blk0000048f_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000047e/blk0000048e ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000047e/sig00000edf ), + .A3(\blk00000003/blk0000047e/sig00000edf ), + .CE(\blk00000003/blk0000047e/sig00000ee8 ), + .CLK(clk), + .D(\blk00000003/sig0000077e ), + .Q(\blk00000003/blk0000047e/sig00000ee6 ), + .Q15(\NLW_blk00000003/blk0000047e/blk0000048e_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000047e/blk0000048d ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000047e/sig00000edf ), + .A3(\blk00000003/blk0000047e/sig00000edf ), + .CE(\blk00000003/blk0000047e/sig00000ee8 ), + .CLK(clk), + .D(\blk00000003/sig0000077f ), + .Q(\blk00000003/blk0000047e/sig00000ee5 ), + .Q15(\NLW_blk00000003/blk0000047e/blk0000048d_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000047e/blk0000048c ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000047e/sig00000edf ), + .A3(\blk00000003/blk0000047e/sig00000edf ), + .CE(\blk00000003/blk0000047e/sig00000ee8 ), + .CLK(clk), + .D(\blk00000003/sig00000780 ), + .Q(\blk00000003/blk0000047e/sig00000ee4 ), + .Q15(\NLW_blk00000003/blk0000047e/blk0000048c_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000047e/blk0000048b ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000047e/sig00000edf ), + .A3(\blk00000003/blk0000047e/sig00000edf ), + .CE(\blk00000003/blk0000047e/sig00000ee8 ), + .CLK(clk), + .D(\blk00000003/sig00000781 ), + .Q(\blk00000003/blk0000047e/sig00000ee3 ), + .Q15(\NLW_blk00000003/blk0000047e/blk0000048b_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000047e/blk0000048a ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000047e/sig00000edf ), + .A3(\blk00000003/blk0000047e/sig00000edf ), + .CE(\blk00000003/blk0000047e/sig00000ee8 ), + .CLK(clk), + .D(\blk00000003/sig00000782 ), + .Q(\blk00000003/blk0000047e/sig00000ee2 ), + .Q15(\NLW_blk00000003/blk0000047e/blk0000048a_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000047e/blk00000489 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000047e/sig00000edf ), + .A3(\blk00000003/blk0000047e/sig00000edf ), + .CE(\blk00000003/blk0000047e/sig00000ee8 ), + .CLK(clk), + .D(\blk00000003/sig00000783 ), + .Q(\blk00000003/blk0000047e/sig00000ee1 ), + .Q15(\NLW_blk00000003/blk0000047e/blk00000489_Q15_UNCONNECTED ) + ); + SRLC16E #( + .INIT ( 16'h0000 )) + \blk00000003/blk0000047e/blk00000488 ( + .A0(\blk00000003/sig0000038e ), + .A1(\blk00000003/sig0000038d ), + .A2(\blk00000003/blk0000047e/sig00000edf ), + .A3(\blk00000003/blk0000047e/sig00000edf ), + .CE(\blk00000003/blk0000047e/sig00000ee8 ), + .CLK(clk), + .D(\blk00000003/sig00000784 ), + .Q(\blk00000003/blk0000047e/sig00000ee0 ), + .Q15(\NLW_blk00000003/blk0000047e/blk00000488_Q15_UNCONNECTED ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047e/blk00000487 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000047e/sig00000ee7 ), + .Q(\blk00000003/sig000003ed ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047e/blk00000486 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000047e/sig00000ee6 ), + .Q(\blk00000003/sig000003ee ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047e/blk00000485 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000047e/sig00000ee5 ), + .Q(\blk00000003/sig000003ef ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047e/blk00000484 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000047e/sig00000ee4 ), + .Q(\blk00000003/sig000003f0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047e/blk00000483 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000047e/sig00000ee3 ), + .Q(\blk00000003/sig000003f1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047e/blk00000482 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000047e/sig00000ee2 ), + .Q(\blk00000003/sig000003f2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047e/blk00000481 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000047e/sig00000ee1 ), + .Q(\blk00000003/sig000003f3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk0000047e/blk00000480 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk0000047e/sig00000ee0 ), + .Q(\blk00000003/sig000003f4 ) + ); + GND \blk00000003/blk0000047e/blk0000047f ( + .G(\blk00000003/blk0000047e/sig00000edf ) + ); + LUT2 #( + .INIT ( 4'h8 )) + \blk00000003/blk000004e1/blk00000507 ( + .I0(\blk00000003/sig00000305 ), + .I1(ce), + .O(\blk00000003/blk000004e1/sig00000f25 ) + ); + RAM16X1D #( + .INIT ( 16'h0000 )) + \blk00000003/blk000004e1/blk00000506 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig0000070d ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk00000506_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f24 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk00000505 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig0000070e ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk00000505_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f23 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk00000504 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig0000070f ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk00000504_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f22 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk00000503 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000710 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk00000503_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f21 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk00000502 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000711 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk00000502_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f20 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk00000501 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000712 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk00000501_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f1f ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk00000500 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000714 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk00000500_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f1d ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004ff ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000715 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004ff_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f1c ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004fe ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000713 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004fe_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f1e ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004fd ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000716 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004fd_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f1b ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004fc ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000717 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004fc_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f1a ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004fb ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000718 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004fb_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f19 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004fa ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig00000719 ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004fa_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f18 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004f9 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig0000071a ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004f9_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f17 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004f8 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig0000071b ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004f8_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f16 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004f7 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig0000071d ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004f7_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f14 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004f6 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig0000071e ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004f6_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f13 ) + ); + RAM16X1D #( + .INIT ( 16'h0001 )) + \blk00000003/blk000004e1/blk000004f5 ( + .A0(\blk00000003/sig0000030c ), + .A1(\blk00000003/blk000004e1/sig00000f12 ), + .A2(\blk00000003/blk000004e1/sig00000f12 ), + .A3(\blk00000003/blk000004e1/sig00000f12 ), + .D(\blk00000003/sig0000071c ), + .DPRA0(\blk00000003/sig00000786 ), + .DPRA1(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA2(\blk00000003/blk000004e1/sig00000f12 ), + .DPRA3(\blk00000003/blk000004e1/sig00000f12 ), + .WCLK(clk), + .WE(\blk00000003/blk000004e1/sig00000f25 ), + .SPO(\NLW_blk00000003/blk000004e1/blk000004f5_SPO_UNCONNECTED ), + .DPO(\blk00000003/blk000004e1/sig00000f15 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004f4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f24 ), + .Q(\blk00000003/sig000001a8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004f3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f23 ), + .Q(\blk00000003/sig000001a9 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004f2 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f22 ), + .Q(\blk00000003/sig000001aa ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004f1 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f21 ), + .Q(\blk00000003/sig000001ab ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004f0 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f20 ), + .Q(\blk00000003/sig000001ac ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004ef ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f1f ), + .Q(\blk00000003/sig000001ad ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004ee ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f1e ), + .Q(\blk00000003/sig000001ae ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004ed ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f1d ), + .Q(\blk00000003/sig000001af ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004ec ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f1c ), + .Q(\blk00000003/sig000001b0 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004eb ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f1b ), + .Q(\blk00000003/sig000001b1 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004ea ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f1a ), + .Q(\blk00000003/sig000001b2 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004e9 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f19 ), + .Q(\blk00000003/sig000001b3 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004e8 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f18 ), + .Q(\blk00000003/sig000001b4 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004e7 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f17 ), + .Q(\blk00000003/sig000001b5 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004e6 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f16 ), + .Q(\blk00000003/sig000001b6 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004e5 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f15 ), + .Q(\blk00000003/sig000001b7 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004e4 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f14 ), + .Q(\blk00000003/sig000001b8 ) + ); + FDE #( + .INIT ( 1'b0 )) + \blk00000003/blk000004e1/blk000004e3 ( + .C(clk), + .CE(ce), + .D(\blk00000003/blk000004e1/sig00000f13 ), + .Q(\blk00000003/sig000001b9 ) + ); + GND \blk00000003/blk000004e1/blk000004e2 ( + .G(\blk00000003/blk000004e1/sig00000f12 ) + ); + +// synthesis translate_on + +endmodule + +// synthesis translate_off + +`ifndef GLBL +`define GLBL + +`timescale 1 ps / 1 ps + +module glbl (); + + parameter ROC_WIDTH = 100000; + parameter TOC_WIDTH = 0; + +//-------- STARTUP Globals -------------- + wire GSR; + wire GTS; + wire GWE; + wire PRLD; + tri1 p_up_tmp; + tri (weak1, strong0) PLL_LOCKG = p_up_tmp; + + wire PROGB_GLBL; + wire CCLKO_GLBL; + + reg GSR_int; + reg GTS_int; + reg PRLD_int; + +//-------- JTAG Globals -------------- + wire JTAG_TDO_GLBL; + wire JTAG_TCK_GLBL; + wire JTAG_TDI_GLBL; + wire JTAG_TMS_GLBL; + wire JTAG_TRST_GLBL; + + reg JTAG_CAPTURE_GLBL; + reg JTAG_RESET_GLBL; + reg JTAG_SHIFT_GLBL; + reg JTAG_UPDATE_GLBL; + reg JTAG_RUNTEST_GLBL; + + reg JTAG_SEL1_GLBL = 0; + reg JTAG_SEL2_GLBL = 0 ; + reg JTAG_SEL3_GLBL = 0; + reg JTAG_SEL4_GLBL = 0; + + reg JTAG_USER_TDO1_GLBL = 1'bz; + reg JTAG_USER_TDO2_GLBL = 1'bz; + reg JTAG_USER_TDO3_GLBL = 1'bz; + reg JTAG_USER_TDO4_GLBL = 1'bz; + + assign (weak1, weak0) GSR = GSR_int; + assign (weak1, weak0) GTS = GTS_int; + assign (weak1, weak0) PRLD = PRLD_int; + + initial begin + GSR_int = 1'b1; + PRLD_int = 1'b1; + #(ROC_WIDTH) + GSR_int = 1'b0; + PRLD_int = 1'b0; + end + + initial begin + GTS_int = 1'b1; + #(TOC_WIDTH) + GTS_int = 1'b0; + end + +endmodule + +`endif + +// synthesis translate_on diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.veo b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.veo new file mode 100644 index 000000000..ce561daa2 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.veo @@ -0,0 +1,79 @@ +/******************************************************************************* +* (c) Copyright 1995 - 2010 Xilinx, Inc. All rights reserved. * +* * +* This file contains confidential and proprietary information * +* of Xilinx, Inc. and is protected under U.S. and * +* international copyright and other intellectual property * +* laws. * +* * +* DISCLAIMER * +* This disclaimer is not a license and does not grant any * +* rights to the materials distributed herewith. Except as * +* otherwise provided in a valid license issued to you by * +* Xilinx, and to the maximum extent permitted by applicable * +* law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND * +* WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES * +* AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING * +* BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- * +* INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and * +* (2) Xilinx shall not be liable (whether in contract or tort, * +* including negligence, or under any other theory of * +* liability) for any loss or damage of any kind or nature * +* related to, arising under or in connection with these * +* materials, including for any direct, or any indirect, * +* special, incidental, or consequential loss or damage * +* (including loss of data, profits, goodwill, or any type of * +* loss or damage suffered as a result of any action brought * +* by a third party) even if such damage or loss was * +* reasonably foreseeable or Xilinx had been advised of the * +* possibility of the same. * +* * +* CRITICAL APPLICATIONS * +* Xilinx products are not designed or intended to be fail- * +* safe, or for use in any application requiring fail-safe * +* performance, such as life-support or safety devices or * +* systems, Class III medical devices, nuclear facilities, * +* applications related to the deployment of airbags, or any * +* other applications that could lead to death, personal * +* injury, or severe property or environmental damage * +* (individually and collectively, "Critical * +* Applications"). Customer assumes the sole risk and * +* liability of any use of Xilinx products in Critical * +* Applications, subject only to applicable laws and * +* regulations governing limitations on product liability. * +* * +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS * +* PART OF THIS FILE AT ALL TIMES. * +*******************************************************************************/ + +// Generated from component ID: xilinx.com:ip:fir_compiler:5.0 + + +// The following must be inserted into your Verilog file for this +// core to be instantiated. Change the instance name and port connections +// (in parentheses) to your own signal names. + +//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG +hbdec2 YourInstanceName ( + .sclr(sclr), // input sclr + .clk(clk), // input clk + .ce(ce), // input ce + .nd(nd), // input nd + .coef_ld(coef_ld), // input coef_ld + .coef_we(coef_we), // input coef_we + .coef_din(coef_din), // input [17 : 0] coef_din + .rfd(rfd), // output rfd + .rdy(rdy), // output rdy + .data_valid(data_valid), // output data_valid + .din_1(din_1), // input [23 : 0] din_1 + .din_2(din_2), // input [23 : 0] din_2 + .dout_1(dout_1), // output [46 : 0] dout_1 + .dout_2(dout_2)); // output [46 : 0] dout_2 + +// INST_TAG_END ------ End INSTANTIATION Template --------- + +// You must compile the wrapper file hbdec2.v when simulating +// the core, hbdec2. When compiling the wrapper file, be sure to +// reference the XilinxCoreLib Verilog simulation library. For detailed +// instructions, please refer to the "CORE Generator Help". + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.xco b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.xco new file mode 100644 index 000000000..52eba9c26 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2.xco @@ -0,0 +1,102 @@ +############################################################## +# +# Xilinx Core Generator version 14.7 +# Date: Tue Jun 9 23:48:14 2015 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# Generated from component: xilinx.com:ip:fir_compiler:5.0 +# +############################################################## +# +# BEGIN Project Options +SET addpads = false +SET asysymbol = true +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = false +SET designentry = Verilog +SET device = xc6slx75 +SET devicefamily = spartan6 +SET flowvendor = Other +SET formalverification = false +SET foundationsym = false +SET implementationfiletype = Ngc +SET package = fgg484 +SET removerpms = false +SET simulationfiles = Behavioral +SET speedgrade = -3 +SET verilogsim = true +SET vhdlsim = false +# END Project Options +# BEGIN Select +SELECT FIR_Compiler family Xilinx,_Inc. 5.0 +# END Select +# BEGIN Parameters +CSET allow_rounding_approximation=false +CSET bestprecision=false +CSET chan_in_adv=0 +CSET clock_frequency=64 +CSET coefficient_buffer_type=Automatic +CSET coefficient_file=./hb47.coe +CSET coefficient_fractional_bits=0 +CSET coefficient_reload=true +CSET coefficient_sets=1 +CSET coefficient_sign=Signed +CSET coefficient_structure=Half_Band +CSET coefficient_width=18 +CSET coefficientsource=COE_File +CSET coefficientvector=6,0,-4,-3,5,6,-6,-13,7,44,64,44,7,-13,-6,6,5,-3,-4,0,6 +CSET columnconfig=4 +CSET component_name=hbdec2 +CSET data_buffer_type=Automatic +CSET data_fractional_bits=0 +CSET data_sign=Signed +CSET data_width=24 +CSET decimation_rate=2 +CSET displayreloadorder=false +CSET filter_architecture=Systolic_Multiply_Accumulate +CSET filter_selection=1 +CSET filter_type=Decimation +CSET gui_behaviour=Coregen +CSET hardwareoversamplingrate=1 +CSET has_ce=true +CSET has_data_valid=true +CSET has_nd=true +CSET has_sclr=true +CSET input_buffer_type=Automatic +CSET inter_column_pipe_length=4 +CSET interpolation_rate=1 +CSET multi_column_support=Disabled +CSET number_channels=1 +CSET number_paths=2 +CSET optimization_goal=Area +CSET output_buffer_type=Automatic +CSET output_rounding_mode=Full_Precision +CSET output_width=47 +CSET passband_max=0.5 +CSET passband_min=0.0 +CSET preference_for_other_storage=Automatic +CSET quantization=Integer_Coefficients +CSET rate_change_type=Integer +CSET ratespecification=Frequency_Specification +CSET registered_output=true +CSET sample_frequency=32 +CSET sampleperiod=1 +CSET sclr_deterministic=true +CSET stopband_max=1.0 +CSET stopband_min=0.5 +CSET usechan_in_adv=false +CSET zero_pack_factor=1 +# END Parameters +# BEGIN Extra information +MISC pkg_timestamp=2013-10-13T18:46:09Z +# END Extra information +GENERATE +# CRC: 7b386b7e diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto0_0.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto0_0.mif new file mode 100644 index 000000000..079623297 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto0_0.mif @@ -0,0 +1,9 @@ +111111111111000010 +000000000011000010 +111111111001001000 +000000001101010111 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto0_1.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto0_1.mif new file mode 100644 index 000000000..d4a0b357e --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto0_1.mif @@ -0,0 +1,9 @@ +111111101000011111 +000000100110101110 +111111000011000100 +000001011101100110 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto0_2.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto0_2.mif new file mode 100644 index 000000000..6d9d6044f --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto0_2.mif @@ -0,0 +1,9 @@ +111101110000011101 +000011100100101000 +111001100001011000 +010100010001000001 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto_HALFBAND_CENTRE0.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto_HALFBAND_CENTRE0.mif new file mode 100644 index 000000000..ca072e0fc --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2COEFF_auto_HALFBAND_CENTRE0.mif @@ -0,0 +1,3 @@ +011111111111111111 +000000000000000000 +000000000000000000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_flist.txt b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_flist.txt new file mode 100644 index 000000000..d0a6a5443 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_flist.txt @@ -0,0 +1,19 @@ +# Output products list for <hbdec2> +hbdec2.asy +hbdec2.gise +hbdec2.mif +hbdec2.ngc +hbdec2.v +hbdec2.veo +hbdec2.xco +hbdec2.xise +hbdec2COEFF_auto0_0.mif +hbdec2COEFF_auto0_1.mif +hbdec2COEFF_auto0_2.mif +hbdec2COEFF_auto_HALFBAND_CENTRE0.mif +hbdec2_flist.txt +hbdec2_readme.txt +hbdec2_reload_addrfilt_decode_rom.mif +hbdec2_reload_order.txt +hbdec2_xmdf.tcl +hbdec2filt_decode_rom.mif diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_readme.txt b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_readme.txt new file mode 100644 index 000000000..0b9324f9b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_readme.txt @@ -0,0 +1,73 @@ +The following files were generated for 'hbdec2' in directory +/home/mwest/git/fpgadev/usrp3/top/b205/coregen_dsp/ + +Opens the IP Customization GUI: + Allows the user to customize or recustomize the IP instance. + + * hbdec2.mif + * hbdec2_reload_order.txt + +ISE file generator: + Add description here... + + * hbdec2_flist.txt + +Model Parameter Resolution: + Resolves generated model parameter values on the component instance. + + * hbdec2.mif + * hbdec2_reload_order.txt + +XCO file generator: + Generate an XCO file for compatibility with legacy flows. + + * hbdec2.xco + +Creates an implementation netlist: + Creates an implementation netlist for the IP. + + * hbdec2.ngc + * hbdec2.v + * hbdec2.veo + * hbdec2COEFF_auto0_0.mif + * hbdec2COEFF_auto0_1.mif + * hbdec2COEFF_auto0_2.mif + * hbdec2COEFF_auto_HALFBAND_CENTRE0.mif + * hbdec2_reload_addrfilt_decode_rom.mif + * hbdec2filt_decode_rom.mif + +Creates an HDL instantiation template: + Creates an HDL instantiation template for the IP. + + * hbdec2.veo + +IP Symbol Generator: + Generate an IP symbol based on the current project options'. + + * hbdec2.asy + +Generate ISE metadata: + Create a metadata file for use when including this core in ISE designs + + * hbdec2_xmdf.tcl + +Generate ISE subproject: + Create an ISE subproject for use when including this core in ISE designs + + * hbdec2.gise + * hbdec2.xise + +Deliver Readme: + Readme file for the IP. + + * hbdec2_readme.txt + +Generate FLIST file: + Text file listing all of the output files produced when a customized core was + generated in the CORE Generator. + + * hbdec2_flist.txt + +Please see the Xilinx CORE Generator online help for further details on +generated files and how to use them. + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_reload_addrfilt_decode_rom.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_reload_addrfilt_decode_rom.mif new file mode 100644 index 000000000..92e61d005 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_reload_addrfilt_decode_rom.mif @@ -0,0 +1,17 @@ +000 +100 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_reload_order.txt b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_reload_order.txt new file mode 100644 index 000000000..071b84e5b --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_reload_order.txt @@ -0,0 +1,25 @@ +Reload index 0 = Index 16 +Reload index 1 = Index 18 +Reload index 2 = Index 20 +Reload index 3 = Index 22 +Reload index 4 = Index 8 +Reload index 5 = Index 10 +Reload index 6 = Index 12 +Reload index 7 = Index 14 +Reload index 8 = Index 0 +Reload index 9 = Index 2 +Reload index 10 = Index 4 +Reload index 11 = Index 6 +Reload index 12 = Index 23 +Reload index 13 = Index 0 +Reload index 14 = Index 0 +Reload index 15 = Index 0 +Reload index 16 = Index 0 +Reload index 17 = Index 0 +Reload index 18 = Index 0 +Reload index 19 = Index 0 +Reload index 20 = Index 0 +Reload index 21 = Index 0 +Reload index 22 = Index 0 +Reload index 23 = Index 0 + diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_xmdf.tcl b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_xmdf.tcl new file mode 100644 index 000000000..efebbe070 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2_xmdf.tcl @@ -0,0 +1,99 @@ +# The package naming convention is <core_name>_xmdf +package provide hbdec2_xmdf 1.0 + +# This includes some utilities that support common XMDF operations +package require utilities_xmdf + +# Define a namespace for this package. The name of the name space +# is <core_name>_xmdf +namespace eval ::hbdec2_xmdf { +# Use this to define any statics +} + +# Function called by client to rebuild the params and port arrays +# Optional when the use context does not require the param or ports +# arrays to be available. +proc ::hbdec2_xmdf::xmdfInit { instance } { +# Variable containing name of library into which module is compiled +# Recommendation: <module_name> +# Required +utilities_xmdf::xmdfSetData $instance Module Attributes Name hbdec2 +} +# ::hbdec2_xmdf::xmdfInit + +# Function called by client to fill in all the xmdf* data variables +# based on the current settings of the parameters +proc ::hbdec2_xmdf::xmdfApplyParams { instance } { + +set fcount 0 +# Array containing libraries that are assumed to exist +# Examples include unisim and xilinxcorelib +# Optional +# In this example, we assume that the unisim library will +# be available to the simulation and synthesis tool +utilities_xmdf::xmdfSetData $instance FileSet $fcount type logical_library +utilities_xmdf::xmdfSetData $instance FileSet $fcount logical_library unisim +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2.asy +utilities_xmdf::xmdfSetData $instance FileSet $fcount type asy +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2.ngc +utilities_xmdf::xmdfSetData $instance FileSet $fcount type ngc +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2.v +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2.veo +utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog_template +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2.xco +utilities_xmdf::xmdfSetData $instance FileSet $fcount type coregen_ip +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2COEFF_auto0_0.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2COEFF_auto0_1.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2COEFF_auto0_2.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2COEFF_auto_HALFBAND_CENTRE0.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2_reload_addrfilt_decode_rom.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2_reload_order.txt +utilities_xmdf::xmdfSetData $instance FileSet $fcount type text +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2_xmdf.tcl +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path hbdec2filt_decode_rom.mif +utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView +incr fcount + +utilities_xmdf::xmdfSetData $instance FileSet $fcount associated_module hbdec2 +incr fcount + +} + +# ::gen_comp_name_xmdf::xmdfApplyParams diff --git a/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2filt_decode_rom.mif b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2filt_decode_rom.mif new file mode 100644 index 000000000..92e61d005 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/coregen_dsp/hbdec2filt_decode_rom.mif @@ -0,0 +1,17 @@ +000 +100 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 +000 diff --git a/fpga/usrp3/top/b2xxmini/timing.ucf b/fpga/usrp3/top/b2xxmini/timing.ucf new file mode 100644 index 000000000..b10e37a14 --- /dev/null +++ b/fpga/usrp3/top/b2xxmini/timing.ucf @@ -0,0 +1,38 @@ +# 40 MHz main tcxo clock +NET "CLK_40MHz_FPGA*" TNM_NET = "CLK_40MHz_FPGA"; +TIMESPEC "TS_CLK_40MHz_FPGA" = PERIOD "CLK_40MHz_FPGA" 25000 ps HIGH 50 %; + +# 100 MHz GPIF clock +NET "FX3_PCLK" TNM_NET = "FX3_PCLK"; +TIMESPEC "TS_FX3_PCLK" = PERIOD "FX3_PCLK" 10000 ps HIGH 50 %; + +# data clock from catalina, sample rate dependent +# this clock equals sample rate in CMOS DDR 1R1T mode +# this clock is double the sample rate in CMOS DDR 2R2T mode +# Max clock rate is 61.44 MHz +NET "CAT_DCLK_P" TNM_NET = "CAT_DCLK_P"; +TIMESPEC "TS_CAT_DCLK_P" = PERIOD "CAT_DCLK_P" 16276 ps HIGH 50 %; + +#always use IOB for GPIF pins for awesome timing +INST "FX3_DQ*" IOB = TRUE; +INST "FX3_CTL*" IOB = TRUE; + +#low speed misc output group +INST "cFE_SEL_*" TNM = radio_misc_out; # Radio Clk domain +INST "cLED_*" TNM = radio_misc_out; # Radio Clk domain +INST "cTXDRV_PWEN*" TNM = radio_misc_out; # Radio Clk domain +INST "CAT_EN" TNM = ls_misc_out; # Bus clk domain + combinatorial +INST "CAT_SPI_EN" TNM = ls_misc_out; # Bus clk domain +INST "CAT_SPI_CLK" TNM = ls_misc_out; # Bus clk domain +INST "CAT_SPI_DO" TNM = ls_misc_out; # Bus clk domain (I) +INST "CAT_SPI_DI" TNM = ls_misc_out; # Bus clk domain + combinatorial +INST "CLK_40M_DAC_nSYNC" TNM = ls_misc_out; # Bus clk domain +INST "CLK_40M_DAC_SCLK" TNM = ls_misc_out; # Bus clk domain +INST "CLK_40M_DAC_DIN" TNM = ls_misc_out; # Bus clk domain + +#constrain the misc IOs to the clocks +NET "bus_clk" TNM_NET = "bus_clk"; +TIMESPEC "TS_bus_clk" = PERIOD "bus_clk" 10 ns HIGH 50 %; +TIMEGRP "ls_misc_out" OFFSET = OUT 15 ns AFTER "bus_clk" RISING; +TIMEGRP "radio_misc_out" OFFSET = OUT 15 ns AFTER "radio_clk" RISING; + |