diff options
Diffstat (limited to 'fpga/usrp3/lib/sim/eth_dispatch')
| -rw-r--r-- | fpga/usrp3/lib/sim/eth_dispatch/default.wcfg | 220 | ||||
| -rwxr-xr-x | fpga/usrp3/lib/sim/eth_dispatch/run_sim | 16 | ||||
| -rw-r--r-- | fpga/usrp3/lib/sim/eth_dispatch/simulation_script.v | 78 |
3 files changed, 0 insertions, 314 deletions
diff --git a/fpga/usrp3/lib/sim/eth_dispatch/default.wcfg b/fpga/usrp3/lib/sim/eth_dispatch/default.wcfg deleted file mode 100644 index f9178c2de..000000000 --- a/fpga/usrp3/lib/sim/eth_dispatch/default.wcfg +++ /dev/null @@ -1,220 +0,0 @@ -<?xml version="1.0" encoding="UTF-8"?> -<wave_config> - <wave_state> - </wave_state> - <db_ref_list> - <db_ref path="./isim.wdb" id="1" type="auto"> - <top_modules> - <top_module name="eth_dispatch_tb" /> - <top_module name="glbl" /> - </top_modules> - </db_ref> - </db_ref_list> - <WVObjectSize size="47" /> - <wvobject fp_name="/eth_dispatch_tb/clk" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">clk</obj_property> - <obj_property name="ObjectShortName">clk</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/reset" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">reset</obj_property> - <obj_property name="ObjectShortName">reset</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/set_stb" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">set_stb</obj_property> - <obj_property name="ObjectShortName">set_stb</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/set_addr" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">set_addr[15:0]</obj_property> - <obj_property name="ObjectShortName">set_addr[15:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/set_data" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">set_data[31:0]</obj_property> - <obj_property name="ObjectShortName">set_data[31:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/in_tdata" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">in_tdata[63:0]</obj_property> - <obj_property name="ObjectShortName">in_tdata[63:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/in_tuser" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">in_tuser[3:0]</obj_property> - <obj_property name="ObjectShortName">in_tuser[3:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/in_tvalid" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">in_tvalid</obj_property> - <obj_property name="ObjectShortName">in_tvalid</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/in_tready" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">in_tready</obj_property> - <obj_property name="ObjectShortName">in_tready</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/in_tlast" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">in_tlast</obj_property> - <obj_property name="ObjectShortName">in_tlast</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/vita_tdata" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">vita_tdata[63:0]</obj_property> - <obj_property name="ObjectShortName">vita_tdata[63:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/vita_tvalid" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">vita_tvalid</obj_property> - <obj_property name="ObjectShortName">vita_tvalid</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/vita_tready" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">vita_tready</obj_property> - <obj_property name="ObjectShortName">vita_tready</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/vita_tlast" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">vita_tlast</obj_property> - <obj_property name="ObjectShortName">vita_tlast</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/zpu_tdata" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">zpu_tdata[63:0]</obj_property> - <obj_property name="ObjectShortName">zpu_tdata[63:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/zpu_tuser" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">zpu_tuser[3:0]</obj_property> - <obj_property name="ObjectShortName">zpu_tuser[3:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/zpu_tvalid" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">zpu_tvalid</obj_property> - <obj_property name="ObjectShortName">zpu_tvalid</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/zpu_tready" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">zpu_tready</obj_property> - <obj_property name="ObjectShortName">zpu_tready</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/zpu_tlast" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">zpu_tlast</obj_property> - <obj_property name="ObjectShortName">zpu_tlast</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/xo_tdata" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">xo_tdata[63:0]</obj_property> - <obj_property name="ObjectShortName">xo_tdata[63:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/xo_tuser" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">xo_tuser[3:0]</obj_property> - <obj_property name="ObjectShortName">xo_tuser[3:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/xo_tvalid" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">xo_tvalid</obj_property> - <obj_property name="ObjectShortName">xo_tvalid</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/xo_tready" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">xo_tready</obj_property> - <obj_property name="ObjectShortName">xo_tready</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/xo_tlast" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">xo_tlast</obj_property> - <obj_property name="ObjectShortName">xo_tlast</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/xo_pre_tdata" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">xo_pre_tdata[63:0]</obj_property> - <obj_property name="ObjectShortName">xo_pre_tdata[63:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/xo_pre_tuser" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">xo_pre_tuser[3:0]</obj_property> - <obj_property name="ObjectShortName">xo_pre_tuser[3:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/xo_pre_tlast" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">xo_pre_tlast</obj_property> - <obj_property name="ObjectShortName">xo_pre_tlast</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/xo_pre_tvalid" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">xo_pre_tvalid</obj_property> - <obj_property name="ObjectShortName">xo_pre_tvalid</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/xo_pre_tready" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">xo_pre_tready</obj_property> - <obj_property name="ObjectShortName">xo_pre_tready</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/state" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">state[2:0]</obj_property> - <obj_property name="ObjectShortName">state[2:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/header_ram_addr" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">header_ram_addr[3:0]</obj_property> - <obj_property name="ObjectShortName">header_ram_addr[3:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/header_done" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">header_done</obj_property> - <obj_property name="ObjectShortName">header_done</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/out_tlast" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">out_tlast</obj_property> - <obj_property name="ObjectShortName">out_tlast</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/is_eth_dst_addr" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">is_eth_dst_addr</obj_property> - <obj_property name="ObjectShortName">is_eth_dst_addr</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/is_eth_broadcast" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">is_eth_broadcast</obj_property> - <obj_property name="ObjectShortName">is_eth_broadcast</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/is_eth_type_ipv4" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">is_eth_type_ipv4</obj_property> - <obj_property name="ObjectShortName">is_eth_type_ipv4</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/is_ipv4_dst_addr" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">is_ipv4_dst_addr</obj_property> - <obj_property name="ObjectShortName">is_ipv4_dst_addr</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/is_ipv4_proto_udp" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">is_ipv4_proto_udp</obj_property> - <obj_property name="ObjectShortName">is_ipv4_proto_udp</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/is_udp_dst_ports" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">is_udp_dst_ports[1:0]</obj_property> - <obj_property name="ObjectShortName">is_udp_dst_ports[1:0]</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/my_mac" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">my_mac[47:0]</obj_property> - <obj_property name="ObjectShortName">my_mac[47:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/my_ip" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">my_ip[31:0]</obj_property> - <obj_property name="ObjectShortName">my_ip[31:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/my_port0" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">my_port0[15:0]</obj_property> - <obj_property name="ObjectShortName">my_port0[15:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/my_port1" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">my_port1[15:0]</obj_property> - <obj_property name="ObjectShortName">my_port1[15:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/axi_fifo_vita/rd_addr" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">rd_addr[9:0]</obj_property> - <obj_property name="ObjectShortName">rd_addr[9:0]</obj_property> - <obj_property name="Radix">HEXRADIX</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/axi_fifo_vita/empty_reg" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">empty_reg</obj_property> - <obj_property name="ObjectShortName">empty_reg</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/axi_fifo_vita/read" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">read</obj_property> - <obj_property name="ObjectShortName">read</obj_property> - </wvobject> - <wvobject fp_name="/eth_dispatch_tb/eth_dispatch_i/axi_fifo_vita/ram/dob" type="array" db_ref_id="1"> - <obj_property name="ElementShortName">dob[68:0]</obj_property> - <obj_property name="ObjectShortName">dob[68:0]</obj_property> - </wvobject> -</wave_config> diff --git a/fpga/usrp3/lib/sim/eth_dispatch/run_sim b/fpga/usrp3/lib/sim/eth_dispatch/run_sim deleted file mode 100755 index 3fda278f8..000000000 --- a/fpga/usrp3/lib/sim/eth_dispatch/run_sim +++ /dev/null @@ -1,16 +0,0 @@ -vlogcomp -work work ${XILINX}/verilog/src/glbl.v -vlogcomp -work work ../../packet_proc/eth_dispatch_tb.v -vlogcomp -work work ../../packet_proc/eth_dispatch.v -vlogcomp -work work ../../fifo/axi_fifo_short.v -vlogcomp -work work ../../fifo/axi_fifo.v -vlogcomp -work work ../../control/ram_2port.v -vlogcomp -work work ../../control/setting_reg.v -vlogcomp -work work ../../sim/axi_probe_tb.v - - - - -fuse work.eth_dispatch_tb work.glbl -L unisims_ver -L xilinxcorelib_ver -o eth_dispatch_tb.exe - -# run the simulation scrip -./eth_dispatch_tb.exe -gui #-tclbatch simcmds.tcl diff --git a/fpga/usrp3/lib/sim/eth_dispatch/simulation_script.v b/fpga/usrp3/lib/sim/eth_dispatch/simulation_script.v deleted file mode 100644 index 7e1df0fba..000000000 --- a/fpga/usrp3/lib/sim/eth_dispatch/simulation_script.v +++ /dev/null @@ -1,78 +0,0 @@ - - -initial $dumpfile("eth_dispatch_tb.vcd"); -initial $dumpvars(0,eth_dispatch_tb); - - reg [15:0] x; - - localparam MAC=48'h010203040506; - localparam IP=(192<<24)|(168<<16)|2; - localparam PORT0=60000; - localparam PORT1=60001; - - - initial - begin - @(posedge clk); - reset <= 1; - repeat (5) @(posedge clk); - @(posedge clk); - reset <= 0; - @(posedge clk); - // Set my MAC address - write_setting_bus(0,MAC&32'hFFFFFFFF); - write_setting_bus(1,MAC>>32); - // Set my IP Address - write_setting_bus(2,IP); - // Set UDP ports for ViTA traffic - write_setting_bus(3,PORT1<<16|PORT0); - @(posedge clk); - enqueue_vita_pkt(MAC,IP,PORT0,10,0,{16'h0,8'hf,8'h5}); - enqueue_vita_pkt(MAC,IP,16'h1234,10,0,{16'h0,8'h5,8'hc}); - enqueue_vita_pkt(48'h223344556677,32'h02030405,16'h1234,10,0,{16'h0,8'hd,8'h7}); - enqueue_arp_req(48'h112233445566,32'h09080706,MAC,IP); - -/* -----\/----- EXCLUDED -----\/----- - // 2x2 Switch so only mask one bit of SID for route dest. - // Each slave must have a unique address, logic doesn't check for this. - // - // Network Addr 0 & 1 go to Slave 0. - write_setting_bus(0,0); // 0.X goes to Port 0 - write_setting_bus(1,0); // 1.X goes to Port 0 - // Local Addr = 2 - write_setting_bus(512,2); - // Host Addr 0 & 2 go to Slave 0... - write_setting_bus(256,0); // 2.0 goes to Port 0 - write_setting_bus(258,0); // 2.2 goes to Port 0 - // ...Host Addr 1 & 3 go to Slave 1... - write_setting_bus(257,1); // 2.1 goes to Port 1 - write_setting_bus(259,1); // 2.3 goes to Port 1 - // - @(posedge clk); - fork - begin - // Master0, addr 0.0 to Slave0 - enqueue_vita_pkt(0,10,0,{16'h0,8'h0,8'h0}); - // Master0, addr 2.0 to Slave0 - enqueue_vita_pkt(0,11,'h12345678,{16'h0,8'h2,8'h0}); - // Master0, addr 2.3 to Slave1 - enqueue_vita_pkt(0,14,'h45678901,{16'h0,8'h2,8'h3}); - // Master0, addr 2.2 to Slave0 - enqueue_vita_pkt(0,11,'h67890123,{16'h0,8'h2,8'h2}); - end - begin - // Master1, addr 1.0 to Slave0 - enqueue_vita_pkt(1,12,'h23456789,{16'h0,8'h1,8'h0}); - // Master1, addr 2.1 to Slave1 - enqueue_vita_pkt(1,13,'h34567890,{16'h0,8'h2,8'h1}); - // Master1, addr 2.3 to Slave1 - enqueue_vita_pkt(1,14,'h56789012,{16'h0,8'h2,8'h3}); - end - join - -----/\----- EXCLUDED -----/\----- */ - - repeat (1000) @(posedge clk); - $finish; - - end // initial begin - |