aboutsummaryrefslogtreecommitdiffstats
path: root/fpga/usrp2/control_lib/atr_controller16.v
diff options
context:
space:
mode:
Diffstat (limited to 'fpga/usrp2/control_lib/atr_controller16.v')
-rw-r--r--fpga/usrp2/control_lib/atr_controller16.v7
1 files changed, 5 insertions, 2 deletions
diff --git a/fpga/usrp2/control_lib/atr_controller16.v b/fpga/usrp2/control_lib/atr_controller16.v
index ff4f634c7..727f8c630 100644
--- a/fpga/usrp2/control_lib/atr_controller16.v
+++ b/fpga/usrp2/control_lib/atr_controller16.v
@@ -47,8 +47,11 @@ module atr_controller16
atr_ram[adr_i[5:2]][7:0] <= dat_i[7:0];
end // if (we_i & stb_i & cyc_i)
- always @(posedge clk_i)
- dat_o <= adr_i[1] ? atr_ram[adr_i[5:2]][31:16] : atr_ram[adr_i[5:2]][15:0];
+ // Removing readback allows ram to be synthesized as LUTs instead of regs
+ //always @(posedge clk_i)
+ // dat_o <= adr_i[1] ? atr_ram[adr_i[5:2]][31:16] : atr_ram[adr_i[5:2]][15:0];
+ always
+ dat_o <= 16'd0;
always @(posedge clk_i)
ack_o <= stb_i & cyc_i & ~ack_o;