connect GPMC pins to debug bus

2 files changed, 94 insertions, 76 deletions

diff --git a/usrp2/top/safe_u1e/safe_u1e.ucf b/usrp2/top/safe_u1e/safe_u1e.ucf
index 16265c203..14389f299 100644
--- a/usrp2/top/safe_u1e/safe_u1e.ucf
+++ b/usrp2/top/safe_u1e/safe_u1e.ucf
@@ -3,7 +3,52 @@ NET "CLK_FPGA_P"  LOC = "Y11"  ;
 NET "CLK_FPGA_N"  LOC = "Y10"  ;
 
 ## GPMC
-#NET "EM_CLK"  LOC = "F11"  ;
+NET "EM_CLK"  LOC = "F11"  ;
+
+NET "EM_D<15>"  LOC = "D13"  ;
+NET "EM_D<14>"  LOC = "D15"  ;
+NET "EM_D<13>"  LOC = "C16"  ;
+NET "EM_D<12>"  LOC = "B20"  ;
+NET "EM_D<11>"  LOC = "A19"  ;
+NET "EM_D<10>"  LOC = "A17"  ;
+NET "EM_D<9>"  LOC = "E15"  ;
+NET "EM_D<8>"  LOC = "F15"  ;
+NET "EM_D<7>"  LOC = "E16"  ;
+NET "EM_D<6>"  LOC = "F16"  ;
+NET "EM_D<5>"  LOC = "B17"  ;
+NET "EM_D<4>"  LOC = "C17"  ;
+NET "EM_D<3>"  LOC = "B19"  ;
+NET "EM_D<2>"  LOC = "D19"  ;
+NET "EM_D<1>"  LOC = "C19"  ;
+NET "EM_D<0>"  LOC = "A20"  ;
+
+NET "EM_A<10>"  LOC = "C14"  ;
+NET "EM_A<9>"  LOC = "C10"  ;
+NET "EM_A<8>"  LOC = "C5"  ;
+NET "EM_A<7>"  LOC = "A18"  ;
+NET "EM_A<6>"  LOC = "A15"  ;
+NET "EM_A<5>"  LOC = "A12"  ;
+NET "EM_A<4>"  LOC = "A10"  ;
+NET "EM_A<3>"  LOC = "E7"  ;
+NET "EM_A<2>"  LOC = "A7"  ;
+NET "EM_A<1>"  LOC = "C15"  ;
+
+#NET "EM_NCS6"  LOC = "E17"  ;
+#NET "EM_NCS5"  LOC = "E10"  ;
+NET "EM_NCS4"  LOC = "E6"  ;
+#NET "EM_NCS1"  LOC = "D18"  ;
+#NET "EM_NCS0"  LOC = "D17"  ;
+
+NET "EM_WAIT0"  LOC = "F14"  ;
+#NET "EM_NBE1"  LOC = "D14"  ;
+#NET "EM_NBE0"  LOC = "A13"  ;
+NET "EM_NWP"  LOC = "F13"  ;
+NET "EM_NWE"  LOC = "B13"  ;
+NET "EM_NOE"  LOC = "A14"  ;
+NET "EM_NADV_ALE"  LOC = "B15"  ;
+
+
+## Overo GPIO
 #NET "overo_gpio23"  LOC = "B3"  ;
 #NET "overo_gpio22"  LOC = "A3"  ;
 #NET "overo_gpio21"  LOC = "D5"  ;
@@ -20,47 +65,12 @@ NET "CLK_FPGA_N"  LOC = "Y10"  ;
 #NET "overo_gpio128"  LOC = "G8"  ;
 #NET "overo_gpio0"  LOC = "F9"  ;
 #NET "overo_gpio127"  LOC = "C8"  ;
+
+## Overo UART
 #NET "overo_txd1"  LOC = "C6"  ;
 #NET "overo_rxd1"  LOC = "D6"  ;
-#NET "EM_WAIT0"  LOC = "F14"  ;
-#NET "EM_NWP"  LOC = "F13"  ;
-#NET "EM_NBE1"  LOC = "D14"  ;
-#NET "EM_NBE0"  LOC = "A13"  ;
-#NET "EM_NWE"  LOC = "B13"  ;
-#NET "EM_NOE"  LOC = "A14"  ;
-#NET "EM_NADV_ALE"  LOC = "B15"  ;
-#NET "EM_D15"  LOC = "D13"  ;
-#NET "EM_D14"  LOC = "D15"  ;
-#NET "EM_D13"  LOC = "C16"  ;
-#NET "EM_D12"  LOC = "B20"  ;
-#NET "EM_D11"  LOC = "A19"  ;
-#NET "EM_D10"  LOC = "A17"  ;
-#NET "EM_D9"  LOC = "E15"  ;
-#NET "EM_D8"  LOC = "F15"  ;
-#NET "EM_D7"  LOC = "E16"  ;
-#NET "EM_D6"  LOC = "F16"  ;
-#NET "EM_D5"  LOC = "B17"  ;
-#NET "EM_D4"  LOC = "C17"  ;
-#NET "EM_D3"  LOC = "B19"  ;
-#NET "EM_D2"  LOC = "D19"  ;
-#NET "EM_D1"  LOC = "C19"  ;
-#NET "EM_D0"  LOC = "A20"  ;
+
 #NET "SYSEN"  LOC = "C11"  ;
-#NET "EM_NCS6"  LOC = "E17"  ;
-#NET "EM_NCS5"  LOC = "E10"  ;
-#NET "EM_NCS4"  LOC = "E6"  ;
-#NET "EM_NCS1"  LOC = "D18"  ;
-#NET "EM_NCS0"  LOC = "D17"  ;
-#NET "EM_A10"  LOC = "C14"  ;
-#NET "EM_A9"  LOC = "C10"  ;
-#NET "EM_A8"  LOC = "C5"  ;
-#NET "EM_A7"  LOC = "A18"  ;
-#NET "EM_A6"  LOC = "A15"  ;
-#NET "EM_A5"  LOC = "A12"  ;
-#NET "EM_A4"  LOC = "A10"  ;
-#NET "EM_A3"  LOC = "E7"  ;
-#NET "EM_A2"  LOC = "A7"  ;
-#NET "EM_A1"  LOC = "C15"  ;
 
 #NET "db_scl"  LOC = "U4"  ;
 #NET "db_sda"  LOC = "U5"  ;
@@ -83,38 +93,40 @@ NET "CLK_FPGA_N"  LOC = "Y10"  ;
 NET "debug_led<2>"  LOC = "T5"  ;
 NET "debug_led<1>"  LOC = "R2"  ;
 NET "debug_led<0>"  LOC = "R1"  ;
-#NET "debug<0>"  LOC = "P6"  ;
-#NET "debug<1>"  LOC = "R6"  ;
-#NET "debug<2>"  LOC = "P1"  ;
-#NET "debug<3>"  LOC = "P2"  ;
-#NET "debug<4>"  LOC = "N6"  ;
-#NET "debug<5>"  LOC = "N5"  ;
-#NET "debug<6>"  LOC = "N1"  ;
-#NET "debug<7>"  LOC = "K2"  ;
-#NET "debug<8>"  LOC = "K3"  ;
-#NET "debug<9>"  LOC = "K6"  ;
-#NET "debug<10>"  LOC = "L5"  ;
-#NET "debug<11>"  LOC = "H2"  ;
-#NET "debug<12>"  LOC = "K4"  ;
-#NET "debug<13>"  LOC = "K5"  ;
-#NET "debug<14>"  LOC = "G1"  ;
-#NET "debug<15>"  LOC = "H1"  ;
-#NET "debug<16>"  LOC = "H5"  ;
-#NET "debug<17>"  LOC = "H6"  ;
-#NET "debug<18>"  LOC = "E3"  ;
-#NET "debug<19>"  LOC = "E4"  ;
-#NET "debug<20>"  LOC = "G5"  ;
-#NET "debug<21>"  LOC = "G6"  ;
-#NET "debug<22>"  LOC = "F2"  ;
-#NET "debug<23>"  LOC = "F1"  ;
-#NET "debug<24>"  LOC = "H3"  ;
-#NET "debug<25>"  LOC = "H4"  ;
-#NET "debug<26>"  LOC = "F4"  ;
-#NET "debug<27>"  LOC = "F5"  ;
-#NET "debug<28>"  LOC = "C2"  ;
-#NET "debug<29>"  LOC = "C1"  ;
-#NET "debug<30>"  LOC = "F3"  ;
-#NET "debug<31>"  LOC = "G3"  ;
+NET "debug<0>"  LOC = "P6"  ;
+NET "debug<1>"  LOC = "R6"  ;
+NET "debug<2>"  LOC = "P1"  ;
+NET "debug<3>"  LOC = "P2"  ;
+NET "debug<4>"  LOC = "N6"  ;
+NET "debug<5>"  LOC = "N5"  ;
+NET "debug<6>"  LOC = "N1"  ;
+NET "debug<7>"  LOC = "K2"  ;
+NET "debug<8>"  LOC = "K3"  ;
+NET "debug<9>"  LOC = "K6"  ;
+NET "debug<10>"  LOC = "L5"  ;
+NET "debug<11>"  LOC = "H2"  ;
+NET "debug<12>"  LOC = "K4"  ;
+NET "debug<13>"  LOC = "K5"  ;
+NET "debug<14>"  LOC = "G1"  ;
+NET "debug<15>"  LOC = "H1"  ;
+NET "debug<16>"  LOC = "H5"  ;
+NET "debug<17>"  LOC = "H6"  ;
+NET "debug<18>"  LOC = "E3"  ;
+NET "debug<19>"  LOC = "E4"  ;
+NET "debug<20>"  LOC = "G5"  ;
+NET "debug<21>"  LOC = "G6"  ;
+NET "debug<22>"  LOC = "F2"  ;
+NET "debug<23>"  LOC = "F1"  ;
+NET "debug<24>"  LOC = "H3"  ;
+NET "debug<25>"  LOC = "H4"  ;
+NET "debug<26>"  LOC = "F4"  ;
+NET "debug<27>"  LOC = "F5"  ;
+NET "debug<28>"  LOC = "C2"  ;
+NET "debug<29>"  LOC = "C1"  ;
+NET "debug<30>"  LOC = "F3"  ;
+NET "debug<31>"  LOC = "G3"  ;
+NET "debug_clk<0>"  LOC = "L6"  ;
+NET "debug_clk<1>"  LOC = "M5"  ;
 
 #NET "debug_pb<2>"  LOC = "Y2"  ;
 #NET "debug_pb<1>"  LOC = "AA1"  ;
@@ -134,8 +146,6 @@ NET "debug_led<0>"  LOC = "R1"  ;
 #NET "cgen_st_refmon"  LOC = "E1"  ;
 #NET "cgen_sync_b"  LOC = "M1"  ;
 #NET "cgen_ref_sel"  LOC = "J1"  ;
-#NET "debug_clk0"  LOC = "L6"  ;
-#NET "debug_clk1"  LOC = "M5"  ;
 #NET "GND"  LOC = "V19"  ;
 #NET "fpga_cfg_prog_b"  LOC = "A2"  ;
 #NET "fpga_cfg_done"  LOC = "AB21"  ;
diff --git a/usrp2/top/safe_u1e/safe_u1e.v b/usrp2/top/safe_u1e/safe_u1e.v
index 1b81bab5a..3f16d941c 100644
--- a/usrp2/top/safe_u1e/safe_u1e.v
+++ b/usrp2/top/safe_u1e/safe_u1e.v
@@ -4,7 +4,11 @@
 module safe_u1e
   (
    input CLK_FPGA_P, input CLK_FPGA_N,  // Diff
-   output [2:0] debug_led
+   output [2:0] debug_led, output [31:0] debug, output [1:0] debug_clk,
+
+   // GPMC
+   input EM_CLK, input [15:0] EM_D, input [10:1] EM_A, 
+   input EM_WAIT0, input EM_NCS4, input EM_NWP, input EM_NWE, input EM_NOE, input EM_NADV_ALE
    );
 
    // FPGA-specific pins connections
@@ -13,11 +17,15 @@ module safe_u1e
    IBUFGDS #(.IOSTANDARD("LVDS_33"), .DIFF_TERM("TRUE")) 
    clk_fpga_pin (.O(clk_fpga),.I(CLK_FPGA_P),.IB(CLK_FPGA_N));
 
+   // Debug circuitry
    reg [31:0] 	ctr;
-
    always @(posedge clk_fpga)
      ctr <= ctr + 1;
 
+   
    assign debug_led = ctr[27:25];
-
+   assign debug_clk = { EM_CLK, clk_fpga };
+   assign debug = { { EM_WAIT0, EM_NADV_ALE, EM_NWP, EM_NCS4, EM_NWE, EM_NOE, EM_A[10:1] },
+		    { EM_D } };
+   
 endmodule // safe_u2plus