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| author | Josh Blum <josh@joshknows.com> | 2011-01-09 20:49:28 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-01-09 20:49:28 -0800 |
| commit | 8941a9c3bf41244d28edc59683e827b0ea004ee7 (patch) | |
| tree | eadd66fa49c326c6a23beba7bd98c5e997480225 /usrp2/top/u2plus/u2plus_core.v | |
| parent | 0ea88d916515fffb78cefa6ab46191f7557e2fa3 (diff) | |
| download | uhd-8941a9c3bf41244d28edc59683e827b0ea004ee7.tar.gz uhd-8941a9c3bf41244d28edc59683e827b0ea004ee7.tar.bz2 uhd-8941a9c3bf41244d28edc59683e827b0ea004ee7.zip | |
usrp-n210: use cpu rst on the wb+icap, uploaded latest bootloader rmi
Diffstat (limited to 'usrp2/top/u2plus/u2plus_core.v')
| -rw-r--r-- | usrp2/top/u2plus/u2plus_core.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/u2plus/u2plus_core.v b/usrp2/top/u2plus/u2plus_core.v index 4ec00f995..168d78e73 100644 --- a/usrp2/top/u2plus/u2plus_core.v +++ b/usrp2/top/u2plus/u2plus_core.v @@ -589,7 +589,7 @@ module u2plus_core // ICAP for reprogramming the FPGA, Slave #13 (D) s3a_icap_wb s3a_icap_wb - (.clk(wb_clk), .reset(wb_rst), .cyc_i(sd_cyc), .stb_i(sd_stb), + (.clk(wb_clk), .reset(cpu_rst), .cyc_i(sd_cyc), .stb_i(sd_stb), .we_i(sd_we), .ack_o(sd_ack), .dat_i(sd_dat_o), .dat_o(sd_dat_i)); // ///////////////////////////////////////////////////////////////////////// |