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| author | Ian Buckley <ianb@server2.(none)> | 2010-07-31 00:15:16 -0700 |
|---|---|---|
| committer | Ian Buckley <ianb@server2.(none)> | 2010-07-31 00:15:16 -0700 |
| commit | 2e5effd0b664413c4d3cbbe08d3d841eee051dcc (patch) | |
| tree | 009241d3b66a8442ad48990062bd44659abeae78 /usrp2/coregen/coregen.cgp | |
| parent | 8cd762bdbcbd6a43a2fcc1c0b523cc14bfd7ab69 (diff) | |
| download | uhd-2e5effd0b664413c4d3cbbe08d3d841eee051dcc.tar.gz uhd-2e5effd0b664413c4d3cbbe08d3d841eee051dcc.tar.bz2 uhd-2e5effd0b664413c4d3cbbe08d3d841eee051dcc.zip | |
External FIFO tested in simulation and on USRP2 from decimation 64->8 with current head UHD code.
Apparently operation is "flawless" but more regression and corner case regression could and should be done.
Tristate drivers have been added at the top level of the hierarchy for the SRAM databus as is considered good
practice for both Xilinx and ASIC design flows and so both top level and core fils have been touched.
Diffstat (limited to 'usrp2/coregen/coregen.cgp')
| -rw-r--r-- | usrp2/coregen/coregen.cgp | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/usrp2/coregen/coregen.cgp b/usrp2/coregen/coregen.cgp index 810d64dac..4c9201aff 100644 --- a/usrp2/coregen/coregen.cgp +++ b/usrp2/coregen/coregen.cgp @@ -1,20 +1,22 @@ -# Date: Thu Sep 3 17:40:48 2009 -SET addpads = False -SET asysymbol = False +# Date: Mon Jul 26 21:55:33 2010 + +SET addpads = false +SET asysymbol = false SET busformat = BusFormatAngleBracketNotRipped -SET createndf = False +SET createndf = false SET designentry = Verilog SET device = xc3s2000 SET devicefamily = spartan3 SET flowvendor = Other -SET formalverification = False -SET foundationsym = False +SET formalverification = false +SET foundationsym = false SET implementationfiletype = Ngc SET package = fg456 -SET removerpms = False +SET removerpms = false SET simulationfiles = Behavioral SET speedgrade = -5 -SET verilogsim = True -SET vhdlsim = False -SET workingdirectory = /home/matt/coregen/tmp +SET verilogsim = true +SET vhdlsim = false +SET workingdirectory = /tmp/ +# CRC: 394da717 |