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| author | Matt Ettus <matt@ettus.com> | 2010-04-01 17:05:50 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-04-01 17:05:50 -0700 |
| commit | 52c8d239ac4b2c448a15b7cc2e2cadf6f296c3e0 (patch) | |
| tree | 42cf33184b93430a31b2fa410f267ed07e3ef10c /usrp2/control_lib/settings_bus_16LE.v | |
| parent | cce4104964c1e1930f85dbb0bb8b8f33086bd75e (diff) | |
| download | uhd-52c8d239ac4b2c448a15b7cc2e2cadf6f296c3e0.tar.gz uhd-52c8d239ac4b2c448a15b7cc2e2cadf6f296c3e0.tar.bz2 uhd-52c8d239ac4b2c448a15b7cc2e2cadf6f296c3e0.zip | |
added 16-bit wide atr controller
settings_bus_16 now handles variable address window sizes
split ctrl of nsgpio into ctrl (selector) and debug bits
Diffstat (limited to 'usrp2/control_lib/settings_bus_16LE.v')
| -rw-r--r-- | usrp2/control_lib/settings_bus_16LE.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/control_lib/settings_bus_16LE.v b/usrp2/control_lib/settings_bus_16LE.v index fbef9b1c9..76061e9e0 100644 --- a/usrp2/control_lib/settings_bus_16LE.v +++ b/usrp2/control_lib/settings_bus_16LE.v @@ -5,7 +5,7 @@ // The setting regs are strobed when the high 16 bits are written module settings_bus_16LE - #(parameter AWIDTH=16) + #(parameter AWIDTH=16, RWIDTH=8) (input wb_clk, input wb_rst, input [AWIDTH-1:0] wb_adr_i, @@ -28,7 +28,7 @@ module settings_bus_16LE end else if(wb_we_i & wb_stb_i) begin - addr <= wb_adr_i[9:2]; + addr <= wb_adr_i[RWIDTH+1:2]; // Zero pad high bits if(wb_adr_i[1]) begin stb_int <= 1'b1; // We now have both halves |