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| author | Matt Ettus <matt@ettus.com> | 2010-05-28 22:01:36 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-05-28 22:01:36 -0700 |
| commit | 657ba0d98a97112d478b832737d97d90bddd4b71 (patch) | |
| tree | e229c78ed1e8edcea194e814018239867162e30f /usrp2/control_lib/ram_harvard.v | |
| parent | d4791a6257d31503d4ce4895181a90b5d9972cfe (diff) | |
| parent | a1284e5d02fbb9e0b7cf541a9ffe501707d37c8c (diff) | |
| download | uhd-657ba0d98a97112d478b832737d97d90bddd4b71.tar.gz uhd-657ba0d98a97112d478b832737d97d90bddd4b71.tar.bz2 uhd-657ba0d98a97112d478b832737d97d90bddd4b71.zip | |
Merge branch 'new_ramloader' into nocache_plus_newramloader, plus manual merge into udp version.
Raw ethernet, ISE 10 -- Passes timing, works
UDP, ISE 10 -- barely fails timing, works
ISE 12 -- both fail timing, not tested yet.
* new_ramloader:
experimental mods to make ram loader fully synchronous. Based on IJB's work
Diffstat (limited to 'usrp2/control_lib/ram_harvard.v')
| -rw-r--r-- | usrp2/control_lib/ram_harvard.v | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/usrp2/control_lib/ram_harvard.v b/usrp2/control_lib/ram_harvard.v index 3c00f87c7..948f9b36f 100644 --- a/usrp2/control_lib/ram_harvard.v +++ b/usrp2/control_lib/ram_harvard.v @@ -13,10 +13,9 @@ module ram_harvard // Firmware download port. input [AWIDTH-1:0] ram_loader_adr_i, input [31:0] ram_loader_dat_i, - input ram_loader_stb_i, input [3:0] ram_loader_sel_i, + input ram_loader_stb_i, input ram_loader_we_i, - output ram_loader_ack_o, input ram_loader_done_i, // Instruction fetch port. input [AWIDTH-1:0] if_adr, @@ -35,9 +34,6 @@ module ram_harvard reg ack_d1; reg stb_d1; - - assign ram_loader_ack_o = ram_loader_stb_i; - dpram32 #(.AWIDTH(AWIDTH),.RAM_SIZE(RAM_SIZE)) sys_ram (.clk(wb_clk_i), @@ -46,7 +42,8 @@ module ram_harvard .dat1_o(if_data), .we1_i(ram_loader_done_i ? 1'b0 : ram_loader_we_i), .en1_i(ram_loader_done_i ? 1'b1 : ram_loader_stb_i), - .sel1_i(ram_loader_done_i ? 4'hF : ram_loader_sel_i), + //.sel1_i(ram_loader_done_i ? 4'hF : ram_loader_sel_i), + .sel1_i(ram_loader_sel_i), // Sel is only for writes anyway .adr2_i(dwb_adr_i), .dat2_i(dwb_dat_i), .dat2_o(dwb_dat_o), @@ -68,6 +65,5 @@ module ram_harvard stb_d1 <= 0; else stb_d1 <= dwb_stb_i; - -endmodule // ram_harv_cache +endmodule // ram_harvard |