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| author | Ashish Chaudhari <ashish@ettus.com> | 2015-07-09 12:38:04 -0700 | 
|---|---|---|
| committer | Ashish Chaudhari <ashish@ettus.com> | 2015-07-09 12:38:04 -0700 | 
| commit | f9c8dfbd8db24b64f305f04a2d1b83b84c16aa5f (patch) | |
| tree | 00ef286eeb33c9e3578d26068a4402591e230576 /host | |
| parent | d9656de88f7af77b39bfe9985f0ac7c623932d71 (diff) | |
| download | uhd-f9c8dfbd8db24b64f305f04a2d1b83b84c16aa5f.tar.gz uhd-f9c8dfbd8db24b64f305f04a2d1b83b84c16aa5f.tar.bz2 uhd-f9c8dfbd8db24b64f305f04a2d1b83b84c16aa5f.zip  | |
x300: Fixed Windows build issue in x300_clock_ctrl
Diffstat (limited to 'host')
| -rw-r--r-- | host/lib/usrp/x300/x300_clock_ctrl.cpp | 7 | 
1 files changed, 4 insertions, 3 deletions
diff --git a/host/lib/usrp/x300/x300_clock_ctrl.cpp b/host/lib/usrp/x300/x300_clock_ctrl.cpp index 350e9e9bc..266797bff 100644 --- a/host/lib/usrp/x300/x300_clock_ctrl.cpp +++ b/host/lib/usrp/x300/x300_clock_ctrl.cpp @@ -21,6 +21,7 @@  #include <uhd/utils/math.hpp>  #include <boost/cstdint.hpp>  #include <boost/format.hpp> +#include <boost/math/special_functions/round.hpp>  #include <stdexcept>  #include <cmath>  #include <cstdlib> @@ -281,18 +282,18 @@ public:              //The VCO is running too slowly for us to compensate the digital delay difference using              //analog delay. Do the best we can.              adly_en = true; -            adly_value = static_cast<boost::uint8_t>(round((ADLY_MAX_NS-ADLY_MIN_NS)/ADLY_RES_NS)); +            adly_value = static_cast<boost::uint8_t>(boost::math::round((ADLY_MAX_NS-ADLY_MIN_NS)/ADLY_RES_NS));              coerced_delay += ADLY_MAX_NS;          } else if (leftover_delay >= ADLY_MIN_NS && leftover_delay <= ADLY_MAX_NS) {              //The leftover delay can be compensated by the analog delay up to the analog delay resolution              adly_en = true; -            adly_value = static_cast<boost::uint8_t>(round((leftover_delay-ADLY_MIN_NS)/ADLY_RES_NS)); +            adly_value = static_cast<boost::uint8_t>(boost::math::round((leftover_delay-ADLY_MIN_NS)/ADLY_RES_NS));              coerced_delay += ADLY_MIN_NS+(ADLY_RES_NS*adly_value);          } else if (leftover_delay >= (ADLY_MIN_NS - half_vco_period_ns) && leftover_delay < ADLY_MIN_NS) {              //The leftover delay if less than the minimum supported analog delay but if we move the digital              //delay back by half a VCO cycle then it will be in the range of the analog delay. So do that!              adly_en = true; -            adly_value = static_cast<boost::uint8_t>(round((leftover_delay+half_vco_period_ns-ADLY_MIN_NS)/ADLY_RES_NS)); +            adly_value = static_cast<boost::uint8_t>(boost::math::round((leftover_delay+half_vco_period_ns-ADLY_MIN_NS)/ADLY_RES_NS));              half_shift_en = 1;              coerced_delay += ADLY_MIN_NS+(ADLY_RES_NS*adly_value)-half_vco_period_ns;          } else {  | 
