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| author | Martin Braun <martin.braun@ettus.com> | 2017-04-06 10:40:37 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-04-06 10:40:37 -0700 |
| commit | 8ad7324b51eecff5efae5c4cb6fb509da38e8fc0 (patch) | |
| tree | 9342c915a3ece559e6e994ffcc943100a914ab7f /host/lib/usrp/x300/x300_impl.hpp | |
| parent | af75b87e51a7c555a61f5f40f0d19f2fde04e43b (diff) | |
| parent | 748689ae5402b154d78b60d61b67cb96b50d7916 (diff) | |
| download | uhd-8ad7324b51eecff5efae5c4cb6fb509da38e8fc0.tar.gz uhd-8ad7324b51eecff5efae5c4cb6fb509da38e8fc0.tar.bz2 uhd-8ad7324b51eecff5efae5c4cb6fb509da38e8fc0.zip | |
Merge branch 'maint'
Diffstat (limited to 'host/lib/usrp/x300/x300_impl.hpp')
| -rw-r--r-- | host/lib/usrp/x300/x300_impl.hpp | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp index 2de295bd9..27f3f130e 100644 --- a/host/lib/usrp/x300/x300_impl.hpp +++ b/host/lib/usrp/x300/x300_impl.hpp @@ -52,15 +52,18 @@ static const size_t X300_RX_SW_BUFF_SIZE_ETH = 0x2000000;//32MiB For a static const size_t X300_RX_SW_BUFF_SIZE_ETH_MACOS = 0x100000; //1Mib //The FIFO closest to the DMA controller is 1023 elements deep for RX and 1029 elements deep for TX -//where an element is 8 bytes. For best throughput ensure that the data frame fits in these buffers. -//Also ensure that the kernel has enough frames to hold buffered TX and RX data -static const size_t X300_PCIE_RX_DATA_FRAME_SIZE = 8184; //bytes -static const size_t X300_PCIE_TX_DATA_FRAME_SIZE = 8184; //bytes -static const size_t X300_PCIE_DATA_NUM_FRAMES = 2048; -static const size_t X300_PCIE_MSG_FRAME_SIZE = 256; //bytes -static const size_t X300_PCIE_MSG_NUM_FRAMES = 64; -static const size_t X300_PCIE_MAX_CHANNELS = 6; -static const size_t X300_PCIE_MAX_MUXED_XPORTS = 32; +//where an element is 8 bytes. The buffers (number of frames * frame size) must be aligned to the +//memory page size. For the control, we are getting lucky because 64 frames * 256 bytes each aligns +//with the typical page size of 4096 bytes. Since most page sizes are 4096 bytes or some multiple of +//that, keep the number of frames * frame size aligned to it. +static const size_t X300_PCIE_RX_DATA_FRAME_SIZE = 4096; //bytes +static const size_t X300_PCIE_RX_DATA_NUM_FRAMES = 4096; +static const size_t X300_PCIE_TX_DATA_FRAME_SIZE = 4096; //bytes +static const size_t X300_PCIE_TX_DATA_NUM_FRAMES = 4096; +static const size_t X300_PCIE_MSG_FRAME_SIZE = 256; //bytes +static const size_t X300_PCIE_MSG_NUM_FRAMES = 64; +static const size_t X300_PCIE_MAX_CHANNELS = 6; +static const size_t X300_PCIE_MAX_MUXED_XPORTS = 32; static const size_t X300_10GE_DATA_FRAME_MAX_SIZE = 8000; // CHDR packet size in bytes static const size_t X300_1GE_DATA_FRAME_MAX_SIZE = 1472; // CHDR packet size in bytes |