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author | mattprost <matt.prost@ni.com> | 2020-07-22 12:13:59 -0500 |
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committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2020-08-04 15:46:02 -0500 |
commit | d1799df5a43eb350a8d11f3b225a33254abb0401 (patch) | |
tree | c73c47a355ab3aa78f7930b0ba3863a9631ee24a /host/lib/usrp/x300/x300_device_args.hpp | |
parent | 18aeb2077b8c6a339f833fb53d90171a359175be (diff) | |
download | uhd-d1799df5a43eb350a8d11f3b225a33254abb0401.tar.gz uhd-d1799df5a43eb350a8d11f3b225a33254abb0401.tar.bz2 uhd-d1799df5a43eb350a8d11f3b225a33254abb0401.zip |
x300: change default dboard clock rate from 50 to 100 MHz
This sets the reference clock for X300 daughterboards (other than UBX)
to 100 MHz by default to improve RF performance.
Note: The UBX daughterboard requires a clock rate of no more than the
max pfd frequency (50 or 25 MHz depending on the hardware rev) in
order to maintain phase synchronization. If a UBX daughterboard is
present on the X300, the clock rate for all daughterboards will be set
to the pfd frequency by default. This is because of the limitation on
X300 that requires the daughterboards to use the same clock rate.
Signed-off-by: mattprost <matt.prost@ni.com>
Diffstat (limited to 'host/lib/usrp/x300/x300_device_args.hpp')
-rw-r--r-- | host/lib/usrp/x300/x300_device_args.hpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/host/lib/usrp/x300/x300_device_args.hpp b/host/lib/usrp/x300/x300_device_args.hpp index 6c6680c4f..7e17c36ce 100644 --- a/host/lib/usrp/x300/x300_device_args.hpp +++ b/host/lib/usrp/x300/x300_device_args.hpp @@ -197,12 +197,11 @@ private: if (dev_args.has_key(_dboard_clock_rate.key())) { _dboard_clock_rate.parse(dev_args[_dboard_clock_rate.key()]); } else { - // Some daughterboards may require other rates, but this default - // works best for all newer daughterboards (i.e. CBX, WBX, SBX, - // UBX, and TwinRX). + // This default clock rate works best for most daughterboards (i.e. DBSRX2, + // WBX, SBX, CBX, and TwinRX). if (_master_clock_rate.get() >= MIN_TICK_RATE && _master_clock_rate.get() <= MAX_TICK_RATE) { - _dboard_clock_rate.set(_master_clock_rate.get() / 4); + _dboard_clock_rate.set(_master_clock_rate.get() / 2); } else { throw uhd::value_error("Can't infer daughterboard clock rate. Specify " "dboard_clk_rate in the device args."); |