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| author | michael-west <michael.west@ettus.com> | 2016-01-28 17:31:54 -0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2016-02-18 13:31:26 -0800 |
| commit | ed4223d74cab604213b925da2eccb6055aa7aea2 (patch) | |
| tree | e123b75178456b1714ed9b8142af64aa9ddd956f /host/lib/usrp/x300/x300_clock_ctrl.hpp | |
| parent | 35c6d742977fa03e840d70951c0a136720d8a2d0 (diff) | |
| download | uhd-ed4223d74cab604213b925da2eccb6055aa7aea2.tar.gz uhd-ed4223d74cab604213b925da2eccb6055aa7aea2.tar.bz2 uhd-ed4223d74cab604213b925da2eccb6055aa7aea2.zip | |
UBX: Phase synchronization
- Disabled MAX2871 VCO auto selection for phase sync
- Added checks for new phase sync constraints recently published by Maxim
- Added dboard_clock_rate option for X300
- Adjusted timing of SYNC signal relative to dboard referenc clock
Diffstat (limited to 'host/lib/usrp/x300/x300_clock_ctrl.hpp')
| -rw-r--r-- | host/lib/usrp/x300/x300_clock_ctrl.hpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/host/lib/usrp/x300/x300_clock_ctrl.hpp b/host/lib/usrp/x300/x300_clock_ctrl.hpp index 160a14e6d..7126f1b9f 100644 --- a/host/lib/usrp/x300/x300_clock_ctrl.hpp +++ b/host/lib/usrp/x300/x300_clock_ctrl.hpp @@ -48,6 +48,7 @@ public: const size_t slaveno, const size_t hw_rev, const double master_clock_rate, + const double dboard_clock_rate, const double system_ref_rate); /*! Get the master clock rate of the device. |