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author | Martin Braun <martin.braun@ettus.com> | 2018-03-26 14:48:12 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2018-03-28 14:21:35 -0700 |
commit | 18cda8029ff7ab1255579d81b0b27de68dacc88e (patch) | |
tree | 7edbad8e0b648a6557daa720d6847cb3f65b5650 /host/lib/usrp/usrp2/codec_ctrl.hpp | |
parent | 92a6c10979a2dea341349a44acbed43dc892dffc (diff) | |
download | uhd-18cda8029ff7ab1255579d81b0b27de68dacc88e.tar.gz uhd-18cda8029ff7ab1255579d81b0b27de68dacc88e.tar.bz2 uhd-18cda8029ff7ab1255579d81b0b27de68dacc88e.zip |
usrp2: Re-add ability to modulate in the DAC
This partially reverts b29e80cc. That commit fixed a bug with numerical
overflows, but also removed the ability to tune using the DAC,
effectively reducing the DSP tuning range.
This commit allows to tune within +/- 200 MHz using a combination of
both the DAC and the DSP tuning in the FPGA.
Reviewed-by: Derek Kozek <derek.kozel@ettus.com>
Diffstat (limited to 'host/lib/usrp/usrp2/codec_ctrl.hpp')
-rw-r--r-- | host/lib/usrp/usrp2/codec_ctrl.hpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/host/lib/usrp/usrp2/codec_ctrl.hpp b/host/lib/usrp/usrp2/codec_ctrl.hpp index e32b508e9..ac808e357 100644 --- a/host/lib/usrp/usrp2/codec_ctrl.hpp +++ b/host/lib/usrp/usrp2/codec_ctrl.hpp @@ -56,6 +56,13 @@ public: virtual void set_rx_digital_fine_gain(double gain) = 0; + /*! Return the internal interpolation on the TX side. This is the factor + * between the rate of incoming samples and rate at which the DAC is + * actually clocked. Values > 1 will enable features, such as internal + * modulation. + */ + virtual size_t get_tx_interpolation() const = 0; + }; #endif /* INCLUDED_CODEC_CTRL_HPP */ |