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authorNick Foster <nick@nerdnetworks.org>2010-07-26 16:33:17 -0700
committerNick Foster <nick@nerdnetworks.org>2010-07-26 16:33:17 -0700
commitd8f3980e45458cf68c8efaa029e492a1b8d08354 (patch)
treecf6a19cf89117483ffc3dd4901d303d2398a205f /host/lib/usrp/usrp2/codec_ctrl.cpp
parent7aec87d83f9aea23e7e9c71cdfe26aab6105f43c (diff)
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Host-side changes to work with the USRP2+.
Change summary: Added clock register selection between USRP2/USRP2+ Added memory map selection between USRP2/USRP2+ Added ADS62P44 support for USRP2+
Diffstat (limited to 'host/lib/usrp/usrp2/codec_ctrl.cpp')
-rw-r--r--host/lib/usrp/usrp2/codec_ctrl.cpp32
1 files changed, 30 insertions, 2 deletions
diff --git a/host/lib/usrp/usrp2/codec_ctrl.cpp b/host/lib/usrp/usrp2/codec_ctrl.cpp
index 32cc13ded..107894d2a 100644
--- a/host/lib/usrp/usrp2/codec_ctrl.cpp
+++ b/host/lib/usrp/usrp2/codec_ctrl.cpp
@@ -17,6 +17,7 @@
#include "codec_ctrl.hpp"
#include "ad9777_regs.hpp"
+#include "ads62p44_regs.hpp"
#include "usrp2_regs.hpp"
#include <boost/cstdint.hpp>
#include <boost/foreach.hpp>
@@ -57,7 +58,16 @@ public:
}
//power-up adc
- _iface->poke32(U2_REG_MISC_CTRL_ADC, U2_FLAG_MISC_CTRL_ADC_ON);
+ if(_iface->get_hw_rev() < USRP2P_FIRST_HW_REV) { //if we're on a USRP2
+ _iface->poke32(_iface->regs.misc_ctrl_adc, U2_FLAG_MISC_CTRL_ADC_ON);
+ } else { //we're on a USRP2+
+ _ads62p44_regs.reset = 1;
+ this->send_ads62p44_reg(0x00); //issue a reset to the ADC
+ //everything else should be pretty much default, i think
+// _ads62p44_regs.decimation = DECIMATION_DECIMATE_1;
+
+
+ }
}
~usrp2_codec_ctrl_impl(void){
@@ -66,11 +76,21 @@ public:
this->send_ad9777_reg(0);
//power-down adc
- _iface->poke32(U2_REG_MISC_CTRL_ADC, U2_FLAG_MISC_CTRL_ADC_OFF);
+ if(_iface->get_hw_rev() < USRP2P_FIRST_HW_REV) { //if we're on a USRP2
+ _iface->poke32(_iface->regs.misc_ctrl_adc, U2_FLAG_MISC_CTRL_ADC_OFF);
+ } else { //we're on a USRP2+
+// _ads62p44_regs.reset = 1;
+// this->send_ads62p44_reg(0x00); //issue a reset to the ADC
+ //everything else should be pretty much default, i think
+// _ads62p44_regs.decimation = DECIMATION_DECIMATE_1;
+
+
+ }
}
private:
ad9777_regs_t _ad9777_regs;
+ ads62p44_regs_t _ads62p44_regs;
usrp2_iface::sptr _iface;
void send_ad9777_reg(boost::uint8_t addr){
@@ -81,6 +101,14 @@ private:
reg, 16, false /*no rb*/
);
}
+
+ void send_ads62p44_reg(boost::uint8_t addr) {
+ boost::uint16_t reg = _ads62p44_regs.get_write_reg(addr);
+ _iface->transact_spi(
+ SPI_SS_ADS62P44, spi_config_t::EDGE_RISE,
+ reg, 16, false /*no rb*/
+ );
+ }
};
/***********************************************************************