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| author | Ashish Chaudhari <ashish@ettus.com> | 2016-01-06 10:03:29 -0800 |
|---|---|---|
| committer | Ashish Chaudhari <ashish@ettus.com> | 2016-01-06 10:03:29 -0800 |
| commit | 04a4d6348bff100305bb7481d652c7170b8ff62c (patch) | |
| tree | 1ad2dae096d3fd3682dab8c029e4aef0b70ecd81 /host/lib/usrp/n230/n230_clk_pps_ctrl.cpp | |
| parent | 81bbb57c06feaa05406ba86abc237a2e80841226 (diff) | |
| download | uhd-04a4d6348bff100305bb7481d652c7170b8ff62c.tar.gz uhd-04a4d6348bff100305bb7481d652c7170b8ff62c.tar.bz2 uhd-04a4d6348bff100305bb7481d652c7170b8ff62c.zip | |
n230: Fixed GPSDO detection logic
Diffstat (limited to 'host/lib/usrp/n230/n230_clk_pps_ctrl.cpp')
| -rw-r--r-- | host/lib/usrp/n230/n230_clk_pps_ctrl.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/host/lib/usrp/n230/n230_clk_pps_ctrl.cpp b/host/lib/usrp/n230/n230_clk_pps_ctrl.cpp index a36fa133d..9d704b702 100644 --- a/host/lib/usrp/n230/n230_clk_pps_ctrl.cpp +++ b/host/lib/usrp/n230/n230_clk_pps_ctrl.cpp @@ -36,7 +36,7 @@ public: n230_ref_pll_ctrl::sptr ref_pll_ctrl, fpga::core_misc_reg_t& core_misc_reg, fpga::core_pps_sel_reg_t& core_pps_sel, - fpga::core_radio_status_reg_t& core_status_reg, + fpga::core_status_reg_t& core_status_reg, const std::vector<time_core_3000::sptr>& time_cores ): _codec_ctrl(codec_ctrl), _ref_pll_ctrl(ref_pll_ctrl), @@ -98,7 +98,7 @@ public: { bool locked = false; if (_clock_source == "external" || _clock_source == "gpsdo") { - locked = (_core_status_reg.read(fpga::core_radio_status_reg_t::REF_LOCKED) == 1); + locked = (_core_status_reg.read(fpga::core_status_reg_t::REF_LOCKED) == 1); } else { //If the source is internal, the charge pump on the ADF4001 is tristated which //means that the 40MHz VCTXXO is free running i.e. always "locked" @@ -132,7 +132,7 @@ private: n230_ref_pll_ctrl::sptr _ref_pll_ctrl; fpga::core_misc_reg_t& _core_misc_reg; fpga::core_pps_sel_reg_t& _core_pps_sel_reg; - fpga::core_radio_status_reg_t& _core_status_reg; + fpga::core_status_reg_t& _core_status_reg; std::vector<time_core_3000::sptr> _time_cores; double _tick_rate; std::string _clock_source; @@ -149,7 +149,7 @@ n230_clk_pps_ctrl::sptr n230_clk_pps_ctrl::make( n230_ref_pll_ctrl::sptr ref_pll_ctrl, fpga::core_misc_reg_t& core_misc_reg, fpga::core_pps_sel_reg_t& core_pps_sel_reg, - fpga::core_radio_status_reg_t& core_status_reg, + fpga::core_status_reg_t& core_status_reg, const std::vector<time_core_3000::sptr>& time_cores) { return sptr(new n230_clk_pps_ctrl_impl( |