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authorSugandha Gupta <sugandha.gupta@ettus.com>2018-06-05 13:48:07 -0700
committerMartin Braun <martin.braun@ettus.com>2018-06-15 16:37:03 -0500
commit67b5827faecd3dc3d9977dff7366b8ea2ab4c87a (patch)
tree8d4d6b3645cd4b1aa72e26b4be4b5e81d5c45bfa /host/lib/usrp/common/ad9361_driver/ad9361_device.cpp
parentf9101d7cc7552755d597982eeccecabe88b8a022 (diff)
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ad9361: Add API to set 1R1T/2R2T timing modes
LVDS interface can support both timing modes 1R1T/2R2T The API sets the required bit in catalina registers.
Diffstat (limited to 'host/lib/usrp/common/ad9361_driver/ad9361_device.cpp')
-rw-r--r--host/lib/usrp/common/ad9361_driver/ad9361_device.cpp42
1 files changed, 42 insertions, 0 deletions
diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp
index 56df8bd12..9273edb02 100644
--- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp
+++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp
@@ -1984,6 +1984,48 @@ void ad9361_device_t::set_active_chains(bool tx1, bool tx2, bool rx1, bool rx2)
_io_iface->poke8(0x014, 0x21);
}
+/* Setup Timing mode depending on active channels.
+ *
+ * LVDS interface can have two timing modes - 1R1T and 2R2T
+ */
+void ad9361_device_t::set_timing_mode(const ad9361_device_t::timing_mode_t timing_mode)
+{
+ switch (_client_params->get_digital_interface_mode()) {
+ case AD9361_DDR_FDD_LVCMOS: {
+ switch(timing_mode) {
+ case TIMING_MODE_1R1T: {
+ _io_iface->poke8(0x010, 0xc8); // Swap I&Q on Tx, Swap I&Q on Rx, Toggle frame sync mode
+ break;
+ }
+ case TIMING_MODE_2R2T: {
+ throw uhd::runtime_error("[ad9361_device_t] [set_timing_mode] 2R2T timing mode not supported for CMOS");
+ break;
+ }
+ default:
+ UHD_THROW_INVALID_CODE_PATH();
+ }
+ break;
+ }
+ case AD9361_DDR_FDD_LVDS: {
+ switch(timing_mode) {
+ case TIMING_MODE_1R1T: {
+ _io_iface->poke8(0x010, 0xc8); // Swap I&Q on Tx, Swap I&Q on Rx, Toggle frame sync mode, 1R1T timing.
+ break;
+ }
+ case TIMING_MODE_2R2T: {
+ _io_iface->poke8(0x010, 0xcc); // Swap I&Q on Tx, Swap I&Q on Rx, Toggle frame sync mode, 2R2T timing.
+ break;
+ }
+ default:
+ UHD_THROW_INVALID_CODE_PATH();
+ }
+ break;
+ }
+ default:
+ throw uhd::runtime_error("[ad9361_device_t] NOT IMPLEMENTED");
+ }
+}
+
/* Tune the RX or TX frequency.
*
* This is the publicly-accessible tune function. It makes sure the tune