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authorNick Foster <nick@ettus.com>2011-08-24 16:18:21 -0700
committerNick Foster <nick@ettus.com>2011-08-24 16:19:06 -0700
commit544f80129f62d3fcf9ffd2af22f09b4cb27c5390 (patch)
tree6df71f2e50a96a5685634c1ccaeca08afae6a85c /host/lib/usrp/b100/io_impl.cpp
parent1d842e0767040fca346abcdc52861b214225ea13 (diff)
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B100: reset FPGA GPIF fifos correctly so no garbage data on startup
Diffstat (limited to 'host/lib/usrp/b100/io_impl.cpp')
-rw-r--r--host/lib/usrp/b100/io_impl.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/host/lib/usrp/b100/io_impl.cpp b/host/lib/usrp/b100/io_impl.cpp
index 34535217a..d2eee4f7c 100644
--- a/host/lib/usrp/b100/io_impl.cpp
+++ b/host/lib/usrp/b100/io_impl.cpp
@@ -65,8 +65,9 @@ void b100_impl::io_init(void){
_tx_otw_type.shift = 0;
_tx_otw_type.byteorder = uhd::otw_type_t::BO_LITTLE_ENDIAN;
- //TODO best place to put this?
- this->reset_gpif(6);
+ //clear state machines
+ _fpga_ctrl->poke32(B100_REG_CLEAR_RX, 0);
+ _fpga_ctrl->poke32(B100_REG_CLEAR_TX, 0);
//set the expected packet size in USB frames
_fpga_ctrl->poke32(B100_REG_MISC_RX_LEN, 4);