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| author | Lane Kolbly <lane.kolbly@ni.com> | 2021-06-22 15:21:29 -0500 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-06-23 13:15:47 -0500 |
| commit | 8adbc72f0d3c9e15d6bbf41c27f3f192e3df305f (patch) | |
| tree | 26cff889ced6fb5295b79858ec6696de720d7a85 /fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm | |
| parent | b50144a0bee95dae14059e7cd4d7bb27d139786b (diff) | |
| download | uhd-8adbc72f0d3c9e15d6bbf41c27f3f192e3df305f.tar.gz uhd-8adbc72f0d3c9e15d6bbf41c27f3f192e3df305f.tar.bz2 uhd-8adbc72f0d3c9e15d6bbf41c27f3f192e3df305f.zip | |
mpm: Move cal freeze defaults to x4xx
This fixes an issue where the slot 0 ADC blocks would erroneously
report that they were unfrozen.
Additionally, adds logic to restore a saved cal freeze state on
sync source change.
Diffstat (limited to 'fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm')
0 files changed, 0 insertions, 0 deletions