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| author | Wade Fife <wade.fife@ettus.com> | 2020-03-20 16:17:52 -0500 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2020-03-23 18:01:53 -0500 |
| commit | 974b9d6140fe6d35ef6698d437e12beaf071ba63 (patch) | |
| tree | 75b861713d37d9286826d94d69d6b988e442c380 /fpga/usrp3/top/b200/core_compile | |
| parent | 0ac85e4d0186cb63cb98da90363f34947675b3e5 (diff) | |
| download | uhd-974b9d6140fe6d35ef6698d437e12beaf071ba63.tar.gz uhd-974b9d6140fe6d35ef6698d437e12beaf071ba63.tar.bz2 uhd-974b9d6140fe6d35ef6698d437e12beaf071ba63.zip | |
fixup! fpga: tools: Add modelsim to make sim targets
Diffstat (limited to 'fpga/usrp3/top/b200/core_compile')
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