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author | Michael West <michael.west@ettus.com> | 2013-12-06 17:47:24 -0800 |
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committer | Michael West <michael.west@ettus.com> | 2013-12-06 17:47:24 -0800 |
commit | c3aa7326095a1a8c744e269a04572de74600df8d (patch) | |
tree | 983711ae9718128617b5f1880f8c6399e38e4055 /fpga/usrp3/lib/vita/new_tx_control.v | |
parent | aa3d9a9da0405e84e720870a13718b177d85652c (diff) | |
parent | 8f0f045cdac16ae84bc446b230beb2b651428294 (diff) | |
download | uhd-c3aa7326095a1a8c744e269a04572de74600df8d.tar.gz uhd-c3aa7326095a1a8c744e269a04572de74600df8d.tar.bz2 uhd-c3aa7326095a1a8c744e269a04572de74600df8d.zip |
Merge branch 'master' into mwest_coverity
Conflicts:
host/lib/usrp/b200/b200_iface.cpp
Diffstat (limited to 'fpga/usrp3/lib/vita/new_tx_control.v')
-rw-r--r-- | fpga/usrp3/lib/vita/new_tx_control.v | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/fpga/usrp3/lib/vita/new_tx_control.v b/fpga/usrp3/lib/vita/new_tx_control.v index ad1300e26..4cdb54a24 100644 --- a/fpga/usrp3/lib/vita/new_tx_control.v +++ b/fpga/usrp3/lib/vita/new_tx_control.v @@ -153,7 +153,8 @@ module new_tx_control assign packet_consumed = eop & sample_tvalid & sample_tready; assign debug = { - error_code[15:0], // [28:13] + error_code[37:32], // [30:25] + error_code[11:0], // [24:13] sample_tvalid, //[12] now, // [11] early, // [10] @@ -164,7 +165,7 @@ module new_tx_control eob, // [5] send_at, // [4] odd, // [3] - state // [2:0] + state[2:0] // [2:0] }; |