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| author | michael-west <michael.west@ettus.com> | 2014-03-25 15:59:03 -0700 |
|---|---|---|
| committer | michael-west <michael.west@ettus.com> | 2014-03-25 15:59:03 -0700 |
| commit | 04292f9b109479b639add31f83fd240a6387f488 (patch) | |
| tree | 4b8723a4ae63626029704f901ee0083bb23bc1e9 /fpga/usrp3/lib/simple_gemac/flow_ctrl_tx.v | |
| parent | 09915aa57bc88099cbcbbe925946ae65bc0ad8f0 (diff) | |
| parent | ff8a1252f3a51369abe0a165d963b781089ec66c (diff) | |
| download | uhd-04292f9b109479b639add31f83fd240a6387f488.tar.gz uhd-04292f9b109479b639add31f83fd240a6387f488.tar.bz2 uhd-04292f9b109479b639add31f83fd240a6387f488.zip | |
Merge branch 'master' into mwest/b200_docs
Diffstat (limited to 'fpga/usrp3/lib/simple_gemac/flow_ctrl_tx.v')
| -rw-r--r-- | fpga/usrp3/lib/simple_gemac/flow_ctrl_tx.v | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/simple_gemac/flow_ctrl_tx.v b/fpga/usrp3/lib/simple_gemac/flow_ctrl_tx.v new file mode 100644 index 000000000..11c120b1c --- /dev/null +++ b/fpga/usrp3/lib/simple_gemac/flow_ctrl_tx.v @@ -0,0 +1,44 @@ +// +// Copyright 2011 Ettus Research LLC +// + + +
+// TX side of flow control -- when other side sends PAUSE, we wait
+
+module flow_ctrl_tx
+ (input rst,
+ input tx_clk,
+ //host processor
+ input tx_pause_en,
+ // From MAC_rx_ctrl
+ input [15:0] pause_quanta,
+ input pause_quanta_val,
+ // MAC_tx_ctrl
+ output pause_apply,
+ input paused);
+
+ // ******************************************************************************
+ // Inhibit our TX from transmitting because they sent us a PAUSE frame
+ // ******************************************************************************
+
+ // Pauses are in units of 512 bit times, or 64 bytes/clock cycles, and can be
+ // as big as 16 bits, so 22 bits are needed for the counter
+
+ reg [15+6:0] pause_quanta_counter;
+ reg pqval_d1, pqval_d2;
+
+ always @(posedge tx_clk) pqval_d1 <= pause_quanta_val;
+ always @(posedge tx_clk) pqval_d2 <= pqval_d1;
+
+ always @ (posedge tx_clk or posedge rst)
+ if (rst)
+ pause_quanta_counter <= 0;
+ else if (pqval_d1 & ~pqval_d2)
+ pause_quanta_counter <= {pause_quanta, 6'b0};
+ else if((pause_quanta_counter!=0) & paused)
+ pause_quanta_counter <= pause_quanta_counter - 1;
+
+ assign pause_apply = tx_pause_en & (pause_quanta_counter != 0);
+
+endmodule // flow_ctrl
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