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| author | Ben Hilburn <ben.hilburn@ettus.com> | 2014-02-14 12:05:07 -0800 |
|---|---|---|
| committer | Ben Hilburn <ben.hilburn@ettus.com> | 2014-02-14 12:05:07 -0800 |
| commit | ff1546f8137f7f92bb250f685561b0c34cc0e053 (patch) | |
| tree | 7fa6fd05c8828df256a1b20e2935bd3ba9899e2c /fpga/usrp3/lib/simple_gemac/delay_line.v | |
| parent | 4f691d88123784c2b405816925f1a1aef69d18c1 (diff) | |
| download | uhd-ff1546f8137f7f92bb250f685561b0c34cc0e053.tar.gz uhd-ff1546f8137f7f92bb250f685561b0c34cc0e053.tar.bz2 uhd-ff1546f8137f7f92bb250f685561b0c34cc0e053.zip | |
Pushing the bulk of UHD-3.7.0 code.
Diffstat (limited to 'fpga/usrp3/lib/simple_gemac/delay_line.v')
| -rw-r--r-- | fpga/usrp3/lib/simple_gemac/delay_line.v | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/simple_gemac/delay_line.v b/fpga/usrp3/lib/simple_gemac/delay_line.v new file mode 100644 index 000000000..325182f38 --- /dev/null +++ b/fpga/usrp3/lib/simple_gemac/delay_line.v @@ -0,0 +1,26 @@ +// +// Copyright 2011 Ettus Research LLC +// + + + + +module delay_line + #(parameter WIDTH=32) + (input clk, + input [3:0] delay, + input [WIDTH-1:0] din, + output [WIDTH-1:0] dout); + + genvar i; + generate + for (i=0;i<WIDTH;i=i+1) + begin : gen_delay + SRL16E + srl16e(.Q(dout[i]), + .A0(delay[0]),.A1(delay[1]),.A2(delay[2]),.A3(delay[3]), + .CE(1),.CLK(clk),.D(din[i])); + end + endgenerate + +endmodule // delay_line |