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| author | Ben Hilburn <ben.hilburn@ettus.com> | 2014-05-14 11:42:19 -0700 |
|---|---|---|
| committer | Ben Hilburn <ben.hilburn@ettus.com> | 2014-05-14 11:42:19 -0700 |
| commit | 00711ba213dde8aa0a099d2b18d3da0a33e6af79 (patch) | |
| tree | 612f616ebbf8080b5dc9cb5d64a8062e9aa3a498 /fpga/usrp3/lib/io_port2/pcie_basic_regs.v | |
| parent | 5de0bfce3f03cc45a1eed93dc1b8df1b188b5040 (diff) | |
| download | uhd-00711ba213dde8aa0a099d2b18d3da0a33e6af79.tar.gz uhd-00711ba213dde8aa0a099d2b18d3da0a33e6af79.tar.bz2 uhd-00711ba213dde8aa0a099d2b18d3da0a33e6af79.zip | |
fpga: updating b200 and x300 FPGA source code for latest images
Diffstat (limited to 'fpga/usrp3/lib/io_port2/pcie_basic_regs.v')
| -rw-r--r-- | fpga/usrp3/lib/io_port2/pcie_basic_regs.v | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/fpga/usrp3/lib/io_port2/pcie_basic_regs.v b/fpga/usrp3/lib/io_port2/pcie_basic_regs.v index e3790e81c..e360b6812 100644 --- a/fpga/usrp3/lib/io_port2/pcie_basic_regs.v +++ b/fpga/usrp3/lib/io_port2/pcie_basic_regs.v @@ -3,7 +3,10 @@ // -module pcie_basic_regs ( +module pcie_basic_regs #( + parameter SIGNATURE = 32'h0, + parameter CLK_FREQ = 32'h0 +) ( input clk, input reset, @@ -16,8 +19,8 @@ module pcie_basic_regs ( input [31:0] misc_status ); - localparam PCIE_FPGA_SIG_VAL = 32'h58333030; //X300 (ASCII) - localparam PCIE_FPGA_COUNTER_FREQ = 32'h0A6E49C0; //175MHz + localparam PCIE_FPGA_SIG_VAL = SIGNATURE; + localparam PCIE_FPGA_COUNTER_FREQ = CLK_FREQ; localparam PCIE_REG_ADDR_MASK = 20'h001FF; |