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| author | Max Köhler <max.koehler@ni.com> | 2020-06-17 11:07:45 +0200 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2020-06-17 07:13:20 -0500 |
| commit | 366cab1fef44f1132a2acf8046ecaeac80793ccc (patch) | |
| tree | fafe229be293db5c8090e703479d5cbd4284116a /fpga/usrp3/lib/control/Makefile.srcs | |
| parent | f17a5113e228ac1bc5312193eb8f687e127184a3 (diff) | |
| download | uhd-366cab1fef44f1132a2acf8046ecaeac80793ccc.tar.gz uhd-366cab1fef44f1132a2acf8046ecaeac80793ccc.tar.bz2 uhd-366cab1fef44f1132a2acf8046ecaeac80793ccc.zip | |
fpga: lib: add extended spi core for 64bit
The existing SPI core (simple_spi_slave.v) was limited to 32 bit. This
commit adds a second spi core with capability to transfer up to 64 bits
while keeping the same amount of resources when using generic setting
MAX_BITS = 32. Furthermore, the new module aligns mosi and miso with the
edges of sclk. The register stages were not aligned in the existing
version.
Diffstat (limited to 'fpga/usrp3/lib/control/Makefile.srcs')
| -rw-r--r-- | fpga/usrp3/lib/control/Makefile.srcs | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/control/Makefile.srcs b/fpga/usrp3/lib/control/Makefile.srcs index 578f19ea5..21f986a50 100644 --- a/fpga/usrp3/lib/control/Makefile.srcs +++ b/fpga/usrp3/lib/control/Makefile.srcs @@ -39,6 +39,7 @@ settings_bus_mux.v \ settings_bus_timed_2clk.v \ simple_i2c_core.v \ simple_spi_core.v \ +simple_spi_core_64bit.v \ synchronizer_impl.v \ synchronizer.v \ pulse_synchronizer.v \ |