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authorJosh Blum <josh@joshknows.com>2011-07-08 12:17:54 -0700
committerJosh Blum <josh@joshknows.com>2011-07-08 12:17:54 -0700
commit17fabccfe4be79f3a5a0a3d7ab14ea72a791ecd9 (patch)
treee2d0d39d6b44b72c759b8be1380b2024de50bdf6 /fpga/usrp2/sdr_lib/rx_dcoffset_tb.v
parent60933a242cce0b1ec45e9f948e3da9ab72b2fd90 (diff)
parent4ea6f7431e09d9f27ecaa1c1b187d2c2f613e8f4 (diff)
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Merge branch 'fpga_next' into next
Diffstat (limited to 'fpga/usrp2/sdr_lib/rx_dcoffset_tb.v')
-rw-r--r--fpga/usrp2/sdr_lib/rx_dcoffset_tb.v20
1 files changed, 16 insertions, 4 deletions
diff --git a/fpga/usrp2/sdr_lib/rx_dcoffset_tb.v b/fpga/usrp2/sdr_lib/rx_dcoffset_tb.v
index b0dd8cb05..b4fb66ad7 100644
--- a/fpga/usrp2/sdr_lib/rx_dcoffset_tb.v
+++ b/fpga/usrp2/sdr_lib/rx_dcoffset_tb.v
@@ -29,14 +29,26 @@ module rx_dcoffset_tb();
initial $dumpfile("rx_dcoffset_tb.vcd");
initial $dumpvars(0,rx_dcoffset_tb);
- reg [13:0] adc_in = 7;
+ reg [13:0] adc_in;
wire [13:0] adc_out;
always @(posedge clk)
- $display("%d\t%d",adc_in,adc_out);
+ begin
+ if(adc_in[13])
+ $write("-%d,",-adc_in);
+ else
+ $write("%d,",adc_in);
+ if(adc_out[13])
+ $write("-%d\n",-adc_out);
+ else
+ $write("%d\n",adc_out);
+ end
- rx_dcoffset #(.WIDTH(14),.ADDR(0))
+ rx_dcoffset #(.WIDTH(14),.ADDR(0), .alpha_shift(8))
rx_dcoffset(.clk(clk),.rst(rst),.set_stb(0),.set_addr(0),.set_data(0),
- .adc_in(adc_in),.adc_out(adc_out));
+ .in(adc_in),.out(adc_out));
+
+ always @(posedge clk)
+ adc_in <= (($random % 473) + 23)/4;
endmodule // longfifo_tb