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| author | Jason Abele <jason@ettus.com> | 2011-09-16 10:47:54 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-09-21 16:03:46 -0700 |
| commit | 539c9b5a5560ea5d79c78954ea8e482846a5e966 (patch) | |
| tree | a577fc45164ff61f539231cf88c5a2560dc62638 /fpga/usrp2/opencores/aemb/rtl/verilog | |
| parent | 42c7aaa480548716d211c3dcdd2ced1d3c79b510 (diff) | |
| download | uhd-539c9b5a5560ea5d79c78954ea8e482846a5e966.tar.gz uhd-539c9b5a5560ea5d79c78954ea8e482846a5e966.tar.bz2 uhd-539c9b5a5560ea5d79c78954ea8e482846a5e966.zip | |
Updates to example apps
Add --ref option to specify mboard clock reference source
Add check for lock to mboard clock reference (where applicable)
Add check of daughterboard LO lock detect (where applicable)
Diffstat (limited to 'fpga/usrp2/opencores/aemb/rtl/verilog')
0 files changed, 0 insertions, 0 deletions