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| author | Josh Blum <josh@joshknows.com> | 2010-11-23 13:36:42 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-11-23 13:36:42 -0800 |
| commit | bb0572a960edf54486a4be746c681adaac0fa398 (patch) | |
| tree | 7afb46e99eaf799a478fcde841eb78d7698e9c39 /fpga/usrp2/coregen/coregen.cgp | |
| parent | 8ce75a3ca7a51f4bdee87d78a610a0f2519473ae (diff) | |
| download | uhd-bb0572a960edf54486a4be746c681adaac0fa398.tar.gz uhd-bb0572a960edf54486a4be746c681adaac0fa398.tar.bz2 uhd-bb0572a960edf54486a4be746c681adaac0fa398.zip | |
fpga: performed a forceful checkout of fpga to overwrite with current fpga code
Diffstat (limited to 'fpga/usrp2/coregen/coregen.cgp')
| -rw-r--r-- | fpga/usrp2/coregen/coregen.cgp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/fpga/usrp2/coregen/coregen.cgp b/fpga/usrp2/coregen/coregen.cgp index 4c9201aff..dd85a7f50 100644 --- a/fpga/usrp2/coregen/coregen.cgp +++ b/fpga/usrp2/coregen/coregen.cgp @@ -1,4 +1,4 @@ -# Date: Mon Jul 26 21:55:33 2010 +# Date: Fri Oct 15 07:50:19 2010 SET addpads = false SET asysymbol = false @@ -13,10 +13,10 @@ SET foundationsym = false SET implementationfiletype = Ngc SET package = fg456 SET removerpms = false -SET simulationfiles = Behavioral +SET simulationfiles = Structural SET speedgrade = -5 SET verilogsim = true SET vhdlsim = false SET workingdirectory = /tmp/ -# CRC: 394da717 +# CRC: 983b9b45 |