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| author | Josh Blum <josh@joshknows.com> | 2011-07-19 14:18:58 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-07-19 14:18:58 -0700 |
| commit | 07c2e795b2d3fbf77d548e902c558d810c76156d (patch) | |
| tree | a5a5f8536025d2ec97d697c9f528f07902aedefe /fpga/usrp2/coregen/coregen.cgp | |
| parent | 64382c4c8626e429f91865ab27c9e0a69da5edf3 (diff) | |
| download | uhd-07c2e795b2d3fbf77d548e902c558d810c76156d.tar.gz uhd-07c2e795b2d3fbf77d548e902c558d810c76156d.tar.bz2 uhd-07c2e795b2d3fbf77d548e902c558d810c76156d.zip | |
fpga: squashed new_work fpga changes onto uhd next
Diffstat (limited to 'fpga/usrp2/coregen/coregen.cgp')
| -rw-r--r-- | fpga/usrp2/coregen/coregen.cgp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/fpga/usrp2/coregen/coregen.cgp b/fpga/usrp2/coregen/coregen.cgp index 01d31bf5b..dd85a7f50 100644 --- a/fpga/usrp2/coregen/coregen.cgp +++ b/fpga/usrp2/coregen/coregen.cgp @@ -1,4 +1,5 @@ -# Date: Fri Jun 10 23:12:37 2011 +# Date: Fri Oct 15 07:50:19 2010 + SET addpads = false SET asysymbol = false SET busformat = BusFormatAngleBracketNotRipped @@ -18,3 +19,4 @@ SET verilogsim = true SET vhdlsim = false SET workingdirectory = /tmp/ +# CRC: 983b9b45 |