diff options
| author | Lane Kolbly <lane.kolbly@ni.com> | 2021-10-18 16:45:46 -0500 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-11-03 06:04:19 -0700 |
| commit | c23dc3b0122a46353810d1ccbe98c08b080850e8 (patch) | |
| tree | d89ab38b0565190737bd5e16b65c601f4df58fd6 /fpga/usrp1/megacells/addsub16.cmp | |
| parent | 3162b92bedda20f5b376137f5e918ebe07406fbb (diff) | |
| download | uhd-c23dc3b0122a46353810d1ccbe98c08b080850e8.tar.gz uhd-c23dc3b0122a46353810d1ccbe98c08b080850e8.tar.bz2 uhd-c23dc3b0122a46353810d1ccbe98c08b080850e8.zip | |
host: x4xx: Implement GPIO API
This implements the GPIO API for X410 through get_gpio_attr and
set_gpio_attr. In ATR mode, which channel's ATR state is chosen by the
set_gpio_src call, setting e.g. DB0_RF0 for channel 0 or DB0_RF1 for
channel 1. In manual mode, all 24 bits (for both ports) are set in
a single register write.
Although the front panel of the device has two ports, labelled GPIO0 and
GPIO1, this API exposes them as though they were a single 24-bit GPIO
port.
Diffstat (limited to 'fpga/usrp1/megacells/addsub16.cmp')
0 files changed, 0 insertions, 0 deletions
