Merge FPGA repository back into UHD repository

The FPGA codebase was removed from the UHD repository in 2014 to reduce
the size of the repository. However, over the last half-decade, the
split between the repositories has proven more burdensome than it has
been helpful. By merging the FPGA code back, it will be possible to
create atomic commits that touch both FPGA and UHD codebases. Continuous
integration testing is also simplified by merging the repositories,
because it was previously difficult to automatically derive the correct
UHD branch when testing a feature branch on the FPGA repository.

This commit also updates the license files and paths therein.

We are therefore merging the repositories again. Future development for
FPGA code will happen in the same repository as the UHD host code and
MPM code.

== Original Codebase and Rebasing ==

The original FPGA repository will be hosted for the foreseeable future
at its original local location: https://github.com/EttusResearch/fpga/

It can be used for bisecting, reference, and a more detailed history.

The final commit from said repository to be merged here is
05003794e2da61cabf64dd278c45685a7abad7ec. This commit is tagged as
v4.0.0.0-pre-uhd-merge.

If you have changes in the FPGA repository that you want to rebase onto
the UHD repository, simply run the following commands:

- Create a directory to store patches (this should be an empty
  directory):

    mkdir ~/patches

- Now make sure that your FPGA codebase is based on the same state as
  the code that was merged:

    cd src/fpga # Or wherever your FPGA code is stored
    git rebase v4.0.0.0-pre-uhd-merge

  Note: The rebase command may look slightly different depending on what
  exactly you're trying to rebase.

- Create a patch set for your changes versus v4.0.0.0-pre-uhd-merge:

    git format-patch v4.0.0.0-pre-uhd-merge -o ~/patches

  Note: Make sure that only patches are stored in your output directory.
  It should otherwise be empty. Make sure that you picked the correct
  range of commits, and only commits you wanted to rebase were exported
  as patch files.

- Go to the UHD repository and apply the patches:

    cd src/uhd # Or wherever your UHD repository is stored
    git am --directory fpga ~/patches/*
    rm -rf ~/patches # This is for cleanup

== Contributors ==

The following people have contributed mainly to these files (this list
is not complete):

Co-authored-by: Alex Williams <alex.williams@ni.com>
Co-authored-by: Andrej Rode <andrej.rode@ettus.com>
Co-authored-by: Ashish Chaudhari <ashish@ettus.com>
Co-authored-by: Ben Hilburn <ben.hilburn@ettus.com>
Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Derek Kozel <derek.kozel@ettus.com>
Co-authored-by: EJ Kreinar <ej@he360.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Ian Buckley <ian.buckley@gmail.com>
Co-authored-by: Jörg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Jon Kiser <jon.kiser@ni.com>
Co-authored-by: Josh Blum <josh@joshknows.com>
Co-authored-by: Jonathon Pendlum <jonathan.pendlum@ettus.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Matt Ettus <matt@ettus.com>
Co-authored-by: Michael West <michael.west@ettus.com>
Co-authored-by: Moritz Fischer <moritz.fischer@ettus.com>
Co-authored-by: Nick Foster <nick@ettus.com>
Co-authored-by: Nicolas Cuervo <nicolas.cuervo@ettus.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Paul David <paul.david@ettus.com>
Co-authored-by: Ryan Marlow <ryan.marlow@ettus.com>
Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
Co-authored-by: Sylvain Munaut <tnt@246tNt.com>
Co-authored-by: Trung Tran <trung.tran@ettus.com>
Co-authored-by: Vidush Vishwanath <vidush.vishwanath@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>

1 files changed, 46 insertions, 0 deletions

diff --git a/fpga/docs/fpga.md b/fpga/docs/fpga.md
new file mode 100644
index 000000000..40994c487
--- /dev/null
+++ b/fpga/docs/fpga.md
@@ -0,0 +1,46 @@
+FPGA Manual
+===========
+
+Welcome to the USRP FPGA HDL source code tree! This repository contains
+free & open-source FPGA HDL for the Universal Software Radio Peripheral
+(USRP™) SDR platform, created and sold by Ettus Research. A large
+percentage of the source code is written in Verilog.
+
+## Product Generations
+
+This repository contains the FPGA source for the following generations of
+USRP devices.
+
+### Generation 1
+
+\li Directory: __usrp1__
+\li Devices: USRP Classic Only
+\li Tools: Quartus from Altera
+\li \subpage md_usrp1_build_instructions "Build Instructions"
+
+
+### Generation 2
+
+\li Directory: __usrp2__
+\li Devices: USRP N2X0, USRP B100, USRP E1X0, USRP2
+\li Tools: ISE from Xilinx, GNU make
+\li \subpage md_usrp2_build_instructions "Build Instructions"
+\li \subpage md_usrp2_customize_signal_chain "Customization Instructions"
+
+### Generation 3
+
+\li Directory: __usrp3__
+\li Devices: USRP B2X0, USRP X Series, USRP E3X0
+\li Tools: ISE from Xilinx, GNU make
+\li \subpage md_usrp3_build_instructions "Build Instructions"
+\li \subpage md_usrp3_simulation "Simulation"
+
+## Pre-built FPGA Images
+
+Pre-built FPGA and Firmware images are not hosted here. Please visit \ref page_images
+for instructions on downloading and using pre-built images. In most cases, running
+
+    $ uhd_images_downloader
+
+will do the right thing.
+