From 54d698e3707cf1be5d38537db783ebadd850e729 Mon Sep 17 00:00:00 2001 From: RobertWalstab Date: Fri, 24 Jul 2020 16:31:45 +0200 Subject: fpga, mpm: Bump FPGA compat number --- mpm/python/usrp_mpm/periph_manager/e320.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'mpm/python/usrp_mpm/periph_manager/e320.py') diff --git a/mpm/python/usrp_mpm/periph_manager/e320.py b/mpm/python/usrp_mpm/periph_manager/e320.py index dc91b20d9..770b449b5 100644 --- a/mpm/python/usrp_mpm/periph_manager/e320.py +++ b/mpm/python/usrp_mpm/periph_manager/e320.py @@ -32,7 +32,7 @@ E320_DEFAULT_CLOCK_SOURCE = 'internal' E320_DEFAULT_TIME_SOURCE = 'internal' E320_DEFAULT_ENABLE_GPS = True E320_DEFAULT_ENABLE_FPGPIO = True -E320_FPGA_COMPAT = (5, 0) +E320_FPGA_COMPAT = (6, 0) E320_MONITOR_THREAD_INTERVAL = 1.0 # seconds E320_DBOARD_SLOT_IDX = 0 E320_GPIO_BANKS = ["FP0",] -- cgit v1.2.3