From c2d6f9c39adf792c043bc4f7df6ce504175b6d93 Mon Sep 17 00:00:00 2001
From: michael-west <michael.west@ettus.com>
Date: Mon, 17 Mar 2014 23:05:59 -0700
Subject: Modified reference clock lock check to only be performed on Rev E or
 later.

---
 host/lib/usrp/x300/x300_impl.hpp | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'host/lib/usrp/x300/x300_impl.hpp')

diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp
index 8f4ae8264..259ea253d 100644
--- a/host/lib/usrp/x300/x300_impl.hpp
+++ b/host/lib/usrp/x300/x300_impl.hpp
@@ -213,6 +213,8 @@ private:
 
         //which FPGA image is loaded
         std::string loaded_fpga_image;
+
+        size_t hw_rev;
     };
     std::vector<mboard_members_t> _mb;
 
-- 
cgit v1.2.3