From bf74b4e85d6d2b8833c35b1f243eb36b99432250 Mon Sep 17 00:00:00 2001 From: Ashish Chaudhari Date: Wed, 25 May 2016 16:08:12 -0700 Subject: bugfix#1102: Prevented X300 DAC FIFO from underflowing - The spectral distortion was begin caused by the DAC FIFO underflowing. The fix was to run through the DAC sync procedure which uses the falling edge clock to sample the RefClk and sync it with the data clk --- host/lib/usrp/x300/x300_dac_ctrl.cpp | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) (limited to 'host/lib/usrp/x300/x300_dac_ctrl.cpp') diff --git a/host/lib/usrp/x300/x300_dac_ctrl.cpp b/host/lib/usrp/x300/x300_dac_ctrl.cpp index bb41146b6..d49fba383 100644 --- a/host/lib/usrp/x300/x300_dac_ctrl.cpp +++ b/host/lib/usrp/x300/x300_dac_ctrl.cpp @@ -65,17 +65,6 @@ public: } void reset() - { - //ADI recommendations: - //- soft reset the chip before configuration - //- put the chip in sleep mode during configuration and wake it up when done - _soft_reset(); - _sleep_mode(true); - _init(); - _sleep_mode(false); - } - - void reset_and_resync() { //ADI recommendations: //- soft reset the chip before configuration @@ -84,6 +73,9 @@ public: _soft_reset(); _sleep_mode(true); _init(); + //We run backend sync regardless of whether we need to sync multiple DACs + //because we use the internal DAC FIFO to meet system synchronous timing + //and we need to guarantee that the FIFO is not empty. _backend_sync(); _sleep_mode(false); } -- cgit v1.2.3