From 9ccd93ab11ebf2338b763a86aaf740c710fcc13d Mon Sep 17 00:00:00 2001 From: Michael West Date: Thu, 20 Feb 2014 11:27:57 -0800 Subject: Fixed bug found during testing where internal clock reference was taking several seconds to lock. Added reset to the clock control and called it whenever the clock reference is changed. --- host/lib/usrp/x300/x300_clock_ctrl.cpp | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'host/lib/usrp/x300/x300_clock_ctrl.cpp') diff --git a/host/lib/usrp/x300/x300_clock_ctrl.cpp b/host/lib/usrp/x300/x300_clock_ctrl.cpp index a986928a7..6a0b19c8c 100644 --- a/host/lib/usrp/x300/x300_clock_ctrl.cpp +++ b/host/lib/usrp/x300/x300_clock_ctrl.cpp @@ -48,6 +48,10 @@ x300_clock_ctrl_impl(uhd::spi_iface::sptr spiface, set_master_clock_rate(master_clock_rate); } +void reset() { + set_master_clock_rate(_master_clock_rate); +} + void sync_clocks(void) { //soft sync: //put the sync IO into output mode - FPGA must be input -- cgit v1.2.3