From fcdbea4f089db2405820ad598979e639cf131ff5 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 4 Jun 2010 01:58:12 +0000 Subject: io impl tweaks, renamed clock control and codec control implementation to avoid collision with usrp2 (those need to be renamed as well) --- host/lib/usrp/usrp_e/dsp_impl.cpp | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'host/lib/usrp/usrp_e/dsp_impl.cpp') diff --git a/host/lib/usrp/usrp_e/dsp_impl.cpp b/host/lib/usrp/usrp_e/dsp_impl.cpp index 272ac71b3..e61f529ab 100644 --- a/host/lib/usrp/usrp_e/dsp_impl.cpp +++ b/host/lib/usrp/usrp_e/dsp_impl.cpp @@ -20,6 +20,30 @@ using namespace uhd::usrp; +/*********************************************************************** + * Helper Functions + **********************************************************************/ +// Check if requested decim/interp rate is: +// multiple of 4, enable two halfband filters +// multiple of 2, enable one halfband filter +// handle remainder in CIC +static boost::uint32_t calculate_cic_word(size_t rate){ + int hb0 = 0, hb1 = 0; + if (not (rate & 0x1)){ + hb0 = 1; + rate /= 2; + } + if (not (rate & 0x1)){ + hb1 = 1; + rate /= 2; + } + return (hb1 << 9) | (hb0 << 8) | (rate & 0xff); +} + +static boost::uint32_t calculate_iq_scale_word(boost::int16_t i, boost::int16_t q){ + return (boost::uint16_t(i) << 16) | (boost::uint16_t(q) << 0); +} + /*********************************************************************** * RX DDC Initialization **********************************************************************/ -- cgit v1.2.3