From 67b5827faecd3dc3d9977dff7366b8ea2ab4c87a Mon Sep 17 00:00:00 2001 From: Sugandha Gupta Date: Tue, 5 Jun 2018 13:48:07 -0700 Subject: ad9361: Add API to set 1R1T/2R2T timing modes LVDS interface can support both timing modes 1R1T/2R2T The API sets the required bit in catalina registers. --- host/lib/usrp/common/ad9361_ctrl.cpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'host/lib/usrp/common/ad9361_ctrl.cpp') diff --git a/host/lib/usrp/common/ad9361_ctrl.cpp b/host/lib/usrp/common/ad9361_ctrl.cpp index 2b6821fc0..1982d83e7 100644 --- a/host/lib/usrp/common/ad9361_ctrl.cpp +++ b/host/lib/usrp/common/ad9361_ctrl.cpp @@ -168,6 +168,20 @@ public: } + //! set which timing mode to use - 1R1T, 2R2T + void set_timing_mode(const std::string &timing_mode) + { + boost::lock_guard lock(_mutex); + + _use_safe_spi(); + if ((timing_mode != "2R2T") && (timing_mode != "1R1T")) { + throw uhd::assertion_error("ad9361_ctrl: Timing mode not supported"); + } + _device.set_timing_mode((timing_mode == "2R2T")? ad9361_device_t::TIMING_MODE_2R2T : ad9361_device_t::TIMING_MODE_1R1T); + _use_timed_spi(); + + } + //! tune the given frontend, return the exact value double tune(const std::string &which, const double freq) { -- cgit v1.2.3