From db6f3a2d7aabdd0eaa1021ac174edd3cbb77be55 Mon Sep 17 00:00:00 2001 From: Ashish Chaudhari Date: Fri, 1 Aug 2014 16:29:34 -0700 Subject: b200: Added variable rate SPI core for AD9361 and ADF4001 - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz --- host/lib/usrp/b200/b200_regs.hpp | 1 + 1 file changed, 1 insertion(+) (limited to 'host/lib/usrp/b200/b200_regs.hpp') diff --git a/host/lib/usrp/b200/b200_regs.hpp b/host/lib/usrp/b200/b200_regs.hpp index 2f4373409..dc8a6b0dc 100644 --- a/host/lib/usrp/b200/b200_regs.hpp +++ b/host/lib/usrp/b200/b200_regs.hpp @@ -54,6 +54,7 @@ localparam RB64_CODEC_READBACK = 24; //pll constants static const int AD9361_SLAVENO = (1 << 0); static const int ADF4001_SLAVENO = (1 << 1); +static const double AD9361_SPI_RATE = 1e6; static const double ADF4001_SPI_RATE = 10e3; //slow for large time constant on spi lines /* ATR Control Bits */ -- cgit v1.2.3