From db6f3a2d7aabdd0eaa1021ac174edd3cbb77be55 Mon Sep 17 00:00:00 2001
From: Ashish Chaudhari <ashish@ettus.com>
Date: Fri, 1 Aug 2014 16:29:34 -0700
Subject: b200: Added variable rate SPI core for AD9361 and ADF4001

- Added b200_local_spi core that adjusts the divider when talking to the two chips
- AD9361 rate is 1MHz and ADF4001 rate is 10kHz
---
 host/lib/usrp/b200/b200_impl.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'host/lib/usrp/b200/b200_impl.cpp')

diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp
index 04cb8062e..7c85176ef 100644
--- a/host/lib/usrp/b200/b200_impl.cpp
+++ b/host/lib/usrp/b200/b200_impl.cpp
@@ -31,6 +31,7 @@
 #include <boost/thread/thread.hpp>
 #include <boost/lexical_cast.hpp>
 #include <boost/functional/hash.hpp>
+#include <boost/make_shared.hpp>
 #include <cstdio>
 #include <ctime>
 #include <cmath>
@@ -341,9 +342,8 @@ b200_impl::b200_impl(const device_addr_t &device_addr)
     ////////////////////////////////////////////////////////////////////
     // create time and clock control objects
     ////////////////////////////////////////////////////////////////////
-    _spi_iface = spi_core_3000::make(_local_ctrl, TOREG(SR_CORE_SPI), RB32_CORE_SPI);
-    _spi_iface->set_divider(B200_BUS_CLOCK_RATE/ADF4001_SPI_RATE);
-    _adf4001_iface = boost::shared_ptr<adf4001_ctrl>(new adf4001_ctrl(_spi_iface, ADF4001_SLAVENO));
+    _spi_iface = b200_local_spi_core::make(_local_ctrl);
+    _adf4001_iface = boost::make_shared<b200_ref_pll_ctrl>(_spi_iface);
 
     ////////////////////////////////////////////////////////////////////
     // Init codec - turns on clocks
-- 
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