From ba0bbdb3ca3815ca45766cc5f2d06a4d12810f0f Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Mon, 22 Feb 2010 18:37:29 -0800 Subject: first cut at automatically setting the debug pins --- host/apps/omap_debug/set_debug_pins.py | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100755 host/apps/omap_debug/set_debug_pins.py (limited to 'host/apps/omap_debug/set_debug_pins.py') diff --git a/host/apps/omap_debug/set_debug_pins.py b/host/apps/omap_debug/set_debug_pins.py new file mode 100755 index 000000000..982c290ef --- /dev/null +++ b/host/apps/omap_debug/set_debug_pins.py @@ -0,0 +1,34 @@ +#!/usr/bin/python + +import os + +# Memory Map +misc_base = 0 +uart_base = 1 +spi_base = 2 +i2c_base = 3 +gpio_base = 4 +settings_base = 5 + +# GPIO offset +gpio_pins = 0 +gpio_ddr = 4 +gpio_ctrl_lo = 8 +gpio_ctrl_hi = 12 + +def set_reg(reg, val): + os.system("usrp1-e-ctl w %d 1 %d" % (reg,val)) + +def get_reg(reg): + fin,fout = os.popen4("usrp1-e-ctl r %d 1" % (reg,)) + print fout.read() + +# Set DDRs to output +set_reg(gpio_base+gpio_ddr, 0xFFFF) +set_reg(gpio_base+gpio_ddr+2, 0xFFFF) + +# Set CTRL to Debug #0 ( A is for debug 0, F is for debug 1 ) +set_reg(gpio_base+ctrl_lo, 0xAAAA) +set_reg(gpio_base+ctrl_lo+2, 0xAAAA) +set_reg(gpio_base+ctrl_hi, 0xAAAA) +set_reg(gpio_base+ctrl_hi+2, 0xAAAA) -- cgit v1.2.3 From 3cd7bc9be6420623eb7803e490b39ecc75d83ed9 Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Mon, 22 Feb 2010 18:43:16 -0800 Subject: full neame --- host/apps/omap_debug/set_debug_pins.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'host/apps/omap_debug/set_debug_pins.py') diff --git a/host/apps/omap_debug/set_debug_pins.py b/host/apps/omap_debug/set_debug_pins.py index 982c290ef..d67cc3e58 100755 --- a/host/apps/omap_debug/set_debug_pins.py +++ b/host/apps/omap_debug/set_debug_pins.py @@ -28,7 +28,7 @@ set_reg(gpio_base+gpio_ddr, 0xFFFF) set_reg(gpio_base+gpio_ddr+2, 0xFFFF) # Set CTRL to Debug #0 ( A is for debug 0, F is for debug 1 ) -set_reg(gpio_base+ctrl_lo, 0xAAAA) -set_reg(gpio_base+ctrl_lo+2, 0xAAAA) -set_reg(gpio_base+ctrl_hi, 0xAAAA) -set_reg(gpio_base+ctrl_hi+2, 0xAAAA) +set_reg(gpio_base+gpio_ctrl_lo, 0xAAAA) +set_reg(gpio_base+gpio_ctrl_lo+2, 0xAAAA) +set_reg(gpio_base+gpio_ctrl_hi, 0xAAAA) +set_reg(gpio_base+gpio_ctrl_hi+2, 0xAAAA) -- cgit v1.2.3 From f6ec1e45117f5794facd1cd8e11cbfacabdeb166 Mon Sep 17 00:00:00 2001 From: root Date: Wed, 24 Feb 2010 02:18:54 +0000 Subject: Commit wip. Programs that fetch OS code sync now. --- host/apps/omap_debug/fetch-bin.sh | 1 + host/apps/omap_debug/fetch-kernel.sh | 1 + host/apps/omap_debug/fetch-module.sh | 1 + host/apps/omap_debug/set_debug_pins.py | 4 ++-- 4 files changed, 5 insertions(+), 2 deletions(-) (limited to 'host/apps/omap_debug/set_debug_pins.py') diff --git a/host/apps/omap_debug/fetch-bin.sh b/host/apps/omap_debug/fetch-bin.sh index 9fb09a10d..1ceec4fd2 100755 --- a/host/apps/omap_debug/fetch-bin.sh +++ b/host/apps/omap_debug/fetch-bin.sh @@ -1 +1,2 @@ scp balister@192.168.1.182:Download/u1e.bin . +sync diff --git a/host/apps/omap_debug/fetch-kernel.sh b/host/apps/omap_debug/fetch-kernel.sh index e3bc1b0ad..08b470e9b 100755 --- a/host/apps/omap_debug/fetch-kernel.sh +++ b/host/apps/omap_debug/fetch-kernel.sh @@ -1,2 +1,3 @@ scp balister@192.168.1.182:src/git/kernel_usrp/arch/arm/boot/uImage /media/mmcblk0p1/uImage +sync diff --git a/host/apps/omap_debug/fetch-module.sh b/host/apps/omap_debug/fetch-module.sh index 95140df15..6511958f9 100755 --- a/host/apps/omap_debug/fetch-module.sh +++ b/host/apps/omap_debug/fetch-module.sh @@ -1 +1,2 @@ scp balister@192.168.1.182:src/git/kernel_usrp/drivers/misc/usrp1_e.ko /lib/modules/2.6.33-rc3/kernel/drivers/misc +sync diff --git a/host/apps/omap_debug/set_debug_pins.py b/host/apps/omap_debug/set_debug_pins.py index d67cc3e58..bedabc20c 100755 --- a/host/apps/omap_debug/set_debug_pins.py +++ b/host/apps/omap_debug/set_debug_pins.py @@ -17,10 +17,10 @@ gpio_ctrl_lo = 8 gpio_ctrl_hi = 12 def set_reg(reg, val): - os.system("usrp1-e-ctl w %d 1 %d" % (reg,val)) + os.system("./usrp1-e-ctl w %d 1 %d" % (reg,val)) def get_reg(reg): - fin,fout = os.popen4("usrp1-e-ctl r %d 1" % (reg,)) + fin,fout = os.popen4("./usrp1-e-ctl r %d 1" % (reg,)) print fout.read() # Set DDRs to output -- cgit v1.2.3 From e273ea92d83d46ca350ac07e3d836a4d99b106c2 Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Mon, 8 Mar 2010 16:13:06 -0800 Subject: proper flags bits --- host/apps/omap_debug/set_debug_pins.py | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'host/apps/omap_debug/set_debug_pins.py') diff --git a/host/apps/omap_debug/set_debug_pins.py b/host/apps/omap_debug/set_debug_pins.py index d67cc3e58..20071db6b 100755 --- a/host/apps/omap_debug/set_debug_pins.py +++ b/host/apps/omap_debug/set_debug_pins.py @@ -3,12 +3,12 @@ import os # Memory Map -misc_base = 0 -uart_base = 1 -spi_base = 2 -i2c_base = 3 -gpio_base = 4 -settings_base = 5 +misc_base = 0 << 7 +uart_base = 1 << 7 +spi_base = 2 << 7 +i2c_base = 3 << 7 +gpio_base = 4 << 7 +settings_base = 5 << 7 # GPIO offset gpio_pins = 0 -- cgit v1.2.3 From 50780640a1b9ed6abb2abebbc727ce19711fbcb4 Mon Sep 17 00:00:00 2001 From: Philip Balister Date: Fri, 9 Apr 2010 21:41:37 +0000 Subject: Test program to verify GPIO on daughterboards. For success, connect gpios on TX to corresponding ones on RX. --- host/apps/omap_debug/Makefile | 5 +- host/apps/omap_debug/set_debug_pins.py | 13 +++--- host/apps/omap_debug/usrp-e-gpio.c | 83 ++++++++++++++++++++++++++++++++++ 3 files changed, 94 insertions(+), 7 deletions(-) create mode 100644 host/apps/omap_debug/usrp-e-gpio.c (limited to 'host/apps/omap_debug/set_debug_pins.py') diff --git a/host/apps/omap_debug/Makefile b/host/apps/omap_debug/Makefile index cd95d36fc..31229d45c 100644 --- a/host/apps/omap_debug/Makefile +++ b/host/apps/omap_debug/Makefile @@ -1,6 +1,6 @@ CFLAGS=-Wall -I../../lib/usrp/usrp_e/ -all : usrp-e-spi usrp-e-i2c usrp-e-rw usrp-e-uart usrp-e-led usrp-e-ctl usrp-e-button usrp-e-uart-rx fpga-downloader +all : usrp-e-spi usrp-e-i2c usrp-e-rw usrp-e-uart usrp-e-led usrp-e-ctl usrp-e-button usrp-e-uart-rx fpga-downloader usrp-e-gpio usrp-e-spi : usrp-e-spi.c @@ -21,6 +21,8 @@ usrp-e-button : usrp-e-button.c fpga-downloader : fpga-downloader.cc +usrp-e-gpio : usrp-e-gpio.c + clean : rm -f usrp-e-spi rm -f usrp-e-i2c @@ -31,3 +33,4 @@ clean : rm -f usrp-e-ctl rm -f usrp-e-button rm -f fpga-downloader + rm -f usrp-e-gpio diff --git a/host/apps/omap_debug/set_debug_pins.py b/host/apps/omap_debug/set_debug_pins.py index fdd085c9e..0f9ecd7b9 100755 --- a/host/apps/omap_debug/set_debug_pins.py +++ b/host/apps/omap_debug/set_debug_pins.py @@ -3,12 +3,12 @@ import os # Memory Map -misc_base = 0 << 7 -uart_base = 1 << 7 -spi_base = 2 << 7 -i2c_base = 3 << 7 -gpio_base = 4 << 7 -settings_base = 5 << 7 +misc_base = 0 +uart_base = 1 +spi_base = 2 +i2c_base = 3 +gpio_base = 4 * 128 +settings_base = 5 # GPIO offset gpio_pins = 0 @@ -32,3 +32,4 @@ set_reg(gpio_base+gpio_ctrl_lo, 0xAAAA) set_reg(gpio_base+gpio_ctrl_lo+2, 0xAAAA) set_reg(gpio_base+gpio_ctrl_hi, 0xAAAA) set_reg(gpio_base+gpio_ctrl_hi+2, 0xAAAA) + diff --git a/host/apps/omap_debug/usrp-e-gpio.c b/host/apps/omap_debug/usrp-e-gpio.c new file mode 100644 index 000000000..adef877d3 --- /dev/null +++ b/host/apps/omap_debug/usrp-e-gpio.c @@ -0,0 +1,83 @@ +#include +#include +#include +#include +#include +#include +#include + +#include "usrp_e.h" +#include "usrp_e_regs.hpp" + +// Usage: usrp_e_gpio + +static int fp; + +static int read_reg(__u16 reg) +{ + int ret; + struct usrp_e_ctl16 d; + + d.offset = reg; + d.count = 1; + ret = ioctl(fp, USRP_E_READ_CTL16, &d); + return d.buf[0]; +} + +static void write_reg(__u16 reg, __u16 val) +{ + int ret; + struct usrp_e_ctl16 d; + + d.offset = reg; + d.count = 1; + d.buf[0] = val; + ret = ioctl(fp, USRP_E_WRITE_CTL16, &d); +} + +int main(int argc, char *argv[]) +{ + int i, test, data_in; + + test = 0; + if (argc > 1) + test = 1; + + fp = open("/dev/usrp_e0", O_RDWR); + printf("fp = %d\n", fp); + + write_reg(UE_REG_GPIO_TX_DDR, 0x0); + write_reg(UE_REG_GPIO_RX_DDR, 0xFFFF); + + for (i=0; i < 16; i++) { + write_reg(UE_REG_GPIO_RX_IO, 1 << i); + sleep(1); + if (test) { + data_in = read_reg(UE_REG_GPIO_TX_IO); + if (data_in != (1 << i)) + printf("Read failed, wrote: %X read: %X\n", \ + 1 << i, data_in); + } + } + + write_reg(UE_REG_GPIO_RX_DDR, 0x0); + write_reg(UE_REG_GPIO_TX_DDR, 0xFFFF); + + sleep(1); + + for (i=0; i < 16; i++) { + write_reg(UE_REG_GPIO_TX_IO, 1 << i); + sleep(1); + if (test) { + data_in = read_reg(UE_REG_GPIO_RX_IO); + if (data_in != (1 << i)) + printf("Read failed, wrote: %X read: %X\n", \ + 1 << i, data_in); + } + } + + write_reg(UE_REG_GPIO_RX_DDR, 0x0); + write_reg(UE_REG_GPIO_TX_DDR, 0x0); + + return 0; +} -- cgit v1.2.3