From 788fef11ef890c6dcee3be495fc381bcf2990d3b Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Sat, 29 Jan 2022 20:47:36 -0600 Subject: fpga: e31x: Add DRAM support This adds DRAM support to E31x devices. Due to the size of the DDR3 memory controller, it is not enabled by default. You can include the memory controller IP in the build by adding the DRAM environment variable to your build. For example: DRAM=1 make E310_SG3 --- fpga/usrp3/top/e31x/ip/ddr3_16bit/ddr3_16bit.xci | 2649 ++++++++++++++++++++++ 1 file changed, 2649 insertions(+) create mode 100644 fpga/usrp3/top/e31x/ip/ddr3_16bit/ddr3_16bit.xci (limited to 'fpga/usrp3/top/e31x/ip/ddr3_16bit/ddr3_16bit.xci') diff --git a/fpga/usrp3/top/e31x/ip/ddr3_16bit/ddr3_16bit.xci b/fpga/usrp3/top/e31x/ip/ddr3_16bit/ddr3_16bit.xci new file mode 100644 index 000000000..7d467a859 --- /dev/null +++ b/fpga/usrp3/top/e31x/ip/ddr3_16bit/ddr3_16bit.xci @@ -0,0 +1,2649 @@ + + + xilinx.com + xci + unknown + 1.0 + + + ddr3_16bit + + + 0 + 0 + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + 0 + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + 0 + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + 0 + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + 0 + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + 0 + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + 0 + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + 0 + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + false + 100000000 + + + + 100000000 + 0 + 0.000 + + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + TDM + 8 + false + 11 + 11 + true + + true + 8 + + COMPONENTS + ROW_COLUMN_BANK + Single + 1250 + 0 + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 0 + false + 100000000 + + + + 100000000 + 0 + 0.000 + 29 + 0 + 0 + 0 + + 128 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 12 + 0 + 256 + 2 + 1 + 2 + 1 + 0.000 + AXI4 + READ_WRITE + 0 + 0 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 0.000 + AXI4LITE + READ_WRITE + 0 + 0 + 0 + 0 + 0 + 32 + 32 + 32 + 4 + 1048576 + 32 + 4 + 1048576 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 8 + 2 + OFF + 1 + OFF + 100.0 + FALSE + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + DDR3 + FALSE + 10.0 + FALSE + 10 + FALSE + 10 + FALSE + 10 + FALSE + 10 + 1200.0 + 0.000 + ACTIVE_LOW + 29 + 1 + 8 + 18 + OFF + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 18 + 1 + 1 + DIFF + FALSE + 0 + 32 + 32 + 32 + 4 + 1048576 + 32 + 4 + 1048576 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 8 + 2 + OFF + 1 + OFF + 100.0 + FALSE + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + DDR3 + FALSE + 10.0 + FALSE + 10 + FALSE + 10 + FALSE + 10 + FALSE + 10 + 1200.0 + 0.000 + ACTIVE_LOW + 29 + 1 + 8 + 18 + OFF + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 18 + 1 + 1 + DIFF + FALSE + 0 + 32 + 32 + 32 + 4 + 1048576 + 32 + 4 + 1048576 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 8 + 2 + OFF + 1 + OFF + 100.0 + FALSE + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + DDR3 + FALSE + 10.0 + FALSE + 10 + FALSE + 10 + FALSE + 10 + FALSE + 10 + 1200.0 + 0.000 + ACTIVE_LOW + 29 + 1 + 8 + 18 + OFF + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 18 + 1 + 1 + DIFF + FALSE + 0 + 32 + 32 + 32 + 4 + 1048576 + 32 + 4 + 1048576 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 8 + 2 + OFF + 1 + OFF + 100.0 + FALSE + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + DDR3 + FALSE + 10.0 + FALSE + 10 + FALSE + 10 + FALSE + 10 + FALSE + 10 + 1200.0 + 0.000 + ACTIVE_LOW + 29 + 1 + 8 + 18 + OFF + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 18 + 1 + 1 + DIFF + FALSE + 0 + 32 + 32 + 32 + 4 + 1048576 + 32 + 4 + 1048576 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 8 + 2 + OFF + 1 + OFF + 100.0 + FALSE + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + DDR3 + FALSE + 10.0 + FALSE + 10 + FALSE + 10 + FALSE + 10 + FALSE + 10 + 1200.0 + 0.000 + ACTIVE_LOW + 29 + 1 + 8 + 18 + OFF + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 18 + 1 + 1 + DIFF + FALSE + 0 + 32 + 32 + 32 + 4 + 1048576 + 32 + 4 + 1048576 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 8 + 2 + OFF + 1 + OFF + 100.0 + FALSE + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + DDR3 + FALSE + 10.0 + FALSE + 10 + FALSE + 10 + FALSE + 10 + FALSE + 10 + 1200.0 + 0.000 + ACTIVE_LOW + 29 + 1 + 8 + 18 + OFF + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 18 + 1 + 1 + DIFF + FALSE + 0 + 32 + 32 + 32 + 4 + 1048576 + 32 + 4 + 1048576 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 8 + 2 + OFF + 1 + OFF + 100.0 + FALSE + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + DDR3 + FALSE + 10.0 + FALSE + 10 + FALSE + 10 + FALSE + 10 + FALSE + 10 + 1200.0 + 0.000 + ACTIVE_LOW + 29 + 1 + 8 + 18 + OFF + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 18 + 1 + 1 + DIFF + FALSE + 0 + 32 + 32 + 32 + 4 + 1048576 + 32 + 4 + 1048576 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 8 + 8 + 2 + OFF + 1 + OFF + 100.0 + FALSE + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + DDR3 + FALSE + 10.0 + FALSE + 10 + FALSE + 10 + FALSE + 10 + FALSE + 10 + 1200.0 + 0.000 + ACTIVE_LOW + 29 + 1 + 8 + 18 + OFF + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 18 + 1 + 1 + DIFF + FALSE + 0 + 0 + 29 + 32 + 32 + 4 + 1048576 + 128 + 12 + 536870912 + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + 1 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + 29 + 3 + 1 + 1 + 1 + 16 + OFF + 2 + 1 + 2 + 16 + 1 + OFF + 15 + 0 + 1 + 1 + 4 + 1 + 8 + 8 + 2 + OFF + 1 + OFF + 100000000 + FALSE + 8 + 3 + 1 + 1 + 1 + 8 + OFF + 1 + 1 + 1 + 8 + OFF + 14 + 1 + 1 + 1 + 2 + 1 + DDR3 + FALSE + 10.0 + FALSE + 10 + FALSE + 10 + FALSE + 10 + FALSE + 10 + 800 + 1 + 0.000 + ACTIVE_HIGH + 29 + 1 + 8 + 18 + OFF + 1 + NOBUF + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 1 + 18 + OFF + 1 + 1 + 1 + 8 + 1 + 29 + 1 + 29 + 2 + 1 + 18 + 1 + 1 + SINGLE + INTERNAL + FALSE + 1 + Custom + ddr3_16bit + Custom + Custom + mig_a.prj + zynq + + + xc7z020 + clg484 + VERILOG + + MIXED + -1 + + + TRUE + TRUE + IP_Flow + 1 + TRUE + . + + . + 2019.1 + OUT_OF_CONTEXT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + -- cgit v1.2.3