From fd3e84941de463fa1a7ebab0a69515b4bf2614cd Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Tue, 7 Oct 2014 11:25:20 +0200 Subject: Removed copy of FPGA source files. --- fpga/usrp2/timing/time_compare.v | 34 ---------------------------------- 1 file changed, 34 deletions(-) delete mode 100644 fpga/usrp2/timing/time_compare.v (limited to 'fpga/usrp2/timing/time_compare.v') diff --git a/fpga/usrp2/timing/time_compare.v b/fpga/usrp2/timing/time_compare.v deleted file mode 100644 index 21607f51c..000000000 --- a/fpga/usrp2/timing/time_compare.v +++ /dev/null @@ -1,34 +0,0 @@ -// -// Copyright 2011-2012 Ettus Research LLC -// -// This program is free software: you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation, either version 3 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program. If not, see . -// - - -// 64 bits worth of ticks - -module time_compare - (input [63:0] time_now, - input [63:0] trigger_time, - output now, - output early, - output late, - output too_early); - - assign now = time_now == trigger_time; - assign late = time_now > trigger_time; - assign early = ~now & ~late; - assign too_early = 0; //not implemented - -endmodule // time_compare -- cgit v1.2.3