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-rw-r--r--host/docs/transport.rst11
-rw-r--r--host/docs/usrp2.rst15
-rw-r--r--host/lib/usrp/usrp2/mboard_impl.cpp22
-rw-r--r--host/lib/usrp/usrp2/usrp2_impl.cpp8
-rw-r--r--host/lib/usrp/usrp2/usrp2_impl.hpp7
-rw-r--r--host/lib/usrp/usrp2/usrp2_regs.hpp8
6 files changed, 46 insertions, 25 deletions
diff --git a/host/docs/transport.rst b/host/docs/transport.rst
index 432db4bb5..2f730f8e4 100644
--- a/host/docs/transport.rst
+++ b/host/docs/transport.rst
@@ -40,6 +40,17 @@ The following parameters can be used to alter the transport's default behavior:
as the asynchronous send implementation is currently disabled.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+Flow control parameters
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+The host-based flow control expects periodic update packets from the device.
+These update packets inform the host of the last packet consumed by the device,
+which allows the host to determine throttling conditions for the transmission of packets.
+The following mechanisms affect the transmission of periodic update packets:
+
+* **ups_per_fifo:** The number of update packets for each FIFO's worth of bytes sent into the device
+* **ups_per_sec:** The number of update packets per second
+
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Resize socket buffers
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
It may be useful increase the size of the socket buffers to
diff --git a/host/docs/usrp2.rst b/host/docs/usrp2.rst
index 1ebab388a..8fa666a49 100644
--- a/host/docs/usrp2.rst
+++ b/host/docs/usrp2.rst
@@ -39,12 +39,10 @@ Use the card burner tool (windows)
------------------------------------------------------------------------
Setup networking
------------------------------------------------------------------------
-The USRP2 only supports gigabit ethernet, and
-will not work with a 10/100 Mbps interface.
-Because the USRP2 uses gigabit ethernet pause frames for flow control,
-you cannot use multiple USRP2s with a switch or a hub.
-It is recommended that each USRP2 be plugged directly into its own
-dedicated gigabit ethernet interface on the host computer.
+The USRP2 only supports gigabit ethernet,
+and will not work with a 10/100 Mbps interface.
+However, a 10/100 Mbps interface can be connected indirectly
+to a USRP2 through a gigabit ethernet switch.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Setup the host interface
@@ -63,8 +61,9 @@ It is recommended that you change or disable your firewall settings.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Multiple device configuration
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-As described above, you will need one ethernet interface per USRP2.
-Each ethernet interface should have its own subnet,
+For maximum throughput, one ethernet interface per USRP2 is recommended,
+although multiple devices may be connected via a gigabit ethernet switch.
+In any case, each ethernet interface should have its own subnet,
and the corresponding USRP2 device should be assigned an address in that subnet.
Example:
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index 65066f125..5210eee94 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -39,7 +39,8 @@ usrp2_mboard_impl::usrp2_mboard_impl(
size_t index,
transport::udp_simple::sptr ctrl_transport,
size_t recv_samps_per_packet,
- size_t send_bytes_per_packet
+ size_t send_bytes_per_packet,
+ const device_addr_t &flow_control_hints
):
_index(index),
_recv_samps_per_packet(recv_samps_per_packet)
@@ -89,11 +90,16 @@ usrp2_mboard_impl::usrp2_mboard_impl(
_iface->poke32(U2_REG_TX_CTRL_CLEAR_STATE, 1); //reset
_iface->poke32(U2_REG_TX_CTRL_REPORT_SID, 1); //sid 1 (different from rx)
_iface->poke32(U2_REG_TX_CTRL_POLICY, U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET);
- const size_t cycles_per_ack = size_t(_clock_ctrl->get_master_clock_rate()/100); //100 aps
- _iface->poke32(U2_REG_TX_CTRL_CYCLES_PER_ACK, U2_FLAG_TX_CTRL_ACK_ENB | cycles_per_ack);
- static const double sram_frac = 1.0/8.0; //fraction of sram to fill before ack
- const size_t packets_per_ack = size_t(usrp2_impl::sram_bytes*sram_frac/send_bytes_per_packet);
- _iface->poke32(U2_REG_TX_CTRL_PACKETS_PER_ACK, U2_FLAG_TX_CTRL_ACK_ENB | packets_per_ack);
+
+ //setting the cycles per update
+ const double ups_per_sec = flow_control_hints.cast<double>("ups_per_sec", 100);
+ const size_t cycles_per_up = size_t(_clock_ctrl->get_master_clock_rate()/ups_per_sec);
+ _iface->poke32(U2_REG_TX_CTRL_CYCLES_PER_UP, U2_FLAG_TX_CTRL_UP_ENB | cycles_per_up);
+
+ //setting the packets per update
+ const double ups_per_fifo = flow_control_hints.cast<double>("ups_per_fifo", 8);
+ const size_t packets_per_up = size_t(usrp2_impl::sram_bytes/ups_per_fifo/send_bytes_per_packet);
+ _iface->poke32(U2_REG_TX_CTRL_PACKETS_PER_UP, U2_FLAG_TX_CTRL_UP_ENB | packets_per_up);
//init the ddc
init_ddc_config();
@@ -116,8 +122,8 @@ usrp2_mboard_impl::usrp2_mboard_impl(
}
usrp2_mboard_impl::~usrp2_mboard_impl(void){
- _iface->poke32(U2_REG_TX_CTRL_CYCLES_PER_ACK, 0);
- _iface->poke32(U2_REG_TX_CTRL_PACKETS_PER_ACK, 0);
+ _iface->poke32(U2_REG_TX_CTRL_CYCLES_PER_UP, 0);
+ _iface->poke32(U2_REG_TX_CTRL_PACKETS_PER_UP, 0);
}
/***********************************************************************
diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp
index 1d9f25019..e271f839c 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.cpp
@@ -138,7 +138,7 @@ static device::sptr usrp2_make(const device_addr_t &device_addr){
//create the usrp2 implementation guts
return device::sptr(
- new usrp2_impl(ctrl_transports, data_transports)
+ new usrp2_impl(ctrl_transports, data_transports, device_addr)
);
}
@@ -151,7 +151,8 @@ UHD_STATIC_BLOCK(register_usrp2_device){
**********************************************************************/
usrp2_impl::usrp2_impl(
std::vector<udp_simple::sptr> ctrl_transports,
- std::vector<zero_copy_if::sptr> data_transports
+ std::vector<zero_copy_if::sptr> data_transports,
+ const device_addr_t &flow_control_hints
):
_data_transports(data_transports)
{
@@ -172,7 +173,8 @@ usrp2_impl::usrp2_impl(
_mboards.push_back(usrp2_mboard_impl::sptr(new usrp2_mboard_impl(
i, ctrl_transports[i],
this->get_max_recv_samps_per_packet(),
- _data_transports[i]->get_send_frame_size()
+ _data_transports[i]->get_send_frame_size(),
+ flow_control_hints
)));
//use an empty name when there is only one mboard
std::string name = (ctrl_transports.size() > 1)? boost::lexical_cast<std::string>(i) : "";
diff --git a/host/lib/usrp/usrp2/usrp2_impl.hpp b/host/lib/usrp/usrp2/usrp2_impl.hpp
index 2077b0a50..3aa6e9cd5 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.hpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.hpp
@@ -85,7 +85,8 @@ public:
size_t index,
uhd::transport::udp_simple::sptr,
size_t recv_samps_per_packet,
- size_t send_bytes_per_packet
+ size_t send_bytes_per_packet,
+ const uhd::device_addr_t &flow_control_hints
);
~usrp2_mboard_impl(void);
@@ -178,10 +179,12 @@ public:
* Create a new usrp2 impl base.
* \param ctrl_transports the udp transports for control
* \param data_transports the udp transports for data
+ * \param flow_control_hints optional flow control params
*/
usrp2_impl(
std::vector<uhd::transport::udp_simple::sptr> ctrl_transports,
- std::vector<uhd::transport::zero_copy_if::sptr> data_transports
+ std::vector<uhd::transport::zero_copy_if::sptr> data_transports,
+ const uhd::device_addr_t &flow_control_hints
);
~usrp2_impl(void);
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index bdd5194f9..c3a4d22de 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -193,14 +193,14 @@
#define U2_REG_TX_CTRL_CLEAR_STATE _SR_ADDR(SR_TX_CTRL + 1)
#define U2_REG_TX_CTRL_REPORT_SID _SR_ADDR(SR_TX_CTRL + 2)
#define U2_REG_TX_CTRL_POLICY _SR_ADDR(SR_TX_CTRL + 3)
-#define U2_REG_TX_CTRL_CYCLES_PER_ACK _SR_ADDR(SR_TX_CTRL + 4)
-#define U2_REG_TX_CTRL_PACKETS_PER_ACK _SR_ADDR(SR_TX_CTRL + 5)
+#define U2_REG_TX_CTRL_CYCLES_PER_UP _SR_ADDR(SR_TX_CTRL + 4)
+#define U2_REG_TX_CTRL_PACKETS_PER_UP _SR_ADDR(SR_TX_CTRL + 5)
#define U2_FLAG_TX_CTRL_POLICY_WAIT (0x1 << 0)
#define U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET (0x1 << 1)
#define U2_FLAG_TX_CTRL_POLICY_NEXT_BURST (0x1 << 2)
-//enable flag for registers: cycles and packets per ack
-#define U2_FLAG_TX_CTRL_ACK_ENB (1ul << 31)
+//enable flag for registers: cycles and packets per update packet
+#define U2_FLAG_TX_CTRL_UP_ENB (1ul << 31)
#endif /* INCLUDED_USRP2_REGS_HPP */
generated by cgit v1.2.3 (git 2.46.0) at 2025-10-31 15:12:58 +0000