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-rw-r--r--host/lib/device.cpp4
-rw-r--r--host/lib/usrp/usrp_e100/clock_ctrl.cpp30
-rw-r--r--host/lib/usrp/usrp_e100/codec_ctrl.cpp10
-rw-r--r--host/lib/usrp/usrp_e100/fpga_downloader.cpp31
-rw-r--r--host/lib/usrp/usrp_e100/io_impl.cpp23
-rw-r--r--host/lib/usrp/usrp_e100/mboard_impl.cpp11
-rw-r--r--host/lib/usrp/usrp_e100/usrp_e100_impl.cpp6
-rw-r--r--host/lib/usrp/usrp_e100/usrp_e100_mmap_zero_copy.cpp55
8 files changed, 88 insertions, 82 deletions
diff --git a/host/lib/device.cpp b/host/lib/device.cpp
index b2b0238d2..84b4d5452 100644
--- a/host/lib/device.cpp
+++ b/host/lib/device.cpp
@@ -18,6 +18,7 @@
#include <uhd/device.hpp>
#include <uhd/types/dict.hpp>
#include <uhd/exception.hpp>
+#include <uhd/utils/msg.hpp>
#include <uhd/utils/static.hpp>
#include <uhd/utils/algorithm.hpp>
#include <boost/foreach.hpp>
@@ -26,7 +27,6 @@
#include <boost/functional/hash.hpp>
#include <boost/tuple/tuple.hpp>
#include <boost/thread/mutex.hpp>
-#include <iostream>
using namespace uhd;
@@ -87,7 +87,7 @@ device_addrs_t device::find(const device_addr_t &hint){
);
}
catch(const std::exception &e){
- std::cerr << "Device discovery error: " << e.what() << std::endl;
+ UHD_MSG(error) << "Device discovery error: " << e.what() << std::endl;
}
}
diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.cpp b/host/lib/usrp/usrp_e100/clock_ctrl.cpp
index 2e3eb5cb9..65162dbeb 100644
--- a/host/lib/usrp/usrp_e100/clock_ctrl.cpp
+++ b/host/lib/usrp/usrp_e100/clock_ctrl.cpp
@@ -17,6 +17,8 @@
#include "clock_ctrl.hpp"
#include "ad9522_regs.hpp"
+#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/utils/assert_has.hpp>
#include <boost/cstdint.hpp>
#include "usrp_e100_regs.hpp" //spi slave constants
@@ -27,14 +29,12 @@
#include <boost/math/common_factor_rt.hpp> //gcd
#include <algorithm>
#include <utility>
-#include <iostream>
using namespace uhd;
/***********************************************************************
* Constants
**********************************************************************/
-static const bool CLOCK_SETTINGS_DEBUG = false;
static const bool ENABLE_THE_TEST_OUT = true;
static const double REFERENCE_INPUT_RATE = 10e6;
static const double DEFAULT_OUTPUT_RATE = 64e6;
@@ -138,12 +138,12 @@ static clock_settings_type get_clock_settings(double rate){
cs.chan_divider /= cs.vco_divider;
}
- if (CLOCK_SETTINGS_DEBUG){
- std::cout << "gcd " << gcd << std::endl;
- std::cout << "X " << X << std::endl;
- std::cout << "Y " << Y << std::endl;
- std::cout << cs.to_pp_string() << std::endl;
- }
+ UHD_LOGV(always)
+ << "gcd " << gcd << std::endl
+ << "X " << X << std::endl
+ << "Y " << Y << std::endl
+ << cs.to_pp_string() << std::endl
+ ;
//filter limits on the counters
if (cs.vco_divider == 1) continue;
@@ -153,7 +153,7 @@ static clock_settings_type get_clock_settings(double rate){
if (cs.b_counter >= (1<<13)) continue;
if (cs.a_counter >= (1<<6)) continue;
- std::cout << "USRP-E100 clock control: " << i << std::endl << cs.to_pp_string() << std::endl;
+ UHD_MSG(status) << "USRP-E100 clock control: " << i << std::endl << cs.to_pp_string() << std::endl;
return cs;
}
}
@@ -188,18 +188,18 @@ public:
bool fpga_clock_initialized = false;
try{
if (not _iface->mb_eeprom["mcr"].empty()){
- std::cout << "Read FPGA clock rate from EEPROM setting." << std::endl;
+ UHD_MSG(status) << "Read FPGA clock rate from EEPROM setting." << std::endl;
const double master_clock_rate = boost::lexical_cast<double>(_iface->mb_eeprom["mcr"]);
- std::cout << boost::format("Initializing FPGA clock to %fMHz...") % (master_clock_rate/1e6) << std::endl;
+ UHD_MSG(status) << boost::format("Initializing FPGA clock to %fMHz...") % (master_clock_rate/1e6) << std::endl;
this->set_fpga_clock_rate(master_clock_rate);
fpga_clock_initialized = true;
}
}
catch(const std::exception &e){
- std::cerr << "Error setting FPGA clock rate from EEPROM: " << e.what() << std::endl;
+ UHD_MSG(error) << "Error setting FPGA clock rate from EEPROM: " << e.what() << std::endl;
}
if (not fpga_clock_initialized){ //was not set... use the default rate
- std::cout << boost::format("Initializing FPGA clock to %fMHz...") % (DEFAULT_OUTPUT_RATE/1e6) << std::endl;
+ UHD_MSG(status) << boost::format("Initializing FPGA clock to %fMHz...") % (DEFAULT_OUTPUT_RATE/1e6) << std::endl;
this->set_fpga_clock_rate(DEFAULT_OUTPUT_RATE);
}
@@ -440,7 +440,7 @@ private:
void send_reg(boost::uint16_t addr){
boost::uint32_t reg = _ad9522_regs.get_write_reg(addr);
- //std::cout << "clock control write reg: " << std::hex << reg << std::endl;
+ UHD_LOGV(often) << "clock control write reg: " << std::hex << reg << std::endl;
_iface->write_spi(
UE_SPI_SS_AD9522,
spi_config_t::EDGE_RISE,
@@ -467,7 +467,7 @@ private:
if (_ad9522_regs.vco_calibration_finished) return;
boost::this_thread::sleep(boost::posix_time::milliseconds(10));
}
- std::cerr << "USRP-E100 clock control: VCO calibration timeout" << std::endl;
+ UHD_MSG(error) << "USRP-E100 clock control: VCO calibration timeout" << std::endl;
}
void send_all_regs(void){
diff --git a/host/lib/usrp/usrp_e100/codec_ctrl.cpp b/host/lib/usrp/usrp_e100/codec_ctrl.cpp
index 50442546a..c2f2712e3 100644
--- a/host/lib/usrp/usrp_e100/codec_ctrl.cpp
+++ b/host/lib/usrp/usrp_e100/codec_ctrl.cpp
@@ -17,6 +17,7 @@
#include "codec_ctrl.hpp"
#include "ad9862_regs.hpp"
+#include <uhd/utils/log.hpp>
#include <uhd/types/dict.hpp>
#include <uhd/exception.hpp>
#include <uhd/utils/algorithm.hpp>
@@ -25,12 +26,9 @@
#include <boost/math/special_functions/round.hpp>
#include "usrp_e100_regs.hpp" //spi slave constants
#include <boost/assign/list_of.hpp>
-#include <iostream>
using namespace uhd;
-static const bool codec_debug = false;
-
const gain_range_t usrp_e100_codec_ctrl::tx_pga_gain_range(-20, 0, double(0.1));
const gain_range_t usrp_e100_codec_ctrl::rx_pga_gain_range(0, 20, 1);
@@ -268,7 +266,7 @@ void usrp_e100_codec_ctrl_impl::write_aux_dac(aux_dac_t which, double volts){
**********************************************************************/
void usrp_e100_codec_ctrl_impl::send_reg(boost::uint8_t addr){
boost::uint32_t reg = _ad9862_regs.get_write_reg(addr);
- if (codec_debug) std::cout << "codec control write reg: " << std::hex << reg << std::endl;
+ UHD_LOGV(often) << "codec control write reg: " << std::hex << reg << std::endl;
_iface->write_spi(
UE_SPI_SS_AD9862,
spi_config_t::EDGE_RISE,
@@ -278,13 +276,13 @@ void usrp_e100_codec_ctrl_impl::send_reg(boost::uint8_t addr){
void usrp_e100_codec_ctrl_impl::recv_reg(boost::uint8_t addr){
boost::uint32_t reg = _ad9862_regs.get_read_reg(addr);
- if (codec_debug) std::cout << "codec control read reg: " << std::hex << reg << std::endl;
+ UHD_LOGV(often) << "codec control read reg: " << std::hex << reg << std::endl;
boost::uint32_t ret = _iface->read_spi(
UE_SPI_SS_AD9862,
spi_config_t::EDGE_RISE,
reg, 16
);
- if (codec_debug) std::cout << "codec control read ret: " << std::hex << ret << std::endl;
+ UHD_LOGV(often) << "codec control read ret: " << std::hex << ret << std::endl;
_ad9862_regs.set_reg(addr, boost::uint16_t(ret));
}
diff --git a/host/lib/usrp/usrp_e100/fpga_downloader.cpp b/host/lib/usrp/usrp_e100/fpga_downloader.cpp
index 018a120d6..a7449d3b1 100644
--- a/host/lib/usrp/usrp_e100/fpga_downloader.cpp
+++ b/host/lib/usrp/usrp_e100/fpga_downloader.cpp
@@ -18,15 +18,17 @@
#include <uhd/config.hpp>
#ifdef UHD_DLL_EXPORTS
#include <uhd/exception.hpp>
+#include <uhd/utils/msg.hpp>
#else //special case when this file is externally included
#include <stdexcept>
+#include <iostream>
+#define UHD_MSG(type) std::cout
namespace uhd{
typedef std::runtime_error os_error;
typedef std::runtime_error io_error;
}
#endif
-#include <iostream>
#include <sstream>
#include <fstream>
#include <string>
@@ -110,8 +112,9 @@ gpio::gpio(unsigned int gpio_num, gpio_direction pin_direction)
direction_file_name = base_path.str() + "/direction";
direction_file.open(direction_file_name.c_str());
- if (!direction_file.is_open())
- std::cout << "Failed to open direction file." << std::endl;
+ if (!direction_file.is_open()) throw uhd::os_error(
+ "Failed to open direction file."
+ );
if (pin_direction == OUT)
direction_file << "out" << std::endl;
else
@@ -123,8 +126,9 @@ gpio::gpio(unsigned int gpio_num, gpio_direction pin_direction)
value_file_name = base_path.str() + "/value";
value_file.open(value_file_name.c_str(), std::ios_base::in | std::ios_base::out);
- if (!value_file.is_open())
- std::cout << "Failed to open value file." << std::endl;
+ if (!value_file.is_open()) throw uhd::os_error(
+ "Failed to open value file."
+ );
}
bool gpio::get_value()
@@ -140,7 +144,7 @@ bool gpio::get_value()
else if (val == "1")
return true;
else
- std::cout << "Data read from value file|" << val << "|" << std::endl;
+ throw uhd::os_error("Data read from value file|" + val + "|");
return false;
}
@@ -172,8 +176,7 @@ static void prepare_fpga_for_configuration(gpio &prog, gpio &)//init)
} while (count < 10 && !ready_to_program);
if (count == 10) {
- std::cout << "FPGA not ready for programming." << std::endl;
- exit(-1);
+ throw uhd::os_error("FPGA not ready for programming.");
}
#endif
}
@@ -232,10 +235,10 @@ static void send_file_to_fpga(const std::string &file_name, gpio &error, gpio &d
spi.send(buf, rbuf, bitstream.gcount());
if (error.get_value())
- std::cout << "INIT_B went high, error occured." << std::endl;
+ throw uhd::os_error("INIT_B went high, error occured.");
if (!done.get_value())
- std::cout << "Configuration complete." << std::endl;
+ UHD_MSG(status) << "Configuration complete." << std::endl;
} while (bitstream.gcount() == BUF_SIZE);
}
@@ -249,20 +252,20 @@ void usrp_e100_load_fpga(const std::string &bin_file){
gpio gpio_init_b(INIT_B, IN);
gpio gpio_done (DONE, IN);
- std::cout << "Loading FPGA image: " << bin_file << "... " << std::flush;
+ UHD_MSG(status) << "Loading FPGA image: " << bin_file << "... " << std::flush;
if(std::system("/sbin/rmmod usrp_e") != 0){
- std::cerr << "USRP-E100 FPGA downloader: could not unload usrp_e module" << std::endl;
+ UHD_MSG(warning) << "USRP-E100 FPGA downloader: could not unload usrp_e module" << std::endl;
}
prepare_fpga_for_configuration(gpio_prog_b, gpio_init_b);
- std::cout << "done = " << gpio_done.get_value() << std::endl;
+ UHD_MSG(status) << "done = " << gpio_done.get_value() << std::endl;
send_file_to_fpga(bin_file, gpio_init_b, gpio_done);
if(std::system("/sbin/modprobe usrp_e") != 0){
- std::cerr << "USRP-E100 FPGA downloader: could not load usrp_e module" << std::endl;
+ UHD_MSG(warning) << "USRP-E100 FPGA downloader: could not load usrp_e module" << std::endl;
}
}
diff --git a/host/lib/usrp/usrp_e100/io_impl.cpp b/host/lib/usrp/usrp_e100/io_impl.cpp
index 40b8a2393..7e775dfd8 100644
--- a/host/lib/usrp/usrp_e100/io_impl.cpp
+++ b/host/lib/usrp/usrp_e100/io_impl.cpp
@@ -17,6 +17,8 @@
#include "usrp_e100_impl.hpp"
#include "usrp_e100_regs.hpp"
+#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/usrp/dsp_utils.hpp>
#include <uhd/utils/thread_priority.hpp>
#include <uhd/transport/bounded_buffer.hpp>
@@ -25,6 +27,7 @@
#include <boost/format.hpp>
#include <boost/thread/thread.hpp>
#include <boost/thread/barrier.hpp>
+#include <sstream>
#include <iostream>
using namespace uhd;
@@ -37,7 +40,7 @@ using namespace uhd::transport;
static const size_t rx_data_inline_sid = 1;
static const size_t tx_async_report_sid = 2;
static const int underflow_flags = async_metadata_t::EVENT_CODE_UNDERFLOW | async_metadata_t::EVENT_CODE_UNDERFLOW_IN_PACKET;
-static const bool recv_debug = false;
+#define fp_recv_debug false
/***********************************************************************
* io impl details (internal to this file)
@@ -116,12 +119,14 @@ void usrp_e100_impl::io_impl::recv_pirate_loop(
managed_recv_buffer::sptr buff = this->data_xport->get_recv_buff();
if (not buff.get()) continue; //ignore timeout/error buffers
- if (recv_debug){
- std::cout << "len " << buff->size() << std::endl;
+ if (fp_recv_debug){
+ std::ostringstream ss;
+ ss << "len " << buff->size() << std::endl;
for (size_t i = 0; i < 9; i++){
- std::cout << boost::format(" 0x%08x") % buff->cast<const boost::uint32_t *>()[i] << std::endl;
+ ss << boost::format(" 0x%08x") % buff->cast<const boost::uint32_t *>()[i] << std::endl;
}
- std::cout << std::endl << std::endl;
+ ss << std::endl << std::endl;
+ UHD_LOGV(always) << ss.str();
}
try{
@@ -133,7 +138,7 @@ void usrp_e100_impl::io_impl::recv_pirate_loop(
//handle an rx data packet or inline message
if (if_packet_info.sid == rx_data_inline_sid){
- if (recv_debug) std::cout << "this is rx_data_inline_sid\n";
+ if (fp_recv_debug) UHD_LOGV(always) << "this is rx_data_inline_sid\n";
//same number of frames as the data transport -> always immediate
recv_pirate_booty.push_with_wait(buff);
continue;
@@ -141,7 +146,7 @@ void usrp_e100_impl::io_impl::recv_pirate_loop(
//handle a tx async report message
if (if_packet_info.sid == tx_async_report_sid and if_packet_info.packet_type != vrt::if_packet_info_t::PACKET_TYPE_DATA){
- if (recv_debug) std::cout << "this is tx_async_report_sid\n";
+ if (fp_recv_debug) UHD_LOGV(always) << "this is tx_async_report_sid\n";
//fill in the async metadata
async_metadata_t metadata;
@@ -158,10 +163,10 @@ void usrp_e100_impl::io_impl::recv_pirate_loop(
continue;
}
- if (recv_debug) std::cout << "this is unknown packet\n";
+ if (fp_recv_debug) UHD_LOGV(always) << "this is unknown packet\n";
}catch(const std::exception &e){
- std::cerr << "Error (usrp-e recv pirate loop): " << e.what() << std::endl;
+ UHD_MSG(error) << "Error (usrp-e recv pirate loop): " << e.what() << std::endl;
}
}
}
diff --git a/host/lib/usrp/usrp_e100/mboard_impl.cpp b/host/lib/usrp/usrp_e100/mboard_impl.cpp
index 5f4a208d3..d31662eb5 100644
--- a/host/lib/usrp/usrp_e100/mboard_impl.cpp
+++ b/host/lib/usrp/usrp_e100/mboard_impl.cpp
@@ -17,12 +17,12 @@
#include "usrp_e100_impl.hpp"
#include "usrp_e100_regs.hpp"
+#include <uhd/utils/msg.hpp>
#include <uhd/exception.hpp>
#include <uhd/usrp/dsp_utils.hpp>
#include <uhd/usrp/misc_utils.hpp>
#include <uhd/usrp/mboard_props.hpp>
#include <boost/bind.hpp>
-#include <iostream>
using namespace uhd;
using namespace uhd::usrp;
@@ -207,10 +207,11 @@ void usrp_e100_impl::mboard_set(const wax::obj &key, const wax::obj &val){
return;
case MBOARD_PROP_CLOCK_RATE:
- std::cerr << "Helpful message:" << std::endl;
- std::cerr << " I see that you are setting the master clock rate from the API." << std::endl;
- std::cerr << " You may find it more convenient to burn this setting into the EEPROM." << std::endl;
- std::cerr << " See the application notes for USRP-E1XX for further instructions." << std::endl;
+ UHD_MSG(warning)
+ << "I see that you are setting the master clock rate from the API.\n"
+ << "You may find it more convenient to burn this setting into the EEPROM.\n"
+ << "See the application notes for USRP-E1XX for further instructions.\n"
+ ;
_clock_ctrl->set_fpga_clock_rate(val.as<double>());
return;
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp b/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
index 3fa60232e..4247746ab 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
@@ -17,6 +17,7 @@
#include "usrp_e100_impl.hpp"
#include "usrp_e100_regs.hpp"
+#include <uhd/utils/msg.hpp>
#include <uhd/usrp/device_props.hpp>
#include <uhd/usrp/mboard_props.hpp>
#include <uhd/exception.hpp>
@@ -25,7 +26,6 @@
#include <boost/format.hpp>
#include <boost/filesystem.hpp>
#include <boost/functional/hash.hpp>
-#include <iostream>
#include <fstream>
using namespace uhd;
@@ -80,7 +80,7 @@ static device::sptr usrp_e100_make(const device_addr_t &device_addr){
//setup the main interface into fpga
std::string node = device_addr["node"];
- std::cout << boost::format("Opening USRP-E on %s") % node << std::endl;
+ UHD_MSG(status) << boost::format("Opening USRP-E on %s") % node << std::endl;
usrp_e100_iface::sptr iface = usrp_e100_iface::make(node);
//------------------------------------------------------------------
@@ -121,7 +121,7 @@ static device::sptr usrp_e100_make(const device_addr_t &device_addr){
iface.reset();
usrp_e100_load_fpga(usrp_e100_fpga_image);
sleep(1); ///\todo do this better one day.
- std::cout << boost::format("re-Opening USRP-E on %s") % node << std::endl;
+ UHD_MSG(status) << boost::format("re-Opening USRP-E on %s") % node << std::endl;
iface = usrp_e100_iface::make(node);
try{std::ofstream(hash_file_path) << fpga_hash;}catch(...){}
}
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_mmap_zero_copy.cpp b/host/lib/usrp/usrp_e100/usrp_e100_mmap_zero_copy.cpp
index f4274dc5a..26774aeda 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_mmap_zero_copy.cpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_mmap_zero_copy.cpp
@@ -17,19 +17,18 @@
#include "usrp_e100_iface.hpp"
#include <uhd/transport/zero_copy.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/exception.hpp>
#include <linux/usrp_e.h>
#include <sys/mman.h> //mmap
#include <unistd.h> //getpagesize
#include <poll.h> //poll
#include <vector>
-#include <iostream>
using namespace uhd;
using namespace uhd::transport;
-static const bool fp_verbose = false; //fast-path verbose
-static const bool sp_verbose = false; //slow-path verbose
+#define fp_verbose false //fast-path verbose
static const size_t poll_breakout = 10; //how many poll timeouts constitute a full timeout
/***********************************************************************
@@ -43,14 +42,14 @@ public:
void release(void){
if (_info->flags != RB_USER_PROCESS) return;
- if (fp_verbose) std::cout << "recv buff: release" << std::endl;
+ if (fp_verbose) UHD_LOGV(always) << "recv buff: release" << std::endl;
_info->flags = RB_KERNEL; //release the frame
}
bool ready(void){return _info->flags & RB_USER;}
sptr get_new(void){
- if (fp_verbose) std::cout << " make_recv_buff: " << get_size() << std::endl;
+ if (fp_verbose) UHD_LOGV(always) << " make_recv_buff: " << get_size() << std::endl;
_info->flags = RB_USER_PROCESS; //claim the frame
return sptr(this, &usrp_e100_mmap_zero_copy_mrb::fake_deleter);
}
@@ -78,18 +77,18 @@ public:
void commit(size_t len){
if (_info->flags != RB_USER_PROCESS) return;
- if (fp_verbose) std::cout << "send buff: commit " << len << std::endl;
+ if (fp_verbose) UHD_LOGV(always) << "send buff: commit " << len << std::endl;
_info->len = len;
_info->flags = RB_USER; //release the frame
if (::write(_fd, NULL, 0) < 0){ //notifies the kernel
- std::cerr << UHD_THROW_SITE_INFO("write error") << std::endl;
+ UHD_LOGV(rarely) << UHD_THROW_SITE_INFO("write error") << std::endl;
}
}
bool ready(void){return _info->flags & RB_KERNEL;}
sptr get_new(void){
- if (fp_verbose) std::cout << " make_send_buff: " << get_size() << std::endl;
+ if (fp_verbose) UHD_LOGV(always) << " make_send_buff: " << get_size() << std::endl;
_info->flags = RB_USER_PROCESS; //claim the frame
return sptr(this, &usrp_e100_mmap_zero_copy_msb::fake_deleter);
}
@@ -127,15 +126,15 @@ public:
(_rb_size.num_rx_frames + _rb_size.num_tx_frames) * _frame_size;
//print sizes summary
- if (sp_verbose){
- std::cout << "page_size: " << page_size << std::endl;
- std::cout << "frame_size: " << _frame_size << std::endl;
- std::cout << "num_pages_rx_flags: " << _rb_size.num_pages_rx_flags << std::endl;
- std::cout << "num_rx_frames: " << _rb_size.num_rx_frames << std::endl;
- std::cout << "num_pages_tx_flags: " << _rb_size.num_pages_tx_flags << std::endl;
- std::cout << "num_tx_frames: " << _rb_size.num_tx_frames << std::endl;
- std::cout << "map_size: " << _map_size << std::endl;
- }
+ UHD_LOG
+ << "page_size: " << page_size << std::endl
+ << "frame_size: " << _frame_size << std::endl
+ << "num_pages_rx_flags: " << _rb_size.num_pages_rx_flags << std::endl
+ << "num_rx_frames: " << _rb_size.num_rx_frames << std::endl
+ << "num_pages_tx_flags: " << _rb_size.num_pages_tx_flags << std::endl
+ << "num_tx_frames: " << _rb_size.num_tx_frames << std::endl
+ << "map_size: " << _map_size << std::endl
+ ;
//call mmap to get the memory
_mapped_mem = ::mmap(
@@ -150,12 +149,12 @@ public:
size_t send_buff_off = send_info_off + (_rb_size.num_pages_tx_flags * page_size);
//print offset summary
- if (sp_verbose){
- std::cout << "recv_info_off: " << recv_info_off << std::endl;
- std::cout << "recv_buff_off: " << recv_buff_off << std::endl;
- std::cout << "send_info_off: " << send_info_off << std::endl;
- std::cout << "send_buff_off: " << send_buff_off << std::endl;
- }
+ UHD_LOG
+ << "recv_info_off: " << recv_info_off << std::endl
+ << "recv_buff_off: " << recv_buff_off << std::endl
+ << "send_info_off: " << send_info_off << std::endl
+ << "send_buff_off: " << send_buff_off << std::endl
+ ;
//pointers to sections in the mapped memory
ring_buffer_info (*recv_info)[], (*send_info)[];
@@ -186,12 +185,12 @@ public:
}
~usrp_e100_mmap_zero_copy_impl(void){
- if (sp_verbose) std::cout << "cleanup: munmap" << std::endl;
+ UHD_LOG << "cleanup: munmap" << std::endl;
::munmap(_mapped_mem, _map_size);
}
managed_recv_buffer::sptr get_recv_buff(double timeout){
- if (fp_verbose) std::cout << "get_recv_buff: " << _recv_index << std::endl;
+ if (fp_verbose) UHD_LOGV(always) << "get_recv_buff: " << _recv_index << std::endl;
usrp_e100_mmap_zero_copy_mrb &mrb = _mrb_pool[_recv_index];
//poll/wait for a ready frame
@@ -201,7 +200,7 @@ public:
pfd.fd = _fd;
pfd.events = POLLIN;
ssize_t poll_ret = ::poll(&pfd, 1, size_t(timeout*1e3/poll_breakout));
- if (fp_verbose) std::cout << " POLLIN: " << poll_ret << std::endl;
+ if (fp_verbose) UHD_LOGV(always) << " POLLIN: " << poll_ret << std::endl;
if (poll_ret > 0) goto found_user_frame; //good poll, continue on
}
return managed_recv_buffer::sptr(); //timed-out for real
@@ -223,7 +222,7 @@ public:
}
managed_send_buffer::sptr get_send_buff(double timeout){
- if (fp_verbose) std::cout << "get_send_buff: " << _send_index << std::endl;
+ if (fp_verbose) UHD_LOGV(always) << "get_send_buff: " << _send_index << std::endl;
usrp_e100_mmap_zero_copy_msb &msb = _msb_pool[_send_index];
//poll/wait for a ready frame
@@ -232,7 +231,7 @@ public:
pfd.fd = _fd;
pfd.events = POLLOUT;
ssize_t poll_ret = ::poll(&pfd, 1, size_t(timeout*1e3));
- if (fp_verbose) std::cout << " POLLOUT: " << poll_ret << std::endl;
+ if (fp_verbose) UHD_LOGV(always) << " POLLOUT: " << poll_ret << std::endl;
if (poll_ret <= 0) return managed_send_buffer::sptr();
}
generated by cgit v1.2.3 (git 2.46.0) at 2025-10-31 22:52:08 +0000